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Anton Korobeynikov4403b932009-07-16 13:27:25 +00001//===- SystemZInstrInfo.h - SystemZ Instruction Information -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the SystemZ implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGET_SYSTEMZINSTRINFO_H
15#define LLVM_TARGET_SYSTEMZINSTRINFO_H
16
Anton Korobeynikov4403b932009-07-16 13:27:25 +000017#include "SystemZRegisterInfo.h"
Anton Korobeynikovef5deca2009-07-16 13:51:12 +000018#include "llvm/ADT/IndexedMap.h"
19#include "llvm/Target/TargetInstrInfo.h"
Anton Korobeynikov4403b932009-07-16 13:27:25 +000020
21namespace llvm {
22
23class SystemZTargetMachine;
24
25class SystemZInstrInfo : public TargetInstrInfoImpl {
26 const SystemZRegisterInfo RI;
27 SystemZTargetMachine &TM;
Anton Korobeynikovef5deca2009-07-16 13:51:12 +000028 IndexedMap<unsigned> RegSpillOffsets;
Anton Korobeynikov4403b932009-07-16 13:27:25 +000029public:
30 explicit SystemZInstrInfo(SystemZTargetMachine &TM);
31
32 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
33 /// such, whenever a client has an instance of instruction info, it should
34 /// always be able to get register info as well (through this method).
35 ///
36 virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
37
38 bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
39 unsigned DestReg, unsigned SrcReg,
40 const TargetRegisterClass *DestRC,
41 const TargetRegisterClass *SrcRC) const;
42
43 bool isMoveInstr(const MachineInstr& MI,
44 unsigned &SrcReg, unsigned &DstReg,
45 unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
46
47 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator MI,
49 unsigned SrcReg, bool isKill,
50 int FrameIndex,
51 const TargetRegisterClass *RC) const;
52 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
53 MachineBasicBlock::iterator MI,
54 unsigned DestReg, int FrameIdx,
55 const TargetRegisterClass *RC) const;
56
57 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
58 MachineBasicBlock::iterator MI,
59 const std::vector<CalleeSavedInfo> &CSI) const;
60 virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator MI,
62 const std::vector<CalleeSavedInfo> &CSI) const;
63
64 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
65 MachineBasicBlock *FBB,
66 const SmallVectorImpl<MachineOperand> &Cond) const;
67
68};
69
70}
71
72#endif