| Evan Cheng | ffcb95b | 2006-02-21 19:13:53 +0000 | [diff] [blame^] | 1 | //====- X86InstrMMX.td - Describe the X86 Instruction Set -------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the Evan Cheng and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file describes the X86 MMX instruction set, defining the instructions, |
| 11 | // and properties of the instructions which are needed for code generation, |
| 12 | // machine code emission, and analysis. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | // Move Instructions |
| 17 | def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, R32:$src), |
| 18 | "movd {$src, $dst|$dst, $src}", []>, TB, |
| 19 | Requires<[HasMMX]>; |
| 20 | def MOVD64rm : I<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src), |
| 21 | "movd {$src, $dst|$dst, $src}", []>, TB, |
| 22 | Requires<[HasMMX]>; |
| 23 | def MOVD64mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src), |
| 24 | "movd {$src, $dst|$dst, $src}", []>, TB, |
| 25 | Requires<[HasMMX]>; |
| 26 | |
| 27 | def MOVD128rr : I<0x6E, MRMSrcReg, (ops VR128:$dst, R32:$src), |
| 28 | "movd {$src, $dst|$dst, $src}", []>, TB, OpSize, |
| 29 | Requires<[HasSSE2]>; |
| 30 | def MOVD128rm : I<0x6E, MRMSrcMem, (ops VR128:$dst, i32mem:$src), |
| 31 | "movd {$src, $dst|$dst, $src}", []>, TB, OpSize, |
| 32 | Requires<[HasSSE2]>; |
| 33 | def MOVD128mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR128:$src), |
| 34 | "movd {$src, $dst|$dst, $src}", []>, TB, OpSize, |
| 35 | Requires<[HasSSE2]>; |
| 36 | |
| 37 | |
| 38 | def MOVQ64rr : I<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src), |
| 39 | "movq {$src, $dst|$dst, $src}", []>, TB, |
| 40 | Requires<[HasMMX]>; |
| 41 | def MOVQ64rm : I<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src), |
| 42 | "movq {$src, $dst|$dst, $src}", []>, TB, |
| 43 | Requires<[HasMMX]>; |
| 44 | def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src), |
| 45 | "movq {$src, $dst|$dst, $src}", []>, TB, |
| 46 | Requires<[HasMMX]>; |
| 47 | |
| 48 | def MOVQ128rr : I<0x7E, MRMSrcReg, (ops VR128:$dst, VR64:$src), |
| 49 | "movq {$src, $dst|$dst, $src}", []>, XS, |
| 50 | Requires<[HasSSE2]>; |
| 51 | def MOVQ128rm : I<0x7E, MRMSrcMem, (ops VR128:$dst, i64mem:$src), |
| 52 | "movq {$src, $dst|$dst, $src}", []>, XS, |
| 53 | Requires<[HasSSE2]>; |
| 54 | def MOVQ128mr : I<0xD6, MRMSrcMem, (ops i64mem:$dst, VR128:$src), |
| 55 | "movq {$src, $dst|$dst, $src}", []>, TB, OpSize, |
| 56 | Requires<[HasSSE2]>; |
| 57 | |