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fp2-dev
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platform
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llvm
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531ebc8a3cf0fdc5c30d072ab356283ce8dd145f
531ebc8
Add start of user documentation for NVPTX
by Justin Holewinski
· 12 years ago
42734cf
Change '@SECREL' suffix to GAS-compatible '@SECREL32'.
by Benjamin Kramer
· 12 years ago
6ef362a
[docs] llvmbugs is not the place for patches.
by Sean Silva
· 12 years ago
fb7aa39
[docs] Annotate mailing lists with their "name".
by Sean Silva
· 12 years ago
1358565
[docs] Reorganize mailing lists.
by Sean Silva
· 12 years ago
bd1aecb
[docs] Pull IRC and Mailing Lists under a new "Community" heading.
by Sean Silva
· 12 years ago
cad9b9c
[docs] The GEP FAQ is not "design and overview"
by Sean Silva
· 12 years ago
a6a2223
[docs] Put DeveloperPolicy under "Development Process Documentation"
by Sean Silva
· 12 years ago
ddcc82b
Put private class into an anonmyous namespace.
by Benjamin Kramer
· 12 years ago
b24fc1c
[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.
by Justin Holewinski
· 12 years ago
21fdcb0
[NVPTX] Add NVVMReflect pass to allow compile-time selection of
by Justin Holewinski
· 12 years ago
3639ce2
[NVPTX] Run clang-format on all NVPTX sources.
by Justin Holewinski
· 12 years ago
a9f8351
Object: Turn a couple of degenerate for loops into while loops.
by Benjamin Kramer
· 12 years ago
2d10010
Implement XOR reassociation. It is based on following rules:
by Shuxin Yang
· 12 years ago
fd2cd0d
[mips] Add patterns for DSP indexed load instructions.
by Akira Hatanaka
· 12 years ago
175f0fd
[mips] Define reg+imm load/store pattern templates.
by Akira Hatanaka
· 12 years ago
2c2c33a
[mips] Fix DSP instructions to have explicit accumulator register operands.
by Akira Hatanaka
· 12 years ago
7e287bf
Remove unused variables.
by Akira Hatanaka
· 12 years ago
d593a77
[mips] Move the code which does dag-combine for multiply-add/sub nodes to
by Akira Hatanaka
· 12 years ago
f5926fd
[mips] Fix definitions of multiply, multiply-add/sub and divide instructions.
by Akira Hatanaka
· 12 years ago
9cf0724
[mips] Remove function getFPBranchCodeFromCond. Rename invertFPCondCodeAdd.
by Akira Hatanaka
· 12 years ago
2459afe
Fix indentation.
by Akira Hatanaka
· 12 years ago
dd95892
[mips] Add mips-specific nodes which will be used to select multiply and divide
by Akira Hatanaka
· 12 years ago
cbcdcfb
[mips] Implement getRepRegClassFor in MipsSETargetLowering. This function is
by Akira Hatanaka
· 12 years ago
8f4d380
[mips] Fix MipsSEInstrInfo::copyPhysReg, loadRegFromStack and storeRegToStack
by Akira Hatanaka
· 12 years ago
d6a7782
[mips] Expand pseudo load, store and copy instructions right before
by Akira Hatanaka
· 12 years ago
2cd7d3f
[mips] Define pseudo instructions for spilling and copying accumulator
by Akira Hatanaka
· 12 years ago
f7cef70
Use SmallVectorImpl instead of SmallVector at the uses.
by Eric Christopher
· 12 years ago
d696544
Run the ObjCARCContract pass for LTO. <rdar://problem/13538084>
by Bob Wilson
· 12 years ago
2030d5f
Updated test0 of retain-not-declared.ll to reflect the fact that objc-arc-expand runs before objc-arc/objc-arc-contract.
by Michael Gottesman
· 12 years ago
e1e9366
SmallVector and SmallPtrSet allocations now power-of-two aligned.
by Jean-Luc Duprat
· 12 years ago
4991289
[docs] The STL "binary search" has a non-obvious name.
by Sean Silva
· 12 years ago
7d21a64
Exclude the X86/complex-fca.ll test at it probably wasn't supposed to work on Windows
by Timur Iskhodzhanov
· 12 years ago
3e9f3a0
Add clang.arc.used to ModuleHasARC so ARC always runs if said call is present in a module.
by Michael Gottesman
· 12 years ago
2a88555
Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
by Jyotsna Verma
· 12 years ago
2df938a
Use 12 as the magic number for our abbreviation data and our
by Eric Christopher
· 12 years ago
c126c32
Move the construction of the skeleton compile unit after the
by Eric Christopher
· 12 years ago
22313e5
move testcase into appropriate X86 subdirectory.
by Adrian Prantl
· 12 years ago
0882fd6
Implement FRINT lowering on PPC using frin
by Hal Finkel
· 12 years ago
5114226
[mips] Define a function which returns the GPR register class.
by Akira Hatanaka
· 12 years ago
bc4de7c
Fix TableGen subtarget-emitter to handle A9/Swift.
by Andrew Trick
· 12 years ago
71246fb
Build fixes for STLPort + GCC
by Matt Arsenault
· 12 years ago
7d4ff60
Fix loop style
by Matt Arsenault
· 12 years ago
f24caa4
Split the llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m testcase into a CFE and LLVM part.
by Adrian Prantl
· 12 years ago
74a4533
Remove the old CodePlacementOpt pass.
by Benjamin Kramer
· 12 years ago
975ee54
Fix a typo
by Nadav Rotem
· 12 years ago
65063fe
Hexagon: Disable DwarfUsesInlineInfoSection flag.
by Jyotsna Verma
· 12 years ago
f5d5c43
Add PPC FP rounding instructions fri[mnpz]
by Hal Finkel
· 12 years ago
ef484a3
Revert "Fix allocations of SmallVector and SmallPtrSet so they are more prone to"
by Rafael Espindola
· 12 years ago
6173309
Fix allocations of SmallVector and SmallPtrSet so they are more prone to
by Jean-Luc Duprat
· 12 years ago
ae07bf3
Removed trailing whitespace.
by Michael Gottesman
· 12 years ago
fda56e5
[mips] Change type of accumulator registers to Untyped. Add two more accumulator
by Akira Hatanaka
· 12 years ago
c713e99
[mips] Define overloaded versions of storeRegToStack and loadRegFromStack.
by Akira Hatanaka
· 12 years ago
8c0b9b0
[mips] Add parameter Alignment to MipsFrameLowering's constructor.
by Akira Hatanaka
· 12 years ago
1cbd401
Revert r178166. According to Howard, this code is actually ok.
by Dan Gohman
· 12 years ago
af7da5c
[Mips Assembler] Add support for OR macro with imediate opperand
by Jack Carter
· 12 years ago
c26392a
Add support of RDSEED defined in AVX2 extension
by Michael Liao
· 12 years ago
258d9b7
Enhance boolean simplification to handle 16-/64-bit RDRAND
by Michael Liao
· 12 years ago
816f6d0
Skip moving call address loading into callseq when targets prefer register indirect call.
by Michael Liao
· 12 years ago
d02e46b
Removed dead code from ObjCARCOpts relating to tracking objc_retainBlocks through the ARC Dataflow analysis. By the time we get to the ARC dataflow analysis, any objc_retainBlock calls are not optimizable.
by Michael Gottesman
· 12 years ago
7ae3bb8
[fast-isel] Add a preemptive fix for the case where we fail to materialize an
by Chad Rosier
· 12 years ago
94fcfaf
[Mips Assembler] Add alias definitions for jal
by Jack Carter
· 12 years ago
bad24f7
Add the X86 FMAs to the scheduling model.
by Nadav Rotem
· 12 years ago
f2a2806
Minor simplification.
by Bill Wendling
· 12 years ago
59af9d0
Add the Haswell machine model.
by Nadav Rotem
· 12 years ago
0b6a69d
Remove the unused port from the SandyBridge machine model
by Nadav Rotem
· 12 years ago
5a8386e
Add ADX CPUID detection
by Michael Liao
· 12 years ago
8e4cd40
These two are default in the constructor for MCAsmInfo.
by Eric Christopher
· 12 years ago
a46f82d
Make Win32 put the SRet address into EAX, fixes PR15556
by Timur Iskhodzhanov
· 12 years ago
af0d148
Specify CPUs on the PPC bswap-load-store test
by Hal Finkel
· 12 years ago
2544f22
Only enable 64-bit bswap DAG combines for PPC64
by Hal Finkel
· 12 years ago
3832eff
Non optimizable objc_retainBlock calls are not forwarding.
by Michael Gottesman
· 12 years ago
0d92a3c
[ObjCARC] Strength reduce objc_retainBlock -> objc_retain if the objc_retainBlock is optimizable.
by Michael Gottesman
· 12 years ago
810848d
Hexagon: Replace switch-case in isDotNewInst with TSFlags.
by Jyotsna Verma
· 12 years ago
b52980b
Fix bad indentation in r178276
by Hal Finkel
· 12 years ago
e41c7d4
Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.
by Jyotsna Verma
· 12 years ago
fc822ce
Remove -O3.
by Akira Hatanaka
· 12 years ago
53774a8
Use direct types in most PowerPC Altivec instructions and patterns.
by Bill Schmidt
· 12 years ago
efdd467
Add the PPC64 ldbrx/stdbrx instructions
by Hal Finkel
· 12 years ago
ce88835
Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when the upper bit is set.
by Gordon Keiser
· 12 years ago
93b1078
Testing commit access to llvm. Remove two lines of whitespace from the Thumb README.
by Gordon Keiser
· 12 years ago
7f5f06b
Correct spelling of Git.
by Thomas Schwinge
· 12 years ago
30509ee
Move test since it depends on the X86 backend.
by Rafael Espindola
· 12 years ago
4f2ef94
Hexagon: Use multiclass for gp-relative instructions.
by Jyotsna Verma
· 12 years ago
aab2305
Seciton 24.2.2 of the C++ standard, [iterator.iterators], Table 106
by Howard Hinnant
· 12 years ago
42a1b2f
AArch64: implement GICv3 system registers
by Tim Northover
· 12 years ago
c53ab4d
Add the PPC64 popcntd instruction
by Hal Finkel
· 12 years ago
f464481
[tsan] make sure memset/memcpy/memmove are not inlined in tsan mode
by Kostya Serebryany
· 12 years ago
21fb019
Revert "Updated ELF relocation test for .eh_frame section"
by Michael Gottesman
· 12 years ago
9f41d22
Disable JIT/MCJIT tests in unittests/ExecutionEngine for the targets that don't support JIT.
by Jyotsna Verma
· 12 years ago
d957f95
Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions
by Hal Finkel
· 12 years ago
d01efc7
Fix typo in PPCInstr64Bit
by Hal Finkel
· 12 years ago
72dfb05
Revert "Adding DIImportedModules to DIScopes."
by David Blaikie
· 12 years ago
d7216a2
Check if Type is a vector before calling function Type::getVectorNumElements.
by Akira Hatanaka
· 12 years ago
1fd36e4
This patch follows is a follow up to r178171, which uses the register
by Preston Gurd
· 12 years ago
c8d6536
Updated ELF relocation test for .eh_frame section
by Jack Carter
· 12 years ago
dd40e8c
[ms-inline asm] Add support of imm displacement before bracketed memory
by Chad Rosier
· 12 years ago
f25f93b
Resynchronize isLoadFromStackSlot with LoadRegFromStackSlot (and stores) in PPCInstrInfo
by Hal Finkel
· 12 years ago
09d27fb
test file name change to correct typo
by Jack Carter
· 12 years ago
1edadea
by Preston Gurd
· 12 years ago
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