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79f06f3cbcf2cb0394d33382186c31f2967cb400
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f91488c
Fix the stats collection for fast-isel. The failed count was only accounting
by Chad Rosier
· 13 years ago
2929de4
There are already problems with building LLVM under VS2005, and it's
by Chandler Carruth
· 13 years ago
b598b04
ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.
by Jim Grosbach
· 13 years ago
48b368b
ARM assembly parsing for RRX mnemonic.
by Jim Grosbach
· 13 years ago
cd75e44
Added missing comment about new custom lowering of DEC64
by Pete Cooper
· 13 years ago
c3aa7c5
Disable expensive two-address optimizations at -O0. rdar://10453055
by Evan Cheng
· 13 years ago
508a1f4
Check to make sure we can select the instruction before trying to put the
by Chad Rosier
· 13 years ago
14117c4
Disable the assertion again. Looks like fastisel is still generating bad kill markers.
by Evan Cheng
· 13 years ago
23f2207
ARM mode aliases for bitwise instructions w/ register operands.
by Jim Grosbach
· 13 years ago
d0405aa
Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.
by Bob Wilson
· 13 years ago
5c283e9
lib/Target/ARM/CMakeLists.txt: Disable optimization in ARMISelLowering.cpp also on MSC15(aka VS9). Seems miscompiled.
by NAKAMURA Takumi
· 13 years ago
b95fc31
Sink codegen optimization level into MCCodeGenInfo along side relocation model
by Evan Cheng
· 13 years ago
f1b41dd
Record landing pads with a SmallSetVector to avoid multiple entries.
by Bob Wilson
· 13 years ago
12755b0
Fix the execution domain on a bunch of SSE/AVX instructions.
by Craig Topper
· 13 years ago
20c918d
Update the SP in the SjLj jmpbuf whenever it changes. <rdar://problem/10444602>
by Bob Wilson
· 13 years ago
eaab6ef
Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602>
by Bob Wilson
· 13 years ago
2713d04
Remove code to enable execution dependency fix pass on VR256. VR128 is sufficient after r144636.
by Craig Topper
· 13 years ago
0a405ae
Revert r144568 now that r144730 has fixed the fast-isel kill marker bug.
by Evan Cheng
· 13 years ago
f8f558d
Fix typo in test.
by Nick Lewycky
· 13 years ago
ae10dd2
Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it when
by Nick Lewycky
· 13 years ago
9bad88a
If the 2addr instruction has other kills, don't move it below any other uses since we don't want to extend other live ranges.
by Evan Cheng
· 13 years ago
2bee6a8
RescheduleKillAboveMI() must backtrack to before the rescheduled DBG_VALUE instructions. rdar://10451185
by Evan Cheng
· 13 years ago
ae7db7a
Process all uses first before defs to accurately capture register liveness. rdar://10449480
by Evan Cheng
· 13 years ago
ee94dc2
Fix testcase.
by Eli Friedman
· 13 years ago
d577df8
CONCAT_VECTORS can have more than two operands. PR11389.
by Eli Friedman
· 13 years ago
b91b600
Add a couple asserts so it will be easier to debug if we accidentally pass indexed loads/stores to the legalizer.
by Eli Friedman
· 13 years ago
a9a4f5e
Remove extra ,.
by Michael J. Spencer
· 13 years ago
800e03f
AddressSanitizer, first commit (compiler module only)
by Kostya Serebryany
· 13 years ago
8a2549f
Object/Archive: Give Child a operator < for map.
by Michael J. Spencer
· 13 years ago
dc29663
Support/COFF: Add structs and enums from the standard for image files.
by Michael J. Spencer
· 13 years ago
f81285c
llvm-objdump: Ignore non-objects in archives.
by Michael J. Spencer
· 13 years ago
a2a2d1f
test commit to verify that commit access works (added blank line)
by Kostya Serebryany
· 13 years ago
99aa14f
Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
by Owen Anderson
· 13 years ago
79f0bfc
Fix SCEV overly optimistic back edge taken count for multi-exit loops.
by Andrew Trick
· 13 years ago
f56c60b
Add FIXME comment.
by Chad Rosier
· 13 years ago
3805d85
Enable -widen-vmovs by default.
by Jakob Stoklund Olesen
· 13 years ago
8368f74
Stabilize the output of the dwarf accelerator tables. Fixes a comparison
by Eric Christopher
· 13 years ago
22b34cc
GEPs with all zero indices are trivially coalesced by fast-isel. For example,
by Chad Rosier
· 13 years ago
e43862b
ARM assembly parsing for register range syntax for VLD/VST register lists.
by Jim Grosbach
· 13 years ago
6ac5b16
Merge ObjCPropertyDebugInfo.html into SourceLevelDebugging.html
by Devang Patel
· 13 years ago
5b2fb20
ARM assembly parsing for data type suffices on NEON VMOV aliases.
by Jim Grosbach
· 13 years ago
de63112
Fix MSVC warnings by adding a cast.
by Nadav Rotem
· 13 years ago
f8c10e5
AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code.
by Nadav Rotem
· 13 years ago
62f009a
jakob fixed X87 inline asm!
by Chris Lattner
· 13 years ago
2fdd005
add ImmutableSet/Map dox, patch by Caitlin Sadowski!
by Chris Lattner
· 13 years ago
ec0af2f
test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64.
by NAKAMURA Takumi
· 13 years ago
9f302c4
ARM assembly parsing two operand forms for shift instructions.
by Jim Grosbach
· 13 years ago
7b95c38
add PTX backend info
by Chris Lattner
· 13 years ago
88d012a
ARM VFP assembly parsing for VADD and VSUB two-operand forms.
by Jim Grosbach
· 13 years ago
6cb4b08
ARM accept an immediate offset in memory operands w/o the '#'.
by Jim Grosbach
· 13 years ago
dec23b6
some notes.
by Chris Lattner
· 13 years ago
2d49689
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
by Pete Cooper
· 13 years ago
5c984e4
ARM enclosing curly braces optional on one-register VLD/VST instruction lists.
by Jim Grosbach
· 13 years ago
5381cbf
Update section "MIPS Target Improvements" in the llvm 3.0 release notes.
by Akira Hatanaka
· 13 years ago
eaf2056
ARM size suffix on VFP single-precision 'vmov' is optional.
by Jim Grosbach
· 13 years ago
d2df64f
Insert modified DBG_VALUE into LiveDbgValueMap.
by Devang Patel
· 13 years ago
25e0a87
Fix typo.
by Jim Grosbach
· 13 years ago
19885de
ARM alternate size suffices for VTRN instructions.
by Jim Grosbach
· 13 years ago
22925d9
Fix a misplaced paren bug.
by Owen Anderson
· 13 years ago
a68e90c
ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.
by Jim Grosbach
· 13 years ago
bfb0a17
ARM assembly parsing for two-operand form of 'mul' instruction.
by Jim Grosbach
· 13 years ago
d2586da
ARM assembly parsing for two-operand form of 'mul' instruction.
by Jim Grosbach
· 13 years ago
908f923
Testcase for r144684.
by Jim Grosbach
· 13 years ago
7f1ec95
Thumb2 two-operand 'mul' instruction wide encoding parsing.
by Jim Grosbach
· 13 years ago
b589be9
Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VMOVv4f32.
by Owen Anderson
· 13 years ago
1de0bd1
Thumb2 assembly parsing for mul.w in IT block fix.
by Jim Grosbach
· 13 years ago
b5ccb25
StringRefize and simplify.
by Benjamin Kramer
· 13 years ago
6c5b2dc
We currently use a callback to handle an IL pass deleting a BB that still
by Rafael Espindola
· 13 years ago
1b71950
Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit
by Akira Hatanaka
· 13 years ago
ac20aad
Set nomacro before emitting the sequence of instructions that set global pointer
by Akira Hatanaka
· 13 years ago
1604085
Simplify function PassByValArg64.
by Akira Hatanaka
· 13 years ago
00e1fa4
Remove function printMipsSymbolRef.
by Akira Hatanaka
· 13 years ago
2bbb7e3
Remove Value::getNameStr. It has been deprecated for a while and provides no additional value over getName().
by Benjamin Kramer
· 13 years ago
2774dc0
Missed some users of Value::getNameStr.
by Benjamin Kramer
· 13 years ago
870b3b2
Delete files.
by Akira Hatanaka
· 13 years ago
73c38f0
Remove MipsMCSymbolRefExpr.
by Akira Hatanaka
· 13 years ago
c5a6a68
ARM parsing datatype suffix variants for register-writeback VLD1/VST1 instructions.
by Jim Grosbach
· 13 years ago
946227d
Tidy up. 80 columns.
by Jim Grosbach
· 13 years ago
a7b0cb7
Remove all remaining uses of Value::getNameStr().
by Benjamin Kramer
· 13 years ago
25ad1cc
Twinify GraphWriter a little bit.
by Benjamin Kramer
· 13 years ago
d1bfc30
Check all overlaps when looking for used registers.
by Jakob Stoklund Olesen
· 13 years ago
2151acf
Enable promote elements since the upstream has fixed it.
by Logan Chien
· 13 years ago
36abbec
Apply changes to migrate to llvm upstream r144606.
by Logan Chien
· 13 years ago
f4a5084
Make use of MachinePointerInfo::getFixedStack.
by Jay Foad
· 13 years ago
8c2e352
Remove some unnecessary includes of PseudoSourceValue.h.
by Jay Foad
· 13 years ago
bf8356b
Fix typo in comment.
by Jay Foad
· 13 years ago
978e0df
Make use of MachinePointerInfo::getFixedStack. This removes all mention
by Jay Foad
· 13 years ago
d9190c0
Remove some unnecessary includes of PseudoSourceValue.h.
by Jay Foad
· 13 years ago
f805a7c
Revert r144611 and r144613.
by Jakob Stoklund Olesen
· 13 years ago
f9c1b92
Merge with LLVM upstream r144606 (Nov 15th 2011)
by Logan Chien
· 13 years ago
44ec9fd
Fix PR11370 for real. Prevents converting 256-bit FP instruction to AVX2 256-bit integer instructions when AVX2 isn't enabled.
by Craig Topper
· 13 years ago
f178418
Set SeenStore to true to prevent loads from being moved; also eliminates a non-deterministic behavior.
by Evan Cheng
· 13 years ago
3273c89
Rather than trying to use the loop block sequence *or* the function
by Chandler Carruth
· 13 years ago
4c077a1
Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370.
by Craig Topper
· 13 years ago
283b419
include/llvm/Support/Compiler.h: Invalidate LLVM_ATTRIBUTE_WEAK on cygming for now.
by NAKAMURA Takumi
· 13 years ago
ff70467
Really fix test.
by Jakob Stoklund Olesen
· 13 years ago
3c84ec0
Allow for depencendy-breaking instructions before cvt*.
by Jakob Stoklund Olesen
· 13 years ago
eaa192a
Add vmov.f32 to materialize f32 immediate splats which cannot be handled by
by Evan Cheng
· 13 years ago
bfc9429
ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.
by Jim Grosbach
· 13 years ago
e7c1aef
Move WEAK marking to the declaration.
by Nick Lewycky
· 13 years ago
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