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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 79f06f3cbcf2cb0394d33382186c31f2967cb400 / lib
  1. d577df8 CONCAT_VECTORS can have more than two operands. PR11389. by Eli Friedman · 13 years ago
  2. b91b600 Add a couple asserts so it will be easier to debug if we accidentally pass indexed loads/stores to the legalizer. by Eli Friedman · 13 years ago
  3. 800e03f AddressSanitizer, first commit (compiler module only) by Kostya Serebryany · 13 years ago
  4. a2a2d1f test commit to verify that commit access works (added blank line) by Kostya Serebryany · 13 years ago
  5. 99aa14f Rename MVT::untyped to MVT::Untyped to match similar nomenclature. by Owen Anderson · 13 years ago
  6. 79f0bfc Fix SCEV overly optimistic back edge taken count for multi-exit loops. by Andrew Trick · 13 years ago
  7. f56c60b Add FIXME comment. by Chad Rosier · 13 years ago
  8. 3805d85 Enable -widen-vmovs by default. by Jakob Stoklund Olesen · 13 years ago
  9. 8368f74 Stabilize the output of the dwarf accelerator tables. Fixes a comparison by Eric Christopher · 13 years ago
  10. 22b34cc GEPs with all zero indices are trivially coalesced by fast-isel. For example, by Chad Rosier · 13 years ago
  11. e43862b ARM assembly parsing for register range syntax for VLD/VST register lists. by Jim Grosbach · 13 years ago
  12. 5b2fb20 ARM assembly parsing for data type suffices on NEON VMOV aliases. by Jim Grosbach · 13 years ago
  13. de63112 Fix MSVC warnings by adding a cast. by Nadav Rotem · 13 years ago
  14. f8c10e5 AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code. by Nadav Rotem · 13 years ago
  15. 9f302c4 ARM assembly parsing two operand forms for shift instructions. by Jim Grosbach · 13 years ago
  16. 88d012a ARM VFP assembly parsing for VADD and VSUB two-operand forms. by Jim Grosbach · 13 years ago
  17. 6cb4b08 ARM accept an immediate offset in memory operands w/o the '#'. by Jim Grosbach · 13 years ago
  18. 2d49689 Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used by Pete Cooper · 13 years ago
  19. 5c984e4 ARM enclosing curly braces optional on one-register VLD/VST instruction lists. by Jim Grosbach · 13 years ago
  20. eaf2056 ARM size suffix on VFP single-precision 'vmov' is optional. by Jim Grosbach · 13 years ago
  21. d2df64f Insert modified DBG_VALUE into LiveDbgValueMap. by Devang Patel · 13 years ago
  22. 25e0a87 Fix typo. by Jim Grosbach · 13 years ago
  23. 19885de ARM alternate size suffices for VTRN instructions. by Jim Grosbach · 13 years ago
  24. 22925d9 Fix a misplaced paren bug. by Owen Anderson · 13 years ago
  25. a68e90c ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns. by Jim Grosbach · 13 years ago
  26. bfb0a17 ARM assembly parsing for two-operand form of 'mul' instruction. by Jim Grosbach · 13 years ago
  27. d2586da ARM assembly parsing for two-operand form of 'mul' instruction. by Jim Grosbach · 13 years ago
  28. 7f1ec95 Thumb2 two-operand 'mul' instruction wide encoding parsing. by Jim Grosbach · 13 years ago
  29. b589be9 Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VMOVv4f32. by Owen Anderson · 13 years ago
  30. 1de0bd1 Thumb2 assembly parsing for mul.w in IT block fix. by Jim Grosbach · 13 years ago
  31. b5ccb25 StringRefize and simplify. by Benjamin Kramer · 13 years ago
  32. 6c5b2dc We currently use a callback to handle an IL pass deleting a BB that still by Rafael Espindola · 13 years ago
  33. 1b71950 Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit by Akira Hatanaka · 13 years ago
  34. ac20aad Set nomacro before emitting the sequence of instructions that set global pointer by Akira Hatanaka · 13 years ago
  35. 1604085 Simplify function PassByValArg64. by Akira Hatanaka · 13 years ago
  36. 00e1fa4 Remove function printMipsSymbolRef. by Akira Hatanaka · 13 years ago
  37. 2bbb7e3 Remove Value::getNameStr. It has been deprecated for a while and provides no additional value over getName(). by Benjamin Kramer · 13 years ago
  38. 2774dc0 Missed some users of Value::getNameStr. by Benjamin Kramer · 13 years ago
  39. 870b3b2 Delete files. by Akira Hatanaka · 13 years ago
  40. 73c38f0 Remove MipsMCSymbolRefExpr. by Akira Hatanaka · 13 years ago
  41. c5a6a68 ARM parsing datatype suffix variants for register-writeback VLD1/VST1 instructions. by Jim Grosbach · 13 years ago
  42. 946227d Tidy up. 80 columns. by Jim Grosbach · 13 years ago
  43. a7b0cb7 Remove all remaining uses of Value::getNameStr(). by Benjamin Kramer · 13 years ago
  44. 25ad1cc Twinify GraphWriter a little bit. by Benjamin Kramer · 13 years ago
  45. d1bfc30 Check all overlaps when looking for used registers. by Jakob Stoklund Olesen · 13 years ago
  46. 2151acf Enable promote elements since the upstream has fixed it. by Logan Chien · 13 years ago
  47. 36abbec Apply changes to migrate to llvm upstream r144606. by Logan Chien · 13 years ago
  48. f4a5084 Make use of MachinePointerInfo::getFixedStack. by Jay Foad · 13 years ago
  49. 8c2e352 Remove some unnecessary includes of PseudoSourceValue.h. by Jay Foad · 13 years ago
  50. bf8356b Fix typo in comment. by Jay Foad · 13 years ago
  51. 978e0df Make use of MachinePointerInfo::getFixedStack. This removes all mention by Jay Foad · 13 years ago
  52. d9190c0 Remove some unnecessary includes of PseudoSourceValue.h. by Jay Foad · 13 years ago
  53. f9c1b92 Merge with LLVM upstream r144606 (Nov 15th 2011) by Logan Chien · 13 years ago
  54. 44ec9fd Fix PR11370 for real. Prevents converting 256-bit FP instruction to AVX2 256-bit integer instructions when AVX2 isn't enabled. by Craig Topper · 13 years ago
  55. f178418 Set SeenStore to true to prevent loads from being moved; also eliminates a non-deterministic behavior. by Evan Cheng · 13 years ago
  56. 3273c89 Rather than trying to use the loop block sequence *or* the function by Chandler Carruth · 13 years ago
  57. 4c077a1 Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370. by Craig Topper · 13 years ago
  58. eaa192a Add vmov.f32 to materialize f32 immediate splats which cannot be handled by by Evan Cheng · 13 years ago
  59. bfc9429 ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions. by Jim Grosbach · 13 years ago
  60. e7c1aef Move WEAK marking to the declaration. by Nick Lewycky · 13 years ago
  61. c2ecf3e Break false dependencies before partial register updates. by Jakob Stoklund Olesen · 13 years ago
  62. 2947f73 Track register ages more accurately. by Jakob Stoklund Olesen · 13 years ago
  63. ec381a4 Fix linking for some users who already have tsan enabled code and are trying to by Nick Lewycky · 13 years ago
  64. dd47e0b ARM parsing datatype suffix variants for non-writeback VST1 instructions. by Jim Grosbach · 13 years ago
  65. e052b9a ARM parsing datatype suffix variants for non-writeback VLD1 instructions. by Jim Grosbach · 13 years ago
  66. 04db7f7 Add explanatory comment. by Jim Grosbach · 13 years ago
  67. 0530d0d Split out the plain '.{8|16|32|64}' suffix handling. by Jim Grosbach · 13 years ago
  68. ef44876 ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions. by Jim Grosbach · 13 years ago
  69. 2c42b8c Supporting inline memmove isn't going to be worthwhile. The only way to avoid by Chad Rosier · 13 years ago
  70. ffc658b ARM VLDR/VSTR instructions don't need a size suffix. by Jim Grosbach · 13 years ago
  71. 8899024 Refactor capture tracking (which already had a couple flags for whether returns by Nick Lewycky · 13 years ago
  72. 909cb4f Add support for inlining small memcpys. rdar://10412592 by Chad Rosier · 13 years ago
  73. e489af8 Fix a performance regression from r144565. Positive offsets were being lowered by Chad Rosier · 13 years ago
  74. 02e3d92 ARM assembly parsing type suffix options for VLDR/VSTR. by Jim Grosbach · 13 years ago
  75. 8aee7d8 Avoid dereferencing off the beginning of lists. by Evan Cheng · 13 years ago
  76. 41e0017 At -O0, multiple uses of a virtual registers in the same BB are being marked by Evan Cheng · 13 years ago
  77. 4d0a9ff Add support for tsan annotations (thread sanitizer, a valgrind-based tool). by Nick Lewycky · 13 years ago
  78. 76c8f08 Add a missing pattern for X86ISD::MOVLPD. rdar://10436044 by Evan Cheng · 13 years ago
  79. 57b2997 Add support for Thumb load/stores with negative offsets. rdar://10412592 by Chad Rosier · 13 years ago
  80. 6296ee3 Unbreak Release builds. by Benjamin Kramer · 13 years ago
  81. 2a4410d Teach two-address pass to re-schedule two-address instructions (or the kill by Evan Cheng · 13 years ago
  82. a77214a Changed SSE4/AVX <2 x i64> extract and insert ops to be Custom lowered by Pete Cooper · 13 years ago
  83. b518cae Fold ConstantVector::isAllOnesValue into Constant::isAllOnesValue and simplify it. by Benjamin Kramer · 13 years ago
  84. 788dc0f 32-to-64-bit extended load. by Akira Hatanaka · 13 years ago
  85. 4961709 AnalyzeCallOperands function for N32/64. by Akira Hatanaka · 13 years ago
  86. bad53f4 Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64. by Akira Hatanaka · 13 years ago
  87. a3f7e22 PTX: Let LLVM use loads/stores for all mem* intrinsics, instead of relying on custom implementations. by Justin Holewinski · 13 years ago
  88. 47a4ab8 Remove variable that keeps the size of area used to save byval or variable by Akira Hatanaka · 13 years ago
  89. f054e19 Fix early-clobber handling in shrinkToUses. by Jakob Stoklund Olesen · 13 years ago
  90. 96b685b Disable generation of compact unwind encodings. <rdar://problem/10441578> by Bob Wilson · 13 years ago
  91. 430052b Tidy up. 80 column. by Jim Grosbach · 13 years ago
  92. aa5354c Make headers standalone, move a virtual method out of line. by Benjamin Kramer · 13 years ago
  93. f2a027e Update LLVM to svn 144354. by Stephen Hines · 13 years ago
  94. 4fffbb4 If we have a DIE with an AT_specification use that instead of the normal by Eric Christopher · 13 years ago
  95. e8c7497 Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which by Eli Friedman · 13 years ago
  96. 66539bc Reenable compact unwinding now that <rdar://problem/10430076> is fixed. by Bill Wendling · 13 years ago
  97. d8fb2f4 If we have to reset the calculation of the compact encoding, then also reset the by Bill Wendling · 13 years ago
  98. 39c7472 Add support for using MVN to materialize negative constants. rdar://10412592 by Chad Rosier · 13 years ago
  99. 8e725eb Disable compact unwind generation until I can solve the codegen problems. by Bill Wendling · 13 years ago
  100. 45daa4d LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler. by Daniel Dunbar · 13 years ago