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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 8019aac390baf43b3907d92928bad7fbe62588c6 / lib / Target / Mips
  1. 8019aac Merge with upstream LLVM @152063 by Stephen Hines · 12 years ago
  2. c02a5c5 Merge branch 'upstream' into merge-20120305 by Stephen Hines · 12 years ago
  3. c6449b6 Make MCRegisterInfo available to the the MCInstPrinter. by Jim Grosbach · 12 years ago
  4. 9ebfbf8 Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. by Craig Topper · 12 years ago
  5. e4fd907 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 12 years ago
  6. 015f228 Use uint16_t to store registers in callee saved register tables to reduce size of static data. by Craig Topper · 12 years ago
  7. b2930b9 Changes for migrating to using register mask operands. by Akira Hatanaka · 12 years ago
  8. dfa27ae Fix bugs which were introduced when support for base+index floating point loads by Akira Hatanaka · 12 years ago
  9. e9e520f Pass endian information to constructors. Define separate functions to create by Akira Hatanaka · 12 years ago
  10. 4bfcd4a Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call. by Evan Cheng · 12 years ago
  11. 20bd529 Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part. by Daniel Dunbar · 12 years ago
  12. bb481f8 remove blanks, and some code format by Jia Liu · 12 years ago
  13. ec52aaa Some ARM implementaions, e.g. A-series, does return stack prediction. That is, by Evan Cheng · 12 years ago
  14. 980a999 Add comments. by Akira Hatanaka · 12 years ago
  15. b75673b Do not reserve $gp as a dedicated global base register if the target ABI is not O32. by Akira Hatanaka · 12 years ago
  16. 44b6c71 Add support for floating point base register + offset register addressing mode by Akira Hatanaka · 12 years ago
  17. 3d14b9e Remove unnecessary template parameters. by Akira Hatanaka · 12 years ago
  18. b90113a Fix instruction predicates that were not set correctly. by Akira Hatanaka · 12 years ago
  19. c4a238c delete useless comment&blank by Jia Liu · 12 years ago
  20. e4ea241 Add definitions of floating point multiply add/sub and negative multiply by Akira Hatanaka · 12 years ago
  21. 648f00c Add an option to use a virtual register as the global base register instead of by Akira Hatanaka · 12 years ago
  22. 8060356 comment fix by Jia Liu · 12 years ago
  23. c2e2dcd some comment fix by Jia Liu · 12 years ago
  24. fc77014 replace a balnk with - by Jia Liu · 12 years ago
  25. 1711cdf 80 columns of Mips InstPrinter Makefile by Jia Liu · 12 years ago
  26. 44d2382 Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. by Craig Topper · 12 years ago
  27. 5990bd7 Use a function in MathExtras to do sign extension. by Akira Hatanaka · 12 years ago
  28. b0934ab Remove dead code. Improve llvm_unreachable text. Simplify some control flow. by Ahmed Charles · 12 years ago
  29. c570711 remove Emacs-tag form .cpp files in Mips Backend, and fix some typo. by Jia Liu · 12 years ago
  30. 38bdc57 Do not promote i32 arguments to i64. This was causing unnecessary sign extension by Akira Hatanaka · 12 years ago
  31. 8f5e8c1 add Emacs tag and fix some comment error in file headers by Jia Liu · 12 years ago
  32. 178d870 Remove comment. by Akira Hatanaka · 12 years ago
  33. e318677 Remove trailing whitespace. Add newline. by Akira Hatanaka · 12 years ago
  34. bc21981 Convert assert(0) to llvm_unreachable by Craig Topper · 12 years ago
  35. 655b8de Convert assert(0) to llvm_unreachable by Craig Topper · 12 years ago
  36. 061efcf TargetPassConfig: confine the MC configuration to TargetMachine. by Andrew Trick · 12 years ago
  37. 843ee2e Added TargetPassConfig. The first little step toward configuring codegen passes. by Andrew Trick · 12 years ago
  38. 6c2cf8b Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is by Akira Hatanaka · 12 years ago
  39. 3f5b107 Set the correct stack pointer register. by Akira Hatanaka · 12 years ago
  40. 590baca Expand EHSELECTION and EHSELECTION nodes. Set the correct exception pointer and by Akira Hatanaka · 12 years ago
  41. 1ad175e Add DWARF numbers of 64-bit registers. by Akira Hatanaka · 12 years ago
  42. 2d8955a Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and MIPS ELF backends. by James Molloy · 12 years ago
  43. 4bd73ca Mark 64-bit register RA_64 unused too. by Akira Hatanaka · 13 years ago
  44. de5a0b6 Modify MipsFrameLowering::emitPrologue and emitEpilogue. by Akira Hatanaka · 13 years ago
  45. 36e91e9 Modify MipsRegisterInfo::eliminateFrameIndex to use MipsAnalyzeImmediate to by Akira Hatanaka · 13 years ago
  46. 50da3cb MipsAnalyzeImmediate.h: Fix to add DataTypes.h for msvc. by NAKAMURA Takumi · 13 years ago
  47. e0794d3 Target/Mips: Unbreak CMake build. by NAKAMURA Takumi · 13 years ago
  48. 57fa382 Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. by Akira Hatanaka · 13 years ago
  49. dc81eae Add class MipsAnalyzeImmediate which comes up with an instruction sequence to by Akira Hatanaka · 13 years ago
  50. 25dae8f Sign-extend 32-bit integer arguments when they are passed in 64-bit registers, by Akira Hatanaka · 13 years ago
  51. 08067b2 Pass CCState by reference. by Akira Hatanaka · 13 years ago
  52. e6e4b3a Pattern for f32 to i64 conversion. by Akira Hatanaka · 13 years ago
  53. 5387f2e 64-bit sign extension in register instructions. by Akira Hatanaka · 13 years ago
  54. 4f8dc7b Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand. by Owen Anderson · 13 years ago
  55. 4d6ccb5 More dead code removal (using -Wunreachable-code) by David Blaikie · 13 years ago
  56. 71f0fc1 Ignore register mask operands when lowering instructions to MC. by Jakob Stoklund Olesen · 13 years ago
  57. ec34338 Tidy up. MCAsmBackend naming conventions. by Jim Grosbach · 13 years ago
  58. 3186766 Add a CoveredBySubRegs property to Register descriptions. by Jakob Stoklund Olesen · 13 years ago
  59. 2dd674f Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly. by David Blaikie · 13 years ago
  60. 29a1714 Add big endian mips support. Based on a patch by Jack Carter. by Rafael Espindola · 13 years ago
  61. fddf804 Add the skeleton of an asm parser for mips. by Rafael Espindola · 13 years ago
  62. f321e10 Remove VectorExtras. This unused helper was written for a type of API that is discouraged now. by Benjamin Kramer · 13 years ago
  63. a32a08c Fix uninitialized variable warning. by Chad Rosier · 13 years ago
  64. b0e7af7 Enable -soft-float for MIPS. by Akira Hatanaka · 13 years ago
  65. 2010325 Rename immLUiOpnd. by Akira Hatanaka · 13 years ago
  66. f12e702 - Define base classes for Jump-and-link instructions and make 32-bit and 64-bit by Akira Hatanaka · 13 years ago
  67. cb9dd72 Have getRegForInlineAsmConstraint return the correct register class when target by Akira Hatanaka · 13 years ago
  68. ce8524c Cleanup Mips code and rename some variables. Patch by Jack Carter by Bruno Cardoso Lopes · 13 years ago
  69. 3aa035f Improve Mips JIT. by Bruno Cardoso Lopes · 13 years ago
  70. fd1d925 Add MachineMemOperands to instructions generated in storeRegToStackSlot or by Akira Hatanaka · 13 years ago
  71. 9dfd439 Detect unaligned loads/stores that have been added for Mips64 support. by Akira Hatanaka · 13 years ago
  72. 9dbeb02 If target ABI is N64, LEA should be daddiu. by Akira Hatanaka · 13 years ago
  73. 0904459 Move the Mips only bits of the ELF writer to lib/Target/Mips. by Rafael Espindola · 13 years ago
  74. bc24985 Local dynamic TLS model for direct object output. Create the correct TLS MIPS by Akira Hatanaka · 13 years ago
  75. dc9a8a3 Reduce the exposure of Triple::OSType in the ELF object writer. This will by Rafael Espindola · 13 years ago
  76. c7541c4 Fix bug in zero-store peephole pattern reported in pr11615. by Akira Hatanaka · 13 years ago
  77. c79507a Expand 64-bit CTLZ nodes if target architecture does not support it. Add test by Akira Hatanaka · 13 years ago
  78. 7f16274 Expand 64-bit CTPOP and CTTZ. by Akira Hatanaka · 13 years ago
  79. 9aed504 Expand 64-bit atomic load and store. by Akira Hatanaka · 13 years ago
  80. c0ea043 Add definition of DSBH (Double Swap Bytes within Halfwords) and by Akira Hatanaka · 13 years ago
  81. 4d2b0f3 Add definition of WSBH (Word Swap Bytes within Halfwords), which is an by Akira Hatanaka · 13 years ago
  82. e1bcd6b 64-bit uint-fp conversion nodes are expanded. by Akira Hatanaka · 13 years ago
  83. 9388383 Enable custom lowering DYNAMIC_STACKALLOC nodes. by Akira Hatanaka · 13 years ago
  84. 056a1bc Set the correct stack pointer register that should be saved or restored. by Akira Hatanaka · 13 years ago
  85. 2fd0475 Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates by Akira Hatanaka · 13 years ago
  86. 49d534b Fix indentation. by Akira Hatanaka · 13 years ago
  87. 8dc684d 64-bit data directive. by Akira Hatanaka · 13 years ago
  88. ef43c2d 32-to-64-bit sext_inreg pattern. by Akira Hatanaka · 13 years ago
  89. acb5a06 Add 64-bit extload patterns. by Akira Hatanaka · 13 years ago
  90. ab05b6c Add patterns for matching extloads with 64-bit address. The patterns are enabled by Akira Hatanaka · 13 years ago
  91. 990d639 Add code in MipsDAGToDAGISel for selecting constant +0.0. by Akira Hatanaka · 13 years ago
  92. 05c5853 Revert part of r146995 that was accidentally commmitted. by Akira Hatanaka · 13 years ago
  93. 403992d 32-to-64-bit sign extension pattern. by Akira Hatanaka · 13 years ago
  94. caace8a Add a pattern for matching zero-store with 64-bit address. The pattern is enabled by Akira Hatanaka · 13 years ago
  95. cfb75fb Fix up the CMake build for the new files added in r146960, they're by Chandler Carruth · 13 years ago
  96. 2d24e2a Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch by David Blaikie · 13 years ago
  97. f06cb2b Add patterns for matching immediates whose lower 16-bit is cleared. These by Akira Hatanaka · 13 years ago
  98. 8209968 Tidy up. Simplify logic. No functional change intended. by Akira Hatanaka · 13 years ago
  99. ee97314 Remove definitions of double word shift plus 32 instructions. Assembler or by Akira Hatanaka · 13 years ago
  100. ed538b5 Remove unused predicate. by Akira Hatanaka · 13 years ago