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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / c1dc78de762e8a65fe1edd0cced13d94ab5a971f / lib / Target / ARM / ARMBaseRegisterInfo.cpp
  1. c1dc78d SP relative offsets need to be adjusted by the local allocation size when by Jim Grosbach · 14 years ago
  2. d4511e9 this assert should just be a condition, since this function is just asking if by Jim Grosbach · 14 years ago
  3. fcb4a8e Simplify eliminateFrameIndex() interface back down now that PEI doesn't need by Jim Grosbach · 14 years ago
  4. 1ab3f16 tidy up a bit. no functional change. by Jim Grosbach · 14 years ago
  5. b0fa993 Turn off the scavenging based frame reg reuse briefly to measure whether it's by Jim Grosbach · 14 years ago
  6. ae47c6d Enable pre-RA virtual frame base register allocation. rdar://8277890 by Jim Grosbach · 14 years ago
  7. f78ee63 Don't override the var from the enclosing scope. by Jim Grosbach · 14 years ago
  8. 3197380 Add ARM heuristic for when to allocate a virtual base register for stack by Jim Grosbach · 14 years ago
  9. a273442 Move enabling the local stack allocation pass into the target where it belongs. by Jim Grosbach · 14 years ago
  10. cd59dc5 add ARM cmd line option to force always using virtual base regs when possible. by Jim Grosbach · 14 years ago
  11. e2f5569 Better handling of offsets on frame index references. rdar://8277890 by Jim Grosbach · 14 years ago
  12. 74d7b0a Add Thumb1 support for virtual frame indices. by Jim Grosbach · 14 years ago
  13. 2b1e202 Enable ARM base register reuse to local stack slot allocation. Whenever a new by Jim Grosbach · 14 years ago
  14. 74d803a Add hook for re-using virtual base registers for local stack slot access. by Jim Grosbach · 14 years ago
  15. dc140c6 Add materialization of virtual base registers for frame indices allocated into by Jim Grosbach · 14 years ago
  16. 8708ead Add hook to examine an instruction referencing a frame index to determine by Jim Grosbach · 14 years ago
  17. ac09680 Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function stack frame has a var-sized object. by Evan Cheng · 14 years ago
  18. 4bd828f Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP by Daniel Dunbar · 14 years ago
  19. c9aed19 Fix ARM hasFP() semantics. It should return true whenever FP register is by Evan Cheng · 14 years ago
  20. b000d68 ARMBaseRegisterInfo::hasFP() has been broken for a while now. :-( by Evan Cheng · 14 years ago
  21. e3ede5e For local variables in functions with a frame pointer, use FP as a base by Jim Grosbach · 14 years ago
  22. a7da3ac Silence a GCC warning about && and || without explicit parentheses. This by Chandler Carruth · 14 years ago
  23. abf7bdf and back in. false alarm on the tests from another unrelated local change. by Jim Grosbach · 14 years ago
  24. 87c0175 oops. revert for a moment to clean up tests first. by Jim Grosbach · 14 years ago
  25. 936ed54 Reserve a stack slot if the function adjusts the stack but doesn't by Jim Grosbach · 14 years ago
  26. d1fb583 Add support for getting & setting the FPSCR application register on ARM when VFP is enabled. by Nate Begeman · 14 years ago
  27. 1c55386 switch a private implementation of GetFunctionSizeInBytes. by Chris Lattner · 14 years ago
  28. 72852a8 Constify some arguments. by Eric Christopher · 14 years ago
  29. 697cba8 Remove unnecessary check that was subsumed into canRealignStack. by Eric Christopher · 14 years ago
  30. d4c36ce Make more explicit and add some currently disabled error messages for by Eric Christopher · 14 years ago
  31. 68eec39 Add parentheses yet again to satisfy GCC's warnings. by Chandler Carruth · 14 years ago
  32. 6c7d3a1 In the presence of variable sized objects, allocate an emergency spill slot. by Jim Grosbach · 14 years ago
  33. 7835f1f Changes to ARM tail calls, mostly cosmetic. by Dale Johannesen · 14 years ago
  34. 52c61ec When using ADDri to get the address of a stack object, 255 is a conservative by Jakob Stoklund Olesen · 14 years ago
  35. 1041680 An attempt to fix the problem Anton reported with by Dale Johannesen · 14 years ago
  36. 6470a11 Next round of tail call changes. Register used in a tail by Dale Johannesen · 14 years ago
  37. 51e28e6 Early implementation of tail call for ARM. by Dale Johannesen · 14 years ago
  38. 91a74da Rename canCombinedSubRegIndex method to something more grammatically correct by Bob Wilson · 14 years ago
  39. 20fae65 Replace ARM's getCalleeSavedRegClasses with a simpler solution by Rafael Espindola · 14 years ago
  40. e00fa64 Use enums instead of literals in the ARM backend. by Jakob Stoklund Olesen · 14 years ago
  41. 558661d Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums by Jakob Stoklund Olesen · 14 years ago
  42. 535af4a ARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with a by Jakob Stoklund Olesen · 14 years ago
  43. b990a2f Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE by Evan Cheng · 15 years ago
  44. b92187a Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what by Bill Wendling · 15 years ago
  45. 22c687b Added a QQQQ register file to model 4-consecutive Q registers. by Evan Cheng · 15 years ago
  46. 1190c14 Fix pr7110: For non-Darwin targets UnspilledCS1GPRs may include high registers. by Bob Wilson · 15 years ago
  47. b63387a Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170. by Evan Cheng · 15 years ago
  48. f865cb5 Revert r103156 since it was breaking the build bots. by Eric Christopher · 15 years ago
  49. 4ffc22a Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registers. These will be used to model VLD2 / VST2 instructions in order to get substantially better codegen for them. by Evan Cheng · 15 years ago
  50. 62b5065 Add ARM specific emitFrameIndexDebugValue. by Evan Cheng · 15 years ago
  51. e566763 Implement -disable-non-leaf-fp-elim which disable frame pointer elimination by Evan Cheng · 15 years ago
  52. 8c407d4 ReuseFrameIndexVals is used in multiple files, so it can't be static. by Dan Gohman · 15 years ago
  53. b357983 Fix a bunch of namespace polution. by Dan Gohman · 15 years ago
  54. 46510a7 Add const qualifiers to CodeGen's use of LLVM IR constructs. by Dan Gohman · 15 years ago
  55. c7f3ace use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() by Chris Lattner · 15 years ago
  56. 98330ff Fix a very bad typo. Since the register number was off by one, the ARM by Bob Wilson · 15 years ago
  57. f49be7c Make sure the LR gets pushed in functions that use vaargs. This fixes by Jim Grosbach · 15 years ago
  58. dff4b4c Change the Value argument to eliminateFrameIndex to a type-tagged value. This by Jim Grosbach · 15 years ago
  59. 4e50154 scavenged frame index value re-use gets confused when more than one base by Jim Grosbach · 15 years ago
  60. 436e6e7 pr6478: The frame pointer spill frame index is only defined when there is a by Bob Wilson · 15 years ago
  61. 657baec Create a stack frame on ARM when by Jakob Stoklund Olesen · 15 years ago
  62. ff28103 Remove an unused variable. Was this intentional? by Chandler Carruth · 15 years ago
  63. 5f366af handle very large call frames when require SPAdj != 0 for Thumb1 by Jim Grosbach · 15 years ago
  64. cf453ee Spelling. s/suppor /support / by Jim Grosbach · 15 years ago
  65. 4642ad3 Updated version of r96634 (which was reverted due to failing 176.gcc and by Jim Grosbach · 15 years ago
  66. 5a0815f Clean up a bit and fix for when SPAdj != 0 by Jim Grosbach · 15 years ago
  67. 4c7628e The predicate index isn't fixed, so scan for it to make sure we get the proper by Jim Grosbach · 15 years ago
  68. 1a2e868 Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in by Bob Wilson · 15 years ago
  69. cf43e60 Radar 7636153. In the presence of large call frames, it's not sufficient by Jim Grosbach · 15 years ago
  70. 7545f49 Teach MachineFrameInfo to track maximum alignment while stack objects are being by Evan Cheng · 15 years ago
  71. 985d45d As of r79039, we still try to eliminate the frame pointer on leaf functions, by Jim Grosbach · 15 years ago
  72. 30c6b75 constify a method argument. by Chris Lattner · 15 years ago
  73. e45ab8a For aligned load/store instructions, it's only required to know whether a by Jim Grosbach · 15 years ago
  74. 9631864 80 column violations by Jim Grosbach · 15 years ago
  75. ce3e769 Addressing mode 6 (load/store) instructions can't encode an immediate offset by Jim Grosbach · 15 years ago
  76. e9912dc Use proper move instructions. Make the verifier happy. by Jakob Stoklund Olesen · 15 years ago
  77. 7cca606 Dynamic stack realignment use of sp register as source/dest register by Anton Korobeynikov · 15 years ago
  78. e27d205 Factor the stack alignment calculations out into a target independent pass. by Jim Grosbach · 15 years ago
  79. a37aa54 Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info can get bogus values. by Jim Grosbach · 15 years ago
  80. 50f8516 Generate more correct debug info for frame indices. by Jim Grosbach · 15 years ago
  81. 21ce2e3 Revert 89562. We're being sneakier than I was giving us credit for, and this by Jim Grosbach · 15 years ago
  82. f3b33d0 Darwin requires a frame pointer for all non-leaf functions to support correct by Jim Grosbach · 15 years ago
  83. 7bde297 Make the pass class name more explicit. by Jim Grosbach · 15 years ago
  84. 074fb02 make pass name a bit more clear by Jim Grosbach · 15 years ago
  85. a443217 Detect need for autoalignment of the stack earlier to catch spills more by Jim Grosbach · 15 years ago
  86. 3f2bf85 by David Greene · 15 years ago
  87. 803b48a Now that the default is 'enabled,' a separate command line option for ARM is by Jim Grosbach · 15 years ago
  88. 92eb919 Enable dynamic stack realignment by default. by Jim Grosbach · 15 years ago
  89. ad353c7 Set dynamic stack realignment to real values. by Jim Grosbach · 15 years ago
  90. e516549 Use Unified Assembly Syntax for the ARM backend. by Jim Grosbach · 15 years ago
  91. 31bc849 Use aligned load/store instructions for spilling Q registers when we know the stack slot is 128 bit aligned by Jim Grosbach · 15 years ago
  92. 4371cda Grammar. by Jim Grosbach · 15 years ago
  93. db1751a Now that the memory leak from McCat/08-main has been fixed (86056), re-enable by Jim Grosbach · 15 years ago
  94. 6db06a0 If a function has no stack frame at all, dynamic realignment isn't necessary. by Jim Grosbach · 15 years ago
  95. c5848f4 dynamic stack realignment necessitates scanning the floating point callee- by Jim Grosbach · 15 years ago
  96. ba90864 Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8. by Evan Cheng · 15 years ago
  97. ab453e0 Revert r85049, it is causing PR5367 by Anton Korobeynikov · 15 years ago
  98. 48d8afa Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. by Evan Cheng · 15 years ago
  99. 95d9504 Dial back the realignment a bit. by Jim Grosbach · 15 years ago
  100. 84e58d0 To get more thorough testing from llc-beta nightly runs, do dynamic stack by Jim Grosbach · 15 years ago