- b04546f Tidy up a few 80 column violations. by Jim Grosbach · 13 years ago
- 8f310d9 Tidy up a bit. by Jim Grosbach · 13 years ago
- a4b97f3 Add pattern used to match MipsLo, which is needed when the instruction selector by Akira Hatanaka · 13 years ago
- 8f28aaf Fix the assertion which checks the size of the input operand. by Nadav Rotem · 13 years ago
- 302fdec Disable tests which generate code for allegrex or psp. by Akira Hatanaka · 13 years ago
- e1490d1 update checked pattern by Nadav Rotem · 13 years ago
- dfb5935 swap vselect operand order - pr10907 by Nadav Rotem · 13 years ago
- edca044 Remove include of header that doesn't exist (yet). by Benjamin Kramer · 13 years ago
- 8a23a77 I know copy&paste! by Benjamin Kramer · 13 years ago
- 72c0d7f Sketch out a DWARF parser. by Benjamin Kramer · 13 years ago
- 8c74f7f Add the DataExtractor utility class. by Benjamin Kramer · 13 years ago
- df24e1f Add versions 256-bit versions of alignedstore and alignedload, to be by Bruno Cardoso Lopes · 13 years ago
- 809f17f Revert the remaining part of r139528. According to PR10907 the bug seems by Bruno Cardoso Lopes · 13 years ago
- aec5861 Add vselect target support for targets that do not support blend but do support by Nadav Rotem · 13 years ago
- 48ae99f Support for PSP is gone too. by Akira Hatanaka · 13 years ago
- 516f52e [tablegen] In ClangAttrEmitter.cpp handle SourceLocation arguments to attributes. by Argyrios Kyrtzidis · 13 years ago
- 3a2d80d Use a cache to maintain list of machine basic blocks for a given UserValue. by Devang Patel · 13 years ago
- e5a2e36 Add SplitEditor::markOverlappedComplement(). by Jakob Stoklund Olesen · 13 years ago
- b6b7f51 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. by Owen Anderson · 13 years ago
- abcc73e Eliminate the extendRange() wrapper. by Jakob Stoklund Olesen · 13 years ago
- 2152307 It is not necessary to search for mipsallegrex in target triple string. by Akira Hatanaka · 13 years ago
- 12c7e90 Fix encoding of Thumb2 shifted register operands with RRX shifts. by Owen Anderson · 13 years ago
- ee5655d Switch extendInBlock() to take a kill slot instead of the last use slot. by Jakob Stoklund Olesen · 13 years ago
- c1c622e Use a separate LiveRangeCalc for the complement in spill modes. by Jakob Stoklund Olesen · 13 years ago
- de9ddbf Maintain hexadecimal order. by Devang Patel · 13 years ago
- c9dccb8 In ClangAttrEmitter.cpp emit code that allows attributes to keep their source range. by Argyrios Kyrtzidis · 13 years ago
- 4bbeb18 Only disassembler instructions with vvvv != 1111 if the instruction actually uses the vvvv field to encode an operand. Fixes PR10851. by Craig Topper · 13 years ago
- 58bbb81 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. by Craig Topper · 13 years ago
- 6b0b2d6 Fix encoding of VMOVDQU to not simultaneously be 'TB OpSize' and 'XS'. 'XS' is correct and seems to have been taking priority. by Craig Topper · 13 years ago
- effb647 [indvars] Revert r139579 until 401.bzip -arch i386 miscompilation is fixed. PR10920. by Andrew Trick · 13 years ago
- edd4f8b Unbreak msvc. by NAKAMURA Takumi · 13 years ago
- dd9d758 Disable IV rewriting by default. See PR10916. by Andrew Trick · 13 years ago
- 603fff3 Generalize test case to handle multiple indvars modes. by Andrew Trick · 13 years ago
- 3c8015a Generalize this test's CHECK statements to handle different indvars modes. by Andrew Trick · 13 years ago
- 2e95d76 This test only makes sense with -enable-iv-rewrite. by Andrew Trick · 13 years ago
- 885f1a0 Zap some junk from the ARM instruction descriptions. by Eli Friedman · 13 years ago
- 94f2c23 [indvars] Fix bugs in floating point IV range checks noticed by inspection. by Andrew Trick · 13 years ago
- cee58a6 Silence false positive uninitialized variable warnings from GCC. by Benjamin Kramer · 13 years ago
- b5a457c Extract live range calculations from SplitKit. by Jakob Stoklund Olesen · 13 years ago
- 1582e7f Add comment to clarify the behavior of a helper in DSE. by Eli Friedman · 13 years ago
- 5ac7c7d Correct grammar. by Eli Friedman · 13 years ago
- f73c881 Fix the assembler strings for a couple of atomic instructions. Doesn't really matter much in practice, but it's a bit cleaner. by Eli Friedman · 13 years ago
- 2d53969 Tidy up a bit. by Jim Grosbach · 13 years ago
- 857ad22 Conditionalize indvars test that relies on SCEV expansion of geps, by Andrew Trick · 13 years ago
- 8970060 Change testcase commandline to be more strict and silence buildbots by Bruno Cardoso Lopes · 13 years ago
- 5fc4810 Fix PR10845. SUBREG_TO_REG shouldn't be used when the input and by Bruno Cardoso Lopes · 13 years ago
- 27cea8e indvars test only relevant for -enable-iv-rewrite. by Andrew Trick · 13 years ago
- 9267854 Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check? by Owen Anderson · 13 years ago
- 3669915 Introduce a bit of a hack. by Bill Wendling · 13 years ago
- ccb7c90 gold plugin: don't report error on non-bitcode (e.g. ELF) files. by Ivan Krasin · 13 years ago
- cd00dc6 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. by Owen Anderson · 13 years ago
- 457d53d Revert the wrong part of r139528, and fix testcases. by Bruno Cardoso Lopes · 13 years ago
- fd92d2e Fix encoding of PC-relative LDRSHW with an immediate offset. by Owen Anderson · 13 years ago
- 26e5285 Conditionalize indvars tests that rely on SCEV expansion of geps, by Andrew Trick · 13 years ago
- 2bc3d52 Change a bunch of isVolatile() checks to check for atomic load/store as well. by Eli Friedman · 13 years ago
- a073795 There's no need to add additional predicate operands when converting a tB to a tBfar now. Fixes nightly test failures on armv6 Thumb. <rdar://problem/10110404> by Owen Anderson · 13 years ago
- c27c734 Fix typo. by Eric Christopher · 13 years ago
- 8e03a82 Not sure how CMPPS and CMPPD had already ever worked, I guess it didn't. by Bruno Cardoso Lopes · 13 years ago
- 93474f5 Organize a bit the operand names for CMPPS and CMPPD by Bruno Cardoso Lopes · 13 years ago
- cf35542 Realign BLEND patterns to match the general style for patterns in .td file. by Bruno Cardoso Lopes · 13 years ago
- 3445df7 Fix 80-columns by Bruno Cardoso Lopes · 13 years ago
- a3157b4 Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. by Owen Anderson · 13 years ago
- 29da5e6 Removing indvars tests that directly test canonical IVs and nothing else. by Andrew Trick · 13 years ago
- f21bdf4 Rename -disable-iv-rewrite to -enable-iv-rewrite=false in preparation for default change. by Andrew Trick · 13 years ago
- 811ae5b Add asserts to keep front-ends honest while encoding debug info into LLVM IR using DIBuilder. by Devang Patel · 13 years ago
- 9f3b6a5 Fix mistake in test runline. by Eli Friedman · 13 years ago
- 8f7ca5d Test case for r139453, WidenIV::GetExtendedOperandRecurrence. by Andrew Trick · 13 years ago
- 5443140 Add DW_ATE_UTF, which clang started using in my previous commit! by Devang Patel · 13 years ago
- a16a25d Remove the -compact-regions flag. by Jakob Stoklund Olesen · 13 years ago
- 708d06f Add an interface for SplitKit complement spill modes. by Jakob Stoklund Olesen · 13 years ago
- 3d4ec14 Update comments to reflect some (not so) recent changes. by Jakob Stoklund Olesen · 13 years ago
- a1d16b5 Associate a MemOperand with LDWCP nodes introduced during ISel. by Richard Osborne · 13 years ago
- 2cb6c1b Mark LDWCP as having no side effects. by Richard Osborne · 13 years ago
- 5ed0983 Format patterns, remove unused X86blend patterns by Nadav Rotem · 13 years ago
- 136046c Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. by Craig Topper · 13 years ago
- 0381979 Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. by Craig Topper · 13 years ago
- 842f58f Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W. by Craig Topper · 13 years ago
- e4481d8 s/SequeuentiallyConsistent/SequentiallyConsistent/g by Nick Lewycky · 13 years ago
- 5366ca4 Fix verb tense agreement. by Nick Lewycky · 13 years ago
- fbad25e CR fixes per Bruno's request. by Nadav Rotem · 13 years ago
- cfeb55c Really un-XFAIL the testcase, like I said I would in r139458. by Eli Friedman · 13 years ago
- 106f6e7 r139454 activates an assert in a case where we were doing the right thing anyway. Make that explicit, and un-XFAIL the testcase. by Eli Friedman · 13 years ago
- 81cbb0a Fix the asserts in lib/Target/X86/X86ELFWriterInfo.cpp and by Richard Trieu · 13 years ago
- 2db8628 Fixed an assert from: by Richard Trieu · 13 years ago
- 20151da [disable-iv-rewrite] Allow WidenIV to handle NSW/NUW operations better. by Andrew Trick · 13 years ago
- 5433767 Set NSW/NUW flags on SCEVAddExpr when the operation is flagged as such. by Andrew Trick · 13 years ago
- 2e3734e Fix asserts in CodeGen from: by Richard Trieu · 13 years ago
- 1ad60c2 Thumb2 parsing and encoding for MOV(immediate). by Jim Grosbach · 13 years ago
- 33ff5ae Fix test cases. Generate code for Mips32r1 unless a Mips32r2 feature is tested. by Akira Hatanaka · 13 years ago
- 921d01a LDM writeback is not allowed if Rn is in the target register list. by Owen Anderson · 13 years ago
- 112fb73 Fix an ambiguously nested if. by Owen Anderson · 13 years ago
- cd4338f Fix buildbot breakage caused by r139415. I missed one instance of a manually create ARM::tB. by Owen Anderson · 13 years ago
- 08fef88 Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. by Owen Anderson · 13 years ago
- 46ac94b O64 will not be supported. by Akira Hatanaka · 13 years ago
- 5881586 Make F31 and D15 non-reserved registers. by Akira Hatanaka · 13 years ago
- c3ab388 tidy up a bit by Chris Lattner · 13 years ago
- 51f6a7a Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. by Owen Anderson · 13 years ago
- 13d8baa Update Clang AST attribute reader tblgen generation to match with ASTReader change by Douglas Gregor · 13 years ago
- 9a439af Mips32 does not reserve even-numbered floating point registers. by Akira Hatanaka · 13 years ago
- 9db817f Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897. by Eli Friedman · 13 years ago