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Jerome Glissefd266ec2010-09-17 10:41:50 -04001/*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26#ifndef R600_PRIV_H
27#define R600_PRIV_H
28
29#include <errno.h>
30#include <stdint.h>
31#include <stdlib.h>
32#include <assert.h>
Jerome Glisse1235bec2010-09-29 15:05:19 -040033#include <pipebuffer/pb_bufmgr.h>
Jerome Glissefd266ec2010-09-17 10:41:50 -040034#include "r600.h"
35
36
37struct radeon {
38 int fd;
39 int refcount;
40 unsigned device;
41 unsigned family;
Jerome Glisse363dfb82010-09-20 11:58:00 -040042 enum chip_class chip_class;
Jerome Glisseeff1af62010-09-24 10:40:17 -040043 boolean use_mem_constant; /* true for evergreen */
Dave Airlie301ab492010-09-29 09:17:59 +100044 struct pb_manager *mman; /* malloc manager */
45 struct pb_manager *kman; /* kernel bo manager */
46 struct pb_manager *cman; /* cached bo manager */
Jerome Glissefd266ec2010-09-17 10:41:50 -040047};
48
49struct radeon *r600_new(int fd, unsigned device);
50void r600_delete(struct radeon *r600);
51
52struct r600_reg {
Jerome Glisse56469642010-09-28 17:37:56 -040053 unsigned opcode;
54 unsigned offset_base;
55 unsigned offset;
Jerome Glisseca352922010-09-21 20:24:51 -040056 unsigned need_bo;
57 unsigned flush_flags;
Jerome Glissefd266ec2010-09-17 10:41:50 -040058};
59
Jerome Glisse1235bec2010-09-29 15:05:19 -040060struct radeon_bo {
61 struct pipe_reference reference;
62 unsigned handle;
63 unsigned size;
64 unsigned alignment;
65 unsigned map_count;
66 void *data;
67};
68
69struct radeon_ws_bo {
70 struct pipe_reference reference;
71 struct pb_buffer *pb;
72};
73
74
Jerome Glissefd266ec2010-09-17 10:41:50 -040075/* radeon_pciid.c */
76unsigned radeon_family_from_device(unsigned device);
77
Jerome Glisse1235bec2010-09-29 15:05:19 -040078/* r600_drm.c */
79struct radeon *radeon_decref(struct radeon *radeon);
80
81/* radeon_bo.c */
82struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf);
83void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct radeon_bo *bo);
84struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
85 unsigned size, unsigned alignment, void *ptr);
86int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo);
87void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo);
88void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
89 struct radeon_bo *src);
90int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
91int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
92
93/* radeon_bo_pb.c */
94struct pb_buffer *radeon_bo_pb_create_buffer_from_handle(struct pb_manager *_mgr,
95 uint32_t handle);
96
97/* radeon_ws_bo.c */
98unsigned radeon_ws_bo_get_handle(struct radeon_ws_bo *bo);
99unsigned radeon_ws_bo_get_size(struct radeon_ws_bo *bo);
100
Jerome Glisse56469642010-09-28 17:37:56 -0400101#define CTX_RANGE_ID(ctx, offset) (((offset) >> (ctx)->hash_shift) & 255)
102#define CTX_BLOCK_ID(ctx, offset) ((offset) & ((1 << (ctx)->hash_shift) - 1))
Jerome Glissea8526152010-09-26 12:06:46 -0400103
Jerome Glisse56469642010-09-28 17:37:56 -0400104static void inline r600_context_reg(struct r600_context *ctx,
Jerome Glissea8526152010-09-26 12:06:46 -0400105 unsigned offset, unsigned value,
106 unsigned mask)
107{
Jerome Glisse56469642010-09-28 17:37:56 -0400108 struct r600_range *range;
109 struct r600_block *block;
Jerome Glissea8526152010-09-26 12:06:46 -0400110 unsigned id;
111
Jerome Glisse56469642010-09-28 17:37:56 -0400112 range = &ctx->range[CTX_RANGE_ID(ctx, offset)];
113 block = range->blocks[CTX_BLOCK_ID(ctx, offset)];
Jerome Glissea8526152010-09-26 12:06:46 -0400114 id = (offset - block->start_offset) >> 2;
Jerome Glisse02826822010-09-27 17:00:07 -0400115 block->reg[id] &= ~mask;
116 block->reg[id] |= value;
Jerome Glissea8526152010-09-26 12:06:46 -0400117 if (!(block->status & R600_BLOCK_STATUS_DIRTY)) {
Jerome Glisse02826822010-09-27 17:00:07 -0400118 ctx->pm4_dirty_cdwords += block->pm4_ndwords;
Jerome Glissea8526152010-09-26 12:06:46 -0400119 }
120 block->status |= R600_BLOCK_STATUS_ENABLED;
121 block->status |= R600_BLOCK_STATUS_DIRTY;
122}
123
Jerome Glisse56469642010-09-28 17:37:56 -0400124static inline void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block)
125{
126 struct radeon_bo *bo;
127 int id;
128
129 for (int j = 0; j < block->nreg; j++) {
130 if (block->pm4_bo_index[j]) {
131 /* find relocation */
132 id = block->pm4_bo_index[j];
133 bo = radeon_bo_pb_get_bo(block->reloc[id].bo->pb);
134 for (int k = 0; k < block->reloc[id].nreloc; k++) {
135 r600_context_bo_reloc(ctx,
136 &block->pm4[block->reloc[id].bo_pm4_index[k]],
137 bo);
138 }
139 }
140 }
141 memcpy(&ctx->pm4[ctx->pm4_cdwords], block->pm4, block->pm4_ndwords * 4);
142 ctx->pm4_cdwords += block->pm4_ndwords;
143 block->status ^= R600_BLOCK_STATUS_DIRTY;
144}
145
Jerome Glissefd266ec2010-09-17 10:41:50 -0400146#endif