Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 1 | #include "pipe/p_context.h" |
| 2 | #include "pipe/p_defines.h" |
| 3 | #include "pipe/p_state.h" |
Ben Skeggs | 6b3ca67 | 2009-06-05 11:21:08 +1000 | [diff] [blame] | 4 | #include "pipe/p_inlines.h" |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 5 | |
| 6 | #include "pipe/p_shader_tokens.h" |
| 7 | #include "tgsi/tgsi_parse.h" |
| 8 | #include "tgsi/tgsi_dump.h" |
| 9 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 10 | #include "nv20_context.h" |
| 11 | #include "nv20_state.h" |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 12 | |
| 13 | /* TODO (at least...): |
| 14 | * 1. Indexed consts + ARL |
| 15 | * 2. Arb. swz/negation |
| 16 | * 3. NV_vp11, NV_vp2, NV_vp3 features |
| 17 | * - extra arith opcodes |
| 18 | * - branching |
| 19 | * - texture sampling |
| 20 | * - indexed attribs |
| 21 | * - indexed results |
| 22 | * 4. bugs |
| 23 | */ |
| 24 | |
| 25 | #define SWZ_X 0 |
| 26 | #define SWZ_Y 1 |
| 27 | #define SWZ_Z 2 |
| 28 | #define SWZ_W 3 |
| 29 | #define MASK_X 8 |
| 30 | #define MASK_Y 4 |
| 31 | #define MASK_Z 2 |
| 32 | #define MASK_W 1 |
| 33 | #define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) |
| 34 | #define DEF_SCALE 0 |
| 35 | #define DEF_CTEST 0 |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 36 | #include "nv20_shader.h" |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 37 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 38 | #define swz(s,x,y,z,w) nv20_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) |
| 39 | #define neg(s) nv20_sr_neg((s)) |
| 40 | #define abs(s) nv20_sr_abs((s)) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 41 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 42 | struct nv20_vpc { |
| 43 | struct nv20_vertex_program *vp; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 44 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 45 | struct nv20_vertex_program_exec *vpi; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 46 | |
| 47 | unsigned output_map[PIPE_MAX_SHADER_OUTPUTS]; |
| 48 | |
| 49 | int high_temp; |
| 50 | int temp_temp_count; |
| 51 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 52 | struct nv20_sreg *imm; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 53 | unsigned nr_imm; |
| 54 | }; |
| 55 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 56 | static struct nv20_sreg |
| 57 | temp(struct nv20_vpc *vpc) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 58 | { |
| 59 | int idx; |
| 60 | |
| 61 | idx = vpc->temp_temp_count++; |
| 62 | idx += vpc->high_temp + 1; |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 63 | return nv20_sr(NV30SR_TEMP, idx); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 64 | } |
| 65 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 66 | static struct nv20_sreg |
| 67 | constant(struct nv20_vpc *vpc, int pipe, float x, float y, float z, float w) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 68 | { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 69 | struct nv20_vertex_program *vp = vpc->vp; |
| 70 | struct nv20_vertex_program_data *vpd; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 71 | int idx; |
| 72 | |
| 73 | if (pipe >= 0) { |
| 74 | for (idx = 0; idx < vp->nr_consts; idx++) { |
| 75 | if (vp->consts[idx].index == pipe) |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 76 | return nv20_sr(NV30SR_CONST, idx); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 77 | } |
| 78 | } |
| 79 | |
| 80 | idx = vp->nr_consts++; |
| 81 | vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); |
| 82 | vpd = &vp->consts[idx]; |
| 83 | |
| 84 | vpd->index = pipe; |
| 85 | vpd->value[0] = x; |
| 86 | vpd->value[1] = y; |
| 87 | vpd->value[2] = z; |
| 88 | vpd->value[3] = w; |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 89 | return nv20_sr(NV30SR_CONST, idx); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 90 | } |
| 91 | |
| 92 | #define arith(cc,s,o,d,m,s0,s1,s2) \ |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 93 | nv20_vp_arith((cc), (s), NV30_VP_INST_##o, (d), (m), (s0), (s1), (s2)) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 94 | |
| 95 | static void |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 96 | emit_src(struct nv20_vpc *vpc, uint32_t *hw, int pos, struct nv20_sreg src) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 97 | { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 98 | struct nv20_vertex_program *vp = vpc->vp; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 99 | uint32_t sr = 0; |
| 100 | |
| 101 | switch (src.type) { |
| 102 | case NV30SR_TEMP: |
| 103 | sr |= (NV30_VP_SRC_REG_TYPE_TEMP << NV30_VP_SRC_REG_TYPE_SHIFT); |
| 104 | sr |= (src.index << NV30_VP_SRC_TEMP_SRC_SHIFT); |
| 105 | break; |
| 106 | case NV30SR_INPUT: |
| 107 | sr |= (NV30_VP_SRC_REG_TYPE_INPUT << |
| 108 | NV30_VP_SRC_REG_TYPE_SHIFT); |
| 109 | vp->ir |= (1 << src.index); |
| 110 | hw[1] |= (src.index << NV30_VP_INST_INPUT_SRC_SHIFT); |
| 111 | break; |
| 112 | case NV30SR_CONST: |
| 113 | sr |= (NV30_VP_SRC_REG_TYPE_CONST << |
| 114 | NV30_VP_SRC_REG_TYPE_SHIFT); |
| 115 | assert(vpc->vpi->const_index == -1 || |
| 116 | vpc->vpi->const_index == src.index); |
| 117 | vpc->vpi->const_index = src.index; |
| 118 | break; |
| 119 | case NV30SR_NONE: |
| 120 | sr |= (NV30_VP_SRC_REG_TYPE_INPUT << |
| 121 | NV30_VP_SRC_REG_TYPE_SHIFT); |
| 122 | break; |
| 123 | default: |
| 124 | assert(0); |
| 125 | } |
| 126 | |
| 127 | if (src.negate) |
| 128 | sr |= NV30_VP_SRC_NEGATE; |
| 129 | |
| 130 | if (src.abs) |
| 131 | hw[0] |= (1 << (21 + pos)); |
| 132 | |
| 133 | sr |= ((src.swz[0] << NV30_VP_SRC_SWZ_X_SHIFT) | |
| 134 | (src.swz[1] << NV30_VP_SRC_SWZ_Y_SHIFT) | |
| 135 | (src.swz[2] << NV30_VP_SRC_SWZ_Z_SHIFT) | |
| 136 | (src.swz[3] << NV30_VP_SRC_SWZ_W_SHIFT)); |
| 137 | |
| 138 | /* |
| 139 | * |VVV| |
| 140 | * d�.�b |
| 141 | * \u/ |
| 142 | * |
| 143 | */ |
| 144 | |
| 145 | switch (pos) { |
| 146 | case 0: |
| 147 | hw[1] |= ((sr & NV30_VP_SRC0_HIGH_MASK) >> |
| 148 | NV30_VP_SRC0_HIGH_SHIFT) << NV30_VP_INST_SRC0H_SHIFT; |
| 149 | hw[2] |= (sr & NV30_VP_SRC0_LOW_MASK) << |
| 150 | NV30_VP_INST_SRC0L_SHIFT; |
| 151 | break; |
| 152 | case 1: |
| 153 | hw[2] |= sr << NV30_VP_INST_SRC1_SHIFT; |
| 154 | break; |
| 155 | case 2: |
| 156 | hw[2] |= ((sr & NV30_VP_SRC2_HIGH_MASK) >> |
| 157 | NV30_VP_SRC2_HIGH_SHIFT) << NV30_VP_INST_SRC2H_SHIFT; |
| 158 | hw[3] |= (sr & NV30_VP_SRC2_LOW_MASK) << |
| 159 | NV30_VP_INST_SRC2L_SHIFT; |
| 160 | break; |
| 161 | default: |
| 162 | assert(0); |
| 163 | } |
| 164 | } |
| 165 | |
| 166 | static void |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 167 | emit_dst(struct nv20_vpc *vpc, uint32_t *hw, int slot, struct nv20_sreg dst) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 168 | { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 169 | struct nv20_vertex_program *vp = vpc->vp; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 170 | |
| 171 | switch (dst.type) { |
| 172 | case NV30SR_TEMP: |
| 173 | hw[0] |= (dst.index << NV30_VP_INST_DEST_TEMP_ID_SHIFT); |
| 174 | break; |
| 175 | case NV30SR_OUTPUT: |
| 176 | switch (dst.index) { |
| 177 | case NV30_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; |
| 178 | case NV30_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; |
| 179 | case NV30_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; |
| 180 | case NV30_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; |
| 181 | case NV30_VP_INST_DEST_FOGC : vp->or |= (1 << 4); break; |
| 182 | case NV30_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; |
| 183 | case NV30_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; |
| 184 | case NV30_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; |
| 185 | case NV30_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; |
| 186 | case NV30_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; |
| 187 | case NV30_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; |
| 188 | case NV30_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; |
| 189 | case NV30_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; |
| 190 | case NV30_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; |
| 191 | default: |
| 192 | break; |
| 193 | } |
| 194 | |
| 195 | hw[3] |= (dst.index << NV30_VP_INST_DEST_SHIFT); |
| 196 | hw[0] |= NV30_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); |
| 197 | |
| 198 | /*XXX: no way this is entirely correct, someone needs to |
| 199 | * figure out what exactly it is. |
| 200 | */ |
| 201 | hw[3] |= 0x800; |
| 202 | break; |
| 203 | default: |
| 204 | assert(0); |
| 205 | } |
| 206 | } |
| 207 | |
| 208 | static void |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 209 | nv20_vp_arith(struct nv20_vpc *vpc, int slot, int op, |
| 210 | struct nv20_sreg dst, int mask, |
| 211 | struct nv20_sreg s0, struct nv20_sreg s1, |
| 212 | struct nv20_sreg s2) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 213 | { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 214 | struct nv20_vertex_program *vp = vpc->vp; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 215 | uint32_t *hw; |
| 216 | |
| 217 | vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); |
| 218 | vpc->vpi = &vp->insns[vp->nr_insns - 1]; |
| 219 | memset(vpc->vpi, 0, sizeof(*vpc->vpi)); |
| 220 | vpc->vpi->const_index = -1; |
| 221 | |
| 222 | hw = vpc->vpi->data; |
| 223 | |
| 224 | hw[0] |= (NV30_VP_INST_COND_TR << NV30_VP_INST_COND_SHIFT); |
| 225 | hw[0] |= ((0 << NV30_VP_INST_COND_SWZ_X_SHIFT) | |
| 226 | (1 << NV30_VP_INST_COND_SWZ_Y_SHIFT) | |
| 227 | (2 << NV30_VP_INST_COND_SWZ_Z_SHIFT) | |
| 228 | (3 << NV30_VP_INST_COND_SWZ_W_SHIFT)); |
| 229 | |
| 230 | hw[1] |= (op << NV30_VP_INST_VEC_OPCODE_SHIFT); |
| 231 | // hw[3] |= NV30_VP_INST_SCA_DEST_TEMP_MASK; |
| 232 | // hw[3] |= (mask << NV30_VP_INST_VEC_WRITEMASK_SHIFT); |
| 233 | |
| 234 | if (dst.type == NV30SR_OUTPUT) { |
| 235 | if (slot) |
| 236 | hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT); |
| 237 | else |
| 238 | hw[3] |= (mask << NV30_VP_INST_VDEST_WRITEMASK_SHIFT); |
| 239 | } else { |
| 240 | if (slot) |
| 241 | hw[3] |= (mask << NV30_VP_INST_STEMP_WRITEMASK_SHIFT); |
| 242 | else |
| 243 | hw[3] |= (mask << NV30_VP_INST_VTEMP_WRITEMASK_SHIFT); |
| 244 | } |
| 245 | |
| 246 | emit_dst(vpc, hw, slot, dst); |
| 247 | emit_src(vpc, hw, 0, s0); |
| 248 | emit_src(vpc, hw, 1, s1); |
| 249 | emit_src(vpc, hw, 2, s2); |
| 250 | } |
| 251 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 252 | static INLINE struct nv20_sreg |
| 253 | tgsi_src(struct nv20_vpc *vpc, const struct tgsi_full_src_register *fsrc) { |
| 254 | struct nv20_sreg src; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 255 | |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 256 | switch (fsrc->Register.File) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 257 | case TGSI_FILE_INPUT: |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 258 | src = nv20_sr(NV30SR_INPUT, fsrc->Register.Index); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 259 | break; |
| 260 | case TGSI_FILE_CONSTANT: |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 261 | src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 262 | break; |
| 263 | case TGSI_FILE_IMMEDIATE: |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 264 | src = vpc->imm[fsrc->Register.Index]; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 265 | break; |
| 266 | case TGSI_FILE_TEMPORARY: |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 267 | if (vpc->high_temp < fsrc->Register.Index) |
| 268 | vpc->high_temp = fsrc->Register.Index; |
| 269 | src = nv20_sr(NV30SR_TEMP, fsrc->Register.Index); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 270 | break; |
| 271 | default: |
| 272 | NOUVEAU_ERR("bad src file\n"); |
| 273 | break; |
| 274 | } |
| 275 | |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 276 | src.abs = fsrc->Register.Absolute; |
| 277 | src.negate = fsrc->Register.Negate; |
| 278 | src.swz[0] = fsrc->Register.SwizzleX; |
| 279 | src.swz[1] = fsrc->Register.SwizzleY; |
| 280 | src.swz[2] = fsrc->Register.SwizzleZ; |
| 281 | src.swz[3] = fsrc->Register.SwizzleW; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 282 | return src; |
| 283 | } |
| 284 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 285 | static INLINE struct nv20_sreg |
| 286 | tgsi_dst(struct nv20_vpc *vpc, const struct tgsi_full_dst_register *fdst) { |
| 287 | struct nv20_sreg dst; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 288 | |
Keith Whitwell | 5b0824d | 2009-11-24 15:08:55 +0000 | [diff] [blame] | 289 | switch (fdst->Register.File) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 290 | case TGSI_FILE_OUTPUT: |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 291 | dst = nv20_sr(NV30SR_OUTPUT, |
Keith Whitwell | 5b0824d | 2009-11-24 15:08:55 +0000 | [diff] [blame] | 292 | vpc->output_map[fdst->Register.Index]); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 293 | |
| 294 | break; |
| 295 | case TGSI_FILE_TEMPORARY: |
Keith Whitwell | 5b0824d | 2009-11-24 15:08:55 +0000 | [diff] [blame] | 296 | dst = nv20_sr(NV30SR_TEMP, fdst->Register.Index); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 297 | if (vpc->high_temp < dst.index) |
| 298 | vpc->high_temp = dst.index; |
| 299 | break; |
| 300 | default: |
| 301 | NOUVEAU_ERR("bad dst file\n"); |
| 302 | break; |
| 303 | } |
| 304 | |
| 305 | return dst; |
| 306 | } |
| 307 | |
| 308 | static INLINE int |
| 309 | tgsi_mask(uint tgsi) |
| 310 | { |
| 311 | int mask = 0; |
| 312 | |
| 313 | if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; |
| 314 | if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; |
| 315 | if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; |
| 316 | if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; |
| 317 | return mask; |
| 318 | } |
| 319 | |
| 320 | static boolean |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 321 | nv20_vertprog_parse_instruction(struct nv20_vpc *vpc, |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 322 | const struct tgsi_full_instruction *finst) |
| 323 | { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 324 | struct nv20_sreg src[3], dst, tmp; |
| 325 | struct nv20_sreg none = nv20_sr(NV30SR_NONE, 0); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 326 | int mask; |
| 327 | int ai = -1, ci = -1; |
| 328 | int i; |
| 329 | |
| 330 | if (finst->Instruction.Opcode == TGSI_OPCODE_END) |
| 331 | return TRUE; |
| 332 | |
| 333 | vpc->temp_temp_count = 0; |
| 334 | for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { |
| 335 | const struct tgsi_full_src_register *fsrc; |
| 336 | |
Keith Whitwell | 7d6c8f9 | 2009-11-24 15:02:23 +0000 | [diff] [blame] | 337 | fsrc = &finst->Src[i]; |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 338 | if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 339 | src[i] = tgsi_src(vpc, fsrc); |
| 340 | } |
| 341 | } |
| 342 | |
| 343 | for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { |
| 344 | const struct tgsi_full_src_register *fsrc; |
| 345 | |
Keith Whitwell | 7d6c8f9 | 2009-11-24 15:02:23 +0000 | [diff] [blame] | 346 | fsrc = &finst->Src[i]; |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 347 | switch (fsrc->Register.File) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 348 | case TGSI_FILE_INPUT: |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 349 | if (ai == -1 || ai == fsrc->Register.Index) { |
| 350 | ai = fsrc->Register.Index; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 351 | src[i] = tgsi_src(vpc, fsrc); |
| 352 | } else { |
| 353 | src[i] = temp(vpc); |
| 354 | arith(vpc, 0, OP_MOV, src[i], MASK_ALL, |
| 355 | tgsi_src(vpc, fsrc), none, none); |
| 356 | } |
| 357 | break; |
| 358 | /*XXX: index comparison is broken now that consts come from |
| 359 | * two different register files. |
| 360 | */ |
| 361 | case TGSI_FILE_CONSTANT: |
| 362 | case TGSI_FILE_IMMEDIATE: |
Keith Whitwell | 91a4e6d | 2009-11-24 15:13:17 +0000 | [diff] [blame] | 363 | if (ci == -1 || ci == fsrc->Register.Index) { |
| 364 | ci = fsrc->Register.Index; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 365 | src[i] = tgsi_src(vpc, fsrc); |
| 366 | } else { |
| 367 | src[i] = temp(vpc); |
| 368 | arith(vpc, 0, OP_MOV, src[i], MASK_ALL, |
| 369 | tgsi_src(vpc, fsrc), none, none); |
| 370 | } |
| 371 | break; |
| 372 | case TGSI_FILE_TEMPORARY: |
| 373 | /* handled above */ |
| 374 | break; |
| 375 | default: |
| 376 | NOUVEAU_ERR("bad src file\n"); |
| 377 | return FALSE; |
| 378 | } |
| 379 | } |
| 380 | |
Keith Whitwell | 7d6c8f9 | 2009-11-24 15:02:23 +0000 | [diff] [blame] | 381 | dst = tgsi_dst(vpc, &finst->Dst[0]); |
Keith Whitwell | 5b0824d | 2009-11-24 15:08:55 +0000 | [diff] [blame] | 382 | mask = tgsi_mask(finst->Dst[0].Register.WriteMask); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 383 | |
| 384 | switch (finst->Instruction.Opcode) { |
| 385 | case TGSI_OPCODE_ABS: |
| 386 | arith(vpc, 0, OP_MOV, dst, mask, abs(src[0]), none, none); |
| 387 | break; |
| 388 | case TGSI_OPCODE_ADD: |
| 389 | arith(vpc, 0, OP_ADD, dst, mask, src[0], none, src[1]); |
| 390 | break; |
| 391 | case TGSI_OPCODE_ARL: |
| 392 | arith(vpc, 0, OP_ARL, dst, mask, src[0], none, none); |
| 393 | break; |
| 394 | case TGSI_OPCODE_DP3: |
| 395 | arith(vpc, 0, OP_DP3, dst, mask, src[0], src[1], none); |
| 396 | break; |
| 397 | case TGSI_OPCODE_DP4: |
| 398 | arith(vpc, 0, OP_DP4, dst, mask, src[0], src[1], none); |
| 399 | break; |
| 400 | case TGSI_OPCODE_DPH: |
| 401 | arith(vpc, 0, OP_DPH, dst, mask, src[0], src[1], none); |
| 402 | break; |
| 403 | case TGSI_OPCODE_DST: |
| 404 | arith(vpc, 0, OP_DST, dst, mask, src[0], src[1], none); |
| 405 | break; |
| 406 | case TGSI_OPCODE_EX2: |
| 407 | arith(vpc, 1, OP_EX2, dst, mask, none, none, src[0]); |
| 408 | break; |
| 409 | case TGSI_OPCODE_EXP: |
| 410 | arith(vpc, 1, OP_EXP, dst, mask, none, none, src[0]); |
| 411 | break; |
| 412 | case TGSI_OPCODE_FLR: |
| 413 | arith(vpc, 0, OP_FLR, dst, mask, src[0], none, none); |
| 414 | break; |
| 415 | case TGSI_OPCODE_FRC: |
| 416 | arith(vpc, 0, OP_FRC, dst, mask, src[0], none, none); |
| 417 | break; |
| 418 | case TGSI_OPCODE_LG2: |
| 419 | arith(vpc, 1, OP_LG2, dst, mask, none, none, src[0]); |
| 420 | break; |
| 421 | case TGSI_OPCODE_LIT: |
| 422 | arith(vpc, 1, OP_LIT, dst, mask, none, none, src[0]); |
| 423 | break; |
| 424 | case TGSI_OPCODE_LOG: |
| 425 | arith(vpc, 1, OP_LOG, dst, mask, none, none, src[0]); |
| 426 | break; |
| 427 | case TGSI_OPCODE_MAD: |
| 428 | arith(vpc, 0, OP_MAD, dst, mask, src[0], src[1], src[2]); |
| 429 | break; |
| 430 | case TGSI_OPCODE_MAX: |
| 431 | arith(vpc, 0, OP_MAX, dst, mask, src[0], src[1], none); |
| 432 | break; |
| 433 | case TGSI_OPCODE_MIN: |
| 434 | arith(vpc, 0, OP_MIN, dst, mask, src[0], src[1], none); |
| 435 | break; |
| 436 | case TGSI_OPCODE_MOV: |
| 437 | arith(vpc, 0, OP_MOV, dst, mask, src[0], none, none); |
| 438 | break; |
| 439 | case TGSI_OPCODE_MUL: |
| 440 | arith(vpc, 0, OP_MUL, dst, mask, src[0], src[1], none); |
| 441 | break; |
| 442 | case TGSI_OPCODE_POW: |
| 443 | tmp = temp(vpc); |
| 444 | arith(vpc, 1, OP_LG2, tmp, MASK_X, none, none, |
| 445 | swz(src[0], X, X, X, X)); |
| 446 | arith(vpc, 0, OP_MUL, tmp, MASK_X, swz(tmp, X, X, X, X), |
| 447 | swz(src[1], X, X, X, X), none); |
| 448 | arith(vpc, 1, OP_EX2, dst, mask, none, none, |
| 449 | swz(tmp, X, X, X, X)); |
| 450 | break; |
| 451 | case TGSI_OPCODE_RCP: |
| 452 | arith(vpc, 1, OP_RCP, dst, mask, none, none, src[0]); |
| 453 | break; |
| 454 | case TGSI_OPCODE_RET: |
| 455 | break; |
| 456 | case TGSI_OPCODE_RSQ: |
| 457 | arith(vpc, 1, OP_RSQ, dst, mask, none, none, src[0]); |
| 458 | break; |
| 459 | case TGSI_OPCODE_SGE: |
| 460 | arith(vpc, 0, OP_SGE, dst, mask, src[0], src[1], none); |
| 461 | break; |
| 462 | case TGSI_OPCODE_SGT: |
| 463 | arith(vpc, 0, OP_SGT, dst, mask, src[0], src[1], none); |
| 464 | break; |
| 465 | case TGSI_OPCODE_SLT: |
| 466 | arith(vpc, 0, OP_SLT, dst, mask, src[0], src[1], none); |
| 467 | break; |
| 468 | case TGSI_OPCODE_SUB: |
| 469 | arith(vpc, 0, OP_ADD, dst, mask, src[0], none, neg(src[1])); |
| 470 | break; |
| 471 | case TGSI_OPCODE_XPD: |
| 472 | tmp = temp(vpc); |
| 473 | arith(vpc, 0, OP_MUL, tmp, mask, |
| 474 | swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); |
| 475 | arith(vpc, 0, OP_MAD, dst, (mask & ~MASK_W), |
| 476 | swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), |
| 477 | neg(tmp)); |
| 478 | break; |
| 479 | default: |
| 480 | NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); |
| 481 | return FALSE; |
| 482 | } |
| 483 | |
| 484 | return TRUE; |
| 485 | } |
| 486 | |
| 487 | static boolean |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 488 | nv20_vertprog_parse_decl_output(struct nv20_vpc *vpc, |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 489 | const struct tgsi_full_declaration *fdec) |
| 490 | { |
| 491 | int hw; |
| 492 | |
Keith Whitwell | 763426a | 2009-11-24 14:53:29 +0000 | [diff] [blame] | 493 | switch (fdec->Semantic.Name) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 494 | case TGSI_SEMANTIC_POSITION: |
| 495 | hw = NV30_VP_INST_DEST_POS; |
| 496 | break; |
| 497 | case TGSI_SEMANTIC_COLOR: |
Keith Whitwell | 763426a | 2009-11-24 14:53:29 +0000 | [diff] [blame] | 498 | if (fdec->Semantic.Index == 0) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 499 | hw = NV30_VP_INST_DEST_COL0; |
| 500 | } else |
Keith Whitwell | 763426a | 2009-11-24 14:53:29 +0000 | [diff] [blame] | 501 | if (fdec->Semantic.Index == 1) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 502 | hw = NV30_VP_INST_DEST_COL1; |
| 503 | } else { |
| 504 | NOUVEAU_ERR("bad colour semantic index\n"); |
| 505 | return FALSE; |
| 506 | } |
| 507 | break; |
| 508 | case TGSI_SEMANTIC_BCOLOR: |
Keith Whitwell | 763426a | 2009-11-24 14:53:29 +0000 | [diff] [blame] | 509 | if (fdec->Semantic.Index == 0) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 510 | hw = NV30_VP_INST_DEST_BFC0; |
| 511 | } else |
Keith Whitwell | 763426a | 2009-11-24 14:53:29 +0000 | [diff] [blame] | 512 | if (fdec->Semantic.Index == 1) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 513 | hw = NV30_VP_INST_DEST_BFC1; |
| 514 | } else { |
| 515 | NOUVEAU_ERR("bad bcolour semantic index\n"); |
| 516 | return FALSE; |
| 517 | } |
| 518 | break; |
| 519 | case TGSI_SEMANTIC_FOG: |
| 520 | hw = NV30_VP_INST_DEST_FOGC; |
| 521 | break; |
| 522 | case TGSI_SEMANTIC_PSIZE: |
| 523 | hw = NV30_VP_INST_DEST_PSZ; |
| 524 | break; |
| 525 | case TGSI_SEMANTIC_GENERIC: |
Keith Whitwell | 763426a | 2009-11-24 14:53:29 +0000 | [diff] [blame] | 526 | if (fdec->Semantic.Index <= 7) { |
| 527 | hw = NV30_VP_INST_DEST_TC(fdec->Semantic.Index); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 528 | } else { |
| 529 | NOUVEAU_ERR("bad generic semantic index\n"); |
| 530 | return FALSE; |
| 531 | } |
| 532 | break; |
Roland Scheidegger | 429f0e3 | 2009-12-19 00:18:43 +0100 | [diff] [blame] | 533 | case TGSI_SEMANTIC_EDGEFLAG: |
| 534 | NOUVEAU_ERR("cannot handle edgeflag output\n"); |
| 535 | return FALSE; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 536 | default: |
| 537 | NOUVEAU_ERR("bad output semantic\n"); |
| 538 | return FALSE; |
| 539 | } |
| 540 | |
Keith Whitwell | fe2b31e | 2009-11-24 15:04:18 +0000 | [diff] [blame] | 541 | vpc->output_map[fdec->Range.First] = hw; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 542 | return TRUE; |
| 543 | } |
| 544 | |
| 545 | static boolean |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 546 | nv20_vertprog_prepare(struct nv20_vpc *vpc) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 547 | { |
| 548 | struct tgsi_parse_context p; |
| 549 | int nr_imm = 0; |
| 550 | |
| 551 | tgsi_parse_init(&p, vpc->vp->pipe.tokens); |
| 552 | while (!tgsi_parse_end_of_tokens(&p)) { |
| 553 | const union tgsi_full_token *tok = &p.FullToken; |
| 554 | |
| 555 | tgsi_parse_token(&p); |
| 556 | switch(tok->Token.Type) { |
| 557 | case TGSI_TOKEN_TYPE_IMMEDIATE: |
| 558 | nr_imm++; |
| 559 | break; |
| 560 | default: |
| 561 | break; |
| 562 | } |
| 563 | } |
| 564 | tgsi_parse_free(&p); |
| 565 | |
| 566 | if (nr_imm) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 567 | vpc->imm = CALLOC(nr_imm, sizeof(struct nv20_sreg)); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 568 | assert(vpc->imm); |
| 569 | } |
| 570 | |
| 571 | return TRUE; |
| 572 | } |
| 573 | |
| 574 | static void |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 575 | nv20_vertprog_translate(struct nv20_context *nv20, |
| 576 | struct nv20_vertex_program *vp) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 577 | { |
| 578 | struct tgsi_parse_context parse; |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 579 | struct nv20_vpc *vpc = NULL; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 580 | |
| 581 | tgsi_dump(vp->pipe.tokens,0); |
| 582 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 583 | vpc = CALLOC(1, sizeof(struct nv20_vpc)); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 584 | if (!vpc) |
| 585 | return; |
| 586 | vpc->vp = vp; |
| 587 | vpc->high_temp = -1; |
| 588 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 589 | if (!nv20_vertprog_prepare(vpc)) { |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 590 | FREE(vpc); |
| 591 | return; |
| 592 | } |
| 593 | |
| 594 | tgsi_parse_init(&parse, vp->pipe.tokens); |
| 595 | |
| 596 | while (!tgsi_parse_end_of_tokens(&parse)) { |
| 597 | tgsi_parse_token(&parse); |
| 598 | |
| 599 | switch (parse.FullToken.Token.Type) { |
| 600 | case TGSI_TOKEN_TYPE_DECLARATION: |
| 601 | { |
| 602 | const struct tgsi_full_declaration *fdec; |
| 603 | fdec = &parse.FullToken.FullDeclaration; |
| 604 | switch (fdec->Declaration.File) { |
| 605 | case TGSI_FILE_OUTPUT: |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 606 | if (!nv20_vertprog_parse_decl_output(vpc, fdec)) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 607 | goto out_err; |
| 608 | break; |
| 609 | default: |
| 610 | break; |
| 611 | } |
| 612 | } |
| 613 | break; |
| 614 | case TGSI_TOKEN_TYPE_IMMEDIATE: |
| 615 | { |
| 616 | const struct tgsi_full_immediate *imm; |
| 617 | |
| 618 | imm = &parse.FullToken.FullImmediate; |
| 619 | assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); |
Michal Krol | adc6847 | 2009-02-10 15:18:03 +0100 | [diff] [blame] | 620 | assert(imm->Immediate.NrTokens == 4 + 1); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 621 | vpc->imm[vpc->nr_imm++] = |
| 622 | constant(vpc, -1, |
Keith Whitwell | fd31f92 | 2009-07-22 00:39:00 +0100 | [diff] [blame] | 623 | imm->u[0].Float, |
| 624 | imm->u[1].Float, |
| 625 | imm->u[2].Float, |
| 626 | imm->u[3].Float); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 627 | } |
| 628 | break; |
| 629 | case TGSI_TOKEN_TYPE_INSTRUCTION: |
| 630 | { |
| 631 | const struct tgsi_full_instruction *finst; |
| 632 | finst = &parse.FullToken.FullInstruction; |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 633 | if (!nv20_vertprog_parse_instruction(vpc, finst)) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 634 | goto out_err; |
| 635 | } |
| 636 | break; |
| 637 | default: |
| 638 | break; |
| 639 | } |
| 640 | } |
| 641 | |
| 642 | vp->insns[vp->nr_insns - 1].data[3] |= NV30_VP_INST_LAST; |
| 643 | vp->translated = TRUE; |
| 644 | out_err: |
| 645 | tgsi_parse_free(&parse); |
| 646 | FREE(vpc); |
| 647 | } |
| 648 | |
| 649 | static boolean |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 650 | nv20_vertprog_validate(struct nv20_context *nv20) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 651 | { |
Ben Skeggs | 6b3ca67 | 2009-06-05 11:21:08 +1000 | [diff] [blame] | 652 | struct pipe_screen *pscreen = nv20->pipe.screen; |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 653 | struct nouveau_winsys *nvws = nv20->nvws; |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 654 | struct nouveau_grobj *rankine = nv20->screen->rankine; |
| 655 | struct nv20_vertex_program *vp; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 656 | struct pipe_buffer *constbuf; |
| 657 | boolean upload_code = FALSE, upload_data = FALSE; |
| 658 | int i; |
| 659 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 660 | vp = nv20->vertprog; |
| 661 | constbuf = nv20->constbuf[PIPE_SHADER_VERTEX]; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 662 | |
| 663 | /* Translate TGSI shader into hw bytecode */ |
| 664 | if (!vp->translated) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 665 | nv20_vertprog_translate(nv20, vp); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 666 | if (!vp->translated) |
| 667 | return FALSE; |
| 668 | } |
| 669 | |
| 670 | /* Allocate hw vtxprog exec slots */ |
| 671 | if (!vp->exec) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 672 | struct nouveau_resource *heap = nv20->screen->vp_exec_heap; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 673 | struct nouveau_stateobj *so; |
| 674 | uint vplen = vp->nr_insns; |
| 675 | |
| 676 | if (nvws->res_alloc(heap, vplen, vp, &vp->exec)) { |
| 677 | while (heap->next && heap->size < vplen) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 678 | struct nv20_vertex_program *evict; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 679 | |
| 680 | evict = heap->next->priv; |
| 681 | nvws->res_free(&evict->exec); |
| 682 | } |
| 683 | |
| 684 | if (nvws->res_alloc(heap, vplen, vp, &vp->exec)) |
| 685 | assert(0); |
| 686 | } |
| 687 | |
| 688 | so = so_new(2, 0); |
| 689 | so_method(so, rankine, NV34TCL_VP_START_FROM_ID, 1); |
| 690 | so_data (so, vp->exec->start); |
| 691 | so_ref(so, &vp->so); |
| 692 | |
| 693 | upload_code = TRUE; |
| 694 | } |
| 695 | |
| 696 | /* Allocate hw vtxprog const slots */ |
| 697 | if (vp->nr_consts && !vp->data) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 698 | struct nouveau_resource *heap = nv20->screen->vp_data_heap; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 699 | |
| 700 | if (nvws->res_alloc(heap, vp->nr_consts, vp, &vp->data)) { |
| 701 | while (heap->next && heap->size < vp->nr_consts) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 702 | struct nv20_vertex_program *evict; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 703 | |
| 704 | evict = heap->next->priv; |
| 705 | nvws->res_free(&evict->data); |
| 706 | } |
| 707 | |
| 708 | if (nvws->res_alloc(heap, vp->nr_consts, vp, &vp->data)) |
| 709 | assert(0); |
| 710 | } |
| 711 | |
| 712 | /*XXX: handle this some day */ |
| 713 | assert(vp->data->start >= vp->data_start_min); |
| 714 | |
| 715 | upload_data = TRUE; |
| 716 | if (vp->data_start != vp->data->start) |
| 717 | upload_code = TRUE; |
| 718 | } |
| 719 | |
| 720 | /* If exec or data segments moved we need to patch the program to |
| 721 | * fixup offsets and register IDs. |
| 722 | */ |
| 723 | if (vp->exec_start != vp->exec->start) { |
| 724 | for (i = 0; i < vp->nr_insns; i++) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 725 | struct nv20_vertex_program_exec *vpi = &vp->insns[i]; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 726 | |
| 727 | if (vpi->has_branch_offset) { |
| 728 | assert(0); |
| 729 | } |
| 730 | } |
| 731 | |
| 732 | vp->exec_start = vp->exec->start; |
| 733 | } |
| 734 | |
| 735 | if (vp->nr_consts && vp->data_start != vp->data->start) { |
| 736 | for (i = 0; i < vp->nr_insns; i++) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 737 | struct nv20_vertex_program_exec *vpi = &vp->insns[i]; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 738 | |
| 739 | if (vpi->const_index >= 0) { |
| 740 | vpi->data[1] &= ~NV30_VP_INST_CONST_SRC_MASK; |
| 741 | vpi->data[1] |= |
| 742 | (vpi->const_index + vp->data->start) << |
| 743 | NV30_VP_INST_CONST_SRC_SHIFT; |
| 744 | |
| 745 | } |
| 746 | } |
| 747 | |
| 748 | vp->data_start = vp->data->start; |
| 749 | } |
| 750 | |
| 751 | /* Update + Upload constant values */ |
| 752 | if (vp->nr_consts) { |
| 753 | float *map = NULL; |
| 754 | |
| 755 | if (constbuf) { |
Ben Skeggs | 6b3ca67 | 2009-06-05 11:21:08 +1000 | [diff] [blame] | 756 | map = pipe_buffer_map(pscreen, constbuf, |
| 757 | PIPE_BUFFER_USAGE_CPU_READ); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 758 | } |
| 759 | |
| 760 | for (i = 0; i < vp->nr_consts; i++) { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 761 | struct nv20_vertex_program_data *vpd = &vp->consts[i]; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 762 | |
| 763 | if (vpd->index >= 0) { |
| 764 | if (!upload_data && |
| 765 | !memcmp(vpd->value, &map[vpd->index * 4], |
| 766 | 4 * sizeof(float))) |
| 767 | continue; |
| 768 | memcpy(vpd->value, &map[vpd->index * 4], |
| 769 | 4 * sizeof(float)); |
| 770 | } |
| 771 | |
| 772 | BEGIN_RING(rankine, NV34TCL_VP_UPLOAD_CONST_ID, 5); |
| 773 | OUT_RING (i + vp->data->start); |
| 774 | OUT_RINGp ((uint32_t *)vpd->value, 4); |
| 775 | } |
| 776 | |
Ben Skeggs | 6b3ca67 | 2009-06-05 11:21:08 +1000 | [diff] [blame] | 777 | if (constbuf) |
| 778 | pipe_buffer_unmap(pscreen, constbuf); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 779 | } |
| 780 | |
| 781 | /* Upload vtxprog */ |
| 782 | if (upload_code) { |
| 783 | #if 0 |
| 784 | for (i = 0; i < vp->nr_insns; i++) { |
| 785 | NOUVEAU_MSG("VP inst %d: 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 786 | i, vp->insns[i].data[0], vp->insns[i].data[1], |
| 787 | vp->insns[i].data[2], vp->insns[i].data[3]); |
| 788 | } |
| 789 | #endif |
| 790 | BEGIN_RING(rankine, NV34TCL_VP_UPLOAD_FROM_ID, 1); |
| 791 | OUT_RING (vp->exec->start); |
| 792 | for (i = 0; i < vp->nr_insns; i++) { |
| 793 | BEGIN_RING(rankine, NV34TCL_VP_UPLOAD_INST(0), 4); |
| 794 | OUT_RINGp (vp->insns[i].data, 4); |
| 795 | } |
| 796 | } |
| 797 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 798 | if (vp->so != nv20->state.hw[NV30_STATE_VERTPROG]) { |
| 799 | so_ref(vp->so, &nv20->state.hw[NV30_STATE_VERTPROG]); |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 800 | return TRUE; |
| 801 | } |
| 802 | |
| 803 | return FALSE; |
| 804 | } |
| 805 | |
| 806 | void |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 807 | nv20_vertprog_destroy(struct nv20_context *nv20, struct nv20_vertex_program *vp) |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 808 | { |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 809 | struct nouveau_winsys *nvws = nv20->screen->nvws; |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 810 | |
| 811 | vp->translated = FALSE; |
| 812 | |
| 813 | if (vp->nr_insns) { |
| 814 | FREE(vp->insns); |
| 815 | vp->insns = NULL; |
| 816 | vp->nr_insns = 0; |
| 817 | } |
| 818 | |
| 819 | if (vp->nr_consts) { |
| 820 | FREE(vp->consts); |
| 821 | vp->consts = NULL; |
| 822 | vp->nr_consts = 0; |
| 823 | } |
| 824 | |
| 825 | nvws->res_free(&vp->exec); |
| 826 | vp->exec_start = 0; |
| 827 | nvws->res_free(&vp->data); |
| 828 | vp->data_start = 0; |
| 829 | vp->data_start_min = 0; |
| 830 | |
| 831 | vp->ir = vp->or = 0; |
| 832 | so_ref(NULL, &vp->so); |
| 833 | } |
| 834 | |
Pekka Paalanen | b5a3c42 | 2008-11-08 18:04:33 +0200 | [diff] [blame] | 835 | struct nv20_state_entry nv20_state_vertprog = { |
| 836 | .validate = nv20_vertprog_validate, |
Pekka Paalanen | f910371 | 2008-11-08 17:09:16 +0200 | [diff] [blame] | 837 | .dirty = { |
| 838 | .pipe = NV30_NEW_VERTPROG /*| NV30_NEW_UCP*/, |
| 839 | .hw = NV30_STATE_VERTPROG, |
| 840 | } |
| 841 | }; |