| Jeff Brown | 7a33c86 | 2011-02-02 14:00:44 -0800 | [diff] [blame^] | 1 | # |
| 2 | # Intel Atom (Silverthorne) unit masks |
| 3 | # |
| 4 | include:i386/arch_perfmon |
| 5 | name:store_forwards type:mandatory default:0x81 |
| 6 | 0x81 good Good store forwards |
| 7 | name:segment_reg_loads type:mandatory default:0x00 |
| 8 | 0x00 any Number of segment register loads |
| 9 | name:simd_prefetch type:bitmask default:0x01 |
| 10 | 0x01 prefetcht0 Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed |
| 11 | 0x06 sw_l2 Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed |
| 12 | 0x08 prefetchnta Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed |
| 13 | name:data_tlb_misses type:bitmask default:0x07 |
| 14 | 0x07 dtlb_miss Memory accesses that missed the DTLB |
| 15 | 0x05 dtlb_miss_ld DTLB misses due to load operations |
| 16 | 0x09 l0_dtlb_miss_ld L0_DTLB misses due to load operations |
| 17 | 0x06 dtlb_miss_st DTLB misses due to store operations |
| 18 | name:page_walks type:bitmask default:0x03 |
| 19 | 0x03 walks Number of page-walks executed |
| 20 | 0x03 cycles Duration of page-walks in core cycles |
| 21 | name:x87_comp_ops_exe type:bitmask default:0x81 |
| 22 | 0x01 s Floating point computational micro-ops executed |
| 23 | 0x81 ar Floating point computational micro-ops retired |
| 24 | name:fp_assist type:mandatory default:0x81 |
| 25 | 0x81 ar Floating point assists |
| 26 | name:mul type:bitmask default:0x01 |
| 27 | 0x01 s Multiply operations executed |
| 28 | 0x81 ar Multiply operations retired |
| 29 | name:div type:bitmask default:0x01 |
| 30 | 0x01 s Divide operations executed |
| 31 | 0x81 ar Divide operations retired |
| 32 | name:l2_rqsts type:bitmask default:0x41 |
| 33 | 0x41 i_state L2 cache demand requests from this core that missed the L2 |
| 34 | 0x4F mesi L2 cache demand requests from this core |
| 35 | name:cpu_clk_unhalted type:bitmask default:0x00 |
| 36 | 0x00 core_p Core cycles when core is not halted |
| 37 | 0x01 bus Bus cycles when core is not halted |
| 38 | 0x02 no_other Bus cycles when core is active and the other is halted |
| 39 | name:l1d_cache type:bitmask default:0x21 |
| 40 | 0x21 ld L1 Cacheable Data Reads |
| 41 | 0x22 st L1 Cacheable Data Writes |
| 42 | name:icache type:bitmask default:0x03 |
| 43 | 0x03 accesses Instruction fetches |
| 44 | 0x02 misses Icache miss |
| 45 | name:itlb type:bitmask default:0x04 |
| 46 | 0x04 flush ITLB flushes |
| 47 | 0x02 misses ITLB misses |
| 48 | name:macro_insts type:exclusive default:0x03 |
| 49 | 0x02 cisc_decoded CISC macro instructions decoded |
| 50 | 0x03 all_decoded All Instructions decoded |
| 51 | name:simd_uops_exec type:exclusive default:0x80 |
| 52 | 0x00 s SIMD micro-ops executed (excluding stores) |
| 53 | 0x80 ar SIMD micro-ops retired (excluding stores) |
| 54 | name:simd_sat_uop_exec type:bitmask default:0x00 |
| 55 | 0x00 s SIMD saturated arithmetic micro-ops executed |
| 56 | 0x80 ar SIMD saturated arithmetic micro-ops retired |
| 57 | name:simd_uop_type_exec type:bitmask default:0x01 |
| 58 | 0x01 s SIMD packed multiply microops executed |
| 59 | 0x81 ar SIMD packed multiply microops retired |
| 60 | 0x02 s SIMD packed shift micro-ops executed |
| 61 | 0x82 ar SIMD packed shift micro-ops retired |
| 62 | 0x04 s SIMD pack micro-ops executed |
| 63 | 0x84 ar SIMD pack micro-ops retired |
| 64 | 0x08 s SIMD unpack micro-ops executed |
| 65 | 0x88 ar SIMD unpack micro-ops retired |
| 66 | 0x10 s SIMD packed logical microops executed |
| 67 | 0x90 ar SIMD packed logical microops retired |
| 68 | 0x20 s SIMD packed arithmetic micro-ops executed |
| 69 | 0xA0 ar SIMD packed arithmetic micro-ops retired |
| 70 | name:uops_retired type:mandatory default:0x10 |
| 71 | 0x10 any Micro-ops retired |
| 72 | name:br_inst_retired type:bitmask default:0x00 |
| 73 | 0x00 any Retired branch instructions |
| 74 | 0x01 pred_not_taken Retired branch instructions that were predicted not-taken |
| 75 | 0x02 mispred_not_taken Retired branch instructions that were mispredicted not-taken |
| 76 | 0x04 pred_taken Retired branch instructions that were predicted taken |
| 77 | 0x08 mispred_taken Retired branch instructions that were mispredicted taken |
| 78 | 0x0A mispred Retired mispredicted branch instructions (precise event) |
| 79 | 0x0C taken Retired taken branch instructions |
| 80 | 0x0F any1 Retired branch instructions |
| 81 | name:cycles_int_masked type:bitmask default:0x01 |
| 82 | 0x01 cycles_int_masked Cycles during which interrupts are disabled |
| 83 | 0x02 cycles_int_pending_and_masked Cycles during which interrupts are pending and disabled |
| 84 | name:simd_inst_retired type:bitmask default:0x01 |
| 85 | 0x01 packed_single Retired Streaming SIMD Extensions (SSE) packed-single instructions |
| 86 | 0x02 scalar_single Retired Streaming SIMD Extensions (SSE) scalar-single instructions |
| 87 | 0x04 packed_double Retired Streaming SIMD Extensions 2 (SSE2) packed-double instructions |
| 88 | 0x08 scalar_double Retired Streaming SIMD Extensions 2 (SSE2) scalar-double instructions |
| 89 | 0x10 vector Retired Streaming SIMD Extensions 2 (SSE2) vector instructions |
| 90 | 0x1F any Retired Streaming SIMD instructions |
| 91 | name:simd_comp_inst_retired type:bitmask default:0x01 |
| 92 | 0x01 packed_single Retired computational Streaming SIMD Extensions (SSE) packed-single instructions |
| 93 | 0x02 scalar_single Retired computational Streaming SIMD Extensions (SSE) scalar-single instructions |
| 94 | 0x04 packed_double Retired computational Streaming SIMD Extensions 2 (SSE2) packed-double instructions |
| 95 | 0x08 scalar_double Retired computational Streaming SIMD Extensions 2 (SSE2) scalar-double instructions |
| 96 | name:mem_load_retired type:bitmask default:0x01 |
| 97 | 0x01 l2_hit Retired loads that hit the L2 cache (precise event) |
| 98 | 0x02 l2_miss Retired loads that miss the L2 cache (precise event) |
| 99 | 0x04 dtlb_miss Retired loads that miss the DTLB (precise event) |
| 100 | name:thermal_trip type:mandatory default:0xc0 |
| 101 | 0xc0 thermal_trip Number of thermal trips. |
| 102 | # 18-11 |
| 103 | name:core type:bitmask default:0x180 |
| 104 | 0x180 all All cores. |
| 105 | 0x080 this This Core. |
| 106 | # 18-12 |
| 107 | name:agent type:bitmask default:0x00 |
| 108 | 0x00 this This agent |
| 109 | 0x40 any Include any agents |
| 110 | # 18-13 |
| 111 | name:prefetch type:bitmask default:0x60 |
| 112 | 0x60 all All inclusive |
| 113 | 0x20 hw Hardware prefetch only |
| 114 | 0x00 exclude_hw Exclude hardware prefetch |
| 115 | # 18-14 |
| 116 | name:mesi type:bitmask default:0x0f |
| 117 | 0x08 modified Counts modified state |
| 118 | 0x04 exclusive Counts exclusive state |
| 119 | 0x02 shared Counts shared state |
| 120 | 0x01 invalid Counts invalid state |