| David 'Digit' Turner | 5d8f37a | 2009-09-14 14:32:27 -0700 | [diff] [blame] | 1 | #ifndef CPU_COMMON_H |
| 2 | #define CPU_COMMON_H 1 |
| 3 | |
| 4 | /* CPU interfaces that are target indpendent. */ |
| 5 | |
| 6 | #if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) |
| 7 | #define WORDS_ALIGNED |
| 8 | #endif |
| 9 | |
| 10 | #include "bswap.h" |
| 11 | |
| 12 | /* address in the RAM (different from a physical address) */ |
| 13 | #ifdef CONFIG_KQEMU |
| 14 | /* FIXME: This is wrong. */ |
| 15 | typedef uint32_t ram_addr_t; |
| 16 | #else |
| 17 | typedef unsigned long ram_addr_t; |
| 18 | #endif |
| 19 | |
| 20 | /* memory API */ |
| 21 | |
| 22 | typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); |
| 23 | typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); |
| 24 | |
| 25 | void cpu_register_physical_memory_offset(target_phys_addr_t start_addr, |
| 26 | ram_addr_t size, |
| 27 | ram_addr_t phys_offset, |
| 28 | ram_addr_t region_offset); |
| 29 | static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, |
| 30 | ram_addr_t size, |
| 31 | ram_addr_t phys_offset) |
| 32 | { |
| 33 | cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0); |
| 34 | } |
| 35 | |
| 36 | ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); |
| 37 | ram_addr_t qemu_ram_alloc(ram_addr_t); |
| 38 | void qemu_ram_free(ram_addr_t addr); |
| 39 | /* This should only be used for ram local to a device. */ |
| 40 | void *qemu_get_ram_ptr(ram_addr_t addr); |
| 41 | /* This should not be used by devices. */ |
| 42 | ram_addr_t qemu_ram_addr_from_host(void *ptr); |
| 43 | |
| 44 | int cpu_register_io_memory(CPUReadMemoryFunc **mem_read, |
| 45 | CPUWriteMemoryFunc **mem_write, |
| 46 | void *opaque); |
| 47 | void cpu_unregister_io_memory(int table_address); |
| 48 | |
| 49 | void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, |
| 50 | int len, int is_write); |
| 51 | static inline void cpu_physical_memory_read(target_phys_addr_t addr, |
| 52 | uint8_t *buf, int len) |
| 53 | { |
| 54 | cpu_physical_memory_rw(addr, buf, len, 0); |
| 55 | } |
| 56 | static inline void cpu_physical_memory_write(target_phys_addr_t addr, |
| 57 | const uint8_t *buf, int len) |
| 58 | { |
| 59 | cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1); |
| 60 | } |
| 61 | void *cpu_physical_memory_map(target_phys_addr_t addr, |
| 62 | target_phys_addr_t *plen, |
| 63 | int is_write); |
| 64 | void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, |
| 65 | int is_write, target_phys_addr_t access_len); |
| 66 | void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); |
| 67 | void cpu_unregister_map_client(void *cookie); |
| 68 | |
| 69 | uint32_t ldub_phys(target_phys_addr_t addr); |
| 70 | uint32_t lduw_phys(target_phys_addr_t addr); |
| 71 | uint32_t ldl_phys(target_phys_addr_t addr); |
| 72 | uint64_t ldq_phys(target_phys_addr_t addr); |
| 73 | void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); |
| 74 | void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val); |
| 75 | void stb_phys(target_phys_addr_t addr, uint32_t val); |
| 76 | void stw_phys(target_phys_addr_t addr, uint32_t val); |
| 77 | void stl_phys(target_phys_addr_t addr, uint32_t val); |
| 78 | void stq_phys(target_phys_addr_t addr, uint64_t val); |
| 79 | |
| 80 | void cpu_physical_memory_write_rom(target_phys_addr_t addr, |
| 81 | const uint8_t *buf, int len); |
| 82 | |
| 83 | #define IO_MEM_SHIFT 3 |
| 84 | |
| 85 | #define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */ |
| 86 | #define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */ |
| 87 | #define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT) |
| 88 | #define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT) |
| 89 | |
| 90 | /* Acts like a ROM when read and like a device when written. */ |
| 91 | #define IO_MEM_ROMD (1) |
| 92 | #define IO_MEM_SUBPAGE (2) |
| 93 | #define IO_MEM_SUBWIDTH (4) |
| 94 | |
| 95 | #endif /* !CPU_COMMON_H */ |