| // Copyright 2014 the V8 project authors. All rights reserved. |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file |
| |
| #include "test/unittests/compiler/instruction-selector-unittest.h" |
| |
| namespace v8 { |
| namespace internal { |
| namespace compiler { |
| |
| namespace { |
| template <typename T> |
| struct MachInst { |
| T constructor; |
| const char* constructor_name; |
| ArchOpcode arch_opcode; |
| MachineType machine_type; |
| }; |
| |
| template <typename T> |
| std::ostream& operator<<(std::ostream& os, const MachInst<T>& mi) { |
| return os << mi.constructor_name; |
| } |
| |
| typedef MachInst<Node* (RawMachineAssembler::*)(Node*)> MachInst1; |
| typedef MachInst<Node* (RawMachineAssembler::*)(Node*, Node*)> MachInst2; |
| |
| |
| // To avoid duplicated code IntCmp helper structure |
| // is created. It contains MachInst2 with two nodes and expected_size |
| // because different cmp instructions have different size. |
| struct IntCmp { |
| MachInst2 mi; |
| uint32_t expected_size; |
| }; |
| |
| struct FPCmp { |
| MachInst2 mi; |
| FlagsCondition cond; |
| }; |
| |
| const FPCmp kFPCmpInstructions[] = { |
| {{&RawMachineAssembler::Float64Equal, "Float64Equal", kMips64CmpD, |
| kMachFloat64}, |
| kUnorderedEqual}, |
| {{&RawMachineAssembler::Float64LessThan, "Float64LessThan", kMips64CmpD, |
| kMachFloat64}, |
| kUnorderedLessThan}, |
| {{&RawMachineAssembler::Float64LessThanOrEqual, "Float64LessThanOrEqual", |
| kMips64CmpD, kMachFloat64}, |
| kUnorderedLessThanOrEqual}, |
| {{&RawMachineAssembler::Float64GreaterThan, "Float64GreaterThan", |
| kMips64CmpD, kMachFloat64}, |
| kUnorderedLessThan}, |
| {{&RawMachineAssembler::Float64GreaterThanOrEqual, |
| "Float64GreaterThanOrEqual", kMips64CmpD, kMachFloat64}, |
| kUnorderedLessThanOrEqual}}; |
| |
| struct Conversion { |
| // The machine_type field in MachInst1 represents the destination type. |
| MachInst1 mi; |
| MachineType src_machine_type; |
| }; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Logical instructions. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst2 kLogicalInstructions[] = { |
| {&RawMachineAssembler::Word32And, "Word32And", kMips64And, kMachInt32}, |
| {&RawMachineAssembler::Word64And, "Word64And", kMips64And, kMachInt64}, |
| {&RawMachineAssembler::Word32Or, "Word32Or", kMips64Or, kMachInt32}, |
| {&RawMachineAssembler::Word64Or, "Word64Or", kMips64Or, kMachInt64}, |
| {&RawMachineAssembler::Word32Xor, "Word32Xor", kMips64Xor, kMachInt32}, |
| {&RawMachineAssembler::Word64Xor, "Word64Xor", kMips64Xor, kMachInt64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Shift instructions. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst2 kShiftInstructions[] = { |
| {&RawMachineAssembler::Word32Shl, "Word32Shl", kMips64Shl, kMachInt32}, |
| {&RawMachineAssembler::Word64Shl, "Word64Shl", kMips64Dshl, kMachInt64}, |
| {&RawMachineAssembler::Word32Shr, "Word32Shr", kMips64Shr, kMachInt32}, |
| {&RawMachineAssembler::Word64Shr, "Word64Shr", kMips64Dshr, kMachInt64}, |
| {&RawMachineAssembler::Word32Sar, "Word32Sar", kMips64Sar, kMachInt32}, |
| {&RawMachineAssembler::Word64Sar, "Word64Sar", kMips64Dsar, kMachInt64}, |
| {&RawMachineAssembler::Word32Ror, "Word32Ror", kMips64Ror, kMachInt32}, |
| {&RawMachineAssembler::Word64Ror, "Word64Ror", kMips64Dror, kMachInt64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // MUL/DIV instructions. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst2 kMulDivInstructions[] = { |
| {&RawMachineAssembler::Int32Mul, "Int32Mul", kMips64Mul, kMachInt32}, |
| {&RawMachineAssembler::Int32Div, "Int32Div", kMips64Div, kMachInt32}, |
| {&RawMachineAssembler::Uint32Div, "Uint32Div", kMips64DivU, kMachUint32}, |
| {&RawMachineAssembler::Int64Mul, "Int64Mul", kMips64Dmul, kMachInt64}, |
| {&RawMachineAssembler::Int64Div, "Int64Div", kMips64Ddiv, kMachInt64}, |
| {&RawMachineAssembler::Uint64Div, "Uint64Div", kMips64DdivU, kMachUint64}, |
| {&RawMachineAssembler::Float64Mul, "Float64Mul", kMips64MulD, kMachFloat64}, |
| {&RawMachineAssembler::Float64Div, "Float64Div", kMips64DivD, |
| kMachFloat64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // MOD instructions. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst2 kModInstructions[] = { |
| {&RawMachineAssembler::Int32Mod, "Int32Mod", kMips64Mod, kMachInt32}, |
| {&RawMachineAssembler::Uint32Mod, "Uint32Mod", kMips64ModU, kMachInt32}, |
| {&RawMachineAssembler::Float64Mod, "Float64Mod", kMips64ModD, |
| kMachFloat64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Arithmetic FPU instructions. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst2 kFPArithInstructions[] = { |
| {&RawMachineAssembler::Float64Add, "Float64Add", kMips64AddD, kMachFloat64}, |
| {&RawMachineAssembler::Float64Sub, "Float64Sub", kMips64SubD, |
| kMachFloat64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // IntArithTest instructions, two nodes. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst2 kAddSubInstructions[] = { |
| {&RawMachineAssembler::Int32Add, "Int32Add", kMips64Add, kMachInt32}, |
| {&RawMachineAssembler::Int64Add, "Int64Add", kMips64Dadd, kMachInt64}, |
| {&RawMachineAssembler::Int32Sub, "Int32Sub", kMips64Sub, kMachInt32}, |
| {&RawMachineAssembler::Int64Sub, "Int64Sub", kMips64Dsub, kMachInt64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // IntArithTest instructions, one node. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MachInst1 kAddSubOneInstructions[] = { |
| {&RawMachineAssembler::Int32Neg, "Int32Neg", kMips64Sub, kMachInt32}, |
| {&RawMachineAssembler::Int64Neg, "Int64Neg", kMips64Dsub, kMachInt64}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Arithmetic compare instructions. |
| // ---------------------------------------------------------------------------- |
| |
| |
| const IntCmp kCmpInstructions[] = { |
| {{&RawMachineAssembler::WordEqual, "WordEqual", kMips64Cmp, kMachInt64}, |
| 1U}, |
| {{&RawMachineAssembler::WordNotEqual, "WordNotEqual", kMips64Cmp, |
| kMachInt64}, |
| 1U}, |
| {{&RawMachineAssembler::Word32Equal, "Word32Equal", kMips64Cmp32, |
| kMachInt32}, |
| 1U}, |
| {{&RawMachineAssembler::Word32NotEqual, "Word32NotEqual", kMips64Cmp32, |
| kMachInt32}, |
| 1U}, |
| {{&RawMachineAssembler::Int32LessThan, "Int32LessThan", kMips64Cmp32, |
| kMachInt32}, |
| 1U}, |
| {{&RawMachineAssembler::Int32LessThanOrEqual, "Int32LessThanOrEqual", |
| kMips64Cmp32, kMachInt32}, |
| 1U}, |
| {{&RawMachineAssembler::Int32GreaterThan, "Int32GreaterThan", kMips64Cmp32, |
| kMachInt32}, |
| 1U}, |
| {{&RawMachineAssembler::Int32GreaterThanOrEqual, "Int32GreaterThanOrEqual", |
| kMips64Cmp32, kMachInt32}, |
| 1U}, |
| {{&RawMachineAssembler::Uint32LessThan, "Uint32LessThan", kMips64Cmp32, |
| kMachUint32}, |
| 1U}, |
| {{&RawMachineAssembler::Uint32LessThanOrEqual, "Uint32LessThanOrEqual", |
| kMips64Cmp32, kMachUint32}, |
| 1U}}; |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Conversion instructions. |
| // ---------------------------------------------------------------------------- |
| |
| const Conversion kConversionInstructions[] = { |
| // Conversion instructions are related to machine_operator.h: |
| // FPU conversions: |
| // Convert representation of integers between float64 and int32/uint32. |
| // The precise rounding mode and handling of out of range inputs are *not* |
| // defined for these operators, since they are intended only for use with |
| // integers. |
| // mips instructions: |
| // mtc1, cvt.d.w |
| {{&RawMachineAssembler::ChangeInt32ToFloat64, "ChangeInt32ToFloat64", |
| kMips64CvtDW, kMachFloat64}, |
| kMachInt32}, |
| |
| // mips instructions: |
| // cvt.d.uw |
| {{&RawMachineAssembler::ChangeUint32ToFloat64, "ChangeUint32ToFloat64", |
| kMips64CvtDUw, kMachFloat64}, |
| kMachInt32}, |
| |
| // mips instructions: |
| // mfc1, trunc double to word, for more details look at mips macro |
| // asm and mips asm file |
| {{&RawMachineAssembler::ChangeFloat64ToInt32, "ChangeFloat64ToInt32", |
| kMips64TruncWD, kMachFloat64}, |
| kMachInt32}, |
| |
| // mips instructions: |
| // trunc double to unsigned word, for more details look at mips macro |
| // asm and mips asm file |
| {{&RawMachineAssembler::ChangeFloat64ToUint32, "ChangeFloat64ToUint32", |
| kMips64TruncUwD, kMachFloat64}, |
| kMachInt32}}; |
| |
| } // namespace |
| |
| |
| typedef InstructionSelectorTestWithParam<FPCmp> InstructionSelectorFPCmpTest; |
| |
| TEST_P(InstructionSelectorFPCmpTest, Parameter) { |
| const FPCmp cmp = GetParam(); |
| StreamBuilder m(this, kMachInt32, cmp.mi.machine_type, cmp.mi.machine_type); |
| m.Return((m.*cmp.mi.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(cmp.mi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
| EXPECT_EQ(cmp.cond, s[0]->flags_condition()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorFPCmpTest, |
| ::testing::ValuesIn(kFPCmpInstructions)); |
| |
| // ---------------------------------------------------------------------------- |
| // Arithmetic compare instructions integers |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<IntCmp> InstructionSelectorCmpTest; |
| |
| |
| TEST_P(InstructionSelectorCmpTest, Parameter) { |
| const IntCmp cmp = GetParam(); |
| const MachineType type = cmp.mi.machine_type; |
| StreamBuilder m(this, type, type, type); |
| m.Return((m.*cmp.mi.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(cmp.expected_size, s.size()); |
| EXPECT_EQ(cmp.mi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorCmpTest, |
| ::testing::ValuesIn(kCmpInstructions)); |
| |
| // ---------------------------------------------------------------------------- |
| // Shift instructions. |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<MachInst2> |
| InstructionSelectorShiftTest; |
| |
| TEST_P(InstructionSelectorShiftTest, Immediate) { |
| const MachInst2 dpi = GetParam(); |
| const MachineType type = dpi.machine_type; |
| TRACED_FORRANGE(int32_t, imm, 0, (ElementSizeOf(type) * 8) - 1) { |
| StreamBuilder m(this, type, type); |
| m.Return((m.*dpi.constructor)(m.Parameter(0), m.Int32Constant(imm))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate()); |
| EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1))); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorShiftTest, |
| ::testing::ValuesIn(kShiftInstructions)); |
| |
| // ---------------------------------------------------------------------------- |
| // Logical instructions. |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<MachInst2> |
| InstructionSelectorLogicalTest; |
| |
| |
| TEST_P(InstructionSelectorLogicalTest, Parameter) { |
| const MachInst2 dpi = GetParam(); |
| const MachineType type = dpi.machine_type; |
| StreamBuilder m(this, type, type, type); |
| m.Return((m.*dpi.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorLogicalTest, |
| ::testing::ValuesIn(kLogicalInstructions)); |
| |
| // ---------------------------------------------------------------------------- |
| // MUL/DIV instructions. |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<MachInst2> |
| InstructionSelectorMulDivTest; |
| |
| TEST_P(InstructionSelectorMulDivTest, Parameter) { |
| const MachInst2 dpi = GetParam(); |
| const MachineType type = dpi.machine_type; |
| StreamBuilder m(this, type, type, type); |
| m.Return((m.*dpi.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorMulDivTest, |
| ::testing::ValuesIn(kMulDivInstructions)); |
| |
| // ---------------------------------------------------------------------------- |
| // MOD instructions. |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<MachInst2> InstructionSelectorModTest; |
| |
| TEST_P(InstructionSelectorModTest, Parameter) { |
| const MachInst2 dpi = GetParam(); |
| const MachineType type = dpi.machine_type; |
| StreamBuilder m(this, type, type, type); |
| m.Return((m.*dpi.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorModTest, |
| ::testing::ValuesIn(kModInstructions)); |
| |
| // ---------------------------------------------------------------------------- |
| // Floating point instructions. |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<MachInst2> |
| InstructionSelectorFPArithTest; |
| |
| TEST_P(InstructionSelectorFPArithTest, Parameter) { |
| const MachInst2 fpa = GetParam(); |
| StreamBuilder m(this, fpa.machine_type, fpa.machine_type, fpa.machine_type); |
| m.Return((m.*fpa.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(fpa.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorFPArithTest, |
| ::testing::ValuesIn(kFPArithInstructions)); |
| // ---------------------------------------------------------------------------- |
| // Integer arithmetic |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<MachInst2> |
| InstructionSelectorIntArithTwoTest; |
| |
| TEST_P(InstructionSelectorIntArithTwoTest, Parameter) { |
| const MachInst2 intpa = GetParam(); |
| StreamBuilder m(this, intpa.machine_type, intpa.machine_type, |
| intpa.machine_type); |
| m.Return((m.*intpa.constructor)(m.Parameter(0), m.Parameter(1))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(intpa.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
| InstructionSelectorIntArithTwoTest, |
| ::testing::ValuesIn(kAddSubInstructions)); |
| |
| |
| // ---------------------------------------------------------------------------- |
| // One node. |
| // ---------------------------------------------------------------------------- |
| |
| |
| typedef InstructionSelectorTestWithParam<MachInst1> |
| InstructionSelectorIntArithOneTest; |
| |
| TEST_P(InstructionSelectorIntArithOneTest, Parameter) { |
| const MachInst1 intpa = GetParam(); |
| StreamBuilder m(this, intpa.machine_type, intpa.machine_type, |
| intpa.machine_type); |
| m.Return((m.*intpa.constructor)(m.Parameter(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(intpa.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
| InstructionSelectorIntArithOneTest, |
| ::testing::ValuesIn(kAddSubOneInstructions)); |
| // ---------------------------------------------------------------------------- |
| // Conversions. |
| // ---------------------------------------------------------------------------- |
| typedef InstructionSelectorTestWithParam<Conversion> |
| InstructionSelectorConversionTest; |
| |
| TEST_P(InstructionSelectorConversionTest, Parameter) { |
| const Conversion conv = GetParam(); |
| StreamBuilder m(this, conv.mi.machine_type, conv.src_machine_type); |
| m.Return((m.*conv.mi.constructor)(m.Parameter(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(conv.mi.arch_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(1U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
| InstructionSelectorConversionTest, |
| ::testing::ValuesIn(kConversionInstructions)); |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Loads and stores. |
| // ---------------------------------------------------------------------------- |
| |
| |
| namespace { |
| |
| struct MemoryAccess { |
| MachineType type; |
| ArchOpcode load_opcode; |
| ArchOpcode store_opcode; |
| }; |
| |
| static const MemoryAccess kMemoryAccesses[] = { |
| {kMachInt8, kMips64Lb, kMips64Sb}, |
| {kMachUint8, kMips64Lbu, kMips64Sb}, |
| {kMachInt16, kMips64Lh, kMips64Sh}, |
| {kMachUint16, kMips64Lhu, kMips64Sh}, |
| {kMachInt32, kMips64Lw, kMips64Sw}, |
| {kRepFloat32, kMips64Lwc1, kMips64Swc1}, |
| {kRepFloat64, kMips64Ldc1, kMips64Sdc1}, |
| {kMachInt64, kMips64Ld, kMips64Sd}}; |
| |
| |
| struct MemoryAccessImm { |
| MachineType type; |
| ArchOpcode load_opcode; |
| ArchOpcode store_opcode; |
| bool (InstructionSelectorTest::Stream::*val_predicate)( |
| const InstructionOperand*) const; |
| const int32_t immediates[40]; |
| }; |
| |
| |
| std::ostream& operator<<(std::ostream& os, const MemoryAccessImm& acc) { |
| return os << acc.type; |
| } |
| |
| |
| struct MemoryAccessImm1 { |
| MachineType type; |
| ArchOpcode load_opcode; |
| ArchOpcode store_opcode; |
| bool (InstructionSelectorTest::Stream::*val_predicate)( |
| const InstructionOperand*) const; |
| const int32_t immediates[5]; |
| }; |
| |
| |
| std::ostream& operator<<(std::ostream& os, const MemoryAccessImm1& acc) { |
| return os << acc.type; |
| } |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Loads and stores immediate values |
| // ---------------------------------------------------------------------------- |
| |
| |
| const MemoryAccessImm kMemoryAccessesImm[] = { |
| {kMachInt8, |
| kMips64Lb, |
| kMips64Sb, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachUint8, |
| kMips64Lbu, |
| kMips64Sb, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachInt16, |
| kMips64Lh, |
| kMips64Sh, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachUint16, |
| kMips64Lhu, |
| kMips64Sh, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachInt32, |
| kMips64Lw, |
| kMips64Sw, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachFloat32, |
| kMips64Lwc1, |
| kMips64Swc1, |
| &InstructionSelectorTest::Stream::IsDouble, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachFloat64, |
| kMips64Ldc1, |
| kMips64Sdc1, |
| &InstructionSelectorTest::Stream::IsDouble, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}, |
| {kMachInt64, |
| kMips64Ld, |
| kMips64Sd, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89, |
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109, |
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}}; |
| |
| |
| const MemoryAccessImm1 kMemoryAccessImmMoreThan16bit[] = { |
| {kMachInt8, |
| kMips64Lb, |
| kMips64Sb, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachInt8, |
| kMips64Lbu, |
| kMips64Sb, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachInt16, |
| kMips64Lh, |
| kMips64Sh, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachInt16, |
| kMips64Lhu, |
| kMips64Sh, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachInt32, |
| kMips64Lw, |
| kMips64Sw, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachFloat32, |
| kMips64Lwc1, |
| kMips64Swc1, |
| &InstructionSelectorTest::Stream::IsDouble, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachFloat64, |
| kMips64Ldc1, |
| kMips64Sdc1, |
| &InstructionSelectorTest::Stream::IsDouble, |
| {-65000, -55000, 32777, 55000, 65000}}, |
| {kMachInt64, |
| kMips64Ld, |
| kMips64Sd, |
| &InstructionSelectorTest::Stream::IsInteger, |
| {-65000, -55000, 32777, 55000, 65000}}}; |
| |
| } // namespace |
| |
| |
| typedef InstructionSelectorTestWithParam<MemoryAccess> |
| InstructionSelectorMemoryAccessTest; |
| |
| TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) { |
| const MemoryAccess memacc = GetParam(); |
| StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32); |
| m.Return(m.Load(memacc.type, m.Parameter(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
| } |
| |
| |
| TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) { |
| const MemoryAccess memacc = GetParam(); |
| StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type); |
| m.Store(memacc.type, m.Parameter(0), m.Parameter(1)); |
| m.Return(m.Int32Constant(0)); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
| InstructionSelectorMemoryAccessTest, |
| ::testing::ValuesIn(kMemoryAccesses)); |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Load immediate. |
| // ---------------------------------------------------------------------------- |
| |
| |
| typedef InstructionSelectorTestWithParam<MemoryAccessImm> |
| InstructionSelectorMemoryAccessImmTest; |
| |
| TEST_P(InstructionSelectorMemoryAccessImmTest, LoadWithImmediateIndex) { |
| const MemoryAccessImm memacc = GetParam(); |
| TRACED_FOREACH(int32_t, index, memacc.immediates) { |
| StreamBuilder m(this, memacc.type, kMachPtr); |
| m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
| ASSERT_EQ(2U, s[0]->InputCount()); |
| ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind()); |
| EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1))); |
| ASSERT_EQ(1U, s[0]->OutputCount()); |
| EXPECT_TRUE((s.*memacc.val_predicate)(s[0]->Output())); |
| } |
| } |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Store immediate. |
| // ---------------------------------------------------------------------------- |
| |
| |
| TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) { |
| const MemoryAccessImm memacc = GetParam(); |
| TRACED_FOREACH(int32_t, index, memacc.immediates) { |
| StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type); |
| m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), |
| m.Parameter(1)); |
| m.Return(m.Int32Constant(0)); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
| ASSERT_EQ(3U, s[0]->InputCount()); |
| ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind()); |
| EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1))); |
| EXPECT_EQ(0U, s[0]->OutputCount()); |
| } |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
| InstructionSelectorMemoryAccessImmTest, |
| ::testing::ValuesIn(kMemoryAccessesImm)); |
| |
| |
| // ---------------------------------------------------------------------------- |
| // Load/store offsets more than 16 bits. |
| // ---------------------------------------------------------------------------- |
| |
| |
| typedef InstructionSelectorTestWithParam<MemoryAccessImm1> |
| InstructionSelectorMemoryAccessImmMoreThan16bitTest; |
| |
| TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest, |
| LoadWithImmediateIndex) { |
| const MemoryAccessImm1 memacc = GetParam(); |
| TRACED_FOREACH(int32_t, index, memacc.immediates) { |
| StreamBuilder m(this, memacc.type, kMachPtr); |
| m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index))); |
| Stream s = m.Build(); |
| ASSERT_EQ(2U, s.size()); |
| // kMips64Dadd is expected opcode |
| // size more than 16 bits wide |
| EXPECT_EQ(kMips64Dadd, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| } |
| |
| TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest, |
| StoreWithImmediateIndex) { |
| const MemoryAccessImm1 memacc = GetParam(); |
| TRACED_FOREACH(int32_t, index, memacc.immediates) { |
| StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type); |
| m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), |
| m.Parameter(1)); |
| m.Return(m.Int32Constant(0)); |
| Stream s = m.Build(); |
| ASSERT_EQ(2U, s.size()); |
| // kMips64Add is expected opcode |
| // size more than 16 bits wide |
| EXPECT_EQ(kMips64Dadd, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
| EXPECT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| } |
| } |
| |
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
| InstructionSelectorMemoryAccessImmMoreThan16bitTest, |
| ::testing::ValuesIn(kMemoryAccessImmMoreThan16bit)); |
| |
| |
| // ---------------------------------------------------------------------------- |
| // kMips64Cmp with zero testing. |
| // ---------------------------------------------------------------------------- |
| |
| |
| TEST_F(InstructionSelectorTest, Word32EqualWithZero) { |
| { |
| StreamBuilder m(this, kMachInt32, kMachInt32); |
| m.Return(m.Word32Equal(m.Parameter(0), m.Int32Constant(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(kMips64Cmp32, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
| ASSERT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
| EXPECT_EQ(kEqual, s[0]->flags_condition()); |
| } |
| { |
| StreamBuilder m(this, kMachInt32, kMachInt32); |
| m.Return(m.Word32Equal(m.Int32Constant(0), m.Parameter(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(kMips64Cmp32, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
| ASSERT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
| EXPECT_EQ(kEqual, s[0]->flags_condition()); |
| } |
| } |
| |
| |
| TEST_F(InstructionSelectorTest, Word64EqualWithZero) { |
| { |
| StreamBuilder m(this, kMachInt64, kMachInt64); |
| m.Return(m.Word64Equal(m.Parameter(0), m.Int64Constant(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
| ASSERT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
| EXPECT_EQ(kEqual, s[0]->flags_condition()); |
| } |
| { |
| StreamBuilder m(this, kMachInt64, kMachInt64); |
| m.Return(m.Word64Equal(m.Int32Constant(0), m.Parameter(0))); |
| Stream s = m.Build(); |
| ASSERT_EQ(1U, s.size()); |
| EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode()); |
| EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
| ASSERT_EQ(2U, s[0]->InputCount()); |
| EXPECT_EQ(1U, s[0]->OutputCount()); |
| EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
| EXPECT_EQ(kEqual, s[0]->flags_condition()); |
| } |
| } |
| |
| } // namespace compiler |
| } // namespace internal |
| } // namespace v8 |