Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame^] | 1 | // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 | // Use of this source code is governed by a BSD-style license that can be |
| 3 | // found in the LICENSE file. |
| 4 | |
| 5 | #ifndef V8_COMPILER_REGISTER_CONFIGURATION_H_ |
| 6 | #define V8_COMPILER_REGISTER_CONFIGURATION_H_ |
| 7 | |
| 8 | #include "src/base/macros.h" |
| 9 | |
| 10 | namespace v8 { |
| 11 | namespace internal { |
| 12 | |
| 13 | // An architecture independent representation of the sets of registers available |
| 14 | // for instruction creation. |
| 15 | class RegisterConfiguration { |
| 16 | public: |
| 17 | // Define the optimized compiler selector for register configuration |
| 18 | // selection. |
| 19 | // |
| 20 | // TODO(X87): This distinction in RegisterConfigurations is temporary |
| 21 | // until x87 TF supports all of the registers that Crankshaft does. |
| 22 | enum CompilerSelector { CRANKSHAFT, TURBOFAN }; |
| 23 | |
| 24 | // Architecture independent maxes. |
| 25 | static const int kMaxGeneralRegisters = 32; |
| 26 | static const int kMaxDoubleRegisters = 32; |
| 27 | |
| 28 | static const RegisterConfiguration* ArchDefault(CompilerSelector compiler); |
| 29 | |
| 30 | RegisterConfiguration(int num_general_registers, int num_double_registers, |
| 31 | int num_allocatable_general_registers, |
| 32 | int num_allocatable_double_registers, |
| 33 | int num_allocatable_aliased_double_registers, |
| 34 | const int* allocatable_general_codes, |
| 35 | const int* allocatable_double_codes, |
| 36 | char const* const* general_names, |
| 37 | char const* const* double_names); |
| 38 | |
| 39 | int num_general_registers() const { return num_general_registers_; } |
| 40 | int num_double_registers() const { return num_double_registers_; } |
| 41 | int num_allocatable_general_registers() const { |
| 42 | return num_allocatable_general_registers_; |
| 43 | } |
| 44 | int num_allocatable_double_registers() const { |
| 45 | return num_allocatable_double_registers_; |
| 46 | } |
| 47 | // TODO(turbofan): This is a temporary work-around required because our |
| 48 | // register allocator does not yet support the aliasing of single/double |
| 49 | // registers on ARM. |
| 50 | int num_allocatable_aliased_double_registers() const { |
| 51 | return num_allocatable_aliased_double_registers_; |
| 52 | } |
| 53 | int32_t allocatable_general_codes_mask() const { |
| 54 | return allocatable_general_codes_mask_; |
| 55 | } |
| 56 | int32_t allocatable_double_codes_mask() const { |
| 57 | return allocatable_double_codes_mask_; |
| 58 | } |
| 59 | int GetAllocatableGeneralCode(int index) const { |
| 60 | return allocatable_general_codes_[index]; |
| 61 | } |
| 62 | int GetAllocatableDoubleCode(int index) const { |
| 63 | return allocatable_double_codes_[index]; |
| 64 | } |
| 65 | const char* GetGeneralRegisterName(int code) const { |
| 66 | return general_register_names_[code]; |
| 67 | } |
| 68 | const char* GetDoubleRegisterName(int code) const { |
| 69 | return double_register_names_[code]; |
| 70 | } |
| 71 | const int* allocatable_general_codes() const { |
| 72 | return allocatable_general_codes_; |
| 73 | } |
| 74 | const int* allocatable_double_codes() const { |
| 75 | return allocatable_double_codes_; |
| 76 | } |
| 77 | |
| 78 | private: |
| 79 | const int num_general_registers_; |
| 80 | const int num_double_registers_; |
| 81 | int num_allocatable_general_registers_; |
| 82 | int num_allocatable_double_registers_; |
| 83 | int num_allocatable_aliased_double_registers_; |
| 84 | int32_t allocatable_general_codes_mask_; |
| 85 | int32_t allocatable_double_codes_mask_; |
| 86 | const int* allocatable_general_codes_; |
| 87 | const int* allocatable_double_codes_; |
| 88 | char const* const* general_register_names_; |
| 89 | char const* const* double_register_names_; |
| 90 | }; |
| 91 | |
| 92 | } // namespace internal |
| 93 | } // namespace v8 |
| 94 | |
| 95 | #endif // V8_COMPILER_REGISTER_CONFIGURATION_H_ |