Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame^] | 1 | // Copyright 2009 the V8 project authors. All rights reserved. |
| 2 | // Redistribution and use in source and binary forms, with or without |
| 3 | // modification, are permitted provided that the following conditions are |
| 4 | // met: |
| 5 | // |
| 6 | // * Redistributions of source code must retain the above copyright |
| 7 | // notice, this list of conditions and the following disclaimer. |
| 8 | // * Redistributions in binary form must reproduce the above |
| 9 | // copyright notice, this list of conditions and the following |
| 10 | // disclaimer in the documentation and/or other materials provided |
| 11 | // with the distribution. |
| 12 | // * Neither the name of Google Inc. nor the names of its |
| 13 | // contributors may be used to endorse or promote products derived |
| 14 | // from this software without specific prior written permission. |
| 15 | // |
| 16 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 17 | // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 18 | // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 19 | // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 20 | // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 26 | // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | |
| 28 | |
| 29 | // Declares a Simulator for ARM instructions if we are not generating a native |
| 30 | // ARM binary. This Simulator allows us to run and debug ARM code generation on |
| 31 | // regular desktop machines. |
| 32 | // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
| 33 | // which will start execution in the Simulator or forwards to the real entry |
| 34 | // on a ARM HW platform. |
| 35 | |
| 36 | #ifndef V8_ARM_SIMULATOR_ARM_H_ |
| 37 | #define V8_ARM_SIMULATOR_ARM_H_ |
| 38 | |
| 39 | #include "allocation.h" |
| 40 | |
| 41 | #if defined(__arm__) |
| 42 | |
| 43 | // When running without a simulator we call the entry directly. |
| 44 | #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ |
| 45 | (entry(p0, p1, p2, p3, p4)) |
| 46 | |
| 47 | // The stack limit beyond which we will throw stack overflow errors in |
| 48 | // generated code. Because generated code on arm uses the C stack, we |
| 49 | // just use the C stack limit. |
| 50 | class SimulatorStack : public v8::internal::AllStatic { |
| 51 | public: |
| 52 | static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) { |
| 53 | return c_limit; |
| 54 | } |
| 55 | }; |
| 56 | |
| 57 | |
| 58 | // Call the generated regexp code directly. The entry function pointer should |
| 59 | // expect seven int/pointer sized arguments and return an int. |
| 60 | #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6) \ |
| 61 | entry(p0, p1, p2, p3, p4, p5, p6) |
| 62 | |
| 63 | #else // defined(__arm__) |
| 64 | |
| 65 | // When running with the simulator transition into simulated execution at this |
| 66 | // point. |
| 67 | #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ |
| 68 | reinterpret_cast<Object*>( \ |
| 69 | assembler::arm::Simulator::current()->Call(FUNCTION_ADDR(entry), 5, \ |
| 70 | p0, p1, p2, p3, p4)) |
| 71 | |
| 72 | #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6) \ |
| 73 | assembler::arm::Simulator::current()->Call( \ |
| 74 | FUNCTION_ADDR(entry), 7, p0, p1, p2, p3, p4, p5, p6) |
| 75 | |
| 76 | #include "constants-arm.h" |
| 77 | |
| 78 | |
| 79 | namespace assembler { |
| 80 | namespace arm { |
| 81 | |
| 82 | class Simulator { |
| 83 | public: |
| 84 | friend class Debugger; |
| 85 | |
| 86 | enum Register { |
| 87 | no_reg = -1, |
| 88 | r0 = 0, r1, r2, r3, r4, r5, r6, r7, |
| 89 | r8, r9, r10, r11, r12, r13, r14, r15, |
| 90 | num_registers, |
| 91 | sp = 13, |
| 92 | lr = 14, |
| 93 | pc = 15 |
| 94 | }; |
| 95 | |
| 96 | Simulator(); |
| 97 | ~Simulator(); |
| 98 | |
| 99 | // The currently executing Simulator instance. Potentially there can be one |
| 100 | // for each native thread. |
| 101 | static Simulator* current(); |
| 102 | |
| 103 | // Accessors for register state. Reading the pc value adheres to the ARM |
| 104 | // architecture specification and is off by a 8 from the currently executing |
| 105 | // instruction. |
| 106 | void set_register(int reg, int32_t value); |
| 107 | int32_t get_register(int reg) const; |
| 108 | |
| 109 | // Special case of set_register and get_register to access the raw PC value. |
| 110 | void set_pc(int32_t value); |
| 111 | int32_t get_pc() const; |
| 112 | |
| 113 | // Accessor to the internal simulator stack area. |
| 114 | uintptr_t StackLimit() const; |
| 115 | |
| 116 | // Executes ARM instructions until the PC reaches end_sim_pc. |
| 117 | void Execute(); |
| 118 | |
| 119 | // Call on program start. |
| 120 | static void Initialize(); |
| 121 | |
| 122 | // V8 generally calls into generated JS code with 5 parameters and into |
| 123 | // generated RegExp code with 7 parameters. This is a convenience function, |
| 124 | // which sets up the simulator state and grabs the result on return. |
| 125 | int32_t Call(byte* entry, int argument_count, ...); |
| 126 | |
| 127 | private: |
| 128 | enum special_values { |
| 129 | // Known bad pc value to ensure that the simulator does not execute |
| 130 | // without being properly setup. |
| 131 | bad_lr = -1, |
| 132 | // A pc value used to signal the simulator to stop execution. Generally |
| 133 | // the lr is set to this value on transition from native C code to |
| 134 | // simulated execution, so that the simulator can "return" to the native |
| 135 | // C code. |
| 136 | end_sim_pc = -2 |
| 137 | }; |
| 138 | |
| 139 | // Unsupported instructions use Format to print an error and stop execution. |
| 140 | void Format(Instr* instr, const char* format); |
| 141 | |
| 142 | // Checks if the current instruction should be executed based on its |
| 143 | // condition bits. |
| 144 | bool ConditionallyExecute(Instr* instr); |
| 145 | |
| 146 | // Helper functions to set the conditional flags in the architecture state. |
| 147 | void SetNZFlags(int32_t val); |
| 148 | void SetCFlag(bool val); |
| 149 | void SetVFlag(bool val); |
| 150 | bool CarryFrom(int32_t left, int32_t right); |
| 151 | bool BorrowFrom(int32_t left, int32_t right); |
| 152 | bool OverflowFrom(int32_t alu_out, |
| 153 | int32_t left, |
| 154 | int32_t right, |
| 155 | bool addition); |
| 156 | |
| 157 | // Helper functions to decode common "addressing" modes |
| 158 | int32_t GetShiftRm(Instr* instr, bool* carry_out); |
| 159 | int32_t GetImm(Instr* instr, bool* carry_out); |
| 160 | void HandleRList(Instr* instr, bool load); |
| 161 | void SoftwareInterrupt(Instr* instr); |
| 162 | |
| 163 | // Read and write memory. |
| 164 | inline uint8_t ReadBU(int32_t addr); |
| 165 | inline int8_t ReadB(int32_t addr); |
| 166 | inline void WriteB(int32_t addr, uint8_t value); |
| 167 | inline void WriteB(int32_t addr, int8_t value); |
| 168 | |
| 169 | inline uint16_t ReadHU(int32_t addr, Instr* instr); |
| 170 | inline int16_t ReadH(int32_t addr, Instr* instr); |
| 171 | // Note: Overloaded on the sign of the value. |
| 172 | inline void WriteH(int32_t addr, uint16_t value, Instr* instr); |
| 173 | inline void WriteH(int32_t addr, int16_t value, Instr* instr); |
| 174 | |
| 175 | inline int ReadW(int32_t addr, Instr* instr); |
| 176 | inline void WriteW(int32_t addr, int value, Instr* instr); |
| 177 | |
| 178 | // Executing is handled based on the instruction type. |
| 179 | void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one |
| 180 | void DecodeType2(Instr* instr); |
| 181 | void DecodeType3(Instr* instr); |
| 182 | void DecodeType4(Instr* instr); |
| 183 | void DecodeType5(Instr* instr); |
| 184 | void DecodeType6(Instr* instr); |
| 185 | void DecodeType7(Instr* instr); |
| 186 | void DecodeUnconditional(Instr* instr); |
| 187 | |
| 188 | // Executes one instruction. |
| 189 | void InstructionDecode(Instr* instr); |
| 190 | |
| 191 | // Runtime call support. |
| 192 | static void* RedirectExternalReference(void* external_function, |
| 193 | bool fp_return); |
| 194 | |
| 195 | // For use in calls that take two double values, constructed from r0, r1, r2 |
| 196 | // and r3. |
| 197 | void GetFpArgs(double* x, double* y); |
| 198 | void SetFpResult(const double& result); |
| 199 | void TrashCallerSaveRegisters(); |
| 200 | |
| 201 | // architecture state |
| 202 | int32_t registers_[16]; |
| 203 | bool n_flag_; |
| 204 | bool z_flag_; |
| 205 | bool c_flag_; |
| 206 | bool v_flag_; |
| 207 | |
| 208 | // simulator support |
| 209 | char* stack_; |
| 210 | bool pc_modified_; |
| 211 | int icount_; |
| 212 | static bool initialized_; |
| 213 | |
| 214 | // registered breakpoints |
| 215 | Instr* break_pc_; |
| 216 | instr_t break_instr_; |
| 217 | }; |
| 218 | |
| 219 | } } // namespace assembler::arm |
| 220 | |
| 221 | |
| 222 | // The simulator has its own stack. Thus it has a different stack limit from |
| 223 | // the C-based native code. Setting the c_limit to indicate a very small |
| 224 | // stack cause stack overflow errors, since the simulator ignores the input. |
| 225 | // This is unlikely to be an issue in practice, though it might cause testing |
| 226 | // trouble down the line. |
| 227 | class SimulatorStack : public v8::internal::AllStatic { |
| 228 | public: |
| 229 | static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) { |
| 230 | return assembler::arm::Simulator::current()->StackLimit(); |
| 231 | } |
| 232 | }; |
| 233 | |
| 234 | |
| 235 | #endif // defined(__arm__) |
| 236 | |
| 237 | #endif // V8_ARM_SIMULATOR_ARM_H_ |