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gerrit-public.fairphone.software / fp2-dev / platform / external / v8 / b8a8cc1952d61a2f3a2568848933943a543b5d3e / . / src / arm64 / decoder-arm64-inl.h
blob: 5dd2fd9cc043d2b20378891070021aee644182f9 [file] [log] [blame]
Ben Murdochb8a8cc12014-11-26 15:28:44 +0000[diff] [blame^]1// Copyright 2014 the V8 project authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#ifndef V8_ARM64_DECODER_ARM64_INL_H_
6#define V8_ARM64_DECODER_ARM64_INL_H_
7
8#include "src/arm64/decoder-arm64.h"
9#include "src/globals.h"
10#include "src/utils.h"
11
12
13namespace v8 {
14namespace internal {
15
16
17// Top-level instruction decode function.
18template<typename V>
19void Decoder<V>::Decode(Instruction *instr) {
20 if (instr->Bits(28, 27) == 0) {
21 V::VisitUnallocated(instr);
22 } else {
23 switch (instr->Bits(27, 24)) {
24 // 0: PC relative addressing.
25 case 0x0: DecodePCRelAddressing(instr); break;
26
27 // 1: Add/sub immediate.
28 case 0x1: DecodeAddSubImmediate(instr); break;
29
30 // A: Logical shifted register.
31 // Add/sub with carry.
32 // Conditional compare register.
33 // Conditional compare immediate.
34 // Conditional select.
35 // Data processing 1 source.
36 // Data processing 2 source.
37 // B: Add/sub shifted register.
38 // Add/sub extended register.
39 // Data processing 3 source.
40 case 0xA:
41 case 0xB: DecodeDataProcessing(instr); break;
42
43 // 2: Logical immediate.
44 // Move wide immediate.
45 case 0x2: DecodeLogical(instr); break;
46
47 // 3: Bitfield.
48 // Extract.
49 case 0x3: DecodeBitfieldExtract(instr); break;
50
51 // 4: Unconditional branch immediate.
52 // Exception generation.
53 // Compare and branch immediate.
54 // 5: Compare and branch immediate.
55 // Conditional branch.
56 // System.
57 // 6,7: Unconditional branch.
58 // Test and branch immediate.
59 case 0x4:
60 case 0x5:
61 case 0x6:
62 case 0x7: DecodeBranchSystemException(instr); break;
63
64 // 8,9: Load/store register pair post-index.
65 // Load register literal.
66 // Load/store register unscaled immediate.
67 // Load/store register immediate post-index.
68 // Load/store register immediate pre-index.
69 // Load/store register offset.
70 // C,D: Load/store register pair offset.
71 // Load/store register pair pre-index.
72 // Load/store register unsigned immediate.
73 // Advanced SIMD.
74 case 0x8:
75 case 0x9:
76 case 0xC:
77 case 0xD: DecodeLoadStore(instr); break;
78
79 // E: FP fixed point conversion.
80 // FP integer conversion.
81 // FP data processing 1 source.
82 // FP compare.
83 // FP immediate.
84 // FP data processing 2 source.
85 // FP conditional compare.
86 // FP conditional select.
87 // Advanced SIMD.
88 // F: FP data processing 3 source.
89 // Advanced SIMD.
90 case 0xE:
91 case 0xF: DecodeFP(instr); break;
92 }
93 }
94}
95
96
97template<typename V>
98void Decoder<V>::DecodePCRelAddressing(Instruction* instr) {
99 DCHECK(instr->Bits(27, 24) == 0x0);
100 // We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level
101 // decode.
102 DCHECK(instr->Bit(28) == 0x1);
103 V::VisitPCRelAddressing(instr);
104}
105
106
107template<typename V>
108void Decoder<V>::DecodeBranchSystemException(Instruction* instr) {
109 DCHECK((instr->Bits(27, 24) == 0x4) ||
110 (instr->Bits(27, 24) == 0x5) ||
111 (instr->Bits(27, 24) == 0x6) ||
112 (instr->Bits(27, 24) == 0x7) );
113
114 switch (instr->Bits(31, 29)) {
115 case 0:
116 case 4: {
117 V::VisitUnconditionalBranch(instr);
118 break;
119 }
120 case 1:
121 case 5: {
122 if (instr->Bit(25) == 0) {
123 V::VisitCompareBranch(instr);
124 } else {
125 V::VisitTestBranch(instr);
126 }
127 break;
128 }
129 case 2: {
130 if (instr->Bit(25) == 0) {
131 if ((instr->Bit(24) == 0x1) ||
132 (instr->Mask(0x01000010) == 0x00000010)) {
133 V::VisitUnallocated(instr);
134 } else {
135 V::VisitConditionalBranch(instr);
136 }
137 } else {
138 V::VisitUnallocated(instr);
139 }
140 break;
141 }
142 case 6: {
143 if (instr->Bit(25) == 0) {
144 if (instr->Bit(24) == 0) {
145 if ((instr->Bits(4, 2) != 0) ||
146 (instr->Mask(0x00E0001D) == 0x00200001) ||
147 (instr->Mask(0x00E0001D) == 0x00400001) ||
148 (instr->Mask(0x00E0001E) == 0x00200002) ||
149 (instr->Mask(0x00E0001E) == 0x00400002) ||
150 (instr->Mask(0x00E0001C) == 0x00600000) ||
151 (instr->Mask(0x00E0001C) == 0x00800000) ||
152 (instr->Mask(0x00E0001F) == 0x00A00000) ||
153 (instr->Mask(0x00C0001C) == 0x00C00000)) {
154 V::VisitUnallocated(instr);
155 } else {
156 V::VisitException(instr);
157 }
158 } else {
159 if (instr->Bits(23, 22) == 0) {
160 const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0);
161 if ((instr->Bits(21, 19) == 0x4) ||
162 (masked_003FF0E0 == 0x00033000) ||
163 (masked_003FF0E0 == 0x003FF020) ||
164 (masked_003FF0E0 == 0x003FF060) ||
165 (masked_003FF0E0 == 0x003FF0E0) ||
166 (instr->Mask(0x00388000) == 0x00008000) ||
167 (instr->Mask(0x0038E000) == 0x00000000) ||
168 (instr->Mask(0x0039E000) == 0x00002000) ||
169 (instr->Mask(0x003AE000) == 0x00002000) ||
170 (instr->Mask(0x003CE000) == 0x00042000) ||
171 (instr->Mask(0x003FFFC0) == 0x000320C0) ||
172 (instr->Mask(0x003FF100) == 0x00032100) ||
173 (instr->Mask(0x003FF200) == 0x00032200) ||
174 (instr->Mask(0x003FF400) == 0x00032400) ||
175 (instr->Mask(0x003FF800) == 0x00032800) ||
176 (instr->Mask(0x0038F000) == 0x00005000) ||
177 (instr->Mask(0x0038E000) == 0x00006000)) {
178 V::VisitUnallocated(instr);
179 } else {
180 V::VisitSystem(instr);
181 }
182 } else {
183 V::VisitUnallocated(instr);
184 }
185 }
186 } else {
187 if ((instr->Bit(24) == 0x1) ||
188 (instr->Bits(20, 16) != 0x1F) ||
189 (instr->Bits(15, 10) != 0) ||
190 (instr->Bits(4, 0) != 0) ||
191 (instr->Bits(24, 21) == 0x3) ||
192 (instr->Bits(24, 22) == 0x3)) {
193 V::VisitUnallocated(instr);
194 } else {
195 V::VisitUnconditionalBranchToRegister(instr);
196 }
197 }
198 break;
199 }
200 case 3:
201 case 7: {
202 V::VisitUnallocated(instr);
203 break;
204 }
205 }
206}
207
208
209template<typename V>
210void Decoder<V>::DecodeLoadStore(Instruction* instr) {
211 DCHECK((instr->Bits(27, 24) == 0x8) ||
212 (instr->Bits(27, 24) == 0x9) ||
213 (instr->Bits(27, 24) == 0xC) ||
214 (instr->Bits(27, 24) == 0xD) );
215
216 if (instr->Bit(24) == 0) {
217 if (instr->Bit(28) == 0) {
218 if (instr->Bit(29) == 0) {
219 if (instr->Bit(26) == 0) {
220 // TODO(all): VisitLoadStoreExclusive.
221 V::VisitUnimplemented(instr);
222 } else {
223 DecodeAdvSIMDLoadStore(instr);
224 }
225 } else {
226 if ((instr->Bits(31, 30) == 0x3) ||
227 (instr->Mask(0xC4400000) == 0x40000000)) {
228 V::VisitUnallocated(instr);
229 } else {
230 if (instr->Bit(23) == 0) {
231 if (instr->Mask(0xC4400000) == 0xC0400000) {
232 V::VisitUnallocated(instr);
233 } else {
234 V::VisitLoadStorePairNonTemporal(instr);
235 }
236 } else {
237 V::VisitLoadStorePairPostIndex(instr);
238 }
239 }
240 }
241 } else {
242 if (instr->Bit(29) == 0) {
243 if (instr->Mask(0xC4000000) == 0xC4000000) {
244 V::VisitUnallocated(instr);
245 } else {
246 V::VisitLoadLiteral(instr);
247 }
248 } else {
249 if ((instr->Mask(0x84C00000) == 0x80C00000) ||
250 (instr->Mask(0x44800000) == 0x44800000) ||
251 (instr->Mask(0x84800000) == 0x84800000)) {
252 V::VisitUnallocated(instr);
253 } else {
254 if (instr->Bit(21) == 0) {
255 switch (instr->Bits(11, 10)) {
256 case 0: {
257 V::VisitLoadStoreUnscaledOffset(instr);
258 break;
259 }
260 case 1: {
261 if (instr->Mask(0xC4C00000) == 0xC0800000) {
262 V::VisitUnallocated(instr);
263 } else {
264 V::VisitLoadStorePostIndex(instr);
265 }
266 break;
267 }
268 case 2: {
269 // TODO(all): VisitLoadStoreRegisterOffsetUnpriv.
270 V::VisitUnimplemented(instr);
271 break;
272 }
273 case 3: {
274 if (instr->Mask(0xC4C00000) == 0xC0800000) {
275 V::VisitUnallocated(instr);
276 } else {
277 V::VisitLoadStorePreIndex(instr);
278 }
279 break;
280 }
281 }
282 } else {
283 if (instr->Bits(11, 10) == 0x2) {
284 if (instr->Bit(14) == 0) {
285 V::VisitUnallocated(instr);
286 } else {
287 V::VisitLoadStoreRegisterOffset(instr);
288 }
289 } else {
290 V::VisitUnallocated(instr);
291 }
292 }
293 }
294 }
295 }
296 } else {
297 if (instr->Bit(28) == 0) {
298 if (instr->Bit(29) == 0) {
299 V::VisitUnallocated(instr);
300 } else {
301 if ((instr->Bits(31, 30) == 0x3) ||
302 (instr->Mask(0xC4400000) == 0x40000000)) {
303 V::VisitUnallocated(instr);
304 } else {
305 if (instr->Bit(23) == 0) {
306 V::VisitLoadStorePairOffset(instr);
307 } else {
308 V::VisitLoadStorePairPreIndex(instr);
309 }
310 }
311 }
312 } else {
313 if (instr->Bit(29) == 0) {
314 V::VisitUnallocated(instr);
315 } else {
316 if ((instr->Mask(0x84C00000) == 0x80C00000) ||
317 (instr->Mask(0x44800000) == 0x44800000) ||
318 (instr->Mask(0x84800000) == 0x84800000)) {
319 V::VisitUnallocated(instr);
320 } else {
321 V::VisitLoadStoreUnsignedOffset(instr);
322 }
323 }
324 }
325 }
326}
327
328
329template<typename V>
330void Decoder<V>::DecodeLogical(Instruction* instr) {
331 DCHECK(instr->Bits(27, 24) == 0x2);
332
333 if (instr->Mask(0x80400000) == 0x00400000) {
334 V::VisitUnallocated(instr);
335 } else {
336 if (instr->Bit(23) == 0) {
337 V::VisitLogicalImmediate(instr);
338 } else {
339 if (instr->Bits(30, 29) == 0x1) {
340 V::VisitUnallocated(instr);
341 } else {
342 V::VisitMoveWideImmediate(instr);
343 }
344 }
345 }
346}
347
348
349template<typename V>
350void Decoder<V>::DecodeBitfieldExtract(Instruction* instr) {
351 DCHECK(instr->Bits(27, 24) == 0x3);
352
353 if ((instr->Mask(0x80400000) == 0x80000000) ||
354 (instr->Mask(0x80400000) == 0x00400000) ||
355 (instr->Mask(0x80008000) == 0x00008000)) {
356 V::VisitUnallocated(instr);
357 } else if (instr->Bit(23) == 0) {
358 if ((instr->Mask(0x80200000) == 0x00200000) ||
359 (instr->Mask(0x60000000) == 0x60000000)) {
360 V::VisitUnallocated(instr);
361 } else {
362 V::VisitBitfield(instr);
363 }
364 } else {
365 if ((instr->Mask(0x60200000) == 0x00200000) ||
366 (instr->Mask(0x60000000) != 0x00000000)) {
367 V::VisitUnallocated(instr);
368 } else {
369 V::VisitExtract(instr);
370 }
371 }
372}
373
374
375template<typename V>
376void Decoder<V>::DecodeAddSubImmediate(Instruction* instr) {
377 DCHECK(instr->Bits(27, 24) == 0x1);
378 if (instr->Bit(23) == 1) {
379 V::VisitUnallocated(instr);
380 } else {
381 V::VisitAddSubImmediate(instr);
382 }
383}
384
385
386template<typename V>
387void Decoder<V>::DecodeDataProcessing(Instruction* instr) {
388 DCHECK((instr->Bits(27, 24) == 0xA) ||
389 (instr->Bits(27, 24) == 0xB) );
390
391 if (instr->Bit(24) == 0) {
392 if (instr->Bit(28) == 0) {
393 if (instr->Mask(0x80008000) == 0x00008000) {
394 V::VisitUnallocated(instr);
395 } else {
396 V::VisitLogicalShifted(instr);
397 }
398 } else {
399 switch (instr->Bits(23, 21)) {
400 case 0: {
401 if (instr->Mask(0x0000FC00) != 0) {
402 V::VisitUnallocated(instr);
403 } else {
404 V::VisitAddSubWithCarry(instr);
405 }
406 break;
407 }
408 case 2: {
409 if ((instr->Bit(29) == 0) ||
410 (instr->Mask(0x00000410) != 0)) {
411 V::VisitUnallocated(instr);
412 } else {
413 if (instr->Bit(11) == 0) {
414 V::VisitConditionalCompareRegister(instr);
415 } else {
416 V::VisitConditionalCompareImmediate(instr);
417 }
418 }
419 break;
420 }
421 case 4: {
422 if (instr->Mask(0x20000800) != 0x00000000) {
423 V::VisitUnallocated(instr);
424 } else {
425 V::VisitConditionalSelect(instr);
426 }
427 break;
428 }
429 case 6: {
430 if (instr->Bit(29) == 0x1) {
431 V::VisitUnallocated(instr);
432 } else {
433 if (instr->Bit(30) == 0) {
434 if ((instr->Bit(15) == 0x1) ||
435 (instr->Bits(15, 11) == 0) ||
436 (instr->Bits(15, 12) == 0x1) ||
437 (instr->Bits(15, 12) == 0x3) ||
438 (instr->Bits(15, 13) == 0x3) ||
439 (instr->Mask(0x8000EC00) == 0x00004C00) ||
440 (instr->Mask(0x8000E800) == 0x80004000) ||
441 (instr->Mask(0x8000E400) == 0x80004000)) {
442 V::VisitUnallocated(instr);
443 } else {
444 V::VisitDataProcessing2Source(instr);
445 }
446 } else {
447 if ((instr->Bit(13) == 1) ||
448 (instr->Bits(20, 16) != 0) ||
449 (instr->Bits(15, 14) != 0) ||
450 (instr->Mask(0xA01FFC00) == 0x00000C00) ||
451 (instr->Mask(0x201FF800) == 0x00001800)) {
452 V::VisitUnallocated(instr);
453 } else {
454 V::VisitDataProcessing1Source(instr);
455 }
456 }
457 break;
458 }
459 }
460 case 1:
461 case 3:
462 case 5:
463 case 7: V::VisitUnallocated(instr); break;
464 }
465 }
466 } else {
467 if (instr->Bit(28) == 0) {
468 if (instr->Bit(21) == 0) {
469 if ((instr->Bits(23, 22) == 0x3) ||
470 (instr->Mask(0x80008000) == 0x00008000)) {
471 V::VisitUnallocated(instr);
472 } else {
473 V::VisitAddSubShifted(instr);
474 }
475 } else {
476 if ((instr->Mask(0x00C00000) != 0x00000000) ||
477 (instr->Mask(0x00001400) == 0x00001400) ||
478 (instr->Mask(0x00001800) == 0x00001800)) {
479 V::VisitUnallocated(instr);
480 } else {
481 V::VisitAddSubExtended(instr);
482 }
483 }
484 } else {
485 if ((instr->Bit(30) == 0x1) ||
486 (instr->Bits(30, 29) == 0x1) ||
487 (instr->Mask(0xE0600000) == 0x00200000) ||
488 (instr->Mask(0xE0608000) == 0x00400000) ||
489 (instr->Mask(0x60608000) == 0x00408000) ||
490 (instr->Mask(0x60E00000) == 0x00E00000) ||
491 (instr->Mask(0x60E00000) == 0x00800000) ||
492 (instr->Mask(0x60E00000) == 0x00600000)) {
493 V::VisitUnallocated(instr);
494 } else {
495 V::VisitDataProcessing3Source(instr);
496 }
497 }
498 }
499}
500
501
502template<typename V>
503void Decoder<V>::DecodeFP(Instruction* instr) {
504 DCHECK((instr->Bits(27, 24) == 0xE) ||
505 (instr->Bits(27, 24) == 0xF) );
506
507 if (instr->Bit(28) == 0) {
508 DecodeAdvSIMDDataProcessing(instr);
509 } else {
510 if (instr->Bit(29) == 1) {
511 V::VisitUnallocated(instr);
512 } else {
513 if (instr->Bits(31, 30) == 0x3) {
514 V::VisitUnallocated(instr);
515 } else if (instr->Bits(31, 30) == 0x1) {
516 DecodeAdvSIMDDataProcessing(instr);
517 } else {
518 if (instr->Bit(24) == 0) {
519 if (instr->Bit(21) == 0) {
520 if ((instr->Bit(23) == 1) ||
521 (instr->Bit(18) == 1) ||
522 (instr->Mask(0x80008000) == 0x00000000) ||
523 (instr->Mask(0x000E0000) == 0x00000000) ||
524 (instr->Mask(0x000E0000) == 0x000A0000) ||
525 (instr->Mask(0x00160000) == 0x00000000) ||
526 (instr->Mask(0x00160000) == 0x00120000)) {
527 V::VisitUnallocated(instr);
528 } else {
529 V::VisitFPFixedPointConvert(instr);
530 }
531 } else {
532 if (instr->Bits(15, 10) == 32) {
533 V::VisitUnallocated(instr);
534 } else if (instr->Bits(15, 10) == 0) {
535 if ((instr->Bits(23, 22) == 0x3) ||
536 (instr->Mask(0x000E0000) == 0x000A0000) ||
537 (instr->Mask(0x000E0000) == 0x000C0000) ||
538 (instr->Mask(0x00160000) == 0x00120000) ||
539 (instr->Mask(0x00160000) == 0x00140000) ||
540 (instr->Mask(0x20C40000) == 0x00800000) ||
541 (instr->Mask(0x20C60000) == 0x00840000) ||
542 (instr->Mask(0xA0C60000) == 0x80060000) ||
543 (instr->Mask(0xA0C60000) == 0x00860000) ||
544 (instr->Mask(0xA0C60000) == 0x00460000) ||
545 (instr->Mask(0xA0CE0000) == 0x80860000) ||
546 (instr->Mask(0xA0CE0000) == 0x804E0000) ||
547 (instr->Mask(0xA0CE0000) == 0x000E0000) ||
548 (instr->Mask(0xA0D60000) == 0x00160000) ||
549 (instr->Mask(0xA0D60000) == 0x80560000) ||
550 (instr->Mask(0xA0D60000) == 0x80960000)) {
551 V::VisitUnallocated(instr);
552 } else {
553 V::VisitFPIntegerConvert(instr);
554 }
555 } else if (instr->Bits(14, 10) == 16) {
556 const Instr masked_A0DF8000 = instr->Mask(0xA0DF8000);
557 if ((instr->Mask(0x80180000) != 0) ||
558 (masked_A0DF8000 == 0x00020000) ||
559 (masked_A0DF8000 == 0x00030000) ||
560 (masked_A0DF8000 == 0x00068000) ||
561 (masked_A0DF8000 == 0x00428000) ||
562 (masked_A0DF8000 == 0x00430000) ||
563 (masked_A0DF8000 == 0x00468000) ||
564 (instr->Mask(0xA0D80000) == 0x00800000) ||
565 (instr->Mask(0xA0DE0000) == 0x00C00000) ||
566 (instr->Mask(0xA0DF0000) == 0x00C30000) ||
567 (instr->Mask(0xA0DC0000) == 0x00C40000)) {
568 V::VisitUnallocated(instr);
569 } else {
570 V::VisitFPDataProcessing1Source(instr);
571 }
572 } else if (instr->Bits(13, 10) == 8) {
573 if ((instr->Bits(15, 14) != 0) ||
574 (instr->Bits(2, 0) != 0) ||
575 (instr->Mask(0x80800000) != 0x00000000)) {
576 V::VisitUnallocated(instr);
577 } else {
578 V::VisitFPCompare(instr);
579 }
580 } else if (instr->Bits(12, 10) == 4) {
581 if ((instr->Bits(9, 5) != 0) ||
582 (instr->Mask(0x80800000) != 0x00000000)) {
583 V::VisitUnallocated(instr);
584 } else {
585 V::VisitFPImmediate(instr);
586 }
587 } else {
588 if (instr->Mask(0x80800000) != 0x00000000) {
589 V::VisitUnallocated(instr);
590 } else {
591 switch (instr->Bits(11, 10)) {
592 case 1: {
593 V::VisitFPConditionalCompare(instr);
594 break;
595 }
596 case 2: {
597 if ((instr->Bits(15, 14) == 0x3) ||
598 (instr->Mask(0x00009000) == 0x00009000) ||
599 (instr->Mask(0x0000A000) == 0x0000A000)) {
600 V::VisitUnallocated(instr);
601 } else {
602 V::VisitFPDataProcessing2Source(instr);
603 }
604 break;
605 }
606 case 3: {
607 V::VisitFPConditionalSelect(instr);
608 break;
609 }
610 default: UNREACHABLE();
611 }
612 }
613 }
614 }
615 } else {
616 // Bit 30 == 1 has been handled earlier.
617 DCHECK(instr->Bit(30) == 0);
618 if (instr->Mask(0xA0800000) != 0) {
619 V::VisitUnallocated(instr);
620 } else {
621 V::VisitFPDataProcessing3Source(instr);
622 }
623 }
624 }
625 }
626 }
627}
628
629
630template<typename V>
631void Decoder<V>::DecodeAdvSIMDLoadStore(Instruction* instr) {
632 // TODO(all): Implement Advanced SIMD load/store instruction decode.
633 DCHECK(instr->Bits(29, 25) == 0x6);
634 V::VisitUnimplemented(instr);
635}
636
637
638template<typename V>
639void Decoder<V>::DecodeAdvSIMDDataProcessing(Instruction* instr) {
640 // TODO(all): Implement Advanced SIMD data processing instruction decode.
641 DCHECK(instr->Bits(27, 25) == 0x7);
642 V::VisitUnimplemented(instr);
643}
644
645
646} } // namespace v8::internal
647
648#endif // V8_ARM64_DECODER_ARM64_INL_H_