Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1 | // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 | // Use of this source code is governed by a BSD-style license that can be |
| 3 | // found in the LICENSE file. |
| 4 | |
| 5 | #ifndef V8_S390_CONSTANTS_S390_H_ |
| 6 | #define V8_S390_CONSTANTS_S390_H_ |
| 7 | |
| 8 | // Get the standard printf format macros for C99 stdint types. |
| 9 | #ifndef __STDC_FORMAT_MACROS |
| 10 | #define __STDC_FORMAT_MACROS |
| 11 | #endif |
| 12 | #include <inttypes.h> |
| 13 | |
| 14 | #include <stdint.h> |
| 15 | |
| 16 | #include "src/base/logging.h" |
| 17 | #include "src/base/macros.h" |
| 18 | #include "src/globals.h" |
| 19 | |
| 20 | namespace v8 { |
| 21 | namespace internal { |
| 22 | |
| 23 | // Number of registers |
| 24 | const int kNumRegisters = 16; |
| 25 | |
| 26 | // FP support. |
| 27 | const int kNumDoubleRegisters = 16; |
| 28 | |
| 29 | const int kNoRegister = -1; |
| 30 | |
| 31 | // sign-extend the least significant 16-bits of value <imm> |
| 32 | #define SIGN_EXT_IMM16(imm) ((static_cast<int>(imm) << 16) >> 16) |
| 33 | |
| 34 | // sign-extend the least significant 26-bits of value <imm> |
| 35 | #define SIGN_EXT_IMM26(imm) ((static_cast<int>(imm) << 6) >> 6) |
| 36 | |
| 37 | // ----------------------------------------------------------------------------- |
| 38 | // Conditions. |
| 39 | |
| 40 | // Defines constants and accessor classes to assemble, disassemble and |
| 41 | // simulate z/Architecture instructions. |
| 42 | // |
| 43 | // Section references in the code refer to the "z/Architecture Principles |
| 44 | // Of Operation" http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr009.pdf |
| 45 | // |
| 46 | |
| 47 | // Constants for specific fields are defined in their respective named enums. |
| 48 | // General constants are in an anonymous enum in class Instr. |
| 49 | enum Condition { |
| 50 | kNoCondition = -1, |
| 51 | eq = 0x8, // Equal. |
| 52 | ne = 0x7, // Not equal. |
| 53 | ge = 0xa, // Greater or equal. |
| 54 | lt = 0x4, // Less than. |
| 55 | gt = 0x2, // Greater than. |
| 56 | le = 0xc, // Less then or equal |
| 57 | al = 0xf, // Always. |
| 58 | |
| 59 | CC_NOP = 0x0, // S390 NOP |
| 60 | CC_EQ = 0x08, // S390 condition code 0b1000 |
| 61 | CC_LT = 0x04, // S390 condition code 0b0100 |
| 62 | CC_LE = CC_EQ | CC_LT, // S390 condition code 0b1100 |
| 63 | CC_GT = 0x02, // S390 condition code 0b0010 |
| 64 | CC_GE = CC_EQ | CC_GT, // S390 condition code 0b1010 |
| 65 | CC_OF = 0x01, // S390 condition code 0b0001 |
| 66 | CC_NOF = 0x0E, // S390 condition code 0b1110 |
| 67 | CC_ALWAYS = 0x0F, // S390 always taken branch |
| 68 | unordered = CC_OF, // Floating-point unordered |
| 69 | ordered = CC_NOF, // floating-point ordered |
| 70 | overflow = CC_OF, // Summary overflow |
| 71 | nooverflow = CC_NOF, |
| 72 | |
| 73 | mask0x0 = 0, // no jumps |
| 74 | mask0x1 = 1, |
| 75 | mask0x2 = 2, |
| 76 | mask0x3 = 3, |
| 77 | mask0x4 = 4, |
| 78 | mask0x5 = 5, |
| 79 | mask0x6 = 6, |
| 80 | mask0x7 = 7, |
| 81 | mask0x8 = 8, |
| 82 | mask0x9 = 9, |
| 83 | mask0xA = 10, |
| 84 | mask0xB = 11, |
| 85 | mask0xC = 12, |
| 86 | mask0xD = 13, |
| 87 | mask0xE = 14, |
| 88 | mask0xF = 15, |
| 89 | |
| 90 | // Rounding modes for floating poing facility |
| 91 | CURRENT_ROUNDING_MODE = 0, |
| 92 | ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0 = 1, |
| 93 | ROUND_TO_PREPARE_FOR_SHORTER_PRECISION = 3, |
| 94 | ROUND_TO_NEAREST_WITH_TIES_TO_EVEN = 4, |
| 95 | ROUND_TOWARD_0 = 5, |
| 96 | ROUND_TOWARD_PLUS_INFINITE = 6, |
| 97 | ROUND_TOWARD_MINUS_INFINITE = 7 |
| 98 | }; |
| 99 | |
| 100 | inline Condition NegateCondition(Condition cond) { |
| 101 | DCHECK(cond != al); |
| 102 | switch (cond) { |
| 103 | case eq: |
| 104 | return ne; |
| 105 | case ne: |
| 106 | return eq; |
| 107 | case ge: |
| 108 | return lt; |
| 109 | case gt: |
| 110 | return le; |
| 111 | case le: |
| 112 | return gt; |
| 113 | case lt: |
| 114 | return ge; |
| 115 | case lt | gt: |
| 116 | return eq; |
| 117 | case le | ge: |
| 118 | return CC_OF; |
| 119 | case CC_OF: |
| 120 | return CC_NOF; |
| 121 | default: |
| 122 | DCHECK(false); |
| 123 | } |
| 124 | return al; |
| 125 | } |
| 126 | |
| 127 | // Commute a condition such that {a cond b == b cond' a}. |
| 128 | inline Condition CommuteCondition(Condition cond) { |
| 129 | switch (cond) { |
| 130 | case lt: |
| 131 | return gt; |
| 132 | case gt: |
| 133 | return lt; |
| 134 | case ge: |
| 135 | return le; |
| 136 | case le: |
| 137 | return ge; |
| 138 | case eq: |
| 139 | return eq; |
| 140 | case ne: |
| 141 | return ne; |
| 142 | default: |
| 143 | DCHECK(false); |
| 144 | return cond; |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | // ----------------------------------------------------------------------------- |
| 149 | // Instructions encoding. |
| 150 | |
| 151 | // Instr is merely used by the Assembler to distinguish 32bit integers |
| 152 | // representing instructions from usual 32 bit values. |
| 153 | // Instruction objects are pointers to 32bit values, and provide methods to |
| 154 | // access the various ISA fields. |
| 155 | typedef int32_t Instr; |
| 156 | typedef uint16_t TwoByteInstr; |
| 157 | typedef uint32_t FourByteInstr; |
| 158 | typedef uint64_t SixByteInstr; |
| 159 | |
| 160 | // Opcodes as defined in Appendix B-2 table |
| 161 | enum Opcode { |
| 162 | A = 0x5A, // Add (32) |
| 163 | ADB = 0xED1A, // Add (long BFP) |
| 164 | ADBR = 0xB31A, // Add (long BFP) |
| 165 | ADTR = 0xB3D2, // Add (long DFP) |
| 166 | ADTRA = 0xB3D2, // Add (long DFP) |
| 167 | AEB = 0xED0A, // Add (short BFP) |
| 168 | AEBR = 0xB30A, // Add (short BFP) |
| 169 | AFI = 0xC29, // Add Immediate (32) |
| 170 | AG = 0xE308, // Add (64) |
| 171 | AGF = 0xE318, // Add (64<-32) |
| 172 | AGFI = 0xC28, // Add Immediate (64<-32) |
| 173 | AGFR = 0xB918, // Add (64<-32) |
| 174 | AGHI = 0xA7B, // Add Halfword Immediate (64) |
| 175 | AGHIK = 0xECD9, // Add Immediate (64<-16) |
| 176 | AGR = 0xB908, // Add (64) |
| 177 | AGRK = 0xB9E8, // Add (64) |
| 178 | AGSI = 0xEB7A, // Add Immediate (64<-8) |
| 179 | AH = 0x4A, // Add Halfword |
| 180 | AHHHR = 0xB9C8, // Add High (32) |
| 181 | AHHLR = 0xB9D8, // Add High (32) |
| 182 | AHI = 0xA7A, // Add Halfword Immediate (32) |
| 183 | AHIK = 0xECD8, // Add Immediate (32<-16) |
| 184 | AHY = 0xE37A, // Add Halfword |
| 185 | AIH = 0xCC8, // Add Immediate High (32) |
| 186 | AL = 0x5E, // Add Logical (32) |
| 187 | ALC = 0xE398, // Add Logical With Carry (32) |
| 188 | ALCG = 0xE388, // Add Logical With Carry (64) |
| 189 | ALCGR = 0xB988, // Add Logical With Carry (64) |
| 190 | ALCR = 0xB998, // Add Logical With Carry (32) |
| 191 | ALFI = 0xC2B, // Add Logical Immediate (32) |
| 192 | ALG = 0xE30A, // Add Logical (64) |
| 193 | ALGF = 0xE31A, // Add Logical (64<-32) |
| 194 | ALGFI = 0xC2A, // Add Logical Immediate (64<-32) |
| 195 | ALGFR = 0xB91A, // Add Logical (64<-32) |
| 196 | ALGHSIK = 0xECDB, // Add Logical With Signed Immediate (64<-16) |
| 197 | ALGR = 0xB90A, // Add Logical (64) |
| 198 | ALGRK = 0xB9EA, // Add Logical (64) |
| 199 | ALGSI = 0xEB7E, // Add Logical With Signed Immediate (64<-8) |
| 200 | ALHHHR = 0xB9CA, // Add Logical High (32) |
| 201 | ALHHLR = 0xB9DA, // Add Logical High (32) |
| 202 | ALHSIK = 0xECDA, // Add Logical With Signed Immediate (32<-16) |
| 203 | ALR = 0x1E, // Add Logical (32) |
| 204 | ALRK = 0xB9FA, // Add Logical (32) |
| 205 | ALSI = 0xEB6E, // Add Logical With Signed Immediate (32<-8) |
| 206 | ALSIH = 0xCCA, // Add Logical With Signed Immediate High (32) |
| 207 | ALSIHN = 0xCCB, // Add Logical With Signed Immediate High (32) |
| 208 | ALY = 0xE35E, // Add Logical (32) |
| 209 | AP = 0xFA, // Add Decimal |
| 210 | AR = 0x1A, // Add (32) |
| 211 | ARK = 0xB9F8, // Add (32) |
| 212 | ASI = 0xEB6A, // Add Immediate (32<-8) |
| 213 | AXBR = 0xB34A, // Add (extended BFP) |
| 214 | AXTR = 0xB3DA, // Add (extended DFP) |
| 215 | AXTRA = 0xB3DA, // Add (extended DFP) |
| 216 | AY = 0xE35A, // Add (32) |
| 217 | BAL = 0x45, // Branch And Link |
| 218 | BALR = 0x05, // Branch And Link |
| 219 | BAS = 0x4D, // Branch And Save |
| 220 | BASR = 0x0D, // Branch And Save |
| 221 | BASSM = 0x0C, // Branch And Save And Set Mode |
| 222 | BC = 0x47, // Branch On Condition |
| 223 | BCR = 0x07, // Branch On Condition |
| 224 | BCT = 0x46, // Branch On Count (32) |
| 225 | BCTG = 0xE346, // Branch On Count (64) |
| 226 | BCTGR = 0xB946, // Branch On Count (64) |
| 227 | BCTR = 0x06, // Branch On Count (32) |
| 228 | BPP = 0xC7, // Branch Prediction Preload |
| 229 | BPRP = 0xC5, // Branch Prediction Relative Preload |
| 230 | BRAS = 0xA75, // Branch Relative And Save |
| 231 | BRASL = 0xC05, // Branch Relative And Save Long |
| 232 | BRC = 0xA74, // Branch Relative On Condition |
| 233 | BRCL = 0xC04, // Branch Relative On Condition Long |
| 234 | BRCT = 0xA76, // Branch Relative On Count (32) |
| 235 | BRCTG = 0xA77, // Branch Relative On Count (64) |
| 236 | BRCTH = 0xCC6, // Branch Relative On Count High (32) |
| 237 | BRXH = 0x84, // Branch Relative On Index High (32) |
| 238 | BRXHG = 0xEC44, // Branch Relative On Index High (64) |
| 239 | BRXLE = 0x85, // Branch Relative On Index Low Or Eq. (32) |
| 240 | BRXLG = 0xEC45, // Branch Relative On Index Low Or Eq. (64) |
| 241 | BSM = 0x0B, // Branch And Set Mode |
| 242 | BXH = 0x86, // Branch On Index High (32) |
| 243 | BXHG = 0xEB44, // Branch On Index High (64) |
| 244 | BXLE = 0x87, // Branch On Index Low Or Equal (32) |
| 245 | BXLEG = 0xEB45, // Branch On Index Low Or Equal (64) |
| 246 | C = 0x59, // Compare (32) |
| 247 | CDB = 0xED19, // Compare (long BFP) |
| 248 | CDBR = 0xB319, // Compare (long BFP) |
| 249 | CDFBR = 0xB395, // Convert From Fixed (32 to long BFP) |
| 250 | CDFBRA = 0xB395, // Convert From Fixed (32 to long BFP) |
| 251 | CDFTR = 0xB951, // Convert From Fixed (32 to long DFP) |
| 252 | CDGBR = 0xB3A5, // Convert From Fixed (64 to long BFP) |
| 253 | CDGBRA = 0xB3A5, // Convert From Fixed (64 to long BFP) |
| 254 | CDGTR = 0xB3F1, // Convert From Fixed (64 to long DFP) |
| 255 | CDGTRA = 0xB3F1, // Convert From Fixed (64 to long DFP) |
| 256 | CDLFBR = 0xB391, // Convert From Logical (32 to long BFP) |
| 257 | CDLFTR = 0xB953, // Convert From Logical (32 to long DFP) |
| 258 | CDLGBR = 0xB3A1, // Convert From Logical (64 to long BFP) |
| 259 | CDLGTR = 0xB952, // Convert From Logical (64 to long DFP) |
| 260 | CDS = 0xBB, // Compare Double And Swap (32) |
| 261 | CDSG = 0xEB3E, // Compare Double And Swap (64) |
| 262 | CDSTR = 0xB3F3, // Convert From Signed Packed (64 to long DFP) |
| 263 | CDSY = 0xEB31, // Compare Double And Swap (32) |
| 264 | CDTR = 0xB3E4, // Compare (long DFP) |
| 265 | CDUTR = 0xB3F2, // Convert From Unsigned Packed (64 to long DFP) |
| 266 | CDZT = 0xEDAA, // Convert From Zoned (to long DFP) |
| 267 | CEB = 0xED09, // Compare (short BFP) |
| 268 | CEBR = 0xB309, // Compare (short BFP) |
| 269 | CEDTR = 0xB3F4, // Compare Biased Exponent (long DFP) |
| 270 | CEFBR = 0xB394, // Convert From Fixed (32 to short BFP) |
| 271 | CEFBRA = 0xB394, // Convert From Fixed (32 to short BFP) |
| 272 | CEGBR = 0xB3A4, // Convert From Fixed (64 to short BFP) |
| 273 | CEGBRA = 0xB3A4, // Convert From Fixed (64 to short BFP) |
| 274 | CELFBR = 0xB390, // Convert From Logical (32 to short BFP) |
| 275 | CELGBR = 0xB3A0, // Convert From Logical (64 to short BFP) |
| 276 | CEXTR = 0xB3FC, // Compare Biased Exponent (extended DFP) |
| 277 | CFC = 0xB21A, // Compare And Form Codeword |
| 278 | CFDBR = 0xB399, // Convert To Fixed (long BFP to 32) |
| 279 | CFDBRA = 0xB399, // Convert To Fixed (long BFP to 32) |
| 280 | CFDR = 0xB3B9, // Convert To Fixed (long HFP to 32) |
| 281 | CFDTR = 0xB941, // Convert To Fixed (long DFP to 32) |
| 282 | CFEBR = 0xB398, // Convert To Fixed (short BFP to 32) |
| 283 | CFEBRA = 0xB398, // Convert To Fixed (short BFP to 32) |
| 284 | CFER = 0xB3B8, // Convert To Fixed (short HFP to 32) |
| 285 | CFI = 0xC2D, // Compare Immediate (32) |
| 286 | CFXBR = 0xB39A, // Convert To Fixed (extended BFP to 32) |
| 287 | CFXBRA = 0xB39A, // Convert To Fixed (extended BFP to 32) |
| 288 | CFXR = 0xB3BA, // Convert To Fixed (extended HFP to 32) |
| 289 | CFXTR = 0xB949, // Convert To Fixed (extended DFP to 32) |
| 290 | CG = 0xE320, // Compare (64) |
| 291 | CGDBR = 0xB3A9, // Convert To Fixed (long BFP to 64) |
| 292 | CGDBRA = 0xB3A9, // Convert To Fixed (long BFP to 64) |
| 293 | CGDR = 0xB3C9, // Convert To Fixed (long HFP to 64) |
| 294 | CGDTR = 0xB3E1, // Convert To Fixed (long DFP to 64) |
| 295 | CGDTRA = 0xB3E1, // Convert To Fixed (long DFP to 64) |
| 296 | CGEBR = 0xB3A8, // Convert To Fixed (short BFP to 64) |
| 297 | CGEBRA = 0xB3A8, // Convert To Fixed (short BFP to 64) |
| 298 | CGER = 0xB3C8, // Convert To Fixed (short HFP to 64) |
| 299 | CGF = 0xE330, // Compare (64<-32) |
| 300 | CGFI = 0xC2C, // Compare Immediate (64<-32) |
| 301 | CGFR = 0xB930, // Compare (64<-32) |
| 302 | CGFRL = 0xC6C, // Compare Relative Long (64<-32) |
| 303 | CGH = 0xE334, // Compare Halfword (64<-16) |
| 304 | CGHI = 0xA7F, // Compare Halfword Immediate (64<-16) |
| 305 | CGHRL = 0xC64, // Compare Halfword Relative Long (64<-16) |
| 306 | CGHSI = 0xE558, // Compare Halfword Immediate (64<-16) |
| 307 | CGIB = 0xECFC, // Compare Immediate And Branch (64<-8) |
| 308 | CGIJ = 0xEC7C, // Compare Immediate And Branch Relative (64<-8) |
| 309 | CGIT = 0xEC70, // Compare Immediate And Trap (64<-16) |
| 310 | CGR = 0xB920, // Compare (64) |
| 311 | CGRB = 0xECE4, // Compare And Branch (64) |
| 312 | CGRJ = 0xEC64, // Compare And Branch Relative (64) |
| 313 | CGRL = 0xC68, // Compare Relative Long (64) |
| 314 | CGRT = 0xB960, // Compare And Trap (64) |
| 315 | CGXBR = 0xB3AA, // Convert To Fixed (extended BFP to 64) |
| 316 | CGXBRA = 0xB3AA, // Convert To Fixed (extended BFP to 64) |
| 317 | CGXR = 0xB3CA, // Convert To Fixed (extended HFP to 64) |
| 318 | CGXTR = 0xB3E9, // Convert To Fixed (extended DFP to 64) |
| 319 | CGXTRA = 0xB3E9, // Convert To Fixed (extended DFP to 64) |
| 320 | CH = 0x49, // Compare Halfword (32<-16) |
| 321 | CHF = 0xE3CD, // Compare High (32) |
| 322 | CHHR = 0xB9CD, // Compare High (32) |
| 323 | CHHSI = 0xE554, // Compare Halfword Immediate (16) |
| 324 | CHI = 0xA7E, // Compare Halfword Immediate (32<-16) |
| 325 | CHLR = 0xB9DD, // Compare High (32) |
| 326 | CHRL = 0xC65, // Compare Halfword Relative Long (32<-16) |
| 327 | CHSI = 0xE55C, // Compare Halfword Immediate (32<-16) |
| 328 | CHY = 0xE379, // Compare Halfword (32<-16) |
| 329 | CIB = 0xECFE, // Compare Immediate And Branch (32<-8) |
| 330 | CIH = 0xCCD, // Compare Immediate High (32) |
| 331 | CIJ = 0xEC7E, // Compare Immediate And Branch Relative (32<-8) |
| 332 | CIT = 0xEC72, // Compare Immediate And Trap (32<-16) |
| 333 | CKSM = 0xB241, // Checksum |
| 334 | CL = 0x55, // Compare Logical (32) |
| 335 | CLC = 0xD5, // Compare Logical (character) |
| 336 | CLCL = 0x0F, // Compare Logical Long |
| 337 | CLCLE = 0xA9, // Compare Logical Long Extended |
| 338 | CLCLU = 0xEB8F, // Compare Logical Long Unicode |
| 339 | CLFDBR = 0xB39D, // Convert To Logical (long BFP to 32) |
| 340 | CLFDTR = 0xB943, // Convert To Logical (long DFP to 32) |
| 341 | CLFEBR = 0xB39C, // Convert To Logical (short BFP to 32) |
| 342 | CLFHSI = 0xE55D, // Compare Logical Immediate (32<-16) |
| 343 | CLFI = 0xC2F, // Compare Logical Immediate (32) |
| 344 | CLFIT = 0xEC73, // Compare Logical Immediate And Trap (32<-16) |
| 345 | CLFXBR = 0xB39E, // Convert To Logical (extended BFP to 32) |
| 346 | CLFXTR = 0xB94B, // Convert To Logical (extended DFP to 32) |
| 347 | CLG = 0xE321, // Compare Logical (64) |
| 348 | CLGDBR = 0xB3AD, // Convert To Logical (long BFP to 64) |
| 349 | CLGDTR = 0xB942, // Convert To Logical (long DFP to 64) |
| 350 | CLGEBR = 0xB3AC, // Convert To Logical (short BFP to 64) |
| 351 | CLGF = 0xE331, // Compare Logical (64<-32) |
| 352 | CLGFI = 0xC2E, // Compare Logical Immediate (64<-32) |
| 353 | CLGR = 0xB921, // Compare Logical (64) |
| 354 | CLI = 0x95, // Compare Logical Immediate (8) |
| 355 | CLIY = 0xEB55, // Compare Logical Immediate (8) |
| 356 | CLR = 0x15, // Compare Logical (32) |
| 357 | CLY = 0xE355, // Compare Logical (32) |
| 358 | CD = 0x69, // Compare (LH) |
| 359 | CDR = 0x29, // Compare (LH) |
| 360 | CR = 0x19, // Compare (32) |
| 361 | CSST = 0xC82, // Compare And Swap And Store |
| 362 | CSXTR = 0xB3EB, // Convert To Signed Packed (extended DFP to 128) |
| 363 | CSY = 0xEB14, // Compare And Swap (32) |
| 364 | CU12 = 0xB2A7, // Convert Utf-8 To Utf-16 |
| 365 | CU14 = 0xB9B0, // Convert Utf-8 To Utf-32 |
| 366 | CU21 = 0xB2A6, // Convert Utf-16 To Utf-8 |
| 367 | CU24 = 0xB9B1, // Convert Utf-16 To Utf-32 |
| 368 | CU41 = 0xB9B2, // Convert Utf-32 To Utf-8 |
| 369 | CU42 = 0xB9B3, // Convert Utf-32 To Utf-16 |
| 370 | CUDTR = 0xB3E2, // Convert To Unsigned Packed (long DFP to 64) |
| 371 | CUSE = 0xB257, // Compare Until Substring Equal |
| 372 | CUTFU = 0xB2A7, // Convert Utf-8 To Unicode |
| 373 | CUUTF = 0xB2A6, // Convert Unicode To Utf-8 |
| 374 | CUXTR = 0xB3EA, // Convert To Unsigned Packed (extended DFP to 128) |
| 375 | CVB = 0x4F, // Convert To Binary (32) |
| 376 | CVBG = 0xE30E, // Convert To Binary (64) |
| 377 | CVBY = 0xE306, // Convert To Binary (32) |
| 378 | CVD = 0x4E, // Convert To Decimal (32) |
| 379 | CVDG = 0xE32E, // Convert To Decimal (64) |
| 380 | CVDY = 0xE326, // Convert To Decimal (32) |
| 381 | CXBR = 0xB349, // Compare (extended BFP) |
| 382 | CXFBR = 0xB396, // Convert From Fixed (32 to extended BFP) |
| 383 | CXFBRA = 0xB396, // Convert From Fixed (32 to extended BFP) |
| 384 | CXFTR = 0xB959, // Convert From Fixed (32 to extended DFP) |
| 385 | CXGBR = 0xB3A6, // Convert From Fixed (64 to extended BFP) |
| 386 | CXGBRA = 0xB3A6, // Convert From Fixed (64 to extended BFP) |
| 387 | CXGTR = 0xB3F9, // Convert From Fixed (64 to extended DFP) |
| 388 | CXGTRA = 0xB3F9, // Convert From Fixed (64 to extended DFP) |
| 389 | CXLFBR = 0xB392, // Convert From Logical (32 to extended BFP) |
| 390 | CXLFTR = 0xB95B, // Convert From Logical (32 to extended DFP) |
| 391 | CXLGBR = 0xB3A2, // Convert From Logical (64 to extended BFP) |
| 392 | CXLGTR = 0xB95A, // Convert From Logical (64 to extended DFP) |
| 393 | CXSTR = 0xB3FB, // Convert From Signed Packed (128 to extended DFP) |
| 394 | CXTR = 0xB3EC, // Compare (extended DFP) |
| 395 | CXUTR = 0xB3FA, // Convert From Unsigned Packed (128 to ext. DFP) |
| 396 | CXZT = 0xEDAB, // Convert From Zoned (to extended DFP) |
| 397 | CY = 0xE359, // Compare (32) |
| 398 | CZDT = 0xEDA8, // Convert To Zoned (from long DFP) |
| 399 | CZXT = 0xEDA9, // Convert To Zoned (from extended DFP) |
| 400 | D = 0x5D, // Divide (32<-64) |
| 401 | DDB = 0xED1D, // Divide (long BFP) |
| 402 | DDBR = 0xB31D, // Divide (long BFP) |
| 403 | DDTR = 0xB3D1, // Divide (long DFP) |
| 404 | DDTRA = 0xB3D1, // Divide (long DFP) |
| 405 | DEB = 0xED0D, // Divide (short BFP) |
| 406 | DEBR = 0xB30D, // Divide (short BFP) |
| 407 | DIDBR = 0xB35B, // Divide To Integer (long BFP) |
| 408 | DIEBR = 0xB353, // Divide To Integer (short BFP) |
| 409 | DL = 0xE397, // Divide Logical (32<-64) |
| 410 | DLG = 0xE387, // Divide Logical (64<-128) |
| 411 | DLGR = 0xB987, // Divide Logical (64<-128) |
| 412 | DLR = 0xB997, // Divide Logical (32<-64) |
| 413 | DP = 0xFD, // Divide Decimal |
| 414 | DR = 0x1D, // Divide (32<-64) |
| 415 | DSG = 0xE30D, // Divide Single (64) |
| 416 | DSGF = 0xE31D, // Divide Single (64<-32) |
| 417 | DSGFR = 0xB91D, // Divide Single (64<-32) |
| 418 | DSGR = 0xB90D, // Divide Single (64) |
| 419 | DXBR = 0xB34D, // Divide (extended BFP) |
| 420 | DXTR = 0xB3D9, // Divide (extended DFP) |
| 421 | DXTRA = 0xB3D9, // Divide (extended DFP) |
| 422 | EAR = 0xB24F, // Extract Access |
| 423 | ECAG = 0xEB4C, // Extract Cache Attribute |
| 424 | ECTG = 0xC81, // Extract Cpu Time |
| 425 | ED = 0xDE, // Edit |
| 426 | EDMK = 0xDF, // Edit And Mark |
| 427 | EEDTR = 0xB3E5, // Extract Biased Exponent (long DFP to 64) |
| 428 | EEXTR = 0xB3ED, // Extract Biased Exponent (extended DFP to 64) |
| 429 | EFPC = 0xB38C, // Extract Fpc |
| 430 | EPSW = 0xB98D, // Extract Psw |
| 431 | ESDTR = 0xB3E7, // Extract Significance (long DFP) |
| 432 | ESXTR = 0xB3EF, // Extract Significance (extended DFP) |
| 433 | ETND = 0xB2EC, // Extract Transaction Nesting Depth |
| 434 | EX = 0x44, // Execute |
| 435 | EXRL = 0xC60, // Execute Relative Long |
| 436 | FIDBR = 0xB35F, // Load Fp Integer (long BFP) |
| 437 | FIDBRA = 0xB35F, // Load Fp Integer (long BFP) |
| 438 | FIDTR = 0xB3D7, // Load Fp Integer (long DFP) |
| 439 | FIEBR = 0xB357, // Load Fp Integer (short BFP) |
| 440 | FIEBRA = 0xB357, // Load Fp Integer (short BFP) |
| 441 | FIXBR = 0xB347, // Load Fp Integer (extended BFP) |
| 442 | FIXBRA = 0xB347, // Load Fp Integer (extended BFP) |
| 443 | FIXTR = 0xB3DF, // Load Fp Integer (extended DFP) |
| 444 | FLOGR = 0xB983, // Find Leftmost One |
| 445 | HSCH = 0xB231, // Halt Subchannel |
| 446 | IC_z = 0x43, // Insert Character |
| 447 | ICM = 0xBF, // Insert Characters Under Mask (low) |
| 448 | ICMH = 0xEB80, // Insert Characters Under Mask (high) |
| 449 | ICMY = 0xEB81, // Insert Characters Under Mask (low) |
| 450 | ICY = 0xE373, // Insert Character |
| 451 | IEDTR = 0xB3F6, // Insert Biased Exponent (64 to long DFP) |
| 452 | IEXTR = 0xB3FE, // Insert Biased Exponent (64 to extended DFP) |
| 453 | IIHF = 0xC08, // Insert Immediate (high) |
| 454 | IIHH = 0xA50, // Insert Immediate (high high) |
| 455 | IIHL = 0xA51, // Insert Immediate (high low) |
| 456 | IILF = 0xC09, // Insert Immediate (low) |
| 457 | IILH = 0xA52, // Insert Immediate (low high) |
| 458 | IILL = 0xA53, // Insert Immediate (low low) |
| 459 | IPM = 0xB222, // Insert Program Mask |
| 460 | KDB = 0xED18, // Compare And Signal (long BFP) |
| 461 | KDBR = 0xB318, // Compare And Signal (long BFP) |
| 462 | KDTR = 0xB3E0, // Compare And Signal (long DFP) |
| 463 | KEB = 0xED08, // Compare And Signal (short BFP) |
| 464 | KEBR = 0xB308, // Compare And Signal (short BFP) |
| 465 | KIMD = 0xB93E, // Compute Intermediate Message Digest |
| 466 | KLMD = 0xB93F, // Compute Last Message Digest |
| 467 | KM = 0xB92E, // Cipher Message |
| 468 | KMAC = 0xB91E, // Compute Message Authentication Code |
| 469 | KMC = 0xB92F, // Cipher Message With Chaining |
| 470 | KMCTR = 0xB92D, // Cipher Message With Counter |
| 471 | KMF = 0xB92A, // Cipher Message With Cfb |
| 472 | KMO = 0xB92B, // Cipher Message With Ofb |
| 473 | KXBR = 0xB348, // Compare And Signal (extended BFP) |
| 474 | KXTR = 0xB3E8, // Compare And Signal (extended DFP) |
| 475 | L = 0x58, // Load (32) |
| 476 | LA = 0x41, // Load Address |
| 477 | LAA = 0xEBF8, // Load And Add (32) |
| 478 | LAAG = 0xEBE8, // Load And Add (64) |
| 479 | LAAL = 0xEBFA, // Load And Add Logical (32) |
| 480 | LAALG = 0xEBEA, // Load And Add Logical (64) |
| 481 | LAE = 0x51, // Load Address Extended |
| 482 | LAEY = 0xE375, // Load Address Extended |
| 483 | LAN = 0xEBF4, // Load And And (32) |
| 484 | LANG = 0xEBE4, // Load And And (64) |
| 485 | LAO = 0xEBF6, // Load And Or (32) |
| 486 | LAOG = 0xEBE6, // Load And Or (64) |
| 487 | LARL = 0xC00, // Load Address Relative Long |
| 488 | LAT = 0xE39F, // Load And Trap (32L<-32) |
| 489 | LAX = 0xEBF7, // Load And Exclusive Or (32) |
| 490 | LAXG = 0xEBE7, // Load And Exclusive Or (64) |
| 491 | LAY = 0xE371, // Load Address |
| 492 | LB = 0xE376, // Load Byte (32) |
| 493 | LBH = 0xE3C0, // Load Byte High (32<-8) |
| 494 | LBR = 0xB926, // Load Byte (32) |
| 495 | LCDBR = 0xB313, // Load Complement (long BFP) |
| 496 | LCDFR = 0xB373, // Load Complement (long) |
| 497 | LCEBR = 0xB303, // Load Complement (short BFP) |
| 498 | LCGFR = 0xB913, // Load Complement (64<-32) |
| 499 | LCGR = 0xB903, // Load Complement (64) |
| 500 | LCR = 0x13, // Load Complement (32) |
| 501 | LCXBR = 0xB343, // Load Complement (extended BFP) |
| 502 | LD = 0x68, // Load (long) |
| 503 | LDEB = 0xED04, // Load Lengthened (short to long BFP) |
| 504 | LDEBR = 0xB304, // Load Lengthened (short to long BFP) |
| 505 | LDETR = 0xB3D4, // Load Lengthened (short to long DFP) |
| 506 | LDGR = 0xB3C1, // Load Fpr From Gr (64 to long) |
| 507 | LDR = 0x28, // Load (long) |
| 508 | LDXBR = 0xB345, // Load Rounded (extended to long BFP) |
| 509 | LDXBRA = 0xB345, // Load Rounded (extended to long BFP) |
| 510 | LDXTR = 0xB3DD, // Load Rounded (extended to long DFP) |
| 511 | LDY = 0xED65, // Load (long) |
| 512 | LE = 0x78, // Load (short) |
| 513 | LEDBR = 0xB344, // Load Rounded (long to short BFP) |
| 514 | LEDBRA = 0xB344, // Load Rounded (long to short BFP) |
| 515 | LEDTR = 0xB3D5, // Load Rounded (long to short DFP) |
| 516 | LER = 0x38, // Load (short) |
| 517 | LEXBR = 0xB346, // Load Rounded (extended to short BFP) |
| 518 | LEXBRA = 0xB346, // Load Rounded (extended to short BFP) |
| 519 | LEY = 0xED64, // Load (short) |
| 520 | LFAS = 0xB2BD, // Load Fpc And Signal |
| 521 | LFH = 0xE3CA, // Load High (32) |
| 522 | LFHAT = 0xE3C8, // Load High And Trap (32H<-32) |
| 523 | LFPC = 0xB29D, // Load Fpc |
| 524 | LG = 0xE304, // Load (64) |
| 525 | LGAT = 0xE385, // Load And Trap (64) |
| 526 | LGB = 0xE377, // Load Byte (64) |
| 527 | LGBR = 0xB906, // Load Byte (64) |
| 528 | LGDR = 0xB3CD, // Load Gr From Fpr (long to 64) |
| 529 | LGF = 0xE314, // Load (64<-32) |
| 530 | LGFI = 0xC01, // Load Immediate (64<-32) |
| 531 | LGFR = 0xB914, // Load (64<-32) |
| 532 | LGFRL = 0xC4C, // Load Relative Long (64<-32) |
| 533 | LGH = 0xE315, // Load Halfword (64) |
| 534 | LGHI = 0xA79, // Load Halfword Immediate (64) |
| 535 | LGHR = 0xB907, // Load Halfword (64) |
| 536 | LGHRL = 0xC44, // Load Halfword Relative Long (64<-16) |
| 537 | LGR = 0xB904, // Load (64) |
| 538 | LGRL = 0xC48, // Load Relative Long (64) |
| 539 | LH = 0x48, // Load Halfword (32) |
| 540 | LHH = 0xE3C4, // Load Halfword High (32<-16) |
| 541 | LHI = 0xA78, // Load Halfword Immediate (32) |
| 542 | LHR = 0xB927, // Load Halfword (32) |
| 543 | LHRL = 0xC45, // Load Halfword Relative Long (32<-16) |
| 544 | LHY = 0xE378, // Load Halfword (32) |
| 545 | LLC = 0xE394, // Load Logical Character (32) |
| 546 | LLCH = 0xE3C2, // Load Logical Character High (32<-8) |
| 547 | LLCR = 0xB994, // Load Logical Character (32) |
| 548 | LLGC = 0xE390, // Load Logical Character (64) |
| 549 | LLGCR = 0xB984, // Load Logical Character (64) |
| 550 | LLGF = 0xE316, // Load Logical (64<-32) |
| 551 | LLGFAT = 0xE39D, // Load Logical And Trap (64<-32) |
| 552 | LLGFR = 0xB916, // Load Logical (64<-32) |
| 553 | LLGFRL = 0xC4E, // Load Logical Relative Long (64<-32) |
| 554 | LLGH = 0xE391, // Load Logical Halfword (64) |
| 555 | LLGHR = 0xB985, // Load Logical Halfword (64) |
| 556 | LLGHRL = 0xC46, // Load Logical Halfword Relative Long (64<-16) |
| 557 | LLGT = 0xE317, // Load Logical Thirty One Bits |
| 558 | LLGTAT = 0xE39C, // Load Logical Thirty One Bits And Trap (64<-31) |
| 559 | LLGTR = 0xB917, // Load Logical Thirty One Bits |
| 560 | LLH = 0xE395, // Load Logical Halfword (32) |
| 561 | LLHH = 0xE3C6, // Load Logical Halfword High (32<-16) |
| 562 | LLHR = 0xB995, // Load Logical Halfword (32) |
| 563 | LLHRL = 0xC42, // Load Logical Halfword Relative Long (32<-16) |
| 564 | LLIHF = 0xC0E, // Load Logical Immediate (high) |
| 565 | LLIHH = 0xA5C, // Load Logical Immediate (high high) |
| 566 | LLIHL = 0xA5D, // Load Logical Immediate (high low) |
| 567 | LLILF = 0xC0F, // Load Logical Immediate (low) |
| 568 | LLILH = 0xA5E, // Load Logical Immediate (low high) |
| 569 | LLILL = 0xA5F, // Load Logical Immediate (low low) |
| 570 | LM = 0x98, // Load Multiple (32) |
| 571 | LMD = 0xEF, // Load Multiple Disjoint |
| 572 | LMG = 0xEB04, // Load Multiple (64) |
| 573 | LMH = 0xEB96, // Load Multiple High |
| 574 | LMY = 0xEB98, // Load Multiple (32) |
| 575 | LNDBR = 0xB311, // Load Negative (long BFP) |
| 576 | LNDFR = 0xB371, // Load Negative (long) |
| 577 | LNEBR = 0xB301, // Load Negative (short BFP) |
| 578 | LNGFR = 0xB911, // Load Negative (64<-32) |
| 579 | LNGR = 0xB901, // Load Negative (64) |
| 580 | LNR = 0x11, // Load Negative (32) |
| 581 | LNXBR = 0xB341, // Load Negative (extended BFP) |
| 582 | LOC = 0xEBF2, // Load On Condition (32) |
| 583 | LOCG = 0xEBE2, // Load On Condition (64) |
| 584 | LOCGR = 0xB9E2, // Load On Condition (64) |
| 585 | LOCR = 0xB9F2, // Load On Condition (32) |
| 586 | LPD = 0xC84, // Load Pair Disjoint (32) |
| 587 | LPDBR = 0xB310, // Load Positive (long BFP) |
| 588 | LPDFR = 0xB370, // Load Positive (long) |
| 589 | LPDG = 0xC85, // Load Pair Disjoint (64) |
| 590 | LPEBR = 0xB300, // Load Positive (short BFP) |
| 591 | LPGFR = 0xB910, // Load Positive (64<-32) |
| 592 | LPGR = 0xB900, // Load Positive (64) |
| 593 | LPQ = 0xE38F, // Load Pair From Quadword |
| 594 | LPR = 0x10, // Load Positive (32) |
| 595 | LPXBR = 0xB340, // Load Positive (extended BFP) |
| 596 | LR = 0x18, // Load (32) |
| 597 | LRL = 0xC4D, // Load Relative Long (32) |
| 598 | LRV = 0xE31E, // Load Reversed (32) |
| 599 | LRVG = 0xE30F, // Load Reversed (64) |
| 600 | LRVGR = 0xB90F, // Load Reversed (64) |
| 601 | LRVH = 0xE31F, // Load Reversed (16) |
| 602 | LRVR = 0xB91F, // Load Reversed (32) |
| 603 | LT = 0xE312, // Load And Test (32) |
| 604 | LTDBR = 0xB312, // Load And Test (long BFP) |
| 605 | LTDTR = 0xB3D6, // Load And Test (long DFP) |
| 606 | LTEBR = 0xB302, // Load And Test (short BFP) |
| 607 | LTG = 0xE302, // Load And Test (64) |
| 608 | LTGF = 0xE332, // Load And Test (64<-32) |
| 609 | LTGFR = 0xB912, // Load And Test (64<-32) |
| 610 | LTGR = 0xB902, // Load And Test (64) |
| 611 | LTR = 0x12, // Load And Test (32) |
| 612 | LTXBR = 0xB342, // Load And Test (extended BFP) |
| 613 | LTXTR = 0xB3DE, // Load And Test (extended DFP) |
| 614 | LXDB = 0xED05, // Load Lengthened (long to extended BFP) |
| 615 | LXDBR = 0xB305, // Load Lengthened (long to extended BFP) |
| 616 | LXDTR = 0xB3DC, // Load Lengthened (long to extended DFP) |
| 617 | LXEB = 0xED06, // Load Lengthened (short to extended BFP) |
| 618 | LXEBR = 0xB306, // Load Lengthened (short to extended BFP) |
| 619 | LXR = 0xB365, // Load (extended) |
| 620 | LY = 0xE358, // Load (32) |
| 621 | LZDR = 0xB375, // Load Zero (long) |
| 622 | LZER = 0xB374, // Load Zero (short) |
| 623 | LZXR = 0xB376, // Load Zero (extended) |
| 624 | M = 0x5C, // Multiply (64<-32) |
| 625 | MADB = 0xED1E, // Multiply And Add (long BFP) |
| 626 | MADBR = 0xB31E, // Multiply And Add (long BFP) |
| 627 | MAEB = 0xED0E, // Multiply And Add (short BFP) |
| 628 | MAEBR = 0xB30E, // Multiply And Add (short BFP) |
| 629 | MC = 0xAF, // Monitor Call |
| 630 | MDB = 0xED1C, // Multiply (long BFP) |
| 631 | MDBR = 0xB31C, // Multiply (long BFP) |
| 632 | MDEB = 0xED0C, // Multiply (short to long BFP) |
| 633 | MDEBR = 0xB30C, // Multiply (short to long BFP) |
| 634 | MDTR = 0xB3D0, // Multiply (long DFP) |
| 635 | MDTRA = 0xB3D0, // Multiply (long DFP) |
| 636 | MEEB = 0xED17, // Multiply (short BFP) |
| 637 | MEEBR = 0xB317, // Multiply (short BFP) |
| 638 | MFY = 0xE35C, // Multiply (64<-32) |
| 639 | MGHI = 0xA7D, // Multiply Halfword Immediate (64) |
| 640 | MH = 0x4C, // Multiply Halfword (32) |
| 641 | MHI = 0xA7C, // Multiply Halfword Immediate (32) |
| 642 | MHY = 0xE37C, // Multiply Halfword (32) |
| 643 | ML = 0xE396, // Multiply Logical (64<-32) |
| 644 | MLG = 0xE386, // Multiply Logical (128<-64) |
| 645 | MLGR = 0xB986, // Multiply Logical (128<-64) |
| 646 | MLR = 0xB996, // Multiply Logical (64<-32) |
| 647 | MP = 0xFC, // Multiply Decimal |
| 648 | MR = 0x1C, // Multiply (64<-32) |
| 649 | MS = 0x71, // Multiply Single (32) |
| 650 | MSCH = 0xB232, // Modify Subchannel |
| 651 | MSDB = 0xED1F, // Multiply And Subtract (long BFP) |
| 652 | MSDBR = 0xB31F, // Multiply And Subtract (long BFP) |
| 653 | MSEB = 0xED0F, // Multiply And Subtract (short BFP) |
| 654 | MSEBR = 0xB30F, // Multiply And Subtract (short BFP) |
| 655 | MSFI = 0xC21, // Multiply Single Immediate (32) |
| 656 | MSG = 0xE30C, // Multiply Single (64) |
| 657 | MSGF = 0xE31C, // Multiply Single (64<-32) |
| 658 | MSGFI = 0xC20, // Multiply Single Immediate (64<-32) |
| 659 | MSGFR = 0xB91C, // Multiply Single (64<-32) |
| 660 | MSGR = 0xB90C, // Multiply Single (64) |
| 661 | MSR = 0xB252, // Multiply Single (32) |
| 662 | MSY = 0xE351, // Multiply Single (32) |
| 663 | MVC = 0xD2, // Move (character) |
| 664 | MVCP = 0xDA, // Move To Primary |
| 665 | MVCDK = 0xE50F, // Move To Primary |
| 666 | MVCIN = 0xE8, // Move Inverse |
| 667 | MVCL = 0x0E, // Move Long |
| 668 | MVCLE = 0xA8, // Move Long Extended |
| 669 | MVCLU = 0xEB8E, // Move Long Unicode |
| 670 | MVGHI = 0xE548, // Move (64<-16) |
| 671 | MVHHI = 0xE544, // Move (16<-16) |
| 672 | MVHI = 0xE54C, // Move (32<-16) |
| 673 | MVI = 0x92, // Move (immediate) |
| 674 | MVIY = 0xEB52, // Move (immediate) |
| 675 | MVN = 0xD1, // Move Numerics |
| 676 | MVO = 0xF1, // Move With Offset |
| 677 | MVST = 0xB255, // Move String |
| 678 | MVZ = 0xD3, // Move Zones |
| 679 | MXBR = 0xB34C, // Multiply (extended BFP) |
| 680 | MXDB = 0xED07, // Multiply (long to extended BFP) |
| 681 | MXDBR = 0xB307, // Multiply (long to extended BFP) |
| 682 | MXTR = 0xB3D8, // Multiply (extended DFP) |
| 683 | MXTRA = 0xB3D8, // Multiply (extended DFP) |
| 684 | N = 0x54, // And (32) |
| 685 | NC = 0xD4, // And (character) |
| 686 | NG = 0xE380, // And (64) |
| 687 | NGR = 0xB980, // And (64) |
| 688 | NGRK = 0xB9E4, // And (64) |
| 689 | NI = 0x94, // And (immediate) |
| 690 | NIAI = 0xB2FA, // Next Instruction Access Intent Ie Eh |
| 691 | NIHF = 0xC0A, // And Immediate (high) |
| 692 | NIHH = 0xA54, // And Immediate (high high) |
| 693 | NIHL = 0xA55, // And Immediate (high low) |
| 694 | NILF = 0xC0B, // And Immediate (low) |
| 695 | NILH = 0xA56, // And Immediate (low high) |
| 696 | NILL = 0xA57, // And Immediate (low low) |
| 697 | NIY = 0xEB54, // And (immediate) |
| 698 | NR = 0x14, // And (32) |
| 699 | NRK = 0xB9F4, // And (32) |
| 700 | NTSTG = 0xE325, // Nontransactional Store Rxy Tx ¤9 A Sp St B2 |
| 701 | NY = 0xE354, // And (32) |
| 702 | O = 0x56, // Or (32) |
| 703 | OC = 0xD6, // Or (character) |
| 704 | OG = 0xE381, // Or (64) |
| 705 | OGR = 0xB981, // Or (64) |
| 706 | OGRK = 0xB9E6, // Or (64) |
| 707 | OI = 0x96, // Or (immediate) |
| 708 | OIHF = 0xC0C, // Or Immediate (high) |
| 709 | OIHH = 0xA58, // Or Immediate (high high) |
| 710 | OIHL = 0xA59, // Or Immediate (high low) |
| 711 | OILF = 0xC0D, // Or Immediate (low) |
| 712 | OILH = 0xA5A, // Or Immediate (low high) |
| 713 | OILL = 0xA5B, // Or Immediate (low low) |
| 714 | OIY = 0xEB56, // Or (immediate) |
| 715 | OR = 0x16, // Or (32) |
| 716 | ORK = 0xB9F6, // Or (32) |
| 717 | OY = 0xE356, // Or (32) |
| 718 | PACK = 0xF2, // Pack |
| 719 | PCC = 0xB92C, // Perform Cryptographic Computation |
| 720 | PFD = 0xE336, // Prefetch Data |
| 721 | PFDRL = 0xC62, // Prefetch Data Relative Long |
| 722 | PFPO = 0x010A, // Perform Floating-POINT Operation |
| 723 | PKA = 0xE9, // Pack Ascii |
| 724 | PKU = 0xE1, // Pack Unicode |
| 725 | PLO = 0xEE, // Perform Locked Operation |
| 726 | POPCNT_Z = 0xB9E1, // Population Count |
| 727 | PPA = 0xB2E8, // Perform Processor Assist |
| 728 | QADTR = 0xB3F5, // Quantize (long DFP) |
| 729 | QAXTR = 0xB3FD, // Quantize (extended DFP) |
| 730 | RCHP = 0xB23B, // Reset Channel Path |
| 731 | RISBG = 0xEC55, // Rotate Then Insert Selected Bits |
| 732 | RISBGN = 0xEC59, // Rotate Then Insert Selected Bits |
| 733 | RISBHG = 0xEC5D, // Rotate Then Insert Selected Bits High |
| 734 | RISBLG = 0xEC51, // Rotate Then Insert Selected Bits Low |
| 735 | RLL = 0xEB1D, // Rotate Left Single Logical (32) |
| 736 | RLLG = 0xEB1C, // Rotate Left Single Logical (64) |
| 737 | RNSBG = 0xEC54, // Rotate Then And Selected Bits |
| 738 | ROSBG = 0xEC56, // Rotate Then Or Selected Bits |
| 739 | RRDTR = 0xB3F7, // Reround (long DFP) |
| 740 | RRXTR = 0xB3FF, // Reround (extended DFP) |
| 741 | RSCH = 0xB238, // Resume Subchannel |
| 742 | RXSBG = 0xEC57, // Rotate Then Exclusive Or Selected Bits |
| 743 | S = 0x5B, // Subtract (32) |
| 744 | SAL = 0xB237, // Set Address Limit |
| 745 | SAR = 0xB24E, // Set Access |
| 746 | SCHM = 0xB23C, // Set Channel Monitor |
| 747 | SDB = 0xED1B, // Subtract (long BFP) |
| 748 | SDBR = 0xB31B, // Subtract (long BFP) |
| 749 | SDTR = 0xB3D3, // Subtract (long DFP) |
| 750 | SDTRA = 0xB3D3, // Subtract (long DFP) |
| 751 | SEB = 0xED0B, // Subtract (short BFP) |
| 752 | SEBR = 0xB30B, // Subtract (short BFP) |
| 753 | SFASR = 0xB385, // Set Fpc And Signal |
| 754 | SFPC = 0xB384, // Set Fpc |
| 755 | SG = 0xE309, // Subtract (64) |
| 756 | SGF = 0xE319, // Subtract (64<-32) |
| 757 | SGFR = 0xB919, // Subtract (64<-32) |
| 758 | SGR = 0xB909, // Subtract (64) |
| 759 | SGRK = 0xB9E9, // Subtract (64) |
| 760 | SH = 0x4B, // Subtract Halfword |
| 761 | SHHHR = 0xB9C9, // Subtract High (32) |
| 762 | SHHLR = 0xB9D9, // Subtract High (32) |
| 763 | SHY = 0xE37B, // Subtract Halfword |
| 764 | SL = 0x5F, // Subtract Logical (32) |
| 765 | SLA = 0x8B, // Shift Left Single (32) |
| 766 | SLAG = 0xEB0B, // Shift Left Single (64) |
| 767 | SLAK = 0xEBDD, // Shift Left Single (32) |
| 768 | SLB = 0xE399, // Subtract Logical With Borrow (32) |
| 769 | SLBG = 0xE389, // Subtract Logical With Borrow (64) |
| 770 | SLBGR = 0xB989, // Subtract Logical With Borrow (64) |
| 771 | SLBR = 0xB999, // Subtract Logical With Borrow (32) |
| 772 | SLDA = 0x8F, // Shift Left Double |
| 773 | SLDL = 0x8D, // Shift Left Double Logical |
| 774 | SLDT = 0xED40, // Shift Significand Left (long DFP) |
| 775 | SLFI = 0xC25, // Subtract Logical Immediate (32) |
| 776 | SLG = 0xE30B, // Subtract Logical (64) |
| 777 | SLGF = 0xE31B, // Subtract Logical (64<-32) |
| 778 | SLGFI = 0xC24, // Subtract Logical Immediate (64<-32) |
| 779 | SLGFR = 0xB91B, // Subtract Logical (64<-32) |
| 780 | SLGR = 0xB90B, // Subtract Logical (64) |
| 781 | SLGRK = 0xB9EB, // Subtract Logical (64) |
| 782 | SLHHHR = 0xB9CB, // Subtract Logical High (32) |
| 783 | SLHHLR = 0xB9DB, // Subtract Logical High (32) |
| 784 | SLL = 0x89, // Shift Left Single Logical (32) |
| 785 | SLLG = 0xEB0D, // Shift Left Single Logical (64) |
| 786 | SLLK = 0xEBDF, // Shift Left Single Logical (32) |
| 787 | SLR = 0x1F, // Subtract Logical (32) |
| 788 | SLRK = 0xB9FB, // Subtract Logical (32) |
| 789 | SLXT = 0xED48, // Shift Significand Left (extended DFP) |
| 790 | SLY = 0xE35F, // Subtract Logical (32) |
| 791 | SP = 0xFB, // Subtract Decimal |
| 792 | SPM = 0x04, // Set Program Mask |
| 793 | SQDB = 0xED15, // Square Root (long BFP) |
| 794 | SQDBR = 0xB315, // Square Root (long BFP) |
| 795 | SQEB = 0xED14, // Square Root (short BFP) |
| 796 | SQEBR = 0xB314, // Square Root (short BFP) |
| 797 | SQXBR = 0xB316, // Square Root (extended BFP) |
| 798 | SR = 0x1B, // Subtract (32) |
| 799 | SRA = 0x8A, // Shift Right Single (32) |
| 800 | SRAG = 0xEB0A, // Shift Right Single (64) |
| 801 | SRAK = 0xEBDC, // Shift Right Single (32) |
| 802 | SRDA = 0x8E, // Shift Right Double |
| 803 | SRDL = 0x8C, // Shift Right Double Logical |
| 804 | SRDT = 0xED41, // Shift Significand Right (long DFP) |
| 805 | SRK = 0xB9F9, // Subtract (32) |
| 806 | SRL = 0x88, // Shift Right Single Logical (32) |
| 807 | SRLG = 0xEB0C, // Shift Right Single Logical (64) |
| 808 | SRLK = 0xEBDE, // Shift Right Single Logical (32) |
| 809 | SRNM = 0xB299, // Set BFP Rounding Mode (2 bit) |
| 810 | SRNMB = 0xB2B8, // Set BFP Rounding Mode (3 bit) |
| 811 | SRNMT = 0xB2B9, // Set DFP Rounding Mode |
| 812 | SRP = 0xF0, // Shift And Round Decimal |
| 813 | SRST = 0xB25E, // Search String |
| 814 | SRSTU = 0xB9BE, // Search String Unicode |
| 815 | SRXT = 0xED49, // Shift Significand Right (extended DFP) |
| 816 | SSCH = 0xB233, // Start Subchannel |
| 817 | ST = 0x50, // Store (32) |
| 818 | STC = 0x42, // Store Character |
| 819 | STCH = 0xE3C3, // Store Character High (8) |
| 820 | STCK = 0xB205, // Store Clock |
| 821 | STCKE = 0xB278, // Store Clock Extended |
| 822 | STCKF = 0xB27C, // Store Clock Fast |
| 823 | STCM = 0xBE, // Store Characters Under Mask (low) |
| 824 | STCMH = 0xEB2C, // Store Characters Under Mask (high) |
| 825 | STCMY = 0xEB2D, // Store Characters Under Mask (low) |
| 826 | STCPS = 0xB23A, // Store Channel Path Status |
| 827 | STCRW = 0xB239, // Store Channel Report Word |
| 828 | STCY = 0xE372, // Store Character |
| 829 | STD = 0x60, // Store (long) |
| 830 | STDY = 0xED67, // Store (long) |
| 831 | STE = 0x70, // Store (short) |
| 832 | STEY = 0xED66, // Store (short) |
| 833 | STFH = 0xE3CB, // Store High (32) |
| 834 | STFLE = 0xB2B0, // Store Facility List Extended |
| 835 | STFPC = 0xB29C, // Store Fpc |
| 836 | STG = 0xE324, // Store (64) |
| 837 | STGRL = 0xC4B, // Store Relative Long (64) |
| 838 | STH = 0x40, // Store Halfword |
| 839 | STHH = 0xE3C7, // Store Halfword High (16) |
| 840 | STHRL = 0xC47, // Store Halfword Relative Long |
| 841 | STHY = 0xE370, // Store Halfword |
| 842 | STM = 0x90, // Store Multiple (32) |
| 843 | STMG = 0xEB24, // Store Multiple (64) |
| 844 | STMH = 0xEB26, // Store Multiple High |
| 845 | STMY = 0xEB90, // Store Multiple (32) |
| 846 | STOC = 0xEBF3, // Store On Condition (32) |
| 847 | STOCG = 0xEBE3, // Store On Condition (64) |
| 848 | STPQ = 0xE38E, // Store Pair To Quadword |
| 849 | STRL = 0xC4F, // Store Relative Long (32) |
| 850 | STRV = 0xE33E, // Store Reversed (32) |
| 851 | STRVG = 0xE32F, // Store Reversed (64) |
| 852 | STRVH = 0xE33F, // Store Reversed (16) |
| 853 | STSCH = 0xB234, // Store Subchannel |
| 854 | STY = 0xE350, // Store (32) |
| 855 | SVC = 0x0A, // Supervisor Call |
| 856 | SXBR = 0xB34B, // Subtract (extended BFP) |
| 857 | SXTR = 0xB3DB, // Subtract (extended DFP) |
| 858 | SXTRA = 0xB3DB, // Subtract (extended DFP) |
| 859 | SY = 0xE35B, // Subtract (32) |
| 860 | TABORT = 0xB2FC, // Transaction Abort |
| 861 | TBDR = 0xB351, // Convert HFP To BFP (long) |
| 862 | TBEDR = 0xB350, // Convert HFP To BFP (long to short) |
| 863 | TBEGIN = 0xE560, // Transaction Begin |
| 864 | TBEGINC = 0xE561, // Transaction Begin |
| 865 | TCDB = 0xED11, // Test Data Class (long BFP) |
| 866 | TCEB = 0xED10, // Test Data Class (short BFP) |
| 867 | TCXB = 0xED12, // Test Data Class (extended BFP) |
| 868 | TDCDT = 0xED54, // Test Data Class (long DFP) |
| 869 | TDCET = 0xED50, // Test Data Class (short DFP) |
| 870 | TDCXT = 0xED58, // Test Data Class (extended DFP) |
| 871 | TDGDT = 0xED55, // Test Data Group (long DFP) |
| 872 | TDGET = 0xED51, // Test Data Group (short DFP) |
| 873 | TDGXT = 0xED59, // Test Data Group (extended DFP) |
| 874 | TEND = 0xB2F8, // Transaction End |
| 875 | THDER = 0xB358, // Convert BFP To HFP (short to long) |
| 876 | THDR = 0xB359, // Convert BFP To HFP (long) |
| 877 | TM = 0x91, // Test Under Mask Si C A B1 |
| 878 | TMH = 0xA70, // Test Under Mask High |
| 879 | TMHH = 0xA72, // Test Under Mask (high high) |
| 880 | TMHL = 0xA73, // Test Under Mask (high low) |
| 881 | TML = 0xA71, // Test Under Mask Low |
| 882 | TMLH = 0xA70, // Test Under Mask (low high) |
| 883 | TMLL = 0xA71, // Test Under Mask (low low) |
| 884 | TMY = 0xEB51, // Test Under Mask |
| 885 | TP = 0xEBC0, // Test Decimal |
| 886 | TPI = 0xB236, // Test Pending Interruption |
| 887 | TR = 0xDC, // Translate |
| 888 | TRAP4 = 0xB2FF, // Trap (4) |
| 889 | TRE = 0xB2A5, // Translate Extended |
| 890 | TROO = 0xB993, // Translate One To One |
| 891 | TROT = 0xB992, // Translate One To Two |
| 892 | TRT = 0xDD, // Translate And Test |
| 893 | TRTE = 0xB9BF, // Translate And Test Extended |
| 894 | TRTO = 0xB991, // Translate Two To One |
| 895 | TRTR = 0xD0, // Translate And Test Reverse |
| 896 | TRTRE = 0xB9BD, // Translate And Test Reverse Extended |
| 897 | TRTT = 0xB990, // Translate Two To Two |
| 898 | TS = 0x93, // Test And Set |
| 899 | TSCH = 0xB235, // Test Subchannel |
| 900 | UNPK = 0xF3, // Unpack |
| 901 | UNPKA = 0xEA, // Unpack Ascii |
| 902 | UNPKU = 0xE2, // Unpack Unicode |
| 903 | UPT = 0x0102, // Update Tree |
| 904 | X = 0x57, // Exclusive Or (32) |
| 905 | XC = 0xD7, // Exclusive Or (character) |
| 906 | XG = 0xE382, // Exclusive Or (64) |
| 907 | XGR = 0xB982, // Exclusive Or (64) |
| 908 | XGRK = 0xB9E7, // Exclusive Or (64) |
| 909 | XI = 0x97, // Exclusive Or (immediate) |
| 910 | XIHF = 0xC06, // Exclusive Or Immediate (high) |
| 911 | XILF = 0xC07, // Exclusive Or Immediate (low) |
| 912 | XIY = 0xEB57, // Exclusive Or (immediate) |
| 913 | XR = 0x17, // Exclusive Or (32) |
| 914 | XRK = 0xB9F7, // Exclusive Or (32) |
| 915 | XSCH = 0xB276, // Cancel Subchannel |
| 916 | XY = 0xE357, // Exclusive Or (32) |
| 917 | ZAP = 0xF8, // Zero And Add |
| 918 | BKPT = 0x0001 // GDB Software Breakpoint |
| 919 | }; |
| 920 | |
| 921 | // Instruction encoding bits and masks. |
| 922 | enum { |
| 923 | // Instruction encoding bit |
| 924 | B1 = 1 << 1, |
| 925 | B4 = 1 << 4, |
| 926 | B5 = 1 << 5, |
| 927 | B7 = 1 << 7, |
| 928 | B8 = 1 << 8, |
| 929 | B9 = 1 << 9, |
| 930 | B12 = 1 << 12, |
| 931 | B18 = 1 << 18, |
| 932 | B19 = 1 << 19, |
| 933 | B20 = 1 << 20, |
| 934 | B22 = 1 << 22, |
| 935 | B23 = 1 << 23, |
| 936 | B24 = 1 << 24, |
| 937 | B25 = 1 << 25, |
| 938 | B26 = 1 << 26, |
| 939 | B27 = 1 << 27, |
| 940 | B28 = 1 << 28, |
| 941 | |
| 942 | B6 = 1 << 6, |
| 943 | B10 = 1 << 10, |
| 944 | B11 = 1 << 11, |
| 945 | B16 = 1 << 16, |
| 946 | B17 = 1 << 17, |
| 947 | B21 = 1 << 21, |
| 948 | |
| 949 | // Instruction bit masks |
| 950 | kCondMask = 0x1F << 21, |
| 951 | kOff12Mask = (1 << 12) - 1, |
| 952 | kImm24Mask = (1 << 24) - 1, |
| 953 | kOff16Mask = (1 << 16) - 1, |
| 954 | kImm16Mask = (1 << 16) - 1, |
| 955 | kImm26Mask = (1 << 26) - 1, |
| 956 | kBOfieldMask = 0x1f << 21, |
| 957 | kOpcodeMask = 0x3f << 26, |
| 958 | kExt2OpcodeMask = 0x1f << 1, |
| 959 | kExt5OpcodeMask = 0x3 << 2, |
| 960 | kBIMask = 0x1F << 16, |
| 961 | kBDMask = 0x14 << 2, |
| 962 | kAAMask = 0x01 << 1, |
| 963 | kLKMask = 0x01, |
| 964 | kRCMask = 0x01, |
| 965 | kTOMask = 0x1f << 21 |
| 966 | }; |
| 967 | |
| 968 | // S390 instructions requires bigger shifts, |
| 969 | // make them macros instead of enum because of the typing issue |
| 970 | #define B32 ((uint64_t)1 << 32) |
| 971 | #define B36 ((uint64_t)1 << 36) |
| 972 | #define B40 ((uint64_t)1 << 40) |
| 973 | const FourByteInstr kFourByteBrCondMask = 0xF << 20; |
| 974 | const SixByteInstr kSixByteBrCondMask = static_cast<SixByteInstr>(0xF) << 36; |
| 975 | |
| 976 | // ----------------------------------------------------------------------------- |
| 977 | // Addressing modes and instruction variants. |
| 978 | |
| 979 | // Overflow Exception |
| 980 | enum OEBit { |
| 981 | SetOE = 1 << 10, // Set overflow exception |
| 982 | LeaveOE = 0 << 10 // No overflow exception |
| 983 | }; |
| 984 | |
| 985 | // Record bit |
| 986 | enum RCBit { // Bit 0 |
| 987 | SetRC = 1, // LT,GT,EQ,SO |
| 988 | LeaveRC = 0 // None |
| 989 | }; |
| 990 | |
| 991 | // Link bit |
| 992 | enum LKBit { // Bit 0 |
| 993 | SetLK = 1, // Load effective address of next instruction |
| 994 | LeaveLK = 0 // No action |
| 995 | }; |
| 996 | |
| 997 | enum BOfield { // Bits 25-21 |
| 998 | DCBNZF = 0 << 21, // Decrement CTR; branch if CTR != 0 and condition false |
| 999 | DCBEZF = 2 << 21, // Decrement CTR; branch if CTR == 0 and condition false |
| 1000 | BF = 4 << 21, // Branch if condition false |
| 1001 | DCBNZT = 8 << 21, // Decrement CTR; branch if CTR != 0 and condition true |
| 1002 | DCBEZT = 10 << 21, // Decrement CTR; branch if CTR == 0 and condition true |
| 1003 | BT = 12 << 21, // Branch if condition true |
| 1004 | DCBNZ = 16 << 21, // Decrement CTR; branch if CTR != 0 |
| 1005 | DCBEZ = 18 << 21, // Decrement CTR; branch if CTR == 0 |
| 1006 | BA = 20 << 21 // Branch always |
| 1007 | }; |
| 1008 | |
| 1009 | #ifdef _AIX |
| 1010 | #undef CR_LT |
| 1011 | #undef CR_GT |
| 1012 | #undef CR_EQ |
| 1013 | #undef CR_SO |
| 1014 | #endif |
| 1015 | |
| 1016 | enum CRBit { CR_LT = 0, CR_GT = 1, CR_EQ = 2, CR_SO = 3, CR_FU = 3 }; |
| 1017 | |
| 1018 | #define CRWIDTH 4 |
| 1019 | |
| 1020 | // ----------------------------------------------------------------------------- |
| 1021 | // Supervisor Call (svc) specific support. |
| 1022 | |
| 1023 | // Special Software Interrupt codes when used in the presence of the S390 |
| 1024 | // simulator. |
| 1025 | // SVC provides a 24bit immediate value. Use bits 22:0 for standard |
| 1026 | // SoftwareInterrupCode. Bit 23 is reserved for the stop feature. |
| 1027 | enum SoftwareInterruptCodes { |
| 1028 | // Transition to C code |
| 1029 | kCallRtRedirected = 0x0010, |
| 1030 | // Breakpoint |
| 1031 | kBreakpoint = 0x0000, |
| 1032 | // Stop |
| 1033 | kStopCode = 1 << 23 |
| 1034 | }; |
| 1035 | const uint32_t kStopCodeMask = kStopCode - 1; |
| 1036 | const uint32_t kMaxStopCode = kStopCode - 1; |
| 1037 | const int32_t kDefaultStopCode = -1; |
| 1038 | |
| 1039 | // FP rounding modes. |
| 1040 | enum FPRoundingMode { |
| 1041 | RN = 0, // Round to Nearest. |
| 1042 | RZ = 1, // Round towards zero. |
| 1043 | RP = 2, // Round towards Plus Infinity. |
| 1044 | RM = 3, // Round towards Minus Infinity. |
| 1045 | |
| 1046 | // Aliases. |
| 1047 | kRoundToNearest = RN, |
| 1048 | kRoundToZero = RZ, |
| 1049 | kRoundToPlusInf = RP, |
| 1050 | kRoundToMinusInf = RM |
| 1051 | }; |
| 1052 | |
| 1053 | const uint32_t kFPRoundingModeMask = 3; |
| 1054 | |
| 1055 | enum CheckForInexactConversion { |
| 1056 | kCheckForInexactConversion, |
| 1057 | kDontCheckForInexactConversion |
| 1058 | }; |
| 1059 | |
| 1060 | // ----------------------------------------------------------------------------- |
| 1061 | // Specific instructions, constants, and masks. |
| 1062 | |
| 1063 | // use TRAP4 to indicate redirection call for simulation mode |
| 1064 | const Instr rtCallRedirInstr = TRAP4; |
| 1065 | |
| 1066 | // ----------------------------------------------------------------------------- |
| 1067 | // Instruction abstraction. |
| 1068 | |
| 1069 | // The class Instruction enables access to individual fields defined in the |
| 1070 | // z/Architecture instruction set encoding. |
| 1071 | class Instruction { |
| 1072 | public: |
| 1073 | // S390 Opcode Format Types |
| 1074 | // Based on the first byte of the opcode, we can determine how to extract |
| 1075 | // the entire opcode of the instruction. The various favours include: |
| 1076 | enum OpcodeFormatType { |
| 1077 | ONE_BYTE_OPCODE, // One Byte - Bits 0 to 7 |
| 1078 | TWO_BYTE_OPCODE, // Two Bytes - Bits 0 to 15 |
| 1079 | TWO_BYTE_DISJOINT_OPCODE, // Two Bytes - Bits 0 to 7, 40 to 47 |
| 1080 | THREE_NIBBLE_OPCODE // Three Nibbles - Bits 0 to 7, 12 to 15 |
| 1081 | }; |
| 1082 | |
Ben Murdoch | c561043 | 2016-08-08 18:44:38 +0100 | [diff] [blame^] | 1083 | static OpcodeFormatType OpcodeFormatTable[256]; |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1084 | // Helper macro to define static accessors. |
| 1085 | // We use the cast to char* trick to bypass the strict anti-aliasing rules. |
| 1086 | #define DECLARE_STATIC_TYPED_ACCESSOR(return_type, Name) \ |
| 1087 | static inline return_type Name(Instr instr) { \ |
| 1088 | char* temp = reinterpret_cast<char*>(&instr); \ |
| 1089 | return reinterpret_cast<Instruction*>(temp)->Name(); \ |
| 1090 | } |
| 1091 | |
| 1092 | #define DECLARE_STATIC_ACCESSOR(Name) DECLARE_STATIC_TYPED_ACCESSOR(int, Name) |
| 1093 | |
| 1094 | // Get the raw instruction bits. |
| 1095 | template <typename T> |
| 1096 | inline T InstructionBits() const { |
| 1097 | return Instruction::InstructionBits<T>(reinterpret_cast<const byte*>(this)); |
| 1098 | } |
| 1099 | inline Instr InstructionBits() const { |
| 1100 | return *reinterpret_cast<const Instr*>(this); |
| 1101 | } |
| 1102 | |
| 1103 | // Set the raw instruction bits to value. |
| 1104 | template <typename T> |
| 1105 | inline void SetInstructionBits(T value) const { |
| 1106 | Instruction::SetInstructionBits<T>(reinterpret_cast<const byte*>(this), |
| 1107 | value); |
| 1108 | } |
| 1109 | inline void SetInstructionBits(Instr value) { |
| 1110 | *reinterpret_cast<Instr*>(this) = value; |
| 1111 | } |
| 1112 | |
| 1113 | // Read one particular bit out of the instruction bits. |
| 1114 | inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } |
| 1115 | |
| 1116 | // Read a bit field's value out of the instruction bits. |
| 1117 | inline int Bits(int hi, int lo) const { |
| 1118 | return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); |
| 1119 | } |
| 1120 | |
| 1121 | // Read bits according to instruction type |
| 1122 | template <typename T, typename U> |
| 1123 | inline U Bits(int hi, int lo) const { |
| 1124 | return (InstructionBits<T>() >> lo) & ((2 << (hi - lo)) - 1); |
| 1125 | } |
| 1126 | |
| 1127 | // Read a bit field out of the instruction bits. |
| 1128 | inline int BitField(int hi, int lo) const { |
| 1129 | return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); |
| 1130 | } |
| 1131 | |
| 1132 | // Determine the instruction length |
| 1133 | inline int InstructionLength() { |
| 1134 | return Instruction::InstructionLength(reinterpret_cast<const byte*>(this)); |
| 1135 | } |
| 1136 | // Extract the Instruction Opcode |
| 1137 | inline Opcode S390OpcodeValue() { |
| 1138 | return Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(this)); |
| 1139 | } |
| 1140 | |
| 1141 | // Static support. |
| 1142 | |
| 1143 | // Read one particular bit out of the instruction bits. |
| 1144 | static inline int Bit(Instr instr, int nr) { return (instr >> nr) & 1; } |
| 1145 | |
| 1146 | // Read the value of a bit field out of the instruction bits. |
| 1147 | static inline int Bits(Instr instr, int hi, int lo) { |
| 1148 | return (instr >> lo) & ((2 << (hi - lo)) - 1); |
| 1149 | } |
| 1150 | |
| 1151 | // Read a bit field out of the instruction bits. |
| 1152 | static inline int BitField(Instr instr, int hi, int lo) { |
| 1153 | return instr & (((2 << (hi - lo)) - 1) << lo); |
| 1154 | } |
| 1155 | |
| 1156 | // Determine the instruction length of the given instruction |
| 1157 | static inline int InstructionLength(const byte* instr) { |
| 1158 | // Length can be determined by the first nibble. |
| 1159 | // 0x0 to 0x3 => 2-bytes |
| 1160 | // 0x4 to 0xB => 4-bytes |
| 1161 | // 0xC to 0xF => 6-bytes |
| 1162 | byte topNibble = (*instr >> 4) & 0xF; |
| 1163 | if (topNibble <= 3) |
| 1164 | return 2; |
| 1165 | else if (topNibble <= 0xB) |
| 1166 | return 4; |
| 1167 | return 6; |
| 1168 | } |
| 1169 | |
| 1170 | // Returns the instruction bits of the given instruction |
| 1171 | static inline uint64_t InstructionBits(const byte* instr) { |
| 1172 | int length = InstructionLength(instr); |
| 1173 | if (2 == length) |
| 1174 | return static_cast<uint64_t>(InstructionBits<TwoByteInstr>(instr)); |
| 1175 | else if (4 == length) |
| 1176 | return static_cast<uint64_t>(InstructionBits<FourByteInstr>(instr)); |
| 1177 | else |
| 1178 | return InstructionBits<SixByteInstr>(instr); |
| 1179 | } |
| 1180 | |
| 1181 | // Extract the raw instruction bits |
| 1182 | template <typename T> |
| 1183 | static inline T InstructionBits(const byte* instr) { |
| 1184 | #if !V8_TARGET_LITTLE_ENDIAN |
| 1185 | if (sizeof(T) <= 4) { |
| 1186 | return *reinterpret_cast<const T*>(instr); |
| 1187 | } else { |
| 1188 | // We cannot read 8-byte instructon address directly, because for a |
| 1189 | // six-byte instruction, the extra 2-byte address might not be |
| 1190 | // allocated. |
| 1191 | uint64_t fourBytes = *reinterpret_cast<const uint32_t*>(instr); |
| 1192 | uint16_t twoBytes = *reinterpret_cast<const uint16_t*>(instr + 4); |
| 1193 | return (fourBytes << 16 | twoBytes); |
| 1194 | } |
| 1195 | #else |
| 1196 | // Even on little endian hosts (simulation), the instructions |
| 1197 | // are stored as big-endian in order to decode the opcode and |
| 1198 | // instruction length. |
| 1199 | T instr_bits = 0; |
| 1200 | |
| 1201 | // 6-byte instrs are represented by uint64_t |
| 1202 | uint32_t size = (sizeof(T) == 8) ? 6 : sizeof(T); |
| 1203 | |
| 1204 | for (T i = 0; i < size; i++) { |
| 1205 | instr_bits <<= 8; |
| 1206 | instr_bits |= *(instr + i); |
| 1207 | } |
| 1208 | return instr_bits; |
| 1209 | #endif |
| 1210 | } |
| 1211 | |
| 1212 | // Set the Instruction Bits to value |
| 1213 | template <typename T> |
| 1214 | static inline void SetInstructionBits(byte* instr, T value) { |
| 1215 | #if V8_TARGET_LITTLE_ENDIAN |
| 1216 | // The instruction bits are stored in big endian format even on little |
| 1217 | // endian hosts, in order to decode instruction length and opcode. |
| 1218 | // The following code will reverse the bytes so that the stores later |
| 1219 | // (which are in native endianess) will effectively save the instruction |
| 1220 | // in big endian. |
| 1221 | if (sizeof(T) == 2) { |
| 1222 | // Two Byte Instruction |
| 1223 | value = ((value & 0x00FF) << 8) | ((value & 0xFF00) >> 8); |
| 1224 | } else if (sizeof(T) == 4) { |
| 1225 | // Four Byte Instruction |
| 1226 | value = ((value & 0x000000FF) << 24) | ((value & 0x0000FF00) << 8) | |
| 1227 | ((value & 0x00FF0000) >> 8) | ((value & 0xFF000000) >> 24); |
| 1228 | } else if (sizeof(T) == 8) { |
| 1229 | // Six Byte Instruction |
| 1230 | uint64_t orig_value = static_cast<uint64_t>(value); |
| 1231 | value = (static_cast<uint64_t>(orig_value & 0xFF) << 40) | |
| 1232 | (static_cast<uint64_t>((orig_value >> 8) & 0xFF) << 32) | |
| 1233 | (static_cast<uint64_t>((orig_value >> 16) & 0xFF) << 24) | |
| 1234 | (static_cast<uint64_t>((orig_value >> 24) & 0xFF) << 16) | |
| 1235 | (static_cast<uint64_t>((orig_value >> 32) & 0xFF) << 8) | |
| 1236 | (static_cast<uint64_t>((orig_value >> 40) & 0xFF)); |
| 1237 | } |
| 1238 | #endif |
| 1239 | if (sizeof(T) <= 4) { |
| 1240 | *reinterpret_cast<T*>(instr) = value; |
| 1241 | } else { |
| 1242 | #if V8_TARGET_LITTLE_ENDIAN |
| 1243 | uint64_t orig_value = static_cast<uint64_t>(value); |
| 1244 | *reinterpret_cast<uint32_t*>(instr) = static_cast<uint32_t>(value); |
| 1245 | *reinterpret_cast<uint16_t*>(instr + 4) = |
| 1246 | static_cast<uint16_t>((orig_value >> 32) & 0xFFFF); |
| 1247 | #else |
| 1248 | *reinterpret_cast<uint32_t*>(instr) = static_cast<uint32_t>(value >> 16); |
| 1249 | *reinterpret_cast<uint16_t*>(instr + 4) = |
| 1250 | static_cast<uint16_t>(value & 0xFFFF); |
| 1251 | #endif |
| 1252 | } |
| 1253 | } |
| 1254 | |
| 1255 | // Get Instruction Format Type |
| 1256 | static OpcodeFormatType getOpcodeFormatType(const byte* instr) { |
| 1257 | const byte firstByte = *instr; |
Ben Murdoch | c561043 | 2016-08-08 18:44:38 +0100 | [diff] [blame^] | 1258 | return OpcodeFormatTable[firstByte]; |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1259 | } |
| 1260 | |
| 1261 | // Extract the full opcode from the instruction. |
| 1262 | static inline Opcode S390OpcodeValue(const byte* instr) { |
| 1263 | OpcodeFormatType opcodeType = getOpcodeFormatType(instr); |
| 1264 | |
| 1265 | // The native instructions are encoded in big-endian format |
| 1266 | // even if running on little-endian host. Hence, we need |
| 1267 | // to ensure we use byte* based bit-wise logic. |
| 1268 | switch (opcodeType) { |
| 1269 | case ONE_BYTE_OPCODE: |
| 1270 | // One Byte - Bits 0 to 7 |
| 1271 | return static_cast<Opcode>(*instr); |
| 1272 | case TWO_BYTE_OPCODE: |
| 1273 | // Two Bytes - Bits 0 to 15 |
| 1274 | return static_cast<Opcode>((*instr << 8) | (*(instr + 1))); |
| 1275 | case TWO_BYTE_DISJOINT_OPCODE: |
| 1276 | // Two Bytes - Bits 0 to 7, 40 to 47 |
| 1277 | return static_cast<Opcode>((*instr << 8) | (*(instr + 5) & 0xFF)); |
Ben Murdoch | c561043 | 2016-08-08 18:44:38 +0100 | [diff] [blame^] | 1278 | default: |
| 1279 | // case THREE_NIBBLE_OPCODE: |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1280 | // Three Nibbles - Bits 0 to 7, 12 to 15 |
| 1281 | return static_cast<Opcode>((*instr << 4) | (*(instr + 1) & 0xF)); |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1282 | } |
| 1283 | |
| 1284 | UNREACHABLE(); |
| 1285 | return static_cast<Opcode>(-1); |
| 1286 | } |
| 1287 | |
| 1288 | // Fields used in Software interrupt instructions |
| 1289 | inline SoftwareInterruptCodes SvcValue() const { |
| 1290 | return static_cast<SoftwareInterruptCodes>(Bits<FourByteInstr, int>(15, 0)); |
| 1291 | } |
| 1292 | |
| 1293 | // Instructions are read of out a code stream. The only way to get a |
| 1294 | // reference to an instruction is to convert a pointer. There is no way |
| 1295 | // to allocate or create instances of class Instruction. |
| 1296 | // Use the At(pc) function to create references to Instruction. |
| 1297 | static Instruction* At(byte* pc) { |
| 1298 | return reinterpret_cast<Instruction*>(pc); |
| 1299 | } |
| 1300 | |
| 1301 | private: |
| 1302 | // We need to prevent the creation of instances of class Instruction. |
| 1303 | DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction); |
| 1304 | }; |
| 1305 | |
| 1306 | // I Instruction -- suspect this will not be used, |
| 1307 | // but implement for completeness |
| 1308 | class IInstruction : Instruction { |
| 1309 | public: |
| 1310 | inline int IValue() const { return Bits<TwoByteInstr, int>(7, 0); } |
| 1311 | |
| 1312 | inline int size() const { return 2; } |
| 1313 | }; |
| 1314 | |
| 1315 | // RR Instruction |
| 1316 | class RRInstruction : Instruction { |
| 1317 | public: |
| 1318 | inline int R1Value() const { |
| 1319 | // the high and low parameters of Bits is the number of bits from |
| 1320 | // rightmost place |
| 1321 | return Bits<TwoByteInstr, int>(7, 4); |
| 1322 | } |
| 1323 | inline int R2Value() const { return Bits<TwoByteInstr, int>(3, 0); } |
| 1324 | inline Condition M1Value() const { |
| 1325 | return static_cast<Condition>(Bits<TwoByteInstr, int>(7, 4)); |
| 1326 | } |
| 1327 | |
| 1328 | inline int size() const { return 2; } |
| 1329 | }; |
| 1330 | |
| 1331 | // RRE Instruction |
| 1332 | class RREInstruction : Instruction { |
| 1333 | public: |
| 1334 | inline int R1Value() const { return Bits<FourByteInstr, int>(7, 4); } |
| 1335 | inline int R2Value() const { return Bits<FourByteInstr, int>(3, 0); } |
| 1336 | inline int M3Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1337 | inline int M4Value() const { return Bits<FourByteInstr, int>(19, 16); } |
| 1338 | inline int size() const { return 4; } |
| 1339 | }; |
| 1340 | |
| 1341 | // RRF Instruction |
| 1342 | class RRFInstruction : Instruction { |
| 1343 | public: |
| 1344 | inline int R1Value() const { return Bits<FourByteInstr, int>(7, 4); } |
| 1345 | inline int R2Value() const { return Bits<FourByteInstr, int>(3, 0); } |
| 1346 | inline int R3Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1347 | inline int M3Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1348 | inline int M4Value() const { return Bits<FourByteInstr, int>(11, 8); } |
| 1349 | inline int size() const { return 4; } |
| 1350 | }; |
| 1351 | |
| 1352 | // RRD Isntruction |
| 1353 | class RRDInstruction : Instruction { |
| 1354 | public: |
| 1355 | inline int R1Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1356 | inline int R2Value() const { return Bits<FourByteInstr, int>(3, 0); } |
| 1357 | inline int R3Value() const { return Bits<FourByteInstr, int>(7, 4); } |
| 1358 | inline int size() const { return 4; } |
| 1359 | }; |
| 1360 | |
| 1361 | // RI Instruction |
| 1362 | class RIInstruction : Instruction { |
| 1363 | public: |
| 1364 | inline int R1Value() const { return Bits<FourByteInstr, int>(23, 20); } |
| 1365 | inline int16_t I2Value() const { return Bits<FourByteInstr, int16_t>(15, 0); } |
| 1366 | inline uint16_t I2UnsignedValue() const { |
| 1367 | return Bits<FourByteInstr, uint16_t>(15, 0); |
| 1368 | } |
| 1369 | inline Condition M1Value() const { |
| 1370 | return static_cast<Condition>(Bits<FourByteInstr, int>(23, 20)); |
| 1371 | } |
| 1372 | inline int size() const { return 4; } |
| 1373 | }; |
| 1374 | |
| 1375 | // RS Instruction |
| 1376 | class RSInstruction : Instruction { |
| 1377 | public: |
| 1378 | inline int R1Value() const { return Bits<FourByteInstr, int>(23, 20); } |
| 1379 | inline int R3Value() const { return Bits<FourByteInstr, int>(19, 16); } |
| 1380 | inline int B2Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1381 | inline unsigned int D2Value() const { |
| 1382 | return Bits<FourByteInstr, unsigned int>(11, 0); |
| 1383 | } |
| 1384 | inline int size() const { return 4; } |
| 1385 | }; |
| 1386 | |
| 1387 | // RSY Instruction |
| 1388 | class RSYInstruction : Instruction { |
| 1389 | public: |
| 1390 | inline int R1Value() const { return Bits<SixByteInstr, int>(39, 36); } |
| 1391 | inline int R3Value() const { return Bits<SixByteInstr, int>(35, 32); } |
| 1392 | inline int B2Value() const { return Bits<SixByteInstr, int>(31, 28); } |
| 1393 | inline int32_t D2Value() const { |
| 1394 | int32_t value = Bits<SixByteInstr, int32_t>(27, 16); |
| 1395 | value += Bits<SixByteInstr, int8_t>(15, 8) << 12; |
| 1396 | return value; |
| 1397 | } |
| 1398 | inline int size() const { return 6; } |
| 1399 | }; |
| 1400 | |
| 1401 | // RX Instruction |
| 1402 | class RXInstruction : Instruction { |
| 1403 | public: |
| 1404 | inline int R1Value() const { return Bits<FourByteInstr, int>(23, 20); } |
| 1405 | inline int X2Value() const { return Bits<FourByteInstr, int>(19, 16); } |
| 1406 | inline int B2Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1407 | inline uint32_t D2Value() const { |
| 1408 | return Bits<FourByteInstr, uint32_t>(11, 0); |
| 1409 | } |
| 1410 | inline int size() const { return 4; } |
| 1411 | }; |
| 1412 | |
| 1413 | // RXY Instruction |
| 1414 | class RXYInstruction : Instruction { |
| 1415 | public: |
| 1416 | inline int R1Value() const { return Bits<SixByteInstr, int>(39, 36); } |
| 1417 | inline int X2Value() const { return Bits<SixByteInstr, int>(35, 32); } |
| 1418 | inline int B2Value() const { return Bits<SixByteInstr, int>(31, 28); } |
| 1419 | inline int32_t D2Value() const { |
| 1420 | int32_t value = Bits<SixByteInstr, uint32_t>(27, 16); |
| 1421 | value += Bits<SixByteInstr, int8_t>(15, 8) << 12; |
| 1422 | return value; |
| 1423 | } |
| 1424 | inline int size() const { return 6; } |
| 1425 | }; |
| 1426 | |
| 1427 | // RIL Instruction |
| 1428 | class RILInstruction : Instruction { |
| 1429 | public: |
| 1430 | inline int R1Value() const { return Bits<SixByteInstr, int>(39, 36); } |
| 1431 | inline int32_t I2Value() const { return Bits<SixByteInstr, int32_t>(31, 0); } |
| 1432 | inline uint32_t I2UnsignedValue() const { |
| 1433 | return Bits<SixByteInstr, uint32_t>(31, 0); |
| 1434 | } |
| 1435 | inline int size() const { return 6; } |
| 1436 | }; |
| 1437 | |
| 1438 | // SI Instruction |
| 1439 | class SIInstruction : Instruction { |
| 1440 | public: |
| 1441 | inline int B1Value() const { return Bits<FourByteInstr, int>(15, 12); } |
| 1442 | inline uint32_t D1Value() const { |
| 1443 | return Bits<FourByteInstr, uint32_t>(11, 0); |
| 1444 | } |
| 1445 | inline uint8_t I2Value() const { |
| 1446 | return Bits<FourByteInstr, uint8_t>(23, 16); |
| 1447 | } |
| 1448 | inline int size() const { return 4; } |
| 1449 | }; |
| 1450 | |
| 1451 | // SIY Instruction |
| 1452 | class SIYInstruction : Instruction { |
| 1453 | public: |
| 1454 | inline int B1Value() const { return Bits<SixByteInstr, int>(31, 28); } |
| 1455 | inline int32_t D1Value() const { |
| 1456 | int32_t value = Bits<SixByteInstr, uint32_t>(27, 16); |
| 1457 | value += Bits<SixByteInstr, int8_t>(15, 8) << 12; |
| 1458 | return value; |
| 1459 | } |
| 1460 | inline uint8_t I2Value() const { return Bits<SixByteInstr, uint8_t>(39, 32); } |
| 1461 | inline int size() const { return 6; } |
| 1462 | }; |
| 1463 | |
| 1464 | // SIL Instruction |
| 1465 | class SILInstruction : Instruction { |
| 1466 | public: |
| 1467 | inline int B1Value() const { return Bits<SixByteInstr, int>(31, 28); } |
| 1468 | inline int D1Value() const { return Bits<SixByteInstr, int>(27, 16); } |
| 1469 | inline int I2Value() const { return Bits<SixByteInstr, int>(15, 0); } |
| 1470 | inline int size() const { return 6; } |
| 1471 | }; |
| 1472 | |
| 1473 | // SS Instruction |
| 1474 | class SSInstruction : Instruction { |
| 1475 | public: |
| 1476 | inline int B1Value() const { return Bits<SixByteInstr, int>(31, 28); } |
| 1477 | inline int B2Value() const { return Bits<SixByteInstr, int>(15, 12); } |
| 1478 | inline int D1Value() const { return Bits<SixByteInstr, int>(27, 16); } |
| 1479 | inline int D2Value() const { return Bits<SixByteInstr, int>(11, 0); } |
| 1480 | inline int Length() const { return Bits<SixByteInstr, int>(39, 32); } |
| 1481 | inline int size() const { return 6; } |
| 1482 | }; |
| 1483 | |
| 1484 | // RXE Instruction |
| 1485 | class RXEInstruction : Instruction { |
| 1486 | public: |
| 1487 | inline int R1Value() const { return Bits<SixByteInstr, int>(39, 36); } |
| 1488 | inline int X2Value() const { return Bits<SixByteInstr, int>(35, 32); } |
| 1489 | inline int B2Value() const { return Bits<SixByteInstr, int>(31, 28); } |
| 1490 | inline int D2Value() const { return Bits<SixByteInstr, int>(27, 16); } |
| 1491 | inline int size() const { return 6; } |
| 1492 | }; |
| 1493 | |
| 1494 | // RIE Instruction |
| 1495 | class RIEInstruction : Instruction { |
| 1496 | public: |
| 1497 | inline int R1Value() const { return Bits<SixByteInstr, int>(39, 36); } |
| 1498 | inline int R2Value() const { return Bits<SixByteInstr, int>(35, 32); } |
| 1499 | inline int I3Value() const { return Bits<SixByteInstr, uint32_t>(31, 24); } |
| 1500 | inline int I4Value() const { return Bits<SixByteInstr, uint32_t>(23, 16); } |
| 1501 | inline int I5Value() const { return Bits<SixByteInstr, uint32_t>(15, 8); } |
| 1502 | inline int I6Value() const { |
| 1503 | return static_cast<int32_t>(Bits<SixByteInstr, int16_t>(31, 16)); |
| 1504 | } |
| 1505 | inline int size() const { return 6; } |
| 1506 | }; |
| 1507 | |
| 1508 | // Helper functions for converting between register numbers and names. |
| 1509 | class Registers { |
| 1510 | public: |
| 1511 | // Lookup the register number for the name provided. |
| 1512 | static int Number(const char* name); |
| 1513 | |
| 1514 | private: |
| 1515 | static const char* names_[kNumRegisters]; |
| 1516 | }; |
| 1517 | |
| 1518 | // Helper functions for converting between FP register numbers and names. |
| 1519 | class DoubleRegisters { |
| 1520 | public: |
| 1521 | // Lookup the register number for the name provided. |
| 1522 | static int Number(const char* name); |
| 1523 | |
| 1524 | private: |
| 1525 | static const char* names_[kNumDoubleRegisters]; |
| 1526 | }; |
| 1527 | |
| 1528 | } // namespace internal |
| 1529 | } // namespace v8 |
| 1530 | |
| 1531 | #endif // V8_S390_CONSTANTS_S390_H_ |