Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 1 | /*===---- avx2intrin.h - AVX2 intrinsics -----------------------------------=== |
| 2 | * |
| 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 4 | * of this software and associated documentation files (the "Software"), to deal |
| 5 | * in the Software without restriction, including without limitation the rights |
| 6 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 7 | * copies of the Software, and to permit persons to whom the Software is |
| 8 | * furnished to do so, subject to the following conditions: |
| 9 | * |
| 10 | * The above copyright notice and this permission notice shall be included in |
| 11 | * all copies or substantial portions of the Software. |
| 12 | * |
| 13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 16 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 17 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 18 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 19 | * THE SOFTWARE. |
| 20 | * |
| 21 | *===-----------------------------------------------------------------------=== |
| 22 | */ |
| 23 | |
| 24 | #ifndef __IMMINTRIN_H |
| 25 | #error "Never use <avx2intrin.h> directly; include <immintrin.h> instead." |
| 26 | #endif |
| 27 | |
| 28 | #ifndef __AVX2INTRIN_H |
| 29 | #define __AVX2INTRIN_H |
| 30 | |
| 31 | /* Define the default attributes for the functions in this file. */ |
| 32 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx2"))) |
| 33 | |
| 34 | /* SSE4 Multiple Packed Sums of Absolute Difference. */ |
| 35 | #define _mm256_mpsadbw_epu8(X, Y, M) __builtin_ia32_mpsadbw256((X), (Y), (M)) |
| 36 | |
| 37 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 38 | _mm256_abs_epi8(__m256i __a) |
| 39 | { |
| 40 | return (__m256i)__builtin_ia32_pabsb256((__v32qi)__a); |
| 41 | } |
| 42 | |
| 43 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 44 | _mm256_abs_epi16(__m256i __a) |
| 45 | { |
| 46 | return (__m256i)__builtin_ia32_pabsw256((__v16hi)__a); |
| 47 | } |
| 48 | |
| 49 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 50 | _mm256_abs_epi32(__m256i __a) |
| 51 | { |
| 52 | return (__m256i)__builtin_ia32_pabsd256((__v8si)__a); |
| 53 | } |
| 54 | |
| 55 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 56 | _mm256_packs_epi16(__m256i __a, __m256i __b) |
| 57 | { |
| 58 | return (__m256i)__builtin_ia32_packsswb256((__v16hi)__a, (__v16hi)__b); |
| 59 | } |
| 60 | |
| 61 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 62 | _mm256_packs_epi32(__m256i __a, __m256i __b) |
| 63 | { |
| 64 | return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b); |
| 65 | } |
| 66 | |
| 67 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 68 | _mm256_packus_epi16(__m256i __a, __m256i __b) |
| 69 | { |
| 70 | return (__m256i)__builtin_ia32_packuswb256((__v16hi)__a, (__v16hi)__b); |
| 71 | } |
| 72 | |
| 73 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 74 | _mm256_packus_epi32(__m256i __V1, __m256i __V2) |
| 75 | { |
| 76 | return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2); |
| 77 | } |
| 78 | |
| 79 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 80 | _mm256_add_epi8(__m256i __a, __m256i __b) |
| 81 | { |
| 82 | return (__m256i)((__v32qi)__a + (__v32qi)__b); |
| 83 | } |
| 84 | |
| 85 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 86 | _mm256_add_epi16(__m256i __a, __m256i __b) |
| 87 | { |
| 88 | return (__m256i)((__v16hi)__a + (__v16hi)__b); |
| 89 | } |
| 90 | |
| 91 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 92 | _mm256_add_epi32(__m256i __a, __m256i __b) |
| 93 | { |
| 94 | return (__m256i)((__v8si)__a + (__v8si)__b); |
| 95 | } |
| 96 | |
| 97 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 98 | _mm256_add_epi64(__m256i __a, __m256i __b) |
| 99 | { |
| 100 | return __a + __b; |
| 101 | } |
| 102 | |
| 103 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 104 | _mm256_adds_epi8(__m256i __a, __m256i __b) |
| 105 | { |
| 106 | return (__m256i)__builtin_ia32_paddsb256((__v32qi)__a, (__v32qi)__b); |
| 107 | } |
| 108 | |
| 109 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 110 | _mm256_adds_epi16(__m256i __a, __m256i __b) |
| 111 | { |
| 112 | return (__m256i)__builtin_ia32_paddsw256((__v16hi)__a, (__v16hi)__b); |
| 113 | } |
| 114 | |
| 115 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 116 | _mm256_adds_epu8(__m256i __a, __m256i __b) |
| 117 | { |
| 118 | return (__m256i)__builtin_ia32_paddusb256((__v32qi)__a, (__v32qi)__b); |
| 119 | } |
| 120 | |
| 121 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 122 | _mm256_adds_epu16(__m256i __a, __m256i __b) |
| 123 | { |
| 124 | return (__m256i)__builtin_ia32_paddusw256((__v16hi)__a, (__v16hi)__b); |
| 125 | } |
| 126 | |
| 127 | #define _mm256_alignr_epi8(a, b, n) __extension__ ({ \ |
| 128 | (__m256i)__builtin_ia32_palignr256((__v32qi)(__m256i)(a), \ |
| 129 | (__v32qi)(__m256i)(b), (n)); }) |
| 130 | |
| 131 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 132 | _mm256_and_si256(__m256i __a, __m256i __b) |
| 133 | { |
| 134 | return __a & __b; |
| 135 | } |
| 136 | |
| 137 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 138 | _mm256_andnot_si256(__m256i __a, __m256i __b) |
| 139 | { |
| 140 | return ~__a & __b; |
| 141 | } |
| 142 | |
| 143 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 144 | _mm256_avg_epu8(__m256i __a, __m256i __b) |
| 145 | { |
| 146 | return (__m256i)__builtin_ia32_pavgb256((__v32qi)__a, (__v32qi)__b); |
| 147 | } |
| 148 | |
| 149 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 150 | _mm256_avg_epu16(__m256i __a, __m256i __b) |
| 151 | { |
| 152 | return (__m256i)__builtin_ia32_pavgw256((__v16hi)__a, (__v16hi)__b); |
| 153 | } |
| 154 | |
| 155 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 156 | _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M) |
| 157 | { |
| 158 | return (__m256i)__builtin_ia32_pblendvb256((__v32qi)__V1, (__v32qi)__V2, |
| 159 | (__v32qi)__M); |
| 160 | } |
| 161 | |
| 162 | #define _mm256_blend_epi16(V1, V2, M) __extension__ ({ \ |
| 163 | (__m256i)__builtin_shufflevector((__v16hi)(__m256i)(V1), \ |
| 164 | (__v16hi)(__m256i)(V2), \ |
| 165 | (((M) & 0x01) ? 16 : 0), \ |
| 166 | (((M) & 0x02) ? 17 : 1), \ |
| 167 | (((M) & 0x04) ? 18 : 2), \ |
| 168 | (((M) & 0x08) ? 19 : 3), \ |
| 169 | (((M) & 0x10) ? 20 : 4), \ |
| 170 | (((M) & 0x20) ? 21 : 5), \ |
| 171 | (((M) & 0x40) ? 22 : 6), \ |
| 172 | (((M) & 0x80) ? 23 : 7), \ |
| 173 | (((M) & 0x01) ? 24 : 8), \ |
| 174 | (((M) & 0x02) ? 25 : 9), \ |
| 175 | (((M) & 0x04) ? 26 : 10), \ |
| 176 | (((M) & 0x08) ? 27 : 11), \ |
| 177 | (((M) & 0x10) ? 28 : 12), \ |
| 178 | (((M) & 0x20) ? 29 : 13), \ |
| 179 | (((M) & 0x40) ? 30 : 14), \ |
| 180 | (((M) & 0x80) ? 31 : 15)); }) |
| 181 | |
| 182 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 183 | _mm256_cmpeq_epi8(__m256i __a, __m256i __b) |
| 184 | { |
| 185 | return (__m256i)((__v32qi)__a == (__v32qi)__b); |
| 186 | } |
| 187 | |
| 188 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 189 | _mm256_cmpeq_epi16(__m256i __a, __m256i __b) |
| 190 | { |
| 191 | return (__m256i)((__v16hi)__a == (__v16hi)__b); |
| 192 | } |
| 193 | |
| 194 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 195 | _mm256_cmpeq_epi32(__m256i __a, __m256i __b) |
| 196 | { |
| 197 | return (__m256i)((__v8si)__a == (__v8si)__b); |
| 198 | } |
| 199 | |
| 200 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 201 | _mm256_cmpeq_epi64(__m256i __a, __m256i __b) |
| 202 | { |
| 203 | return (__m256i)(__a == __b); |
| 204 | } |
| 205 | |
| 206 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 207 | _mm256_cmpgt_epi8(__m256i __a, __m256i __b) |
| 208 | { |
| 209 | /* This function always performs a signed comparison, but __v32qi is a char |
| 210 | which may be signed or unsigned, so use __v32qs. */ |
| 211 | return (__m256i)((__v32qs)__a > (__v32qs)__b); |
| 212 | } |
| 213 | |
| 214 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 215 | _mm256_cmpgt_epi16(__m256i __a, __m256i __b) |
| 216 | { |
| 217 | return (__m256i)((__v16hi)__a > (__v16hi)__b); |
| 218 | } |
| 219 | |
| 220 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 221 | _mm256_cmpgt_epi32(__m256i __a, __m256i __b) |
| 222 | { |
| 223 | return (__m256i)((__v8si)__a > (__v8si)__b); |
| 224 | } |
| 225 | |
| 226 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 227 | _mm256_cmpgt_epi64(__m256i __a, __m256i __b) |
| 228 | { |
| 229 | return (__m256i)(__a > __b); |
| 230 | } |
| 231 | |
| 232 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 233 | _mm256_hadd_epi16(__m256i __a, __m256i __b) |
| 234 | { |
| 235 | return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b); |
| 236 | } |
| 237 | |
| 238 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 239 | _mm256_hadd_epi32(__m256i __a, __m256i __b) |
| 240 | { |
| 241 | return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b); |
| 242 | } |
| 243 | |
| 244 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 245 | _mm256_hadds_epi16(__m256i __a, __m256i __b) |
| 246 | { |
| 247 | return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b); |
| 248 | } |
| 249 | |
| 250 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 251 | _mm256_hsub_epi16(__m256i __a, __m256i __b) |
| 252 | { |
| 253 | return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b); |
| 254 | } |
| 255 | |
| 256 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 257 | _mm256_hsub_epi32(__m256i __a, __m256i __b) |
| 258 | { |
| 259 | return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b); |
| 260 | } |
| 261 | |
| 262 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 263 | _mm256_hsubs_epi16(__m256i __a, __m256i __b) |
| 264 | { |
| 265 | return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b); |
| 266 | } |
| 267 | |
| 268 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 269 | _mm256_maddubs_epi16(__m256i __a, __m256i __b) |
| 270 | { |
| 271 | return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b); |
| 272 | } |
| 273 | |
| 274 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 275 | _mm256_madd_epi16(__m256i __a, __m256i __b) |
| 276 | { |
| 277 | return (__m256i)__builtin_ia32_pmaddwd256((__v16hi)__a, (__v16hi)__b); |
| 278 | } |
| 279 | |
| 280 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 281 | _mm256_max_epi8(__m256i __a, __m256i __b) |
| 282 | { |
| 283 | return (__m256i)__builtin_ia32_pmaxsb256((__v32qi)__a, (__v32qi)__b); |
| 284 | } |
| 285 | |
| 286 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 287 | _mm256_max_epi16(__m256i __a, __m256i __b) |
| 288 | { |
| 289 | return (__m256i)__builtin_ia32_pmaxsw256((__v16hi)__a, (__v16hi)__b); |
| 290 | } |
| 291 | |
| 292 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 293 | _mm256_max_epi32(__m256i __a, __m256i __b) |
| 294 | { |
| 295 | return (__m256i)__builtin_ia32_pmaxsd256((__v8si)__a, (__v8si)__b); |
| 296 | } |
| 297 | |
| 298 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 299 | _mm256_max_epu8(__m256i __a, __m256i __b) |
| 300 | { |
| 301 | return (__m256i)__builtin_ia32_pmaxub256((__v32qi)__a, (__v32qi)__b); |
| 302 | } |
| 303 | |
| 304 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 305 | _mm256_max_epu16(__m256i __a, __m256i __b) |
| 306 | { |
| 307 | return (__m256i)__builtin_ia32_pmaxuw256((__v16hi)__a, (__v16hi)__b); |
| 308 | } |
| 309 | |
| 310 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 311 | _mm256_max_epu32(__m256i __a, __m256i __b) |
| 312 | { |
| 313 | return (__m256i)__builtin_ia32_pmaxud256((__v8si)__a, (__v8si)__b); |
| 314 | } |
| 315 | |
| 316 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 317 | _mm256_min_epi8(__m256i __a, __m256i __b) |
| 318 | { |
| 319 | return (__m256i)__builtin_ia32_pminsb256((__v32qi)__a, (__v32qi)__b); |
| 320 | } |
| 321 | |
| 322 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 323 | _mm256_min_epi16(__m256i __a, __m256i __b) |
| 324 | { |
| 325 | return (__m256i)__builtin_ia32_pminsw256((__v16hi)__a, (__v16hi)__b); |
| 326 | } |
| 327 | |
| 328 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 329 | _mm256_min_epi32(__m256i __a, __m256i __b) |
| 330 | { |
| 331 | return (__m256i)__builtin_ia32_pminsd256((__v8si)__a, (__v8si)__b); |
| 332 | } |
| 333 | |
| 334 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 335 | _mm256_min_epu8(__m256i __a, __m256i __b) |
| 336 | { |
| 337 | return (__m256i)__builtin_ia32_pminub256((__v32qi)__a, (__v32qi)__b); |
| 338 | } |
| 339 | |
| 340 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 341 | _mm256_min_epu16(__m256i __a, __m256i __b) |
| 342 | { |
| 343 | return (__m256i)__builtin_ia32_pminuw256 ((__v16hi)__a, (__v16hi)__b); |
| 344 | } |
| 345 | |
| 346 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 347 | _mm256_min_epu32(__m256i __a, __m256i __b) |
| 348 | { |
| 349 | return (__m256i)__builtin_ia32_pminud256((__v8si)__a, (__v8si)__b); |
| 350 | } |
| 351 | |
| 352 | static __inline__ int __DEFAULT_FN_ATTRS |
| 353 | _mm256_movemask_epi8(__m256i __a) |
| 354 | { |
| 355 | return __builtin_ia32_pmovmskb256((__v32qi)__a); |
| 356 | } |
| 357 | |
| 358 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 359 | _mm256_cvtepi8_epi16(__m128i __V) |
| 360 | { |
| 361 | return (__m256i)__builtin_ia32_pmovsxbw256((__v16qi)__V); |
| 362 | } |
| 363 | |
| 364 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 365 | _mm256_cvtepi8_epi32(__m128i __V) |
| 366 | { |
| 367 | return (__m256i)__builtin_ia32_pmovsxbd256((__v16qi)__V); |
| 368 | } |
| 369 | |
| 370 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 371 | _mm256_cvtepi8_epi64(__m128i __V) |
| 372 | { |
| 373 | return (__m256i)__builtin_ia32_pmovsxbq256((__v16qi)__V); |
| 374 | } |
| 375 | |
| 376 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 377 | _mm256_cvtepi16_epi32(__m128i __V) |
| 378 | { |
| 379 | return (__m256i)__builtin_ia32_pmovsxwd256((__v8hi)__V); |
| 380 | } |
| 381 | |
| 382 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 383 | _mm256_cvtepi16_epi64(__m128i __V) |
| 384 | { |
| 385 | return (__m256i)__builtin_ia32_pmovsxwq256((__v8hi)__V); |
| 386 | } |
| 387 | |
| 388 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 389 | _mm256_cvtepi32_epi64(__m128i __V) |
| 390 | { |
| 391 | return (__m256i)__builtin_ia32_pmovsxdq256((__v4si)__V); |
| 392 | } |
| 393 | |
| 394 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 395 | _mm256_cvtepu8_epi16(__m128i __V) |
| 396 | { |
| 397 | return (__m256i)__builtin_ia32_pmovzxbw256((__v16qi)__V); |
| 398 | } |
| 399 | |
| 400 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 401 | _mm256_cvtepu8_epi32(__m128i __V) |
| 402 | { |
| 403 | return (__m256i)__builtin_ia32_pmovzxbd256((__v16qi)__V); |
| 404 | } |
| 405 | |
| 406 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 407 | _mm256_cvtepu8_epi64(__m128i __V) |
| 408 | { |
| 409 | return (__m256i)__builtin_ia32_pmovzxbq256((__v16qi)__V); |
| 410 | } |
| 411 | |
| 412 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 413 | _mm256_cvtepu16_epi32(__m128i __V) |
| 414 | { |
| 415 | return (__m256i)__builtin_ia32_pmovzxwd256((__v8hi)__V); |
| 416 | } |
| 417 | |
| 418 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 419 | _mm256_cvtepu16_epi64(__m128i __V) |
| 420 | { |
| 421 | return (__m256i)__builtin_ia32_pmovzxwq256((__v8hi)__V); |
| 422 | } |
| 423 | |
| 424 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 425 | _mm256_cvtepu32_epi64(__m128i __V) |
| 426 | { |
| 427 | return (__m256i)__builtin_ia32_pmovzxdq256((__v4si)__V); |
| 428 | } |
| 429 | |
| 430 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 431 | _mm256_mul_epi32(__m256i __a, __m256i __b) |
| 432 | { |
| 433 | return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b); |
| 434 | } |
| 435 | |
| 436 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 437 | _mm256_mulhrs_epi16(__m256i __a, __m256i __b) |
| 438 | { |
| 439 | return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b); |
| 440 | } |
| 441 | |
| 442 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 443 | _mm256_mulhi_epu16(__m256i __a, __m256i __b) |
| 444 | { |
| 445 | return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b); |
| 446 | } |
| 447 | |
| 448 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 449 | _mm256_mulhi_epi16(__m256i __a, __m256i __b) |
| 450 | { |
| 451 | return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b); |
| 452 | } |
| 453 | |
| 454 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 455 | _mm256_mullo_epi16(__m256i __a, __m256i __b) |
| 456 | { |
| 457 | return (__m256i)((__v16hi)__a * (__v16hi)__b); |
| 458 | } |
| 459 | |
| 460 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 461 | _mm256_mullo_epi32 (__m256i __a, __m256i __b) |
| 462 | { |
| 463 | return (__m256i)((__v8si)__a * (__v8si)__b); |
| 464 | } |
| 465 | |
| 466 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 467 | _mm256_mul_epu32(__m256i __a, __m256i __b) |
| 468 | { |
| 469 | return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b); |
| 470 | } |
| 471 | |
| 472 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 473 | _mm256_or_si256(__m256i __a, __m256i __b) |
| 474 | { |
| 475 | return __a | __b; |
| 476 | } |
| 477 | |
| 478 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 479 | _mm256_sad_epu8(__m256i __a, __m256i __b) |
| 480 | { |
| 481 | return __builtin_ia32_psadbw256((__v32qi)__a, (__v32qi)__b); |
| 482 | } |
| 483 | |
| 484 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 485 | _mm256_shuffle_epi8(__m256i __a, __m256i __b) |
| 486 | { |
| 487 | return (__m256i)__builtin_ia32_pshufb256((__v32qi)__a, (__v32qi)__b); |
| 488 | } |
| 489 | |
| 490 | #define _mm256_shuffle_epi32(a, imm) __extension__ ({ \ |
| 491 | (__m256i)__builtin_shufflevector((__v8si)(__m256i)(a), \ |
| 492 | (__v8si)_mm256_setzero_si256(), \ |
| 493 | (imm) & 0x3, ((imm) & 0xc) >> 2, \ |
| 494 | ((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \ |
| 495 | 4 + (((imm) & 0x03) >> 0), \ |
| 496 | 4 + (((imm) & 0x0c) >> 2), \ |
| 497 | 4 + (((imm) & 0x30) >> 4), \ |
| 498 | 4 + (((imm) & 0xc0) >> 6)); }) |
| 499 | |
| 500 | #define _mm256_shufflehi_epi16(a, imm) __extension__ ({ \ |
| 501 | (__m256i)__builtin_shufflevector((__v16hi)(__m256i)(a), \ |
| 502 | (__v16hi)_mm256_setzero_si256(), \ |
| 503 | 0, 1, 2, 3, \ |
| 504 | 4 + (((imm) & 0x03) >> 0), \ |
| 505 | 4 + (((imm) & 0x0c) >> 2), \ |
| 506 | 4 + (((imm) & 0x30) >> 4), \ |
| 507 | 4 + (((imm) & 0xc0) >> 6), \ |
| 508 | 8, 9, 10, 11, \ |
| 509 | 12 + (((imm) & 0x03) >> 0), \ |
| 510 | 12 + (((imm) & 0x0c) >> 2), \ |
| 511 | 12 + (((imm) & 0x30) >> 4), \ |
| 512 | 12 + (((imm) & 0xc0) >> 6)); }) |
| 513 | |
| 514 | #define _mm256_shufflelo_epi16(a, imm) __extension__ ({ \ |
| 515 | (__m256i)__builtin_shufflevector((__v16hi)(__m256i)(a), \ |
| 516 | (__v16hi)_mm256_setzero_si256(), \ |
| 517 | (imm) & 0x3,((imm) & 0xc) >> 2, \ |
| 518 | ((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \ |
| 519 | 4, 5, 6, 7, \ |
| 520 | 8 + (((imm) & 0x03) >> 0), \ |
| 521 | 8 + (((imm) & 0x0c) >> 2), \ |
| 522 | 8 + (((imm) & 0x30) >> 4), \ |
| 523 | 8 + (((imm) & 0xc0) >> 6), \ |
| 524 | 12, 13, 14, 15); }) |
| 525 | |
| 526 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 527 | _mm256_sign_epi8(__m256i __a, __m256i __b) |
| 528 | { |
| 529 | return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b); |
| 530 | } |
| 531 | |
| 532 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 533 | _mm256_sign_epi16(__m256i __a, __m256i __b) |
| 534 | { |
| 535 | return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b); |
| 536 | } |
| 537 | |
| 538 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 539 | _mm256_sign_epi32(__m256i __a, __m256i __b) |
| 540 | { |
| 541 | return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b); |
| 542 | } |
| 543 | |
| 544 | #define _mm256_slli_si256(a, count) __extension__ ({ \ |
| 545 | (__m256i)__builtin_ia32_pslldqi256((__m256i)(a), (count)*8); }) |
| 546 | |
| 547 | #define _mm256_bslli_epi128(a, count) _mm256_slli_si256((a), (count)) |
| 548 | |
| 549 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 550 | _mm256_slli_epi16(__m256i __a, int __count) |
| 551 | { |
| 552 | return (__m256i)__builtin_ia32_psllwi256((__v16hi)__a, __count); |
| 553 | } |
| 554 | |
| 555 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 556 | _mm256_sll_epi16(__m256i __a, __m128i __count) |
| 557 | { |
| 558 | return (__m256i)__builtin_ia32_psllw256((__v16hi)__a, (__v8hi)__count); |
| 559 | } |
| 560 | |
| 561 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 562 | _mm256_slli_epi32(__m256i __a, int __count) |
| 563 | { |
| 564 | return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count); |
| 565 | } |
| 566 | |
| 567 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 568 | _mm256_sll_epi32(__m256i __a, __m128i __count) |
| 569 | { |
| 570 | return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count); |
| 571 | } |
| 572 | |
| 573 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 574 | _mm256_slli_epi64(__m256i __a, int __count) |
| 575 | { |
| 576 | return __builtin_ia32_psllqi256(__a, __count); |
| 577 | } |
| 578 | |
| 579 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 580 | _mm256_sll_epi64(__m256i __a, __m128i __count) |
| 581 | { |
| 582 | return __builtin_ia32_psllq256(__a, __count); |
| 583 | } |
| 584 | |
| 585 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 586 | _mm256_srai_epi16(__m256i __a, int __count) |
| 587 | { |
| 588 | return (__m256i)__builtin_ia32_psrawi256((__v16hi)__a, __count); |
| 589 | } |
| 590 | |
| 591 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 592 | _mm256_sra_epi16(__m256i __a, __m128i __count) |
| 593 | { |
| 594 | return (__m256i)__builtin_ia32_psraw256((__v16hi)__a, (__v8hi)__count); |
| 595 | } |
| 596 | |
| 597 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 598 | _mm256_srai_epi32(__m256i __a, int __count) |
| 599 | { |
| 600 | return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count); |
| 601 | } |
| 602 | |
| 603 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 604 | _mm256_sra_epi32(__m256i __a, __m128i __count) |
| 605 | { |
| 606 | return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count); |
| 607 | } |
| 608 | |
| 609 | #define _mm256_srli_si256(a, count) __extension__ ({ \ |
| 610 | (__m256i)__builtin_ia32_psrldqi256((__m256i)(a), (count)*8); }) |
| 611 | |
| 612 | #define _mm256_bsrli_epi128(a, count) _mm256_srli_si256((a), (count)) |
| 613 | |
| 614 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 615 | _mm256_srli_epi16(__m256i __a, int __count) |
| 616 | { |
| 617 | return (__m256i)__builtin_ia32_psrlwi256((__v16hi)__a, __count); |
| 618 | } |
| 619 | |
| 620 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 621 | _mm256_srl_epi16(__m256i __a, __m128i __count) |
| 622 | { |
| 623 | return (__m256i)__builtin_ia32_psrlw256((__v16hi)__a, (__v8hi)__count); |
| 624 | } |
| 625 | |
| 626 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 627 | _mm256_srli_epi32(__m256i __a, int __count) |
| 628 | { |
| 629 | return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count); |
| 630 | } |
| 631 | |
| 632 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 633 | _mm256_srl_epi32(__m256i __a, __m128i __count) |
| 634 | { |
| 635 | return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count); |
| 636 | } |
| 637 | |
| 638 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 639 | _mm256_srli_epi64(__m256i __a, int __count) |
| 640 | { |
| 641 | return __builtin_ia32_psrlqi256(__a, __count); |
| 642 | } |
| 643 | |
| 644 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 645 | _mm256_srl_epi64(__m256i __a, __m128i __count) |
| 646 | { |
| 647 | return __builtin_ia32_psrlq256(__a, __count); |
| 648 | } |
| 649 | |
| 650 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 651 | _mm256_sub_epi8(__m256i __a, __m256i __b) |
| 652 | { |
| 653 | return (__m256i)((__v32qi)__a - (__v32qi)__b); |
| 654 | } |
| 655 | |
| 656 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 657 | _mm256_sub_epi16(__m256i __a, __m256i __b) |
| 658 | { |
| 659 | return (__m256i)((__v16hi)__a - (__v16hi)__b); |
| 660 | } |
| 661 | |
| 662 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 663 | _mm256_sub_epi32(__m256i __a, __m256i __b) |
| 664 | { |
| 665 | return (__m256i)((__v8si)__a - (__v8si)__b); |
| 666 | } |
| 667 | |
| 668 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 669 | _mm256_sub_epi64(__m256i __a, __m256i __b) |
| 670 | { |
| 671 | return __a - __b; |
| 672 | } |
| 673 | |
| 674 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 675 | _mm256_subs_epi8(__m256i __a, __m256i __b) |
| 676 | { |
| 677 | return (__m256i)__builtin_ia32_psubsb256((__v32qi)__a, (__v32qi)__b); |
| 678 | } |
| 679 | |
| 680 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 681 | _mm256_subs_epi16(__m256i __a, __m256i __b) |
| 682 | { |
| 683 | return (__m256i)__builtin_ia32_psubsw256((__v16hi)__a, (__v16hi)__b); |
| 684 | } |
| 685 | |
| 686 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 687 | _mm256_subs_epu8(__m256i __a, __m256i __b) |
| 688 | { |
| 689 | return (__m256i)__builtin_ia32_psubusb256((__v32qi)__a, (__v32qi)__b); |
| 690 | } |
| 691 | |
| 692 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 693 | _mm256_subs_epu16(__m256i __a, __m256i __b) |
| 694 | { |
| 695 | return (__m256i)__builtin_ia32_psubusw256((__v16hi)__a, (__v16hi)__b); |
| 696 | } |
| 697 | |
| 698 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 699 | _mm256_unpackhi_epi8(__m256i __a, __m256i __b) |
| 700 | { |
| 701 | return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31); |
| 702 | } |
| 703 | |
| 704 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 705 | _mm256_unpackhi_epi16(__m256i __a, __m256i __b) |
| 706 | { |
| 707 | return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15); |
| 708 | } |
| 709 | |
| 710 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 711 | _mm256_unpackhi_epi32(__m256i __a, __m256i __b) |
| 712 | { |
| 713 | return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7); |
| 714 | } |
| 715 | |
| 716 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 717 | _mm256_unpackhi_epi64(__m256i __a, __m256i __b) |
| 718 | { |
| 719 | return (__m256i)__builtin_shufflevector(__a, __b, 1, 4+1, 3, 4+3); |
| 720 | } |
| 721 | |
| 722 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 723 | _mm256_unpacklo_epi8(__m256i __a, __m256i __b) |
| 724 | { |
| 725 | return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23); |
| 726 | } |
| 727 | |
| 728 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 729 | _mm256_unpacklo_epi16(__m256i __a, __m256i __b) |
| 730 | { |
| 731 | return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11); |
| 732 | } |
| 733 | |
| 734 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 735 | _mm256_unpacklo_epi32(__m256i __a, __m256i __b) |
| 736 | { |
| 737 | return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5); |
| 738 | } |
| 739 | |
| 740 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 741 | _mm256_unpacklo_epi64(__m256i __a, __m256i __b) |
| 742 | { |
| 743 | return (__m256i)__builtin_shufflevector(__a, __b, 0, 4+0, 2, 4+2); |
| 744 | } |
| 745 | |
| 746 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 747 | _mm256_xor_si256(__m256i __a, __m256i __b) |
| 748 | { |
| 749 | return __a ^ __b; |
| 750 | } |
| 751 | |
| 752 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 753 | _mm256_stream_load_si256(__m256i const *__V) |
| 754 | { |
| 755 | return (__m256i)__builtin_ia32_movntdqa256((const __v4di *)__V); |
| 756 | } |
| 757 | |
| 758 | static __inline__ __m128 __DEFAULT_FN_ATTRS |
| 759 | _mm_broadcastss_ps(__m128 __X) |
| 760 | { |
| 761 | return (__m128)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0); |
| 762 | } |
| 763 | |
| 764 | static __inline__ __m128d __DEFAULT_FN_ATTRS |
| 765 | _mm_broadcastsd_pd(__m128d __a) |
| 766 | { |
| 767 | return __builtin_shufflevector(__a, __a, 0, 0); |
| 768 | } |
| 769 | |
| 770 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 771 | _mm256_broadcastss_ps(__m128 __X) |
| 772 | { |
| 773 | return (__m256)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0, 0, 0, 0, 0); |
| 774 | } |
| 775 | |
| 776 | static __inline__ __m256d __DEFAULT_FN_ATTRS |
| 777 | _mm256_broadcastsd_pd(__m128d __X) |
| 778 | { |
| 779 | return (__m256d)__builtin_shufflevector((__v2df)__X, (__v2df)__X, 0, 0, 0, 0); |
| 780 | } |
| 781 | |
| 782 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 783 | _mm256_broadcastsi128_si256(__m128i __X) |
| 784 | { |
| 785 | return (__m256i)__builtin_shufflevector(__X, __X, 0, 1, 0, 1); |
| 786 | } |
| 787 | |
| 788 | #define _mm_blend_epi32(V1, V2, M) __extension__ ({ \ |
| 789 | (__m128i)__builtin_shufflevector((__v4si)(__m128i)(V1), \ |
| 790 | (__v4si)(__m128i)(V2), \ |
| 791 | (((M) & 0x01) ? 4 : 0), \ |
| 792 | (((M) & 0x02) ? 5 : 1), \ |
| 793 | (((M) & 0x04) ? 6 : 2), \ |
| 794 | (((M) & 0x08) ? 7 : 3)); }) |
| 795 | |
| 796 | #define _mm256_blend_epi32(V1, V2, M) __extension__ ({ \ |
| 797 | (__m256i)__builtin_shufflevector((__v8si)(__m256i)(V1), \ |
| 798 | (__v8si)(__m256i)(V2), \ |
| 799 | (((M) & 0x01) ? 8 : 0), \ |
| 800 | (((M) & 0x02) ? 9 : 1), \ |
| 801 | (((M) & 0x04) ? 10 : 2), \ |
| 802 | (((M) & 0x08) ? 11 : 3), \ |
| 803 | (((M) & 0x10) ? 12 : 4), \ |
| 804 | (((M) & 0x20) ? 13 : 5), \ |
| 805 | (((M) & 0x40) ? 14 : 6), \ |
| 806 | (((M) & 0x80) ? 15 : 7)); }) |
| 807 | |
| 808 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 809 | _mm256_broadcastb_epi8(__m128i __X) |
| 810 | { |
| 811 | return (__m256i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 812 | } |
| 813 | |
| 814 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 815 | _mm256_broadcastw_epi16(__m128i __X) |
| 816 | { |
| 817 | return (__m256i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 818 | } |
| 819 | |
| 820 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 821 | _mm256_broadcastd_epi32(__m128i __X) |
| 822 | { |
| 823 | return (__m256i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0, 0, 0, 0, 0); |
| 824 | } |
| 825 | |
| 826 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 827 | _mm256_broadcastq_epi64(__m128i __X) |
| 828 | { |
| 829 | return (__m256i)__builtin_shufflevector(__X, __X, 0, 0, 0, 0); |
| 830 | } |
| 831 | |
| 832 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 833 | _mm_broadcastb_epi8(__m128i __X) |
| 834 | { |
| 835 | return (__m128i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 836 | } |
| 837 | |
| 838 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 839 | _mm_broadcastw_epi16(__m128i __X) |
| 840 | { |
| 841 | return (__m128i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0); |
| 842 | } |
| 843 | |
| 844 | |
| 845 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 846 | _mm_broadcastd_epi32(__m128i __X) |
| 847 | { |
| 848 | return (__m128i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0); |
| 849 | } |
| 850 | |
| 851 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 852 | _mm_broadcastq_epi64(__m128i __X) |
| 853 | { |
| 854 | return (__m128i)__builtin_shufflevector(__X, __X, 0, 0); |
| 855 | } |
| 856 | |
| 857 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 858 | _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b) |
| 859 | { |
| 860 | return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b); |
| 861 | } |
| 862 | |
| 863 | #define _mm256_permute4x64_pd(V, M) __extension__ ({ \ |
| 864 | (__m256d)__builtin_shufflevector((__v4df)(__m256d)(V), \ |
| 865 | (__v4df)_mm256_setzero_pd(), \ |
| 866 | (M) & 0x3, ((M) & 0xc) >> 2, \ |
| 867 | ((M) & 0x30) >> 4, ((M) & 0xc0) >> 6); }) |
| 868 | |
| 869 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 870 | _mm256_permutevar8x32_ps(__m256 __a, __m256i __b) |
| 871 | { |
| 872 | return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8si)__b); |
| 873 | } |
| 874 | |
| 875 | #define _mm256_permute4x64_epi64(V, M) __extension__ ({ \ |
| 876 | (__m256i)__builtin_shufflevector((__v4di)(__m256i)(V), \ |
| 877 | (__v4di)_mm256_setzero_si256(), \ |
| 878 | (M) & 0x3, ((M) & 0xc) >> 2, \ |
| 879 | ((M) & 0x30) >> 4, ((M) & 0xc0) >> 6); }) |
| 880 | |
| 881 | #define _mm256_permute2x128_si256(V1, V2, M) __extension__ ({ \ |
| 882 | (__m256i)__builtin_ia32_permti256((__m256i)(V1), (__m256i)(V2), (M)); }) |
| 883 | |
| 884 | #define _mm256_extracti128_si256(V, M) __extension__ ({ \ |
| 885 | (__m128i)__builtin_shufflevector((__v4di)(__m256i)(V), \ |
| 886 | (__v4di)_mm256_setzero_si256(), \ |
| 887 | (((M) & 1) ? 2 : 0), \ |
| 888 | (((M) & 1) ? 3 : 1) ); }) |
| 889 | |
| 890 | #define _mm256_inserti128_si256(V1, V2, M) __extension__ ({ \ |
| 891 | (__m256i)__builtin_shufflevector((__v4di)(__m256i)(V1), \ |
| 892 | (__v4di)_mm256_castsi128_si256((__m128i)(V2)), \ |
| 893 | (((M) & 1) ? 0 : 4), \ |
| 894 | (((M) & 1) ? 1 : 5), \ |
| 895 | (((M) & 1) ? 4 : 2), \ |
| 896 | (((M) & 1) ? 5 : 3) ); }) |
| 897 | |
| 898 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 899 | _mm256_maskload_epi32(int const *__X, __m256i __M) |
| 900 | { |
| 901 | return (__m256i)__builtin_ia32_maskloadd256((const __v8si *)__X, (__v8si)__M); |
| 902 | } |
| 903 | |
| 904 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 905 | _mm256_maskload_epi64(long long const *__X, __m256i __M) |
| 906 | { |
| 907 | return (__m256i)__builtin_ia32_maskloadq256((const __v4di *)__X, __M); |
| 908 | } |
| 909 | |
| 910 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 911 | _mm_maskload_epi32(int const *__X, __m128i __M) |
| 912 | { |
| 913 | return (__m128i)__builtin_ia32_maskloadd((const __v4si *)__X, (__v4si)__M); |
| 914 | } |
| 915 | |
| 916 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 917 | _mm_maskload_epi64(long long const *__X, __m128i __M) |
| 918 | { |
| 919 | return (__m128i)__builtin_ia32_maskloadq((const __v2di *)__X, (__v2di)__M); |
| 920 | } |
| 921 | |
| 922 | static __inline__ void __DEFAULT_FN_ATTRS |
| 923 | _mm256_maskstore_epi32(int *__X, __m256i __M, __m256i __Y) |
| 924 | { |
| 925 | __builtin_ia32_maskstored256((__v8si *)__X, (__v8si)__M, (__v8si)__Y); |
| 926 | } |
| 927 | |
| 928 | static __inline__ void __DEFAULT_FN_ATTRS |
| 929 | _mm256_maskstore_epi64(long long *__X, __m256i __M, __m256i __Y) |
| 930 | { |
| 931 | __builtin_ia32_maskstoreq256((__v4di *)__X, __M, __Y); |
| 932 | } |
| 933 | |
| 934 | static __inline__ void __DEFAULT_FN_ATTRS |
| 935 | _mm_maskstore_epi32(int *__X, __m128i __M, __m128i __Y) |
| 936 | { |
| 937 | __builtin_ia32_maskstored((__v4si *)__X, (__v4si)__M, (__v4si)__Y); |
| 938 | } |
| 939 | |
| 940 | static __inline__ void __DEFAULT_FN_ATTRS |
| 941 | _mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y) |
| 942 | { |
| 943 | __builtin_ia32_maskstoreq(( __v2di *)__X, __M, __Y); |
| 944 | } |
| 945 | |
| 946 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 947 | _mm256_sllv_epi32(__m256i __X, __m256i __Y) |
| 948 | { |
| 949 | return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y); |
| 950 | } |
| 951 | |
| 952 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 953 | _mm_sllv_epi32(__m128i __X, __m128i __Y) |
| 954 | { |
| 955 | return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y); |
| 956 | } |
| 957 | |
| 958 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 959 | _mm256_sllv_epi64(__m256i __X, __m256i __Y) |
| 960 | { |
| 961 | return (__m256i)__builtin_ia32_psllv4di(__X, __Y); |
| 962 | } |
| 963 | |
| 964 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 965 | _mm_sllv_epi64(__m128i __X, __m128i __Y) |
| 966 | { |
| 967 | return (__m128i)__builtin_ia32_psllv2di(__X, __Y); |
| 968 | } |
| 969 | |
| 970 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 971 | _mm256_srav_epi32(__m256i __X, __m256i __Y) |
| 972 | { |
| 973 | return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y); |
| 974 | } |
| 975 | |
| 976 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 977 | _mm_srav_epi32(__m128i __X, __m128i __Y) |
| 978 | { |
| 979 | return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y); |
| 980 | } |
| 981 | |
| 982 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 983 | _mm256_srlv_epi32(__m256i __X, __m256i __Y) |
| 984 | { |
| 985 | return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y); |
| 986 | } |
| 987 | |
| 988 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 989 | _mm_srlv_epi32(__m128i __X, __m128i __Y) |
| 990 | { |
| 991 | return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y); |
| 992 | } |
| 993 | |
| 994 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
| 995 | _mm256_srlv_epi64(__m256i __X, __m256i __Y) |
| 996 | { |
| 997 | return (__m256i)__builtin_ia32_psrlv4di(__X, __Y); |
| 998 | } |
| 999 | |
| 1000 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 1001 | _mm_srlv_epi64(__m128i __X, __m128i __Y) |
| 1002 | { |
| 1003 | return (__m128i)__builtin_ia32_psrlv2di(__X, __Y); |
| 1004 | } |
| 1005 | |
| 1006 | #define _mm_mask_i32gather_pd(a, m, i, mask, s) __extension__ ({ \ |
| 1007 | (__m128d)__builtin_ia32_gatherd_pd((__v2df)(__m128i)(a), \ |
| 1008 | (double const *)(m), \ |
| 1009 | (__v4si)(__m128i)(i), \ |
| 1010 | (__v2df)(__m128d)(mask), (s)); }) |
| 1011 | |
| 1012 | #define _mm256_mask_i32gather_pd(a, m, i, mask, s) __extension__ ({ \ |
| 1013 | (__m256d)__builtin_ia32_gatherd_pd256((__v4df)(__m256d)(a), \ |
| 1014 | (double const *)(m), \ |
| 1015 | (__v4si)(__m128i)(i), \ |
| 1016 | (__v4df)(__m256d)(mask), (s)); }) |
| 1017 | |
| 1018 | #define _mm_mask_i64gather_pd(a, m, i, mask, s) __extension__ ({ \ |
| 1019 | (__m128d)__builtin_ia32_gatherq_pd((__v2df)(__m128d)(a), \ |
| 1020 | (double const *)(m), \ |
| 1021 | (__v2di)(__m128i)(i), \ |
| 1022 | (__v2df)(__m128d)(mask), (s)); }) |
| 1023 | |
| 1024 | #define _mm256_mask_i64gather_pd(a, m, i, mask, s) __extension__ ({ \ |
| 1025 | (__m256d)__builtin_ia32_gatherq_pd256((__v4df)(__m256d)(a), \ |
| 1026 | (double const *)(m), \ |
| 1027 | (__v4di)(__m256i)(i), \ |
| 1028 | (__v4df)(__m256d)(mask), (s)); }) |
| 1029 | |
| 1030 | #define _mm_mask_i32gather_ps(a, m, i, mask, s) __extension__ ({ \ |
| 1031 | (__m128)__builtin_ia32_gatherd_ps((__v4sf)(__m128)(a), \ |
| 1032 | (float const *)(m), \ |
| 1033 | (__v4si)(__m128i)(i), \ |
| 1034 | (__v4sf)(__m128)(mask), (s)); }) |
| 1035 | |
| 1036 | #define _mm256_mask_i32gather_ps(a, m, i, mask, s) __extension__ ({ \ |
| 1037 | (__m256)__builtin_ia32_gatherd_ps256((__v8sf)(__m256)(a), \ |
| 1038 | (float const *)(m), \ |
| 1039 | (__v8si)(__m256i)(i), \ |
| 1040 | (__v8sf)(__m256)(mask), (s)); }) |
| 1041 | |
| 1042 | #define _mm_mask_i64gather_ps(a, m, i, mask, s) __extension__ ({ \ |
| 1043 | (__m128)__builtin_ia32_gatherq_ps((__v4sf)(__m128)(a), \ |
| 1044 | (float const *)(m), \ |
| 1045 | (__v2di)(__m128i)(i), \ |
| 1046 | (__v4sf)(__m128)(mask), (s)); }) |
| 1047 | |
| 1048 | #define _mm256_mask_i64gather_ps(a, m, i, mask, s) __extension__ ({ \ |
| 1049 | (__m128)__builtin_ia32_gatherq_ps256((__v4sf)(__m128)(a), \ |
| 1050 | (float const *)(m), \ |
| 1051 | (__v4di)(__m256i)(i), \ |
| 1052 | (__v4sf)(__m128)(mask), (s)); }) |
| 1053 | |
| 1054 | #define _mm_mask_i32gather_epi32(a, m, i, mask, s) __extension__ ({ \ |
| 1055 | (__m128i)__builtin_ia32_gatherd_d((__v4si)(__m128i)(a), \ |
| 1056 | (int const *)(m), \ |
| 1057 | (__v4si)(__m128i)(i), \ |
| 1058 | (__v4si)(__m128i)(mask), (s)); }) |
| 1059 | |
| 1060 | #define _mm256_mask_i32gather_epi32(a, m, i, mask, s) __extension__ ({ \ |
| 1061 | (__m256i)__builtin_ia32_gatherd_d256((__v8si)(__m256i)(a), \ |
| 1062 | (int const *)(m), \ |
| 1063 | (__v8si)(__m256i)(i), \ |
| 1064 | (__v8si)(__m256i)(mask), (s)); }) |
| 1065 | |
| 1066 | #define _mm_mask_i64gather_epi32(a, m, i, mask, s) __extension__ ({ \ |
| 1067 | (__m128i)__builtin_ia32_gatherq_d((__v4si)(__m128i)(a), \ |
| 1068 | (int const *)(m), \ |
| 1069 | (__v2di)(__m128i)(i), \ |
| 1070 | (__v4si)(__m128i)(mask), (s)); }) |
| 1071 | |
| 1072 | #define _mm256_mask_i64gather_epi32(a, m, i, mask, s) __extension__ ({ \ |
| 1073 | (__m128i)__builtin_ia32_gatherq_d256((__v4si)(__m128i)(a), \ |
| 1074 | (int const *)(m), \ |
| 1075 | (__v4di)(__m256i)(i), \ |
| 1076 | (__v4si)(__m128i)(mask), (s)); }) |
| 1077 | |
| 1078 | #define _mm_mask_i32gather_epi64(a, m, i, mask, s) __extension__ ({ \ |
| 1079 | (__m128i)__builtin_ia32_gatherd_q((__v2di)(__m128i)(a), \ |
| 1080 | (long long const *)(m), \ |
| 1081 | (__v4si)(__m128i)(i), \ |
| 1082 | (__v2di)(__m128i)(mask), (s)); }) |
| 1083 | |
| 1084 | #define _mm256_mask_i32gather_epi64(a, m, i, mask, s) __extension__ ({ \ |
| 1085 | (__m256i)__builtin_ia32_gatherd_q256((__v4di)(__m256i)(a), \ |
| 1086 | (long long const *)(m), \ |
| 1087 | (__v4si)(__m128i)(i), \ |
| 1088 | (__v4di)(__m256i)(mask), (s)); }) |
| 1089 | |
| 1090 | #define _mm_mask_i64gather_epi64(a, m, i, mask, s) __extension__ ({ \ |
| 1091 | (__m128i)__builtin_ia32_gatherq_q((__v2di)(__m128i)(a), \ |
| 1092 | (long long const *)(m), \ |
| 1093 | (__v2di)(__m128i)(i), \ |
| 1094 | (__v2di)(__m128i)(mask), (s)); }) |
| 1095 | |
| 1096 | #define _mm256_mask_i64gather_epi64(a, m, i, mask, s) __extension__ ({ \ |
| 1097 | (__m256i)__builtin_ia32_gatherq_q256((__v4di)(__m256i)(a), \ |
| 1098 | (long long const *)(m), \ |
| 1099 | (__v4di)(__m256i)(i), \ |
| 1100 | (__v4di)(__m256i)(mask), (s)); }) |
| 1101 | |
| 1102 | #define _mm_i32gather_pd(m, i, s) __extension__ ({ \ |
| 1103 | (__m128d)__builtin_ia32_gatherd_pd((__v2df)_mm_undefined_pd(), \ |
| 1104 | (double const *)(m), \ |
| 1105 | (__v4si)(__m128i)(i), \ |
| 1106 | (__v2df)_mm_cmpeq_pd(_mm_setzero_pd(), \ |
| 1107 | _mm_setzero_pd()), \ |
| 1108 | (s)); }) |
| 1109 | |
| 1110 | #define _mm256_i32gather_pd(m, i, s) __extension__ ({ \ |
| 1111 | (__m256d)__builtin_ia32_gatherd_pd256((__v4df)_mm256_undefined_pd(), \ |
| 1112 | (double const *)(m), \ |
| 1113 | (__v4si)(__m128i)(i), \ |
| 1114 | (__v4df)_mm256_cmp_pd(_mm256_setzero_pd(), \ |
| 1115 | _mm256_setzero_pd(), \ |
| 1116 | _CMP_EQ_OQ), \ |
| 1117 | (s)); }) |
| 1118 | |
| 1119 | #define _mm_i64gather_pd(m, i, s) __extension__ ({ \ |
| 1120 | (__m128d)__builtin_ia32_gatherq_pd((__v2df)_mm_undefined_pd(), \ |
| 1121 | (double const *)(m), \ |
| 1122 | (__v2di)(__m128i)(i), \ |
| 1123 | (__v2df)_mm_cmpeq_pd(_mm_setzero_pd(), \ |
| 1124 | _mm_setzero_pd()), \ |
| 1125 | (s)); }) |
| 1126 | |
| 1127 | #define _mm256_i64gather_pd(m, i, s) __extension__ ({ \ |
| 1128 | (__m256d)__builtin_ia32_gatherq_pd256((__v4df)_mm256_undefined_pd(), \ |
| 1129 | (double const *)(m), \ |
| 1130 | (__v4di)(__m256i)(i), \ |
| 1131 | (__v4df)_mm256_cmp_pd(_mm256_setzero_pd(), \ |
| 1132 | _mm256_setzero_pd(), \ |
| 1133 | _CMP_EQ_OQ), \ |
| 1134 | (s)); }) |
| 1135 | |
| 1136 | #define _mm_i32gather_ps(m, i, s) __extension__ ({ \ |
| 1137 | (__m128)__builtin_ia32_gatherd_ps((__v4sf)_mm_undefined_ps(), \ |
| 1138 | (float const *)(m), \ |
| 1139 | (__v4si)(__m128i)(i), \ |
| 1140 | (__v4sf)_mm_cmpeq_ps(_mm_setzero_ps(), \ |
| 1141 | _mm_setzero_ps()), \ |
| 1142 | (s)); }) |
| 1143 | |
| 1144 | #define _mm256_i32gather_ps(m, i, s) __extension__ ({ \ |
| 1145 | (__m256)__builtin_ia32_gatherd_ps256((__v8sf)_mm256_undefined_ps(), \ |
| 1146 | (float const *)(m), \ |
| 1147 | (__v8si)(__m256i)(i), \ |
| 1148 | (__v8sf)_mm256_cmp_ps(_mm256_setzero_ps(), \ |
| 1149 | _mm256_setzero_ps(), \ |
| 1150 | _CMP_EQ_OQ), \ |
| 1151 | (s)); }) |
| 1152 | |
| 1153 | #define _mm_i64gather_ps(m, i, s) __extension__ ({ \ |
| 1154 | (__m128)__builtin_ia32_gatherq_ps((__v4sf)_mm_undefined_ps(), \ |
| 1155 | (float const *)(m), \ |
| 1156 | (__v2di)(__m128i)(i), \ |
| 1157 | (__v4sf)_mm_cmpeq_ps(_mm_setzero_ps(), \ |
| 1158 | _mm_setzero_ps()), \ |
| 1159 | (s)); }) |
| 1160 | |
| 1161 | #define _mm256_i64gather_ps(m, i, s) __extension__ ({ \ |
| 1162 | (__m128)__builtin_ia32_gatherq_ps256((__v4sf)_mm_undefined_ps(), \ |
| 1163 | (float const *)(m), \ |
| 1164 | (__v4di)(__m256i)(i), \ |
| 1165 | (__v4sf)_mm_cmpeq_ps(_mm_setzero_ps(), \ |
| 1166 | _mm_setzero_ps()), \ |
| 1167 | (s)); }) |
| 1168 | |
| 1169 | #define _mm_i32gather_epi32(m, i, s) __extension__ ({ \ |
| 1170 | (__m128i)__builtin_ia32_gatherd_d((__v4si)_mm_undefined_si128(), \ |
| 1171 | (int const *)(m), (__v4si)(__m128i)(i), \ |
| 1172 | (__v4si)_mm_set1_epi32(-1), (s)); }) |
| 1173 | |
| 1174 | #define _mm256_i32gather_epi32(m, i, s) __extension__ ({ \ |
| 1175 | (__m256i)__builtin_ia32_gatherd_d256((__v8si)_mm256_undefined_si256(), \ |
| 1176 | (int const *)(m), (__v8si)(__m256i)(i), \ |
| 1177 | (__v8si)_mm256_set1_epi32(-1), (s)); }) |
| 1178 | |
| 1179 | #define _mm_i64gather_epi32(m, i, s) __extension__ ({ \ |
| 1180 | (__m128i)__builtin_ia32_gatherq_d((__v4si)_mm_undefined_si128(), \ |
| 1181 | (int const *)(m), (__v2di)(__m128i)(i), \ |
| 1182 | (__v4si)_mm_set1_epi32(-1), (s)); }) |
| 1183 | |
| 1184 | #define _mm256_i64gather_epi32(m, i, s) __extension__ ({ \ |
| 1185 | (__m128i)__builtin_ia32_gatherq_d256((__v4si)_mm_undefined_si128(), \ |
| 1186 | (int const *)(m), (__v4di)(__m256i)(i), \ |
| 1187 | (__v4si)_mm_set1_epi32(-1), (s)); }) |
| 1188 | |
| 1189 | #define _mm_i32gather_epi64(m, i, s) __extension__ ({ \ |
| 1190 | (__m128i)__builtin_ia32_gatherd_q((__v2di)_mm_undefined_si128(), \ |
| 1191 | (long long const *)(m), \ |
| 1192 | (__v4si)(__m128i)(i), \ |
| 1193 | (__v2di)_mm_set1_epi64x(-1), (s)); }) |
| 1194 | |
| 1195 | #define _mm256_i32gather_epi64(m, i, s) __extension__ ({ \ |
| 1196 | (__m256i)__builtin_ia32_gatherd_q256((__v4di)_mm256_undefined_si256(), \ |
| 1197 | (long long const *)(m), \ |
| 1198 | (__v4si)(__m128i)(i), \ |
| 1199 | (__v4di)_mm256_set1_epi64x(-1), (s)); }) |
| 1200 | |
| 1201 | #define _mm_i64gather_epi64(m, i, s) __extension__ ({ \ |
| 1202 | (__m128i)__builtin_ia32_gatherq_q((__v2di)_mm_undefined_si128(), \ |
| 1203 | (long long const *)(m), \ |
| 1204 | (__v2di)(__m128i)(i), \ |
| 1205 | (__v2di)_mm_set1_epi64x(-1), (s)); }) |
| 1206 | |
| 1207 | #define _mm256_i64gather_epi64(m, i, s) __extension__ ({ \ |
| 1208 | (__m256i)__builtin_ia32_gatherq_q256((__v4di)_mm256_undefined_si256(), \ |
| 1209 | (long long const *)(m), \ |
| 1210 | (__v4di)(__m256i)(i), \ |
| 1211 | (__v4di)_mm256_set1_epi64x(-1), (s)); }) |
| 1212 | |
| 1213 | #undef __DEFAULT_FN_ATTRS |
| 1214 | |
| 1215 | #endif /* __AVX2INTRIN_H */ |