Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 1 | /*===---- avx512dqintrin.h - AVX512DQ intrinsics ---------------------------=== |
| 2 | * |
| 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 4 | * of this software and associated documentation files (the "Software"), to deal |
| 5 | * in the Software without restriction, including without limitation the rights |
| 6 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 7 | * copies of the Software, and to permit persons to whom the Software is |
| 8 | * furnished to do so, subject to the following conditions: |
| 9 | * |
| 10 | * The above copyright notice and this permission notice shall be included in |
| 11 | * all copies or substantial portions of the Software. |
| 12 | * |
| 13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 16 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 17 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 18 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 19 | * THE SOFTWARE. |
| 20 | * |
| 21 | *===-----------------------------------------------------------------------=== |
| 22 | */ |
| 23 | |
| 24 | #ifndef __IMMINTRIN_H |
| 25 | #error "Never use <avx512dqintrin.h> directly; include <immintrin.h> instead." |
| 26 | #endif |
| 27 | |
| 28 | #ifndef __AVX512DQINTRIN_H |
| 29 | #define __AVX512DQINTRIN_H |
| 30 | |
| 31 | /* Define the default attributes for the functions in this file. */ |
| 32 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"))) |
| 33 | |
| 34 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 35 | _mm512_mullo_epi64 (__m512i __A, __m512i __B) { |
| 36 | return (__m512i) ((__v8di) __A * (__v8di) __B); |
| 37 | } |
| 38 | |
| 39 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 40 | _mm512_mask_mullo_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { |
| 41 | return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A, |
| 42 | (__v8di) __B, |
| 43 | (__v8di) __W, |
| 44 | (__mmask8) __U); |
| 45 | } |
| 46 | |
| 47 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 48 | _mm512_maskz_mullo_epi64 (__mmask8 __U, __m512i __A, __m512i __B) { |
| 49 | return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A, |
| 50 | (__v8di) __B, |
| 51 | (__v8di) |
| 52 | _mm512_setzero_si512 (), |
| 53 | (__mmask8) __U); |
| 54 | } |
| 55 | |
| 56 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 57 | _mm512_xor_pd (__m512d __A, __m512d __B) { |
| 58 | return (__m512d) ((__v8di) __A ^ (__v8di) __B); |
| 59 | } |
| 60 | |
| 61 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 62 | _mm512_mask_xor_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 63 | return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A, |
| 64 | (__v8df) __B, |
| 65 | (__v8df) __W, |
| 66 | (__mmask8) __U); |
| 67 | } |
| 68 | |
| 69 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 70 | _mm512_maskz_xor_pd (__mmask8 __U, __m512d __A, __m512d __B) { |
| 71 | return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A, |
| 72 | (__v8df) __B, |
| 73 | (__v8df) |
| 74 | _mm512_setzero_pd (), |
| 75 | (__mmask8) __U); |
| 76 | } |
| 77 | |
| 78 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 79 | _mm512_xor_ps (__m512 __A, __m512 __B) { |
| 80 | return (__m512) ((__v16si) __A ^ (__v16si) __B); |
| 81 | } |
| 82 | |
| 83 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 84 | _mm512_mask_xor_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 85 | return (__m512) __builtin_ia32_xorps512_mask ((__v16sf) __A, |
| 86 | (__v16sf) __B, |
| 87 | (__v16sf) __W, |
| 88 | (__mmask16) __U); |
| 89 | } |
| 90 | |
| 91 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 92 | _mm512_maskz_xor_ps (__mmask16 __U, __m512 __A, __m512 __B) { |
| 93 | return (__m512) __builtin_ia32_xorps512_mask ((__v16sf) __A, |
| 94 | (__v16sf) __B, |
| 95 | (__v16sf) |
| 96 | _mm512_setzero_ps (), |
| 97 | (__mmask16) __U); |
| 98 | } |
| 99 | |
| 100 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 101 | _mm512_or_pd (__m512d __A, __m512d __B) { |
| 102 | return (__m512d) ((__v8di) __A | (__v8di) __B); |
| 103 | } |
| 104 | |
| 105 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 106 | _mm512_mask_or_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 107 | return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A, |
| 108 | (__v8df) __B, |
| 109 | (__v8df) __W, |
| 110 | (__mmask8) __U); |
| 111 | } |
| 112 | |
| 113 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 114 | _mm512_maskz_or_pd (__mmask8 __U, __m512d __A, __m512d __B) { |
| 115 | return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A, |
| 116 | (__v8df) __B, |
| 117 | (__v8df) |
| 118 | _mm512_setzero_pd (), |
| 119 | (__mmask8) __U); |
| 120 | } |
| 121 | |
| 122 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 123 | _mm512_or_ps (__m512 __A, __m512 __B) { |
| 124 | return (__m512) ((__v16si) __A | (__v16si) __B); |
| 125 | } |
| 126 | |
| 127 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 128 | _mm512_mask_or_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 129 | return (__m512) __builtin_ia32_orps512_mask ((__v16sf) __A, |
| 130 | (__v16sf) __B, |
| 131 | (__v16sf) __W, |
| 132 | (__mmask16) __U); |
| 133 | } |
| 134 | |
| 135 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 136 | _mm512_maskz_or_ps (__mmask16 __U, __m512 __A, __m512 __B) { |
| 137 | return (__m512) __builtin_ia32_orps512_mask ((__v16sf) __A, |
| 138 | (__v16sf) __B, |
| 139 | (__v16sf) |
| 140 | _mm512_setzero_ps (), |
| 141 | (__mmask16) __U); |
| 142 | } |
| 143 | |
| 144 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 145 | _mm512_and_pd (__m512d __A, __m512d __B) { |
| 146 | return (__m512d) ((__v8di) __A & (__v8di) __B); |
| 147 | } |
| 148 | |
| 149 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 150 | _mm512_mask_and_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 151 | return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A, |
| 152 | (__v8df) __B, |
| 153 | (__v8df) __W, |
| 154 | (__mmask8) __U); |
| 155 | } |
| 156 | |
| 157 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 158 | _mm512_maskz_and_pd (__mmask8 __U, __m512d __A, __m512d __B) { |
| 159 | return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A, |
| 160 | (__v8df) __B, |
| 161 | (__v8df) |
| 162 | _mm512_setzero_pd (), |
| 163 | (__mmask8) __U); |
| 164 | } |
| 165 | |
| 166 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 167 | _mm512_and_ps (__m512 __A, __m512 __B) { |
| 168 | return (__m512) ((__v16si) __A & (__v16si) __B); |
| 169 | } |
| 170 | |
| 171 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 172 | _mm512_mask_and_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 173 | return (__m512) __builtin_ia32_andps512_mask ((__v16sf) __A, |
| 174 | (__v16sf) __B, |
| 175 | (__v16sf) __W, |
| 176 | (__mmask16) __U); |
| 177 | } |
| 178 | |
| 179 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 180 | _mm512_maskz_and_ps (__mmask16 __U, __m512 __A, __m512 __B) { |
| 181 | return (__m512) __builtin_ia32_andps512_mask ((__v16sf) __A, |
| 182 | (__v16sf) __B, |
| 183 | (__v16sf) |
| 184 | _mm512_setzero_ps (), |
| 185 | (__mmask16) __U); |
| 186 | } |
| 187 | |
| 188 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 189 | _mm512_andnot_pd (__m512d __A, __m512d __B) { |
| 190 | return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, |
| 191 | (__v8df) __B, |
| 192 | (__v8df) |
| 193 | _mm512_setzero_pd (), |
| 194 | (__mmask8) -1); |
| 195 | } |
| 196 | |
| 197 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 198 | _mm512_mask_andnot_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 199 | return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, |
| 200 | (__v8df) __B, |
| 201 | (__v8df) __W, |
| 202 | (__mmask8) __U); |
| 203 | } |
| 204 | |
| 205 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 206 | _mm512_maskz_andnot_pd (__mmask8 __U, __m512d __A, __m512d __B) { |
| 207 | return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, |
| 208 | (__v8df) __B, |
| 209 | (__v8df) |
| 210 | _mm512_setzero_pd (), |
| 211 | (__mmask8) __U); |
| 212 | } |
| 213 | |
| 214 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 215 | _mm512_andnot_ps (__m512 __A, __m512 __B) { |
| 216 | return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A, |
| 217 | (__v16sf) __B, |
| 218 | (__v16sf) |
| 219 | _mm512_setzero_ps (), |
| 220 | (__mmask16) -1); |
| 221 | } |
| 222 | |
| 223 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 224 | _mm512_mask_andnot_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 225 | return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A, |
| 226 | (__v16sf) __B, |
| 227 | (__v16sf) __W, |
| 228 | (__mmask16) __U); |
| 229 | } |
| 230 | |
| 231 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 232 | _mm512_maskz_andnot_ps (__mmask16 __U, __m512 __A, __m512 __B) { |
| 233 | return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A, |
| 234 | (__v16sf) __B, |
| 235 | (__v16sf) |
| 236 | _mm512_setzero_ps (), |
| 237 | (__mmask16) __U); |
| 238 | } |
| 239 | |
| 240 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 241 | _mm512_cvtpd_epi64 (__m512d __A) { |
| 242 | return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, |
| 243 | (__v8di) _mm512_setzero_si512(), |
| 244 | (__mmask8) -1, |
| 245 | _MM_FROUND_CUR_DIRECTION); |
| 246 | } |
| 247 | |
| 248 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 249 | _mm512_mask_cvtpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) { |
| 250 | return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, |
| 251 | (__v8di) __W, |
| 252 | (__mmask8) __U, |
| 253 | _MM_FROUND_CUR_DIRECTION); |
| 254 | } |
| 255 | |
| 256 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 257 | _mm512_maskz_cvtpd_epi64 (__mmask8 __U, __m512d __A) { |
| 258 | return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, |
| 259 | (__v8di) _mm512_setzero_si512(), |
| 260 | (__mmask8) __U, |
| 261 | _MM_FROUND_CUR_DIRECTION); |
| 262 | } |
| 263 | |
| 264 | #define _mm512_cvt_roundpd_epi64(__A, __R) __extension__ ({ \ |
| 265 | (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, \ |
| 266 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 267 | |
| 268 | #define _mm512_mask_cvt_roundpd_epi64(__W, __U, __A, __R) __extension__ ({ \ |
| 269 | (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, \ |
| 270 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 271 | |
| 272 | #define _mm512_maskz_cvt_roundpd_epi64(__U, __A, __R) __extension__ ({ \ |
| 273 | (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, \ |
| 274 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R); }) |
| 275 | |
| 276 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 277 | _mm512_cvtpd_epu64 (__m512d __A) { |
| 278 | return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, |
| 279 | (__v8di) _mm512_setzero_si512(), |
| 280 | (__mmask8) -1, |
| 281 | _MM_FROUND_CUR_DIRECTION); |
| 282 | } |
| 283 | |
| 284 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 285 | _mm512_mask_cvtpd_epu64 (__m512i __W, __mmask8 __U, __m512d __A) { |
| 286 | return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, |
| 287 | (__v8di) __W, |
| 288 | (__mmask8) __U, |
| 289 | _MM_FROUND_CUR_DIRECTION); |
| 290 | } |
| 291 | |
| 292 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 293 | _mm512_maskz_cvtpd_epu64 (__mmask8 __U, __m512d __A) { |
| 294 | return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, |
| 295 | (__v8di) _mm512_setzero_si512(), |
| 296 | (__mmask8) __U, |
| 297 | _MM_FROUND_CUR_DIRECTION); |
| 298 | } |
| 299 | |
| 300 | #define _mm512_cvt_roundpd_epu64(__A, __R) __extension__ ({ \ |
| 301 | (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, \ |
| 302 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 303 | |
| 304 | #define _mm512_mask_cvt_roundpd_epu64(__W, __U, __A, __R) __extension__ ({ \ |
| 305 | (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, \ |
| 306 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 307 | |
| 308 | #define _mm512_maskz_cvt_roundpd_epu64(__U, __A, __R) __extension__ ({ \ |
| 309 | (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, \ |
| 310 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 311 | |
| 312 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 313 | _mm512_cvtps_epi64 (__m256 __A) { |
| 314 | return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A, |
| 315 | (__v8di) _mm512_setzero_si512(), |
| 316 | (__mmask8) -1, |
| 317 | _MM_FROUND_CUR_DIRECTION); |
| 318 | } |
| 319 | |
| 320 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 321 | _mm512_mask_cvtps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) { |
| 322 | return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A, |
| 323 | (__v8di) __W, |
| 324 | (__mmask8) __U, |
| 325 | _MM_FROUND_CUR_DIRECTION); |
| 326 | } |
| 327 | |
| 328 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 329 | _mm512_maskz_cvtps_epi64 (__mmask8 __U, __m256 __A) { |
| 330 | return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A, |
| 331 | (__v8di) _mm512_setzero_si512(), |
| 332 | (__mmask8) __U, |
| 333 | _MM_FROUND_CUR_DIRECTION); |
| 334 | } |
| 335 | |
| 336 | #define _mm512_cvt_roundps_epi64(__A, __R) __extension__ ({ \ |
| 337 | (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A, \ |
| 338 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 339 | |
| 340 | #define _mm512_mask_cvt_roundps_epi64(__W, __U, __A, __R) __extension__ ({ \ |
| 341 | (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A, \ |
| 342 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 343 | |
| 344 | #define _mm512_maskz_cvt_roundps_epi64(__U, __A, __R) __extension__ ({ \ |
| 345 | (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A, \ |
| 346 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 347 | |
| 348 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 349 | _mm512_cvtps_epu64 (__m256 __A) { |
| 350 | return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A, |
| 351 | (__v8di) _mm512_setzero_si512(), |
| 352 | (__mmask8) -1, |
| 353 | _MM_FROUND_CUR_DIRECTION); |
| 354 | } |
| 355 | |
| 356 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 357 | _mm512_mask_cvtps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) { |
| 358 | return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A, |
| 359 | (__v8di) __W, |
| 360 | (__mmask8) __U, |
| 361 | _MM_FROUND_CUR_DIRECTION); |
| 362 | } |
| 363 | |
| 364 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 365 | _mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) { |
| 366 | return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A, |
| 367 | (__v8di) _mm512_setzero_si512(), |
| 368 | (__mmask8) __U, |
| 369 | _MM_FROUND_CUR_DIRECTION); |
| 370 | } |
| 371 | |
| 372 | #define _mm512_cvt_roundps_epu64(__A, __R) __extension__ ({ \ |
| 373 | (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A, \ |
| 374 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 375 | |
| 376 | #define _mm512_mask_cvt_roundps_epu64(__W, __U, __A, __R) __extension__ ({ \ |
| 377 | (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A, \ |
| 378 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 379 | |
| 380 | #define _mm512_maskz_cvt_roundps_epu64(__U, __A, __R) __extension__ ({ \ |
| 381 | (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A, \ |
| 382 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 383 | |
| 384 | |
| 385 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 386 | _mm512_cvtepi64_pd (__m512i __A) { |
| 387 | return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, |
| 388 | (__v8df) _mm512_setzero_pd(), |
| 389 | (__mmask8) -1, |
| 390 | _MM_FROUND_CUR_DIRECTION); |
| 391 | } |
| 392 | |
| 393 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 394 | _mm512_mask_cvtepi64_pd (__m512d __W, __mmask8 __U, __m512i __A) { |
| 395 | return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, |
| 396 | (__v8df) __W, |
| 397 | (__mmask8) __U, |
| 398 | _MM_FROUND_CUR_DIRECTION); |
| 399 | } |
| 400 | |
| 401 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 402 | _mm512_maskz_cvtepi64_pd (__mmask8 __U, __m512i __A) { |
| 403 | return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, |
| 404 | (__v8df) _mm512_setzero_pd(), |
| 405 | (__mmask8) __U, |
| 406 | _MM_FROUND_CUR_DIRECTION); |
| 407 | } |
| 408 | |
| 409 | #define _mm512_cvt_roundepi64_pd(__A, __R) __extension__ ({ \ |
| 410 | (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, \ |
| 411 | (__v8df) _mm512_setzero_pd(), (__mmask8) -1, __R);}) |
| 412 | |
| 413 | #define _mm512_mask_cvt_roundepi64_pd(__W, __U, __A, __R) __extension__ ({ \ |
| 414 | (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, \ |
| 415 | (__v8df) __W, (__mmask8) __U, __R);}) |
| 416 | |
| 417 | #define _mm512_maskz_cvt_roundepi64_pd(__U, __A, __R) __extension__ ({ \ |
| 418 | (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, \ |
| 419 | (__v8df) _mm512_setzero_pd(), (__mmask8) __U, __R);}) |
| 420 | |
| 421 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 422 | _mm512_cvtepi64_ps (__m512i __A) { |
| 423 | return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, |
| 424 | (__v8sf) _mm256_setzero_ps(), |
| 425 | (__mmask8) -1, |
| 426 | _MM_FROUND_CUR_DIRECTION); |
| 427 | } |
| 428 | |
| 429 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 430 | _mm512_mask_cvtepi64_ps (__m256 __W, __mmask8 __U, __m512i __A) { |
| 431 | return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, |
| 432 | (__v8sf) __W, |
| 433 | (__mmask8) __U, |
| 434 | _MM_FROUND_CUR_DIRECTION); |
| 435 | } |
| 436 | |
| 437 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 438 | _mm512_maskz_cvtepi64_ps (__mmask8 __U, __m512i __A) { |
| 439 | return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, |
| 440 | (__v8sf) _mm256_setzero_ps(), |
| 441 | (__mmask8) __U, |
| 442 | _MM_FROUND_CUR_DIRECTION); |
| 443 | } |
| 444 | |
| 445 | #define _mm512_cvt_roundepi64_ps(__A, __R) __extension__ ({ \ |
| 446 | (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, \ |
| 447 | (__v8sf) _mm256_setzero_ps(), (__mmask8) -1, __R);}) |
| 448 | |
| 449 | #define _mm512_mask_cvt_roundepi64_ps(__W, __U, __A, __R) __extension__ ({ \ |
| 450 | (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, \ |
| 451 | (__v8sf) __W, (__mmask8) __U, __R);}) |
| 452 | |
| 453 | #define _mm512_maskz_cvt_roundepi64_ps(__U, __A, __R) __extension__ ({ \ |
| 454 | (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, \ |
| 455 | (__v8sf) _mm256_setzero_ps(), (__mmask8) __U, __R);}) |
| 456 | |
| 457 | |
| 458 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 459 | _mm512_cvttpd_epi64 (__m512d __A) { |
| 460 | return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, |
| 461 | (__v8di) _mm512_setzero_si512(), |
| 462 | (__mmask8) -1, |
| 463 | _MM_FROUND_CUR_DIRECTION); |
| 464 | } |
| 465 | |
| 466 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 467 | _mm512_mask_cvttpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) { |
| 468 | return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, |
| 469 | (__v8di) __W, |
| 470 | (__mmask8) __U, |
| 471 | _MM_FROUND_CUR_DIRECTION); |
| 472 | } |
| 473 | |
| 474 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 475 | _mm512_maskz_cvttpd_epi64 (__mmask8 __U, __m512d __A) { |
| 476 | return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, |
| 477 | (__v8di) _mm512_setzero_si512(), |
| 478 | (__mmask8) __U, |
| 479 | _MM_FROUND_CUR_DIRECTION); |
| 480 | } |
| 481 | |
| 482 | #define _mm512_cvtt_roundpd_epi64(__A, __R) __extension__ ({ \ |
| 483 | (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, \ |
| 484 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 485 | |
| 486 | #define _mm512_mask_cvtt_roundpd_epi64(__W, __U, __A, __R) __extension__ ({ \ |
| 487 | (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, \ |
| 488 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 489 | |
| 490 | #define _mm512_maskz_cvtt_roundpd_epi64(__U, __A, __R) __extension__ ({ \ |
| 491 | (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, \ |
| 492 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 493 | |
| 494 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 495 | _mm512_cvttpd_epu64 (__m512d __A) { |
| 496 | return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, |
| 497 | (__v8di) _mm512_setzero_si512(), |
| 498 | (__mmask8) -1, |
| 499 | _MM_FROUND_CUR_DIRECTION); |
| 500 | } |
| 501 | |
| 502 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 503 | _mm512_mask_cvttpd_epu64 (__m512i __W, __mmask8 __U, __m512d __A) { |
| 504 | return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, |
| 505 | (__v8di) __W, |
| 506 | (__mmask8) __U, |
| 507 | _MM_FROUND_CUR_DIRECTION); |
| 508 | } |
| 509 | |
| 510 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 511 | _mm512_maskz_cvttpd_epu64 (__mmask8 __U, __m512d __A) { |
| 512 | return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, |
| 513 | (__v8di) _mm512_setzero_si512(), |
| 514 | (__mmask8) __U, |
| 515 | _MM_FROUND_CUR_DIRECTION); |
| 516 | } |
| 517 | |
| 518 | #define _mm512_cvtt_roundpd_epu64(__A, __R) __extension__ ({ \ |
| 519 | (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, \ |
| 520 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 521 | |
| 522 | #define _mm512_mask_cvtt_roundpd_epu64(__W, __U, __A, __R) __extension__ ({ \ |
| 523 | (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, \ |
| 524 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 525 | |
| 526 | #define _mm512_maskz_cvtt_roundpd_epu64(__U, __A, __R) __extension__ ({ \ |
| 527 | (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, \ |
| 528 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 529 | |
| 530 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 531 | _mm512_cvttps_epi64 (__m256 __A) { |
| 532 | return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A, |
| 533 | (__v8di) _mm512_setzero_si512(), |
| 534 | (__mmask8) -1, |
| 535 | _MM_FROUND_CUR_DIRECTION); |
| 536 | } |
| 537 | |
| 538 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 539 | _mm512_mask_cvttps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) { |
| 540 | return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A, |
| 541 | (__v8di) __W, |
| 542 | (__mmask8) __U, |
| 543 | _MM_FROUND_CUR_DIRECTION); |
| 544 | } |
| 545 | |
| 546 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 547 | _mm512_maskz_cvttps_epi64 (__mmask8 __U, __m256 __A) { |
| 548 | return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A, |
| 549 | (__v8di) _mm512_setzero_si512(), |
| 550 | (__mmask8) __U, |
| 551 | _MM_FROUND_CUR_DIRECTION); |
| 552 | } |
| 553 | |
| 554 | #define _mm512_cvtt_roundps_epi64(__A, __R) __extension__ ({ \ |
| 555 | (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A, \ |
| 556 | (__v8di) _mm512_setzero_si512(), (__mmask8) -1, __R);}) |
| 557 | |
| 558 | #define _mm512_mask_cvtt_roundps_epi64(__W, __U, __A, __R) __extension__ ({ \ |
| 559 | (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A, \ |
| 560 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 561 | |
| 562 | #define _mm512_maskz_cvtt_roundps_epi64(__U, __A, __R) __extension__ ({ \ |
| 563 | (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A, \ |
| 564 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 565 | |
| 566 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 567 | _mm512_cvttps_epu64 (__m256 __A) { |
| 568 | return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A, |
| 569 | (__v8di) _mm512_setzero_si512(), |
| 570 | (__mmask8) -1, |
| 571 | _MM_FROUND_CUR_DIRECTION); |
| 572 | } |
| 573 | |
| 574 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 575 | _mm512_mask_cvttps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) { |
| 576 | return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A, |
| 577 | (__v8di) __W, |
| 578 | (__mmask8) __U, |
| 579 | _MM_FROUND_CUR_DIRECTION); |
| 580 | } |
| 581 | |
| 582 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 583 | _mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) { |
| 584 | return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A, |
| 585 | (__v8di) _mm512_setzero_si512(), |
| 586 | (__mmask8) __U, |
| 587 | _MM_FROUND_CUR_DIRECTION); |
| 588 | } |
| 589 | |
| 590 | #define _mm512_cvtt_roundps_epu64(__A, __R) __extension__ ({ \ |
| 591 | (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A, \ |
| 592 | (__v8di) _mm512_setzero_si512(),(__mmask8) -1, __R);}) |
| 593 | |
| 594 | #define _mm512_mask_cvtt_roundps_epu64(__W, __U, __A, __R) __extension__ ({ \ |
| 595 | (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A, \ |
| 596 | (__v8di) __W, (__mmask8) __U, __R);}) |
| 597 | |
| 598 | #define _mm512_maskz_cvtt_roundps_epu64(__U, __A, __R) __extension__ ({ \ |
| 599 | (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A, \ |
| 600 | (__v8di) _mm512_setzero_si512(), (__mmask8) __U, __R);}) |
| 601 | |
| 602 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 603 | _mm512_cvtepu64_pd (__m512i __A) { |
| 604 | return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, |
| 605 | (__v8df) _mm512_setzero_pd(), |
| 606 | (__mmask8) -1, |
| 607 | _MM_FROUND_CUR_DIRECTION); |
| 608 | } |
| 609 | |
| 610 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 611 | _mm512_mask_cvtepu64_pd (__m512d __W, __mmask8 __U, __m512i __A) { |
| 612 | return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, |
| 613 | (__v8df) __W, |
| 614 | (__mmask8) __U, |
| 615 | _MM_FROUND_CUR_DIRECTION); |
| 616 | } |
| 617 | |
| 618 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 619 | _mm512_maskz_cvtepu64_pd (__mmask8 __U, __m512i __A) { |
| 620 | return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, |
| 621 | (__v8df) _mm512_setzero_pd(), |
| 622 | (__mmask8) __U, |
| 623 | _MM_FROUND_CUR_DIRECTION); |
| 624 | } |
| 625 | |
| 626 | #define _mm512_cvt_roundepu64_pd(__A, __R) __extension__ ({ \ |
| 627 | (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, \ |
| 628 | (__v8df) _mm512_setzero_pd(), (__mmask8) -1, __R);}) |
| 629 | |
| 630 | #define _mm512_mask_cvt_roundepu64_pd(__W, __U, __A, __R) __extension__ ({ \ |
| 631 | (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, \ |
| 632 | (__v8df) __W, (__mmask8) __U, __R);}) |
| 633 | |
| 634 | |
| 635 | #define _mm512_maskz_cvt_roundepu64_pd(__U, __A, __R) __extension__ ({ \ |
| 636 | (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, \ |
| 637 | (__v8df) _mm512_setzero_pd(), (__mmask8) __U, __R);}) |
| 638 | |
| 639 | |
| 640 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 641 | _mm512_cvtepu64_ps (__m512i __A) { |
| 642 | return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, |
| 643 | (__v8sf) _mm256_setzero_ps(), |
| 644 | (__mmask8) -1, |
| 645 | _MM_FROUND_CUR_DIRECTION); |
| 646 | } |
| 647 | |
| 648 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 649 | _mm512_mask_cvtepu64_ps (__m256 __W, __mmask8 __U, __m512i __A) { |
| 650 | return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, |
| 651 | (__v8sf) __W, |
| 652 | (__mmask8) __U, |
| 653 | _MM_FROUND_CUR_DIRECTION); |
| 654 | } |
| 655 | |
| 656 | static __inline__ __m256 __DEFAULT_FN_ATTRS |
| 657 | _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) { |
| 658 | return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, |
| 659 | (__v8sf) _mm256_setzero_ps(), |
| 660 | (__mmask8) __U, |
| 661 | _MM_FROUND_CUR_DIRECTION); |
| 662 | } |
| 663 | |
| 664 | #define _mm512_cvt_roundepu64_ps(__A, __R) __extension__ ({ \ |
| 665 | (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, \ |
| 666 | (__v8sf) _mm256_setzero_ps(), (__mmask8) -1, __R);}) |
| 667 | |
| 668 | #define _mm512_mask_cvt_roundepu64_ps(__W, __U, __A, __R) __extension__ ({ \ |
| 669 | (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, \ |
| 670 | (__v8sf) __W, (__mmask8) __U, __R);}) |
| 671 | |
| 672 | #define _mm512_maskz_cvt_roundepu64_ps(__U, __A, __R) __extension__ ({ \ |
| 673 | (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, \ |
| 674 | (__v8sf) _mm256_setzero_ps(), (__mmask8) __U, __R);}) |
| 675 | |
| 676 | #define _mm512_range_pd(__A, __B, __C) __extension__ ({ \ |
| 677 | (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A, (__v8df) __B, __C,\ |
| 678 | (__v8df) _mm512_setzero_pd(), (__mmask8) -1, \ |
| 679 | _MM_FROUND_CUR_DIRECTION);}) |
| 680 | |
| 681 | #define _mm512_mask_range_pd(__W, __U, __A, __B, __C) __extension__ ({ \ |
| 682 | (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A, (__v8df) __B, __C,\ |
| 683 | (__v8df) __W, (__mmask8) __U, _MM_FROUND_CUR_DIRECTION);}) |
| 684 | |
| 685 | #define _mm512_maskz_range_pd(__U, __A, __B, __C) __extension__ ({ \ |
| 686 | (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A, (__v8df) __B, __C, \ |
| 687 | (__v8df) _mm512_setzero_pd(), (__mmask8) __U, \ |
| 688 | _MM_FROUND_CUR_DIRECTION);}) |
| 689 | |
| 690 | #define _mm512_range_round_pd(__A, __B, __C, __R) __extension__ ({ \ |
| 691 | (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A, (__v8df) __B, __C, \ |
| 692 | (__v8df) _mm512_setzero_pd(), (__mmask8) -1, __R);}) |
| 693 | |
| 694 | #define _mm512_mask_range_round_pd(__W, __U, __A, __B, __C, __R) __extension__ ({ \ |
| 695 | (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A, (__v8df) __B, __C, \ |
| 696 | (__v8df) __W, (__mmask8) __U, __R);}) |
| 697 | |
| 698 | #define _mm512_maskz_range_round_pd(__U, __A, __B, __C, __R) __extension__ ({ \ |
| 699 | (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A, (__v8df) __B, __C, \ |
| 700 | (__v8df) _mm512_setzero_pd(), (__mmask8) __U, __R);}) |
| 701 | |
| 702 | #define _mm512_range_ps(__A, __B, __C) __extension__ ({ \ |
| 703 | (__m512) __builtin_ia32_rangeps512_mask ((__v16sf) __A, (__v16sf) __B, __C, \ |
| 704 | (__v16sf) _mm512_setzero_ps(), (__mmask16) -1, \ |
| 705 | _MM_FROUND_CUR_DIRECTION);}) |
| 706 | |
| 707 | #define _mm512_mask_range_ps(__W, __U, __A, __B, __C) __extension__ ({ \ |
| 708 | (__m512) __builtin_ia32_rangeps512_mask ((__v16sf) __A, (__v16sf) __B, \ |
| 709 | __C, (__v16sf) __W, (__mmask16) __U, _MM_FROUND_CUR_DIRECTION);}) |
| 710 | |
| 711 | #define _mm512_maskz_range_ps(__U, __A, __B, __C) __extension__ ({ \ |
| 712 | (__m512) __builtin_ia32_rangeps512_mask ((__v16sf) __A,(__v16sf) __B, \ |
| 713 | __C, (__v16sf) _mm512_setzero_ps(), (__mmask16) __U, \ |
| 714 | _MM_FROUND_CUR_DIRECTION);}) |
| 715 | |
| 716 | #define _mm512_range_round_ps(__A, __B, __C, __R) __extension__ ({ \ |
| 717 | (__m512) __builtin_ia32_rangeps512_mask ((__v16sf) __A, (__v16sf) __B, \ |
| 718 | __C, (__v16sf) _mm512_setzero_ps(), (__mmask16) -1, __R);}) |
| 719 | |
| 720 | #define _mm512_mask_range_round_ps(__W, __U, __A, __B, __C, __R) __extension__ ({ \ |
| 721 | (__m512) __builtin_ia32_rangeps512_mask ((__v16sf) __A, (__v16sf) __B, \ |
| 722 | __C, (__v16sf) __W, (__mmask16) __U, __R);}) |
| 723 | |
| 724 | #define _mm512_maskz_range_round_ps(__U, __A, __B, __C, __R) __extension__ ({ \ |
| 725 | (__m512) __builtin_ia32_rangeps512_mask ((__v16sf) __A, (__v16sf) __B, \ |
| 726 | __C, (__v16sf) _mm512_setzero_ps(), (__mmask16) __U, __R);}) |
| 727 | |
| 728 | #define _mm512_reduce_pd(__A, __B) __extension__ ({ \ |
| 729 | (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B, \ |
| 730 | (__v8df) _mm512_setzero_pd(), (__mmask8) -1, _MM_FROUND_CUR_DIRECTION);}) |
| 731 | |
| 732 | #define _mm512_mask_reduce_pd(__W, __U, __A, __B) __extension__ ({ \ |
| 733 | (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B, \ |
| 734 | (__v8df) __W,(__mmask8) __U, _MM_FROUND_CUR_DIRECTION);}) |
| 735 | |
| 736 | #define _mm512_maskz_reduce_pd(__U, __A, __B) __extension__ ({ \ |
| 737 | (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B, \ |
| 738 | (__v8df) _mm512_setzero_pd(), (__mmask8) __U, _MM_FROUND_CUR_DIRECTION);}) |
| 739 | |
| 740 | #define _mm512_reduce_ps(__A, __B) __extension__ ({ \ |
| 741 | (__m512) __builtin_ia32_reduceps512_mask ((__v16sf) __A, __B, \ |
| 742 | (__v16sf) _mm512_setzero_ps(), (__mmask16) -1, _MM_FROUND_CUR_DIRECTION);}) |
| 743 | |
| 744 | #define _mm512_mask_reduce_ps(__W, __U, __A, __B) __extension__ ({ \ |
| 745 | (__m512) __builtin_ia32_reduceps512_mask ((__v16sf) __A, __B, \ |
| 746 | (__v16sf) __W, (__mmask16) __U, _MM_FROUND_CUR_DIRECTION);}) |
| 747 | |
| 748 | #define _mm512_maskz_reduce_ps(__U, __A, __B) __extension__ ({ \ |
| 749 | (__m512) __builtin_ia32_reduceps512_mask ((__v16sf) __A, __B, \ |
| 750 | (__v16sf) _mm512_setzero_ps(), (__mmask16) __U, _MM_FROUND_CUR_DIRECTION);}) |
| 751 | |
| 752 | #define _mm512_reduce_round_pd(__A, __B, __R) __extension__ ({\ |
| 753 | (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B, \ |
| 754 | (__v8df) _mm512_setzero_pd(), (__mmask8) -1, __R);}) |
| 755 | |
| 756 | #define _mm512_mask_reduce_round_pd(__W, __U, __A, __B, __R) __extension__ ({\ |
| 757 | (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B, \ |
| 758 | (__v8df) __W,(__mmask8) __U, __R);}) |
| 759 | |
| 760 | #define _mm512_maskz_reduce_round_pd(__U, __A, __B, __R) __extension__ ({\ |
| 761 | (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B, \ |
| 762 | (__v8df) _mm512_setzero_pd(), (__mmask8) __U, __R);}) |
| 763 | |
| 764 | #define _mm512_reduce_round_ps(__A, __B, __R) __extension__ ({\ |
| 765 | (__m512) __builtin_ia32_reduceps512_mask ((__v16sf) __A, __B, \ |
| 766 | (__v16sf) _mm512_setzero_ps(), (__mmask16) -1, __R);}) |
| 767 | |
| 768 | #define _mm512_mask_reduce_round_ps(__W, __U, __A, __B, __R) __extension__ ({\ |
| 769 | (__m512) __builtin_ia32_reduceps512_mask ((__v16sf) __A, __B, \ |
| 770 | (__v16sf) __W, (__mmask16) __U, __R);}) |
| 771 | |
| 772 | #define _mm512_maskz_reduce_round_ps(__U, __A, __B, __R) __extension__ ({\ |
| 773 | (__m512) __builtin_ia32_reduceps512_mask ((__v16sf) __A, __B, \ |
| 774 | (__v16sf) _mm512_setzero_ps(), (__mmask16) __U, __R);}) |
| 775 | |
Ben Murdoch | 61f157c | 2016-09-16 13:49:30 +0100 | [diff] [blame] | 776 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS |
| 777 | _mm512_movepi32_mask (__m512i __A) |
| 778 | { |
| 779 | return (__mmask16) __builtin_ia32_cvtd2mask512 ((__v16si) __A); |
| 780 | } |
| 781 | |
| 782 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 783 | _mm512_movm_epi32 (__mmask16 __A) |
| 784 | { |
| 785 | return (__m512i) __builtin_ia32_cvtmask2d512 (__A); |
| 786 | } |
| 787 | |
| 788 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 789 | _mm512_movm_epi64 (__mmask8 __A) |
| 790 | { |
| 791 | return (__m512i) __builtin_ia32_cvtmask2q512 (__A); |
| 792 | } |
| 793 | |
| 794 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS |
| 795 | _mm512_movepi64_mask (__m512i __A) |
| 796 | { |
| 797 | return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A); |
| 798 | } |
| 799 | |
| 800 | |
| 801 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 802 | _mm512_broadcast_f32x2 (__m128 __A) |
| 803 | { |
| 804 | return (__m512) __builtin_ia32_broadcastf32x2_512_mask ((__v4sf) __A, |
| 805 | (__v16sf)_mm512_undefined_ps(), |
| 806 | (__mmask16) - 1); |
| 807 | } |
| 808 | |
| 809 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 810 | _mm512_mask_broadcast_f32x2 (__m512 __O, __mmask16 __M, __m128 __A) |
| 811 | { |
| 812 | return (__m512) __builtin_ia32_broadcastf32x2_512_mask ((__v4sf) __A, |
| 813 | (__v16sf) |
| 814 | __O, __M); |
| 815 | } |
| 816 | |
| 817 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 818 | _mm512_maskz_broadcast_f32x2 (__mmask16 __M, __m128 __A) |
| 819 | { |
| 820 | return (__m512) __builtin_ia32_broadcastf32x2_512_mask ((__v4sf) __A, |
| 821 | (__v16sf)_mm512_setzero_ps (), |
| 822 | __M); |
| 823 | } |
| 824 | |
| 825 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 826 | _mm512_broadcast_f32x8 (__m256 __A) |
| 827 | { |
| 828 | return (__m512) __builtin_ia32_broadcastf32x8_512_mask ((__v8sf) __A, |
| 829 | _mm512_undefined_ps(), |
| 830 | (__mmask16) - 1); |
| 831 | } |
| 832 | |
| 833 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 834 | _mm512_mask_broadcast_f32x8 (__m512 __O, __mmask16 __M, __m256 __A) |
| 835 | { |
| 836 | return (__m512) __builtin_ia32_broadcastf32x8_512_mask ((__v8sf) __A, |
| 837 | (__v16sf)__O, |
| 838 | __M); |
| 839 | } |
| 840 | |
| 841 | static __inline__ __m512 __DEFAULT_FN_ATTRS |
| 842 | _mm512_maskz_broadcast_f32x8 (__mmask16 __M, __m256 __A) |
| 843 | { |
| 844 | return (__m512) __builtin_ia32_broadcastf32x8_512_mask ((__v8sf) __A, |
| 845 | (__v16sf)_mm512_setzero_ps (), |
| 846 | __M); |
| 847 | } |
| 848 | |
| 849 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 850 | _mm512_broadcast_f64x2 (__m128d __A) |
| 851 | { |
| 852 | return (__m512d) __builtin_ia32_broadcastf64x2_512_mask ((__v2df) __A, |
| 853 | (__v8df)_mm512_undefined_pd(), |
| 854 | (__mmask8) - 1); |
| 855 | } |
| 856 | |
| 857 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 858 | _mm512_mask_broadcast_f64x2 (__m512d __O, __mmask8 __M, __m128d __A) |
| 859 | { |
| 860 | return (__m512d) __builtin_ia32_broadcastf64x2_512_mask ((__v2df) __A, |
| 861 | (__v8df) |
| 862 | __O, __M); |
| 863 | } |
| 864 | |
| 865 | static __inline__ __m512d __DEFAULT_FN_ATTRS |
| 866 | _mm512_maskz_broadcast_f64x2 (__mmask8 __M, __m128d __A) |
| 867 | { |
| 868 | return (__m512d) __builtin_ia32_broadcastf64x2_512_mask ((__v2df) __A, |
| 869 | (__v8df)_mm512_setzero_ps (), |
| 870 | __M); |
| 871 | } |
| 872 | |
| 873 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 874 | _mm512_broadcast_i32x2 (__m128i __A) |
| 875 | { |
| 876 | return (__m512i) __builtin_ia32_broadcasti32x2_512_mask ((__v4si) __A, |
| 877 | (__v16si)_mm512_setzero_si512(), |
| 878 | (__mmask16) - 1); |
| 879 | } |
| 880 | |
| 881 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 882 | _mm512_mask_broadcast_i32x2 (__m512i __O, __mmask16 __M, __m128i __A) |
| 883 | { |
| 884 | return (__m512i) __builtin_ia32_broadcasti32x2_512_mask ((__v4si) __A, |
| 885 | (__v16si) |
| 886 | __O, __M); |
| 887 | } |
| 888 | |
| 889 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 890 | _mm512_maskz_broadcast_i32x2 (__mmask16 __M, __m128i __A) |
| 891 | { |
| 892 | return (__m512i) __builtin_ia32_broadcasti32x2_512_mask ((__v4si) __A, |
| 893 | (__v16si)_mm512_setzero_si512 (), |
| 894 | __M); |
| 895 | } |
| 896 | |
| 897 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 898 | _mm512_broadcast_i32x8 (__m256i __A) |
| 899 | { |
| 900 | return (__m512i) __builtin_ia32_broadcasti32x8_512_mask ((__v8si) __A, |
| 901 | (__v16si)_mm512_setzero_si512(), |
| 902 | (__mmask16) - 1); |
| 903 | } |
| 904 | |
| 905 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 906 | _mm512_mask_broadcast_i32x8 (__m512i __O, __mmask16 __M, __m256i __A) |
| 907 | { |
| 908 | return (__m512i) __builtin_ia32_broadcasti32x8_512_mask ((__v8si) __A, |
| 909 | (__v16si)__O, |
| 910 | __M); |
| 911 | } |
| 912 | |
| 913 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 914 | _mm512_maskz_broadcast_i32x8 (__mmask16 __M, __m256i __A) |
| 915 | { |
| 916 | return (__m512i) __builtin_ia32_broadcasti32x8_512_mask ((__v8si) __A, |
| 917 | (__v16si) |
| 918 | _mm512_setzero_si512 (), |
| 919 | __M); |
| 920 | } |
| 921 | |
| 922 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 923 | _mm512_broadcast_i64x2 (__m128i __A) |
| 924 | { |
| 925 | return (__m512i) __builtin_ia32_broadcasti64x2_512_mask ((__v2di) __A, |
| 926 | (__v8di)_mm512_setzero_si512(), |
| 927 | (__mmask8) - 1); |
| 928 | } |
| 929 | |
| 930 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 931 | _mm512_mask_broadcast_i64x2 (__m512i __O, __mmask8 __M, __m128i __A) |
| 932 | { |
| 933 | return (__m512i) __builtin_ia32_broadcasti64x2_512_mask ((__v2di) __A, |
| 934 | (__v8di) |
| 935 | __O, __M); |
| 936 | } |
| 937 | |
| 938 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 939 | _mm512_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A) |
| 940 | { |
| 941 | return (__m512i) __builtin_ia32_broadcasti64x2_512_mask ((__v2di) __A, |
| 942 | (__v8di)_mm512_setzero_si512 (), |
| 943 | __M); |
| 944 | } |
| 945 | |
| 946 | #define _mm512_extractf32x8_ps( __A, __imm) __extension__ ({ \ |
| 947 | __builtin_ia32_extractf32x8_mask ((__v16sf)( __A),\ |
| 948 | ( __imm),\ |
| 949 | (__v8sf) _mm256_setzero_ps (),\ |
| 950 | (__mmask8) -1);\ |
| 951 | }) |
| 952 | |
| 953 | #define _mm512_mask_extractf32x8_ps( __W, __U, __A, __imm) __extension__ ({ \ |
| 954 | __builtin_ia32_extractf32x8_mask ((__v16sf)( __A),\ |
| 955 | ( __imm),\ |
| 956 | (__v8sf)( __W),\ |
| 957 | (__mmask8)( __U));\ |
| 958 | }) |
| 959 | |
| 960 | #define _mm512_maskz_extractf32x8_ps( __U, __A, __imm) __extension__ ({ \ |
| 961 | __builtin_ia32_extractf32x8_mask ((__v16sf)( __A),\ |
| 962 | ( __imm),\ |
| 963 | (__v8sf) _mm256_setzero_ps (),\ |
| 964 | (__mmask8)( __U));\ |
| 965 | }) |
| 966 | |
| 967 | #define _mm512_extractf64x2_pd( __A, __imm) __extension__ ({ \ |
| 968 | __builtin_ia32_extractf64x2_512_mask ((__v8df)( __A),\ |
| 969 | ( __imm),\ |
| 970 | (__v2df) _mm_setzero_pd (),\ |
| 971 | (__mmask8) -1);\ |
| 972 | }) |
| 973 | |
| 974 | #define _mm512_mask_extractf64x2_pd( __W, __U, __A, __imm) __extension__ ({ \ |
| 975 | __builtin_ia32_extractf64x2_512_mask ((__v8df)( __A),\ |
| 976 | ( __imm),\ |
| 977 | (__v2df)( __W),\ |
| 978 | (__mmask8) ( __U));\ |
| 979 | }) |
| 980 | |
| 981 | #define _mm512_maskz_extractf64x2_pd( __U, __A, __imm) __extension__ ({ \ |
| 982 | __builtin_ia32_extractf64x2_512_mask ((__v8df)( __A),\ |
| 983 | ( __imm),\ |
| 984 | (__v2df) _mm_setzero_pd (),\ |
| 985 | (__mmask8) ( __U));\ |
| 986 | }) |
| 987 | |
| 988 | #define _mm512_extracti32x8_epi32( __A, __imm) __extension__ ({ \ |
| 989 | __builtin_ia32_extracti32x8_mask ((__v16si)( __A),\ |
| 990 | ( __imm),\ |
| 991 | (__v8si) _mm256_setzero_si256 (),\ |
| 992 | (__mmask8) -1);\ |
| 993 | }) |
| 994 | |
| 995 | #define _mm512_mask_extracti32x8_epi32( __W, __U, __A, __imm) __extension__ ({ \ |
| 996 | __builtin_ia32_extracti32x8_mask ((__v16si)( __A),\ |
| 997 | ( __imm),\ |
| 998 | (__v8si)( __W),\ |
| 999 | (__mmask8)( __U));\ |
| 1000 | }) |
| 1001 | |
| 1002 | #define _mm512_maskz_extracti32x8_epi32( __U, __A, __imm) __extension__ ({ \ |
| 1003 | __builtin_ia32_extracti32x8_mask ((__v16si)( __A),\ |
| 1004 | ( __imm),\ |
| 1005 | (__v8si) _mm256_setzero_si256 (),\ |
| 1006 | (__mmask8)( __U));\ |
| 1007 | }) |
| 1008 | |
| 1009 | #define _mm512_extracti64x2_epi64( __A, __imm) __extension__ ({ \ |
| 1010 | __builtin_ia32_extracti64x2_512_mask ((__v8di)( __A),\ |
| 1011 | ( __imm),\ |
| 1012 | (__v2di) _mm_setzero_di (),\ |
| 1013 | (__mmask8) -1);\ |
| 1014 | }) |
| 1015 | |
| 1016 | #define _mm512_mask_extracti64x2_epi64( __W, __U, __A, __imm) __extension__ ({ \ |
| 1017 | __builtin_ia32_extracti64x2_512_mask ((__v8di)( __A),\ |
| 1018 | ( __imm),\ |
| 1019 | (__v2di)( __W),\ |
| 1020 | (__mmask8) ( __U));\ |
| 1021 | }) |
| 1022 | |
| 1023 | #define _mm512_maskz_extracti64x2_epi64( __U, __A, __imm) __extension__ ({ \ |
| 1024 | __builtin_ia32_extracti64x2_512_mask ((__v8di)( __A),\ |
| 1025 | ( __imm),\ |
| 1026 | (__v2di) _mm_setzero_di (),\ |
| 1027 | (__mmask8) ( __U));\ |
| 1028 | }) |
| 1029 | |
| 1030 | #define _mm512_insertf64x2( __A, __B, __imm) __extension__ ({ \ |
| 1031 | __builtin_ia32_insertf64x2_512_mask ((__v8df)( __A),\ |
| 1032 | (__v2df)( __B),\ |
| 1033 | ( __imm),\ |
| 1034 | (__v8df) _mm512_setzero_pd (),\ |
| 1035 | (__mmask8) -1);\ |
| 1036 | }) |
| 1037 | |
| 1038 | #define _mm512_mask_insertf64x2( __W, __U, __A, __B, __imm) __extension__ ({ \ |
| 1039 | __builtin_ia32_insertf64x2_512_mask ((__v8df)( __A),\ |
| 1040 | (__v2df)( __B),\ |
| 1041 | ( __imm),\ |
| 1042 | (__v8df)( __W),\ |
| 1043 | (__mmask8) ( __U));\ |
| 1044 | }) |
| 1045 | |
| 1046 | #define _mm512_maskz_insertf64x2( __U, __A, __B, __imm) __extension__ ({ \ |
| 1047 | __builtin_ia32_insertf64x2_512_mask ((__v8df)( __A),\ |
| 1048 | (__v2df)( __B),\ |
| 1049 | ( __imm),\ |
| 1050 | (__v8df) _mm512_setzero_pd (),\ |
| 1051 | (__mmask8) ( __U));\ |
| 1052 | }) |
| 1053 | |
| 1054 | #define _mm512_inserti32x8( __A, __B, __imm) __extension__ ({ \ |
| 1055 | __builtin_ia32_inserti32x8_mask ((__v16si)( __A),\ |
| 1056 | (__v8si)( __B),\ |
| 1057 | ( __imm),\ |
| 1058 | (__v16si) _mm512_setzero_si512 (),\ |
| 1059 | (__mmask16) -1);\ |
| 1060 | }) |
| 1061 | |
| 1062 | #define _mm512_mask_inserti32x8( __W, __U, __A, __B, __imm) __extension__ ({ \ |
| 1063 | __builtin_ia32_inserti32x8_mask ((__v16si)( __A),\ |
| 1064 | (__v8si)( __B),\ |
| 1065 | ( __imm),\ |
| 1066 | (__v16si)( __W),\ |
| 1067 | (__mmask16)( __U));\ |
| 1068 | }) |
| 1069 | |
| 1070 | #define _mm512_maskz_inserti32x8( __U, __A, __B, __imm) __extension__ ({ \ |
| 1071 | __builtin_ia32_inserti32x8_mask ((__v16si)( __A),\ |
| 1072 | (__v8si)( __B),\ |
| 1073 | ( __imm),\ |
| 1074 | (__v16si) _mm512_setzero_si512 (),\ |
| 1075 | (__mmask16)( __U));\ |
| 1076 | }) |
| 1077 | |
| 1078 | #define _mm512_inserti64x2( __A, __B, __imm) __extension__ ({ \ |
| 1079 | __builtin_ia32_inserti64x2_512_mask ((__v8di)( __A),\ |
| 1080 | (__v2di)( __B),\ |
| 1081 | ( __imm),\ |
| 1082 | (__v8di) _mm512_setzero_si512 (),\ |
| 1083 | (__mmask8) -1);\ |
| 1084 | }) |
| 1085 | |
| 1086 | #define _mm512_mask_inserti64x2( __W, __U, __A, __B, __imm) __extension__ ({ \ |
| 1087 | __builtin_ia32_inserti64x2_512_mask ((__v8di)( __A),\ |
| 1088 | (__v2di)( __B),\ |
| 1089 | ( __imm),\ |
| 1090 | (__v8di)( __W),\ |
| 1091 | (__mmask8) ( __U));\ |
| 1092 | }) |
| 1093 | |
| 1094 | #define _mm512_maskz_inserti64x2( __U, __A, __B, __imm) __extension__ ({ \ |
| 1095 | __builtin_ia32_inserti64x2_512_mask ((__v8di)( __A),\ |
| 1096 | (__v2di)( __B),\ |
| 1097 | ( __imm),\ |
| 1098 | (__v8di) _mm512_setzero_si512 (),\ |
| 1099 | (__mmask8) ( __U));\ |
| 1100 | }) |
| 1101 | |
| 1102 | #define _mm512_mask_fpclass_ps_mask( __U, __A, __imm) __extension__ ({ \ |
| 1103 | __builtin_ia32_fpclassps512_mask ((__v16sf)( __A),\ |
| 1104 | ( __imm),\ |
| 1105 | ( __U));\ |
| 1106 | }) |
| 1107 | |
| 1108 | #define _mm512_fpclass_ps_mask( __A, __imm) __extension__ ({ \ |
| 1109 | __builtin_ia32_fpclassps512_mask ((__v16sf)( __A),\ |
| 1110 | ( __imm),\ |
| 1111 | (__mmask16) -1);\ |
| 1112 | }) |
| 1113 | |
| 1114 | #define _mm512_mask_fpclass_pd_mask( __U, __A, __imm) __extension__ ({ \ |
| 1115 | __builtin_ia32_fpclasspd512_mask ((__v8df)( __A),\ |
| 1116 | ( __imm),( __U));\ |
| 1117 | }) |
| 1118 | |
| 1119 | #define _mm512_fpclass_pd_mask( __A, __imm) __extension__ ({ \ |
| 1120 | __builtin_ia32_fpclasspd512_mask ((__v8df)( __A),\ |
| 1121 | ( __imm),\ |
| 1122 | (__mmask8) -1);\ |
| 1123 | }) |
| 1124 | |
| 1125 | #define _mm_fpclass_sd_mask( __A, __imm) __extension__ ({ \ |
| 1126 | __builtin_ia32_fpclasssd_mask ((__v2df)( __A), ( __imm), (__mmask8) -1);\ |
| 1127 | }) |
| 1128 | |
| 1129 | #define _mm_mask_fpclass_sd_mask( __U,__A, __imm) __extension__ ({ \ |
| 1130 | __builtin_ia32_fpclasssd_mask ((__v2df)( __A), ( __imm), (__mmask8) __U);\ |
| 1131 | }) |
| 1132 | |
| 1133 | #define _mm_fpclass_ss_mask( __A, __imm) __extension__ ({ \ |
| 1134 | __builtin_ia32_fpclassss_mask ((__v4sf)( __A), ( __imm), (__mmask8) -1);\ |
| 1135 | }) |
| 1136 | |
| 1137 | #define _mm_mask_fpclass_ss_mask(__U ,__A, __imm) __extension__ ({ \ |
| 1138 | __builtin_ia32_fpclassss_mask ((__v4sf)( __A), ( __imm), (__mmask8) __U);\ |
| 1139 | }) |
| 1140 | |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 1141 | #undef __DEFAULT_FN_ATTRS |
| 1142 | |
| 1143 | #endif |