Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 1 | /* |
| 2 | * spi-uart debug routings |
| 3 | * Copyright (C) 2008, Feng Tang <feng.tang@intel.com> Intel Corporation. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., |
| 16 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 17 | * |
| 18 | */ |
| 19 | |
| 20 | #include "spi-uart.h" |
Alek Du | a8cef7f | 2009-06-04 15:02:03 +0800 | [diff] [blame] | 21 | #include "bootstub.h" |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 22 | |
| 23 | #define MRST_SPI_TIMEOUT 0x200000 |
Alek Du | c8496d1 | 2008-07-10 14:46:17 +0800 | [diff] [blame] | 24 | static int spi_inited = 0; |
Alek Du | a8cef7f | 2009-06-04 15:02:03 +0800 | [diff] [blame] | 25 | static volatile struct mrst_spi_reg *pspi = 0; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 26 | |
| 27 | static void spi_init() |
| 28 | { |
| 29 | u32 ctrlr0; |
Jacob Pan | 438855b | 2009-08-20 12:37:15 -0700 | [diff] [blame] | 30 | u32 *clk_reg, clk_cdiv; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 31 | |
Alek Du | a8cef7f | 2009-06-04 15:02:03 +0800 | [diff] [blame] | 32 | switch (*(int *)SPI_TYPE) { |
| 33 | case 0: |
| 34 | pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0; |
| 35 | break; |
| 36 | case 1: |
| 37 | pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI1; |
| 38 | break; |
| 39 | default: |
| 40 | pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0; |
| 41 | } |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 42 | /* disable SPI controller first */ |
| 43 | pspi->ssienr = 0x0; |
| 44 | |
| 45 | /* set control param, 16 bits, transmit only mode */ |
| 46 | ctrlr0 = pspi->ctrlr0; |
| 47 | |
| 48 | ctrlr0 &= 0xfcc0; |
| 49 | ctrlr0 |= (0xf | (FRF_SPI << SPI_FRF_OFFSET) |
| 50 | | (TMOD_TO << SPI_TMOD_OFFSET)); |
| 51 | pspi->ctrlr0 = ctrlr0; |
| 52 | |
| 53 | /* set a default baud rate, 115200 */ |
Jacob Pan | 438855b | 2009-08-20 12:37:15 -0700 | [diff] [blame] | 54 | /* get SPI controller operating freq info */ |
| 55 | clk_reg = (u32 *)MRST_CLK_SPI0_REG; |
| 56 | clk_cdiv = ((*clk_reg) & CLK_SPI_CDIV_MASK) >> CLK_SPI_CDIV_OFFSET; |
| 57 | pspi->baudr = MRST_SPI_CLK_BASE / (clk_cdiv + 1) / 115200; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 58 | |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 59 | /* disable all INT for early phase */ |
| 60 | pspi->imr &= 0xffffff00; |
| 61 | |
| 62 | /* select one slave SPI device */ |
Alek Du | 3f5527f | 2008-06-17 14:08:35 +0800 | [diff] [blame] | 63 | pspi->ser = 0x2; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 64 | |
| 65 | /* enable the HW, this should be the last step for HW init */ |
| 66 | pspi->ssienr |= 0x1; |
| 67 | |
| 68 | spi_inited = 1; |
| 69 | } |
| 70 | |
| 71 | /* set the ratio rate, INT */ |
| 72 | static void max3110_write_config(void) |
| 73 | { |
| 74 | u16 config; |
| 75 | |
| 76 | /* 115200, TM not set, no parity, 8bit word */ |
Alek Du | b7b3000 | 2008-08-21 09:49:20 +0800 | [diff] [blame] | 77 | config = 0xc001; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 78 | pspi->dr[0] = config; |
| 79 | } |
| 80 | |
| 81 | /* transfer char to a eligibal word and send to max3110 */ |
Alek Du | c8496d1 | 2008-07-10 14:46:17 +0800 | [diff] [blame] | 82 | static void max3110_write_data(char c) |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 83 | { |
| 84 | u16 data; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 85 | |
| 86 | data = 0x8000 | c; |
| 87 | pspi->dr[0] = data; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | /* slave select should be called in the read/write function */ |
| 91 | static int spi_max3110_putc(char c) |
| 92 | { |
| 93 | unsigned int timeout; |
| 94 | u32 sr; |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 95 | |
| 96 | timeout = MRST_SPI_TIMEOUT; |
Alek Du | a24ea5c | 2009-05-26 09:56:47 +0800 | [diff] [blame] | 97 | /* early putc need make sure the TX FIFO is not full*/ |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 98 | while (timeout--) { |
| 99 | sr = pspi->sr; |
Alek Du | a8cef7f | 2009-06-04 15:02:03 +0800 | [diff] [blame] | 100 | if (!(sr & SR_TF_NOT_FULL)) |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 101 | continue; |
| 102 | else |
| 103 | break; |
| 104 | } |
| 105 | |
| 106 | if (timeout == 0xffffffff) |
| 107 | return -1; |
| 108 | |
| 109 | max3110_write_data(c); |
| 110 | |
| 111 | return 0; |
| 112 | } |
| 113 | |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 114 | void bs_spi_printk(const char *str) |
| 115 | { |
Alek Du | a8cef7f | 2009-06-04 15:02:03 +0800 | [diff] [blame] | 116 | if (!spi_inited) { |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 117 | spi_init(); |
Alek Du | a8cef7f | 2009-06-04 15:02:03 +0800 | [diff] [blame] | 118 | max3110_write_config(); |
| 119 | } |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 120 | |
| 121 | if (!str) |
| 122 | return; |
| 123 | |
Alek Du | 7eac544 | 2008-06-05 17:38:56 +0800 | [diff] [blame] | 124 | while (*str) { |
| 125 | if (*str == '\n') |
| 126 | spi_max3110_putc('\r'); |
| 127 | spi_max3110_putc(*str++); |
| 128 | } |
| 129 | } |