blob: a109c09f351c4f596fc6b54aa48c8529a62831dd [file] [log] [blame]
Alek Dub7f7baf2008-05-13 16:23:15 +08001/* define bootstub constrains here, like memory map etc.
2 */
3
4#ifndef _BOOT_STUB_HEAD
5#define _BOOT_STUB_HEAD
6
Bin Gao8a13ab72013-03-30 00:11:07 -07007#define CPUID_MASK 0xffff0
Leonard Mai4c56e452011-10-06 12:27:46 -07008#define PENWELL_FAMILY 0x20670
9#define CLOVERVIEW_FAMILY 0x30650
Bin Gao8a13ab72013-03-30 00:11:07 -070010#define VALLEYVIEW2_FAMILY 0x30670
Mark F. Brown90847a82011-09-07 18:06:24 -040011#define TANGIER_FAMILY 0x406A0
12#define ANNIEDALE_FAMILY 0x506A0
Bin Gao8a13ab72013-03-30 00:11:07 -070013
Eric Ernstaecaba32013-04-02 12:02:59 -070014#define MID_CPU_CHIP_LINCROFT 1
15#define MID_CPU_CHIP_PENWELL 2
16#define MID_CPU_CHIP_CLOVERVIEW 3
17#define MID_CPU_CHIP_VALLEYVIEW2 4
Mark F. Brown90847a82011-09-07 18:06:24 -040018#define MID_CPU_CHIP_TANGIER 5
19#define MID_CPU_CHIP_ANNIEDALE 6
Eric Ernstaecaba32013-04-02 12:02:59 -070020#define MID_CPU_CHIP_OTHER 0xFF
Leonard Mai4c56e452011-10-06 12:27:46 -070021
Florent Augerb5c97f52014-07-09 12:54:50 +020022#define BASE_ADDRESS 0x01100000
23
24#define CMDLINE_OFFSET BASE_ADDRESS
Jeremy Compostella1a86f0a2011-10-24 16:45:08 +020025#define BZIMAGE_SIZE_OFFSET (CMDLINE_OFFSET + CMDLINE_SIZE)
26#define INITRD_SIZE_OFFSET (BZIMAGE_SIZE_OFFSET + 4)
27#define SPI_UART_SUPPRESSION (INITRD_SIZE_OFFSET + 4)
Florent Augerb5c97f52014-07-09 12:54:50 +020028#define AOSP_HEADER_ADDRESS 0x10007800
29
Jeremy Compostella1a86f0a2011-10-24 16:45:08 +020030#define SPI_TYPE (SPI_UART_SUPPRESSION + 4) /*0:SPI0 1:SPI1*/
Eric Ernstaecaba32013-04-02 12:02:59 -070031#define SPI_0 0
32#define SPI_1 1
Mark F. Brown90847a82011-09-07 18:06:24 -040033#define SPI_2 2
Eric Ernstaecaba32013-04-02 12:02:59 -070034
Evgeny Kalugin8e8bf002013-10-24 11:21:07 +030035#define FLAGS_RESERVED_0 (SPI_TYPE + 4)
36#define FLAGS_RESERVED_1 (FLAGS_RESERVED_0 + 4)
37#define VXE_FW_SIZE_OFFSET (FLAGS_RESERVED_1 + 4)
38#define SEC_PLAT_SVCS_SIZE_OFFSET (VXE_FW_SIZE_OFFSET + 4)
39#define XEN_SIZE_OFFSET (SEC_PLAT_SVCS_SIZE_OFFSET + 4)
40
Florent Augerb5c97f52014-07-09 12:54:50 +020041#define BOOTSTUB_OFFSET (BASE_ADDRESS + 0x1000)
42#define STACK_OFFSET 0x10f00000
43#define BZIMAGE_OFFSET (BASE_ADDRESS + 0x3000)
Alek Du0fdceca2008-05-14 17:36:34 +080044
Alek Dub7f7baf2008-05-13 16:23:15 +080045#define SETUP_HEADER_OFFSET (BZIMAGE_OFFSET + 0x1F1)
46#define SETUP_HEADER_SIZE (0x0202 + *(unsigned char*)(0x0201+BZIMAGE_OFFSET))
47#define BOOT_PARAMS_OFFSET 0x8000
Evgeny Kalugin8e8bf002013-10-24 11:21:07 +030048#define BOOT_CMDLINE_OFFSET 0x10000
Alek Dub7f7baf2008-05-13 16:23:15 +080049#define SETUP_SIGNATURE 0x5a5aaa55
50
51#define GDT_ENTRY_BOOT_CS 2
52#define __BOOT_CS (GDT_ENTRY_BOOT_CS * 8)
53
54#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
55#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
56
Bin Gao923fa8d2013-03-30 00:27:10 -070057#ifdef __ASSEMBLY__
58#define GDT_ENTRY(flags, base, limit) \
59 ((((base) & 0xff000000) << (56-24)) | \
60 (((flags) & 0x0000f0ff) << 40) | \
61 (((limit) & 0x000f0000) << (48-16)) | \
62 (((base) & 0x00ffffff) << 16) | \
63 (((limit) & 0x0000ffff)))
64#else
Alek Dub7f7baf2008-05-13 16:23:15 +080065#define GDT_ENTRY(flags, base, limit) \
66 (((u64)(base & 0xff000000) << 32) | \
67 ((u64)flags << 40) | \
68 ((u64)(limit & 0x00ff0000) << 32) | \
69 ((u64)(base & 0x00ffffff) << 16) | \
70 ((u64)(limit & 0x0000ffff)))
Bin Gao923fa8d2013-03-30 00:27:10 -070071int get_e820_by_bios(void *e820_buf);
Eric Ernstaecaba32013-04-02 12:02:59 -070072int mid_identify_cpu(void);
Mark F. Brown90847a82011-09-07 18:06:24 -040073void bs_printk(const char *str);
Bin Gao923fa8d2013-03-30 00:27:10 -070074#endif
Alek Dub7f7baf2008-05-13 16:23:15 +080075
76#endif