blob: a13c05dfcb7256ce15de6013fedc33b67e0180ef [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
39#include <utils/Vector.h>
40
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070041#include <sync/sync.h>
42
Greg Hackmann86eb1c62012-05-30 09:25:51 -070043#include "ion.h"
44#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070045#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070046#include "exynos_format.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070047
Greg Hackmannf6f2e542012-07-16 16:10:27 -070048struct hwc_callback_entry {
49 void (*callback)(void *, private_handle_t *);
50 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070051};
52typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
53
Greg Hackmann31991d52012-07-13 13:23:11 -070054const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070055const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmann31991d52012-07-13 13:23:11 -070056const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann49e51082012-07-31 09:50:38 -070057const size_t NUM_GSC_UNITS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070058const size_t GSC_W_ALIGNMENT = 16;
59const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann49e51082012-07-31 09:50:38 -070060const int CAMERA_GSC_IDX = 2;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070061
Erik Gilling87e707e2012-06-29 17:35:13 -070062struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070063
Greg Hackmann9130e702012-07-30 14:53:04 -070064struct exynos5_gsc_map_t {
65 enum {
66 GSC_NONE = 0,
67 GSC_M2M,
68 // TODO: GSC_LOCAL_PATH
69 } mode;
70 int idx;
71};
72
Greg Hackmann86eb1c62012-05-30 09:25:51 -070073struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070074 exynos5_hwc_composer_device_1_t *pdev;
75 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070076 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070077 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
78 int num_overlays;
79 size_t fb_window;
80 int fence;
81 pthread_mutex_t completion_lock;
82 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070083};
84
Greg Hackmann9130e702012-07-30 14:53:04 -070085const size_t NUM_GSC_DST_BUFS = 2;
86struct exynos5_gsc_data_t {
87 void *gsc;
88 exynos_gsc_img src_cfg;
89 exynos_gsc_img dst_cfg;
90 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
91 size_t current_buf;
92};
93
Erik Gilling87e707e2012-06-29 17:35:13 -070094struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070095 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070096
Greg Hackmannf6f2e542012-07-16 16:10:27 -070097 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070098 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070099 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700100
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700101 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700102 alloc_device_t *alloc_device;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700103 hwc_procs_t *procs;
104 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700105
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700106 bool hdmi_hpd;
107 bool hdmi_mirroring;
108 void *hdmi_gsc;
Greg Hackmann9130e702012-07-30 14:53:04 -0700109
110 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700111};
112
Greg Hackmann9130e702012-07-30 14:53:04 -0700113static void dump_handle(private_handle_t *h)
114{
115 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u",
116 h->format, h->width, h->height, h->stride);
117}
118
Erik Gilling87e707e2012-06-29 17:35:13 -0700119static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700120{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700121 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
122 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
123 l->compositionType, l->flags, l->handle, l->transform,
124 l->blending,
125 l->sourceCrop.left,
126 l->sourceCrop.top,
127 l->sourceCrop.right,
128 l->sourceCrop.bottom,
129 l->displayFrame.left,
130 l->displayFrame.top,
131 l->displayFrame.right,
132 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700133
Greg Hackmann9130e702012-07-30 14:53:04 -0700134 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
135 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700136}
137
138static void dump_config(s3c_fb_win_config &c)
139{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700140 ALOGV("\tstate = %u", c.state);
141 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
142 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
143 "x = %d, y = %d, w = %u, h = %u, "
144 "format = %u",
145 c.fd, c.offset, c.stride,
146 c.x, c.y, c.w, c.h,
147 c.format);
148 }
149 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
150 ALOGV("\t\tcolor = %u", c.color);
151 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700152}
153
Greg Hackmann9130e702012-07-30 14:53:04 -0700154static void dump_gsc_img(exynos_gsc_img &c)
155{
156 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
157 c.x, c.y, c.w, c.h, c.fw, c.fh);
158 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
159 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
160}
161
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700162inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
163inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700164template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
165template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
166
167static bool is_transformed(const hwc_layer_1_t &layer)
168{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700169 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700170}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700171
Greg Hackmann9130e702012-07-30 14:53:04 -0700172static bool is_rotated(const hwc_layer_1_t &layer)
173{
174 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
175 (layer.transform & HAL_TRANSFORM_ROT_180);
176}
177
Erik Gilling87e707e2012-06-29 17:35:13 -0700178static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700179{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700180 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
181 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700182}
183
184static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
185{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700186 switch (format) {
187 case HAL_PIXEL_FORMAT_RGBA_8888:
188 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
189 case HAL_PIXEL_FORMAT_RGBX_8888:
190 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
191 case HAL_PIXEL_FORMAT_RGBA_5551:
192 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
193 case HAL_PIXEL_FORMAT_RGBA_4444:
194 return S3C_FB_PIXEL_FORMAT_RGBA_4444;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700195
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700196 default:
197 return S3C_FB_PIXEL_FORMAT_MAX;
198 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700199}
200
201static bool exynos5_format_is_supported(int format)
202{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700203 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700204}
205
206static bool exynos5_format_is_supported_by_gscaler(int format)
207{
Greg Hackmann9130e702012-07-30 14:53:04 -0700208 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700209 case HAL_PIXEL_FORMAT_RGBX_8888:
210 case HAL_PIXEL_FORMAT_RGB_565:
211 case HAL_PIXEL_FORMAT_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700212 case HAL_PIXEL_FORMAT_YCbCr_420_P:
213 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
214 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_SP:
215 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
216 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP:
217 case HAL_PIXEL_FORMAT_YCbCr_422_I:
218 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_I:
219 case HAL_PIXEL_FORMAT_YCbCr_422_P:
220 case HAL_PIXEL_FORMAT_CbYCrY_422_I:
221 case HAL_PIXEL_FORMAT_CUSTOM_CbYCrY_422_I:
222 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
223 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_SP:
224 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
225 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_420_SP:
226 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
227 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP_TILED:
228 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_I:
229 case HAL_PIXEL_FORMAT_CUSTOM_CrYCbY_422_I:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700230 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700231
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700232 default:
233 return false;
234 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700235}
236
Greg Hackmann9130e702012-07-30 14:53:04 -0700237static bool exynos5_format_requires_gscaler(int format)
238{
239 return exynos5_format_is_supported_by_gscaler(format) &&
240 format != HAL_PIXEL_FORMAT_RGBX_8888;
241}
242
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700243static uint8_t exynos5_format_to_bpp(int format)
244{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700245 switch (format) {
246 case HAL_PIXEL_FORMAT_RGBA_8888:
247 case HAL_PIXEL_FORMAT_RGBX_8888:
248 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700249
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700250 case HAL_PIXEL_FORMAT_RGBA_5551:
251 case HAL_PIXEL_FORMAT_RGBA_4444:
252 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700253
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700254 default:
255 ALOGW("unrecognized pixel format %u", format);
256 return 0;
257 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700258}
259
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700260static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
261 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700262{
263 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
264
265 int max_w = is_rotated(layer) ? 2048 : 4800;
266 int max_h = is_rotated(layer) ? 2048 : 3344;
267
268 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
269 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
270 // HAL_TRANSFORM_ROT_180
271
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700272 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
273 int dest_w, dest_h;
274 if (rot90or270) {
275 dest_w = HEIGHT(layer.displayFrame);
276 dest_h = WIDTH(layer.displayFrame);
277 } else {
278 dest_w = WIDTH(layer.displayFrame);
279 dest_h = HEIGHT(layer.displayFrame);
280 }
281 int max_downscale = local_path ? 4 : 16;
282 const int max_upscale = 8;
283
Greg Hackmann9130e702012-07-30 14:53:04 -0700284 return exynos5_format_is_supported_by_gscaler(format) &&
285 handle->stride <= max_w &&
286 handle->stride % GSC_W_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700287 src_w <= dest_w * max_downscale &&
288 dest_w <= src_w * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700289 handle->height <= max_h &&
290 handle->height % GSC_H_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700291 src_h <= dest_h * max_downscale &&
292 dest_h <= src_h * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700293 // per 46.2
294 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
295 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
296 // per 46.3.1.6
297}
298
Benoit Gobycdd61b32012-07-09 12:09:59 -0700299static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
300{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700301 if (dev->hdmi_mirroring)
302 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700303
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700304 exynos_gsc_img src_info;
305 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700306
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700307 // TODO: Don't hardcode
308 int src_w = 2560;
309 int src_h = 1600;
310 int dst_w = 1920;
311 int dst_h = 1080;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700312
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700313 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
314 if (!dev->hdmi_gsc) {
315 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
316 return -ENODEV;
317 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700318
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700319 memset(&src_info, 0, sizeof(src_info));
320 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700321
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700322 src_info.w = src_w;
323 src_info.h = src_h;
324 src_info.fw = src_w;
325 src_info.fh = src_h;
326 src_info.format = HAL_PIXEL_FORMAT_BGRA_8888;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700327
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700328 dst_info.w = dst_w;
329 dst_info.h = dst_h;
330 dst_info.fw = dst_w;
331 dst_info.fh = dst_h;
332 dst_info.format = HAL_PIXEL_FORMAT_YV12;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700333
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700334 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
335 if (ret < 0) {
336 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
337 exynos_gsc_destroy(dev->hdmi_gsc);
338 dev->hdmi_gsc = NULL;
339 return ret;
340 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700341
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700342 dev->hdmi_mirroring = true;
343 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700344}
345
346static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
347{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700348 if (!dev->hdmi_mirroring)
349 return;
350 exynos_gsc_destroy(dev->hdmi_gsc);
351 dev->hdmi_gsc = NULL;
352 dev->hdmi_mirroring = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700353}
354
355static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *fb)
356{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700357 exynos_gsc_img src_info;
358 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700359
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700360 memset(&src_info, 0, sizeof(src_info));
361 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700362
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700363 src_info.yaddr = fb->fd;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700364
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700365 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
366 if (ret < 0) {
367 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
368 return ret;
369 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700370
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700371 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700372}
373
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700374bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
375{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700376 if (layer.flags & HWC_SKIP_LAYER) {
377 ALOGV("\tlayer %u: skipping", i);
378 return false;
379 }
380
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700381 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700382
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700383 if (!handle) {
384 ALOGV("\tlayer %u: handle is NULL", i);
385 return false;
386 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700387 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700388 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700389 ALOGV("\tlayer %u: gscaler required but not supported", i);
390 return false;
391 }
392 } else {
393 if (!exynos5_format_is_supported(handle->format)) {
394 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
395 return false;
396 }
397 if (is_scaled(layer)) {
398 ALOGV("\tlayer %u: scaling not supported", i);
399 return false;
400 }
401 if (is_transformed(layer)) {
402 ALOGV("\tlayer %u: transformations not supported", i);
403 return false;
404 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700405 }
406 if (layer.blending != HWC_BLENDING_NONE) {
407 // TODO: support this
408 ALOGV("\tlayer %u: blending not supported", i);
409 return false;
410 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700411
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700412 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700413}
414
Greg Hackmann31991d52012-07-13 13:23:11 -0700415inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
416{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700417 return !(r1.left > r2.right ||
418 r1.right < r2.left ||
419 r1.top > r2.bottom ||
420 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700421}
422
423inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
424{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700425 hwc_rect i;
426 i.top = max(r1.top, r2.top);
427 i.bottom = min(r1.bottom, r2.bottom);
428 i.left = max(r1.left, r2.left);
429 i.right = min(r1.right, r2.right);
430 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700431}
432
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700433static int exynos5_prepare(hwc_composer_device_1_t *dev, hwc_layer_list_1_t* list)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700434{
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700435 if (!list)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700436 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700437
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700438 ALOGV("preparing %u layers", list->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700439
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700440 exynos5_hwc_composer_device_1_t *pdev =
441 (exynos5_hwc_composer_device_1_t *)dev;
442 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700443 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700444
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700445 bool force_fb = false;
446 if (pdev->hdmi_hpd) {
447 hdmi_enable(pdev);
448 force_fb = true;
449 } else {
450 hdmi_disable(pdev);
451 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700452
Erik Gilling87e707e2012-06-29 17:35:13 -0700453 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
454 pdev->bufs.overlay_map[i] = -1;
455
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700456 bool fb_needed = false;
457 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700458
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700459 // find unsupported overlays
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700460 for (size_t i = 0; i < list->numHwLayers; i++) {
461 hwc_layer_1_t &layer = list->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700462
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700463 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
464 ALOGV("\tlayer %u: background supported", i);
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700465 dump_layer(&list->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700466 continue;
467 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700468
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700469 if (exynos5_supports_overlay(list->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700470 ALOGV("\tlayer %u: overlay supported", i);
471 layer.compositionType = HWC_OVERLAY;
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700472 dump_layer(&list->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700473 continue;
474 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700475
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700476 if (!fb_needed) {
477 first_fb = i;
478 fb_needed = true;
479 }
480 last_fb = i;
481 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700482
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700483 dump_layer(&list->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700484 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700485
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700486 // can't composite overlays sandwiched between framebuffers
487 if (fb_needed)
488 for (size_t i = first_fb; i < last_fb; i++)
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700489 list->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700490
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700491 // Incrementally try to add our supported layers to hardware windows.
492 // If adding a layer would violate a hardware constraint, force it
493 // into the framebuffer and try again. (Revisiting the entire list is
494 // necessary because adding a layer to the framebuffer can cause other
495 // windows to retroactively violate constraints.)
496 bool changed;
497 do {
498 android::Vector<hwc_rect> rects;
499 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700500 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700501
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700502 if (fb_needed) {
503 hwc_rect_t fb_rect;
504 fb_rect.top = fb_rect.left = 0;
505 fb_rect.right = pdev->gralloc_module->xres - 1;
506 fb_rect.bottom = pdev->gralloc_module->yres - 1;
507 pixels_left = MAX_PIXELS - pdev->gralloc_module->xres *
508 pdev->gralloc_module->yres;
509 windows_left = NUM_HW_WINDOWS - 1;
510 rects.push_back(fb_rect);
511 }
512 else {
513 pixels_left = MAX_PIXELS;
514 windows_left = NUM_HW_WINDOWS;
515 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700516 if (pdev->hdmi_mirroring)
517 gsc_left--;
518
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700519 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700520
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700521 for (size_t i = 0; i < list->numHwLayers; i++) {
522 hwc_layer_1_t &layer = list->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700523 if (layer.flags & HWC_SKIP_LAYER)
524 continue;
525
526 private_handle_t *handle = private_handle_t::dynamicCast(
527 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700528
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700529 // we've already accounted for the framebuffer above
530 if (layer.compositionType == HWC_FRAMEBUFFER)
531 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700532
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700533 // only layer 0 can be HWC_BACKGROUND, so we can
534 // unconditionally allow it without extra checks
535 if (layer.compositionType == HWC_BACKGROUND) {
536 windows_left--;
537 continue;
538 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700539
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700540 size_t pixels_needed = WIDTH(layer.displayFrame) *
541 HEIGHT(layer.displayFrame);
542 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9130e702012-07-30 14:53:04 -0700543 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
544 if (gsc_required)
545 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700546
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700547 // hwc_rect_t right and bottom values are normally exclusive;
548 // the intersection logic is simpler if we make them inclusive
549 hwc_rect_t visible_rect = layer.displayFrame;
550 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700551
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700552 // no more than 2 layers can overlap on a given pixel
553 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
554 if (intersect(visible_rect, overlaps.itemAt(j)))
555 can_compose = false;
556 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700557
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700558 if (!can_compose) {
559 layer.compositionType = HWC_FRAMEBUFFER;
560 if (!fb_needed) {
561 first_fb = last_fb = i;
562 fb_needed = true;
563 }
564 else {
565 first_fb = min(i, first_fb);
566 last_fb = max(i, last_fb);
567 }
568 changed = true;
569 break;
570 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700571
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700572 for (size_t j = 0; j < rects.size(); j++) {
573 const hwc_rect_t &other_rect = rects.itemAt(j);
574 if (intersect(visible_rect, other_rect))
575 overlaps.push_back(intersection(visible_rect, other_rect));
576 }
577 rects.push_back(visible_rect);
578 pixels_left -= pixels_needed;
579 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700580 if (gsc_required)
581 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700582 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700583
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700584 if (changed)
585 for (size_t i = first_fb; i < last_fb; i++)
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700586 list->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700587 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700588
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700589 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700590 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700591
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700592 for (size_t i = 0; i < list->numHwLayers; i++) {
593 hwc_layer_1_t &layer = list->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700594 if (layer.flags & HWC_SKIP_LAYER)
595 continue;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700596
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700597 if (fb_needed && i == first_fb) {
598 ALOGV("assigning framebuffer to window %u\n",
599 nextWindow);
600 nextWindow++;
601 continue;
602 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700603
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700604 if (layer.compositionType != HWC_FRAMEBUFFER) {
605 ALOGV("assigning layer %u to window %u", i, nextWindow);
606 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700607 if (layer.compositionType == HWC_OVERLAY) {
608 private_handle_t *handle =
609 private_handle_t::dynamicCast(layer.handle);
610 if (exynos5_format_requires_gscaler(handle->format)) {
611 ALOGV("\tusing gscaler %u", nextGsc);
612 pdev->bufs.gsc_map[i].mode =
613 exynos5_gsc_map_t::GSC_M2M;
614 pdev->bufs.gsc_map[i].idx = nextGsc++;
Greg Hackmann49e51082012-07-31 09:50:38 -0700615 if (nextGsc == CAMERA_GSC_IDX)
616 nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700617 }
618 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700619 nextWindow++;
620 }
621 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700622
Greg Hackmann9130e702012-07-30 14:53:04 -0700623 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
624 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
625 if (pdev->gsc[i].dst_buf[j])
626 pdev->alloc_device->free(pdev->alloc_device,
627 pdev->gsc[i].dst_buf[j]);
628 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
629 }
630
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700631 if (fb_needed)
632 pdev->bufs.fb_window = first_fb;
633 else
634 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700635
Greg Hackmann9130e702012-07-30 14:53:04 -0700636 return 0;
637}
638
639static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
640{
641 return c1.x != c2.x ||
642 c1.y != c2.y ||
643 c1.w != c2.w ||
644 c1.h != c2.h ||
645 c1.format != c2.format ||
646 c1.rot != c2.rot ||
647 c1.cacheable != c2.cacheable ||
648 c1.drmMode != c2.drmMode;
649}
650
651static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
652{
653 return gsc_dst_cfg_changed(c1, c2) ||
654 c1.fw != c2.fw ||
655 c1.fh != c2.fh;
656}
657
658static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
659 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
660 int gsc_idx)
661{
662 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
663
664 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
665 buffer_handle_t dst_buf;
666 private_handle_t *dst_handle;
667 int ret = 0;
668
669 exynos_gsc_img src_cfg, dst_cfg;
670 memset(&src_cfg, 0, sizeof(src_cfg));
671 memset(&dst_cfg, 0, sizeof(dst_cfg));
672
673 src_cfg.x = layer.sourceCrop.left;
674 src_cfg.y = layer.sourceCrop.top;
675 src_cfg.w = WIDTH(layer.sourceCrop);
676 src_cfg.fw = src_handle->stride;
677 src_cfg.h = HEIGHT(layer.sourceCrop);
678 src_cfg.fh = src_handle->height;
679 src_cfg.yaddr = src_handle->fd;
680 src_cfg.uaddr = src_handle->fd1;
681 src_cfg.vaddr = src_handle->fd2;
682 src_cfg.format = src_handle->format;
683
684 dst_cfg.x = 0;
685 dst_cfg.y = 0;
686 dst_cfg.w = WIDTH(layer.displayFrame);
687 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700688 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700689 dst_cfg.rot = layer.transform;
690
691 ALOGV("source configuration:");
692 dump_gsc_img(src_cfg);
693
694 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
695 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
696 int dst_stride;
697 int usage = GRALLOC_USAGE_SW_READ_NEVER |
698 GRALLOC_USAGE_SW_WRITE_NEVER |
699 GRALLOC_USAGE_HW_COMPOSER;
700 // TODO: add GRALLOC_USAGE_PROTECTED if source buffer is also protected
701
702 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
703 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
704
705 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
706 if (gsc_data->dst_buf[i]) {
707 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
708 gsc_data->dst_buf[i] = NULL;
709 }
710
711 int ret = alloc_device->alloc(alloc_device, w, h,
712 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
713 &dst_stride);
714 if (ret < 0) {
715 ALOGE("failed to allocate destination buffer: %s",
716 strerror(-ret));
717 goto err_alloc;
718 }
719 }
720
721 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700722 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700723
Greg Hackmann9130e702012-07-30 14:53:04 -0700724 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
725 dst_handle = private_handle_t::dynamicCast(dst_buf);
726
727 dst_cfg.fw = dst_handle->stride;
728 dst_cfg.fh = dst_handle->height;
729 dst_cfg.yaddr = dst_handle->fd;
730
731 ALOGV("destination configuration:");
732 dump_gsc_img(dst_cfg);
733
734 gsc_data->gsc = exynos_gsc_create_exclusive(gsc_idx, GSC_M2M_MODE,
735 GSC_DUMMY);
736 if (!gsc_data->gsc) {
737 ALOGE("failed to create gscaler handle");
738 ret = -1;
739 goto err_alloc;
740 }
741
742 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
743 if (ret < 0) {
744 ALOGE("failed to configure gscaler %u", gsc_idx);
745 goto err_gsc_config;
746 }
747
748 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
749 if (ret < 0) {
750 ALOGE("failed to run gscaler %u", gsc_idx);
751 goto err_gsc_config;
752 }
753
754 gsc_data->src_cfg = src_cfg;
755 gsc_data->dst_cfg = dst_cfg;
756
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700757 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700758
759err_gsc_config:
760 exynos_gsc_destroy(gsc_data->gsc);
761 gsc_data->gsc = NULL;
762err_alloc:
763 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
764 if (gsc_data->dst_buf[i]) {
765 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
766 gsc_data->dst_buf[i] = NULL;
767 }
768 }
769 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700770}
771
772static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700773 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
774 s3c_fb_win_config &cfg)
775{
776 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
777 cfg.fd = handle->fd;
778 cfg.x = displayFrame.left;
779 cfg.y = displayFrame.top;
780 cfg.w = WIDTH(displayFrame);
781 cfg.h = HEIGHT(displayFrame);
782 cfg.format = exynos5_format_to_s3c_format(handle->format);
783 uint8_t bpp = exynos5_format_to_bpp(handle->format);
784 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
785 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700786}
787
Erik Gilling87e707e2012-06-29 17:35:13 -0700788static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700789 const private_module_t *gralloc_module)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700790{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700791 if (layer->compositionType == HWC_BACKGROUND) {
792 hwc_color_t color = layer->backgroundColor;
793 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
794 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
795 cfg.x = 0;
796 cfg.y = 0;
797 cfg.w = gralloc_module->xres;
798 cfg.h = gralloc_module->yres;
799 return;
800 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700801
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700802 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
803 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700804}
805
806static void exynos5_post_callback(void *data, private_handle_t *fb)
807{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700808 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700809
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700810 struct s3c_fb_win_config_data win_data;
811 struct s3c_fb_win_config *config = win_data.config;
812 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -0700813
814 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
815 if ( pdata->overlay_map[i] != -1) {
816 hwc_layer_1_t &layer = pdata->overlays[i];
817 private_handle_t *handle =
818 private_handle_t::dynamicCast(layer.handle);
819
820 if (layer.acquireFenceFd != -1) {
821 int err = sync_wait(layer.acquireFenceFd, 100);
822 if (err != 0)
823 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
824 i, strerror(errno));
825 close(layer.acquireFenceFd);
826 }
827
828 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
829 int gsc_idx = pdata->gsc_map[i].idx;
830 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
831 &pdata->pdev->gsc[gsc_idx], gsc_idx);
832 }
833 }
834 }
835
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700836 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
837 if (i == pdata->fb_window) {
838 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
839 exynos5_config_handle(fb, rect, rect, config[i]);
840 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700841 hwc_layer_1_t &layer = pdata->overlays[i];
842 private_handle_t *handle =
843 private_handle_t::dynamicCast(layer.handle);
844
845 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
846 int gsc_idx = pdata->gsc_map[i].idx;
847 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
848
849 if (!gsc.gsc) {
850 ALOGE("failed to queue gscaler %u input for layer %u",
851 gsc_idx, i);
852 continue;
853 }
854
855 int err = exynos_gsc_stop_exclusive(gsc.gsc);
856 exynos_gsc_destroy(gsc.gsc);
857 gsc.gsc = NULL;
858 if (err < 0) {
859 ALOGE("failed to dequeue gscaler output for layer %u", i);
860 continue;
861 }
862
863 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
864 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
865 private_handle_t *dst_handle =
866 private_handle_t::dynamicCast(dst_buf);
867 exynos5_config_handle(dst_handle, layer.sourceCrop,
868 layer.displayFrame, config[i]);
869 }
870 else {
871 exynos5_config_overlay(&layer, config[i],
872 pdata->pdev->gralloc_module);
Erik Gilling87e707e2012-06-29 17:35:13 -0700873 }
874 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700875 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700876 dump_config(config[i]);
877 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700878
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700879 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
880 if (ret < 0)
881 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700882
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700883 if (pdata->pdev->hdmi_mirroring)
884 hdmi_output(pdata->pdev, fb);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700885
Erik Gilling87e707e2012-06-29 17:35:13 -0700886 pthread_mutex_lock(&pdata->completion_lock);
887 pdata->fence = win_data.fence;
888 pthread_cond_signal(&pdata->completion);
889 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700890}
891
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700892static int exynos5_set(struct hwc_composer_device_1 *dev, hwc_display_t dpy,
893 hwc_surface_t sur, hwc_layer_list_1_t* list)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700894{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700895 exynos5_hwc_composer_device_1_t *pdev =
896 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700897
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700898 if (!dpy || !sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700899 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700900
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700901 hwc_callback_queue_t *queue = NULL;
902 pthread_mutex_t *lock = NULL;
903 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700904
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700905 if (list) {
Erik Gilling87e707e2012-06-29 17:35:13 -0700906 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
907 if (pdev->bufs.overlay_map[i] != -1) {
908 pdev->bufs.overlays[i] =
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700909 list->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -0700910 }
911 }
912
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700913 data = (exynos5_hwc_post_data_t *)
914 malloc(sizeof(exynos5_hwc_post_data_t));
915 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700916
Erik Gilling87e707e2012-06-29 17:35:13 -0700917 data->fence = -1;
918 pthread_mutex_init(&data->completion_lock, NULL);
919 pthread_cond_init(&data->completion, NULL);
920
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700921 if (pdev->bufs.fb_window == NO_FB_NEEDED) {
922 exynos5_post_callback(data, NULL);
923 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700924
Erik Gilling87e707e2012-06-29 17:35:13 -0700925 struct hwc_callback_entry entry;
926 entry.callback = exynos5_post_callback;
927 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700928
Erik Gilling87e707e2012-06-29 17:35:13 -0700929 queue = reinterpret_cast<hwc_callback_queue_t *>(
930 pdev->gralloc_module->queue);
931 lock = const_cast<pthread_mutex_t *>(
932 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700933
Erik Gilling87e707e2012-06-29 17:35:13 -0700934 pthread_mutex_lock(lock);
935 queue->push_front(entry);
936 pthread_mutex_unlock(lock);
937
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700938 EGLBoolean success = eglSwapBuffers((EGLDisplay)dpy,
939 (EGLSurface)sur);
Erik Gilling87e707e2012-06-29 17:35:13 -0700940 if (!success) {
941 ALOGE("HWC_EGL_ERROR");
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700942 if (list) {
Erik Gilling87e707e2012-06-29 17:35:13 -0700943 pthread_mutex_lock(lock);
944 queue->removeAt(0);
945 pthread_mutex_unlock(lock);
946 free(data);
947 }
948 return HWC_EGL_ERROR;
949 }
950 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700951 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700952
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700953
Erik Gilling87e707e2012-06-29 17:35:13 -0700954 pthread_mutex_lock(&data->completion_lock);
955 while (data->fence == -1)
956 pthread_cond_wait(&data->completion, &data->completion_lock);
957 pthread_mutex_unlock(&data->completion_lock);
958
959 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
960 if (pdev->bufs.overlay_map[i] != -1) {
961 int dup_fd = dup(data->fence);
962 if (dup_fd < 0)
963 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Hallb6e1fa02012-07-31 12:16:41 -0700964 list->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -0700965 }
966 }
967 close(data->fence);
968 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700969 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700970}
971
Erik Gilling87e707e2012-06-29 17:35:13 -0700972static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700973 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700974{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700975 struct exynos5_hwc_composer_device_1_t* pdev =
976 (struct exynos5_hwc_composer_device_1_t*)dev;
977 pdev->procs = const_cast<hwc_procs_t *>(procs);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700978}
979
Erik Gilling87e707e2012-06-29 17:35:13 -0700980static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700981{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700982 struct exynos5_hwc_composer_device_1_t *pdev =
983 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700984
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700985 switch (what) {
986 case HWC_BACKGROUND_LAYER_SUPPORTED:
987 // we support the background layer
988 value[0] = 1;
989 break;
990 case HWC_VSYNC_PERIOD:
991 // vsync period in nanosecond
992 value[0] = 1000000000.0 / pdev->gralloc_module->fps;
993 break;
994 default:
995 // unsupported query
996 return -EINVAL;
997 }
998 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700999}
1000
Jesse Hallb6e1fa02012-07-31 12:16:41 -07001001static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int event,
1002 int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001003{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001004 struct exynos5_hwc_composer_device_1_t *pdev =
1005 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001006
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001007 switch (event) {
1008 case HWC_EVENT_VSYNC:
1009 __u32 val = !!enabled;
1010 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1011 if (err < 0) {
1012 ALOGE("vsync ioctl failed");
1013 return -errno;
1014 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001015
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001016 return 0;
1017 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001018
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001019 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001020}
1021
Benoit Gobycdd61b32012-07-09 12:09:59 -07001022static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001023 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001024{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001025 const char *s = buff;
1026 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001027
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001028 while (*s) {
1029 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1030 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001031
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001032 s += strlen(s) + 1;
1033 if (s - buff >= len)
1034 break;
1035 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001036
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001037 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobycdd61b32012-07-09 12:09:59 -07001038
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001039 if (pdev->procs && pdev->procs->invalidate)
1040 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001041}
1042
Greg Hackmann29724852012-07-23 15:31:10 -07001043static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001044{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001045 if (!pdev->procs || !pdev->procs->vsync)
1046 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001047
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001048 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1049 if (err < 0) {
1050 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1051 return;
1052 }
1053
Greg Hackmann29724852012-07-23 15:31:10 -07001054 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001055 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001056 if (err < 0) {
1057 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1058 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001059 }
Greg Hackmann29724852012-07-23 15:31:10 -07001060 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001061
Greg Hackmann29724852012-07-23 15:31:10 -07001062 errno = 0;
1063 uint64_t timestamp = strtoull(buf, NULL, 0);
1064 if (!errno)
1065 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001066}
1067
1068static void *hwc_vsync_thread(void *data)
1069{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001070 struct exynos5_hwc_composer_device_1_t *pdev =
1071 (struct exynos5_hwc_composer_device_1_t *)data;
1072 char uevent_desc[4096];
1073 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001074
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001075 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001076
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001077 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001078
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001079 char temp[4096];
1080 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1081 if (err < 0) {
1082 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1083 return NULL;
1084 }
1085
Greg Hackmann29724852012-07-23 15:31:10 -07001086 struct pollfd fds[2];
1087 fds[0].fd = pdev->vsync_fd;
1088 fds[0].events = POLLPRI;
1089 fds[1].fd = uevent_get_fd();
1090 fds[1].events = POLLIN;
1091
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001092 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001093 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001094
Greg Hackmann29724852012-07-23 15:31:10 -07001095 if (err > 0) {
1096 if (fds[0].revents & POLLPRI) {
1097 handle_vsync_event(pdev);
1098 }
1099 else if (fds[1].revents & POLLIN) {
1100 int len = uevent_next_event(uevent_desc,
1101 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001102
Greg Hackmann29724852012-07-23 15:31:10 -07001103 bool hdmi = !strcmp(uevent_desc,
1104 "change@/devices/virtual/switch/hdmi");
1105 if (hdmi)
1106 handle_hdmi_uevent(pdev, uevent_desc, len);
1107 }
1108 }
1109 else if (err == -1) {
1110 if (errno == EINTR)
1111 break;
1112 ALOGE("error in vsync thread: %s", strerror(errno));
1113 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001114 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001115
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001116 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001117}
1118
Jesse Hallb6e1fa02012-07-31 12:16:41 -07001119static int exynos5_blank(struct hwc_composer_device_1 *dev, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001120{
1121 struct exynos5_hwc_composer_device_1_t *pdev =
1122 (struct exynos5_hwc_composer_device_1_t *)dev;
1123
1124 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1125 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1126 if (err < 0) {
1127 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1128 return -errno;
1129 }
1130
1131 return 0;
1132}
1133
Erik Gilling87e707e2012-06-29 17:35:13 -07001134struct hwc_methods_1 exynos5_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001135 eventControl: exynos5_eventControl,
Colin Cross00359a82012-07-12 17:54:17 -07001136 blank: exynos5_blank,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001137};
1138
1139static int exynos5_close(hw_device_t* device);
1140
1141static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001142 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001143{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001144 int ret;
1145 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001146
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001147 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1148 return -EINVAL;
1149 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001150
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001151 struct exynos5_hwc_composer_device_1_t *dev;
1152 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1153 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001154
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001155 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1156 (const struct hw_module_t **)&dev->gralloc_module)) {
1157 ALOGE("failed to get gralloc hw module");
1158 ret = -EINVAL;
1159 goto err_get_module;
1160 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001161
Greg Hackmann9130e702012-07-30 14:53:04 -07001162 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1163 &dev->alloc_device)) {
1164 ALOGE("failed to open gralloc");
1165 ret = -EINVAL;
1166 goto err_get_module;
1167 }
1168
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001169 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1170 if (dev->fd < 0) {
1171 ALOGE("failed to open framebuffer");
1172 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001173 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001174 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001175
Greg Hackmann29724852012-07-23 15:31:10 -07001176 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1177 if (dev->vsync_fd < 0) {
1178 ALOGE("failed to open vsync attribute");
1179 ret = dev->vsync_fd;
1180 goto err_ioctl;
1181 }
1182
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001183 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1184 if (sw_fd) {
1185 char val;
1186 if (read(sw_fd, &val, 1) == 1 && val == '1')
1187 dev->hdmi_hpd = true;
1188 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001189
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001190 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1191 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1192 dev->base.common.module = const_cast<hw_module_t *>(module);
1193 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001194
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001195 dev->base.prepare = exynos5_prepare;
1196 dev->base.set = exynos5_set;
1197 dev->base.registerProcs = exynos5_registerProcs;
1198 dev->base.query = exynos5_query;
1199 dev->base.methods = &exynos5_methods;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001200
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001201 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001202
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001203 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001204
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001205 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1206 if (ret) {
1207 ALOGE("failed to start vsync thread: %s", strerror(ret));
1208 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001209 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001210 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001211
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001212 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001213
Greg Hackmann29724852012-07-23 15:31:10 -07001214err_vsync:
1215 close(dev->vsync_fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001216err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001217 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001218err_open_fb:
1219 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001220err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001221 free(dev);
1222 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001223}
1224
1225static int exynos5_close(hw_device_t *device)
1226{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001227 struct exynos5_hwc_composer_device_1_t *dev =
1228 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001229 pthread_kill(dev->vsync_thread, SIGTERM);
1230 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001231 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1232 if (dev->gsc[i].gsc)
1233 exynos_gsc_destroy(dev->gsc[i].gsc);
1234 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1235 if (dev->gsc[i].dst_buf[j])
1236 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1237 }
1238 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001239 close(dev->vsync_fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001240 close(dev->fd);
1241 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001242}
1243
1244static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001245 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001246};
1247
1248hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001249 common: {
1250 tag: HARDWARE_MODULE_TAG,
1251 module_api_version: HWC_MODULE_API_VERSION_0_1,
1252 hal_api_version: HARDWARE_HAL_API_VERSION,
1253 id: HWC_HARDWARE_MODULE_ID,
1254 name: "Samsung exynos5 hwcomposer module",
1255 author: "Google",
1256 methods: &exynos5_hwc_module_methods,
1257 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001258};