msm8960: disallow prefetch from TZ memory
Updates mmu settings to set XN bit for the entire IMEM.
Also moved platform specific mmu initialization so that
it happens before enabling mmu.
Change-Id: I0a48b21eef8648ebd1ef05d9cfbc562e85a17212
CRs-fixed: 326501
diff --git a/arch/arm/include/arch/arm/mmu.h b/arch/arm/include/arch/arm/mmu.h
index 1b777a3..d5067eb 100644
--- a/arch/arm/include/arch/arm/mmu.h
+++ b/arch/arm/include/arch/arm/mmu.h
@@ -47,6 +47,8 @@
#define MMU_MEMORY_AP_READ_ONLY (0x7 << 10)
#define MMU_MEMORY_AP_READ_WRITE (0x3 << 10)
+#define MMU_MEMORY_XN (0x1 << 4)
+
#else
#error "MMU implementation needs to be updated for this ARM architecture"
diff --git a/platform/msm8960/include/platform/iomap.h b/platform/msm8960/include/platform/iomap.h
index 7494995..f653437 100644
--- a/platform/msm8960/include/platform/iomap.h
+++ b/platform/msm8960/include/platform/iomap.h
@@ -36,9 +36,10 @@
#define MSM_IOMAP_BASE 0x00100000
#define MSM_IOMAP_END 0x28000000
+#define MSM_IMEM_BASE 0x2A000000
+
#define MSM_SHARED_IMEM_BASE 0x2A03F000
#define RESTART_REASON_ADDR (MSM_SHARED_IMEM_BASE + 0x65C)
-#define MSM_SHARED_BASE 0x80000000
#define MSM_SHARED_BASE 0x80000000
diff --git a/platform/msm8960/platform.c b/platform/msm8960/platform.c
old mode 100755
new mode 100644
index b669948..1233ce7
--- a/platform/msm8960/platform.c
+++ b/platform/msm8960/platform.c
@@ -60,15 +60,19 @@
/* Kernel region - cacheable, write through */
#define KERNEL_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
- MMU_MEMORY_AP_READ_WRITE)
+ MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
/* Scratch region - cacheable, write through */
#define SCRATCH_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
- MMU_MEMORY_AP_READ_WRITE)
+ MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
/* Peripherals - non-shared device */
#define IOMAP_MEMORY (MMU_MEMORY_TYPE_DEVICE_NON_SHARED | \
- MMU_MEMORY_AP_READ_WRITE)
+ MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
+
+/* IMEM: Must set execute never bit to avoid instruction prefetch from TZ */
+#define IMEM_MEMORY (MMU_MEMORY_TYPE_STRONGLY_ORDERED | \
+ MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
mmu_section_t mmu_section_table[] = {
/* Physical addr, Virtual addr, Size (in MB), Flags */
@@ -76,6 +80,7 @@
{BASE_ADDR, BASE_ADDR, 44, KERNEL_MEMORY},
{SCRATCH_ADDR, SCRATCH_ADDR, 128, SCRATCH_MEMORY},
{MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
+ {MSM_IMEM_BASE, MSM_IMEM_BASE, 1, IMEM_MEMORY},
};
void platform_early_init(void)