Merge "platform: msm8994: support selectively enabling DSI branch clocks"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 9482806..de8948e 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -493,7 +493,10 @@
if (boot_dev_buf)
free(boot_dev_buf);
- dprintf(INFO, "cmdline: %s\n", cmdline_final ? cmdline_final : "");
+ if (cmdline_final)
+ dprintf(INFO, "cmdline: %s\n", cmdline_final);
+ else
+ dprintf(INFO, "cmdline is NULL\n");
return cmdline_final;
}
@@ -1080,7 +1083,7 @@
imagesize_actual = (page_size + kernel_actual + ramdisk_actual);
#endif
- if (check_aboot_addr_range_overlap(image_addr, imagesize_actual))
+ if (check_aboot_addr_range_overlap((uint32_t) image_addr, imagesize_actual))
{
dprintf(CRITICAL, "Boot image buffer address overlaps with aboot addresses.\n");
return -1;
@@ -1103,7 +1106,7 @@
bs_set_timestamp(BS_KERNEL_LOAD_DONE);
#ifdef TZ_SAVE_KERNEL_HASH
- aboot_save_boot_hash_mmc(image_addr, imagesize_actual);
+ aboot_save_boot_hash_mmc((uint32_t) image_addr, imagesize_actual);
#endif /* TZ_SAVE_KERNEL_HASH */
/* Move kernel, ramdisk and device tree to correct address */
@@ -2166,10 +2169,10 @@
void cmd_flash_mmc(const char *arg, void *data, unsigned sz)
{
sparse_header_t *sparse_header;
- /* 8 Byte Magic + 2048 Byte xml + Encrypted Data */
- unsigned int *magic_number = (unsigned int *) data;
#ifdef SSD_ENABLE
+ /* 8 Byte Magic + 2048 Byte xml + Encrypted Data */
+ unsigned int *magic_number = (unsigned int *) data;
int ret=0;
uint32 major_version=0;
uint32 minor_version=0;
@@ -2841,7 +2844,7 @@
#endif
target_crypto_init_params();
- hash_find(image_addr, image_size, (unsigned char *)&digest, auth_algo);
+ hash_find((unsigned char *) image_addr, image_size, (unsigned char *)&digest, auth_algo);
save_kernel_hash_cmd(digest);
dprintf(INFO, "aboot_save_boot_hash_mmc: imagesize_actual size %d bytes.\n", (int) image_size);
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
index cff176f..646d575 100755
--- a/dev/gcdb/display/gcdb_autopll.c
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -97,7 +97,6 @@
static uint32_t calculate_div3(uint8_t bpp, uint8_t num_of_lanes)
{
- uint32_t ret = NO_ERROR;
pll_data.pclk_m = 0x1; /* M = 1, N= 1 */
pll_data.pclk_n = 0xFF; /* ~ (N-M) = 0xff */
pll_data.pclk_d = 0xFF; /* ~N = 0xFF */
@@ -138,6 +137,7 @@
}
pll_data.posdiv3--; /* Register needs one value less */
+ return NO_ERROR;
}
static uint32_t calculate_dec_frac_start()
@@ -165,13 +165,11 @@
dprintf(SPEW, "%s: dec_start=0x%x dec_frac=0x%x lock_comp=0x%x\n", __func__,
pll_data.dec_start, pll_data.frac_start, pll_data.lock_comp);
+ return NO_ERROR;
}
static uint32_t calculate_vco_28nm(uint8_t bpp, uint8_t num_of_lanes)
{
- uint8_t counter = 0;
- uint32_t temprate = 0;
-
/* If half bitclock is more than VCO min value */
if (pll_data.halfbit_clock > VCO_MIN_CLOCK) {
diff --git a/dev/gcdb/display/gcdb_display.c b/dev/gcdb/display/gcdb_display.c
index f0503ee..7d97842 100755
--- a/dev/gcdb/display/gcdb_display.c
+++ b/dev/gcdb/display/gcdb_display.c
@@ -30,11 +30,13 @@
#include <debug.h>
#include <err.h>
#include <smem.h>
+#include <clock.h>
#include <msm_panel.h>
#include <string.h>
#include <stdlib.h>
#include <board.h>
#include <mdp5.h>
+#include <qtimer.h>
#include <platform/gpio.h>
#include <mipi_dsi.h>
@@ -288,7 +290,6 @@
buf_size -= strlen(sctl_string);
strlcpy(pbuf, slave_panel_node, buf_size);
}
-end:
return ret;
}
diff --git a/dev/gcdb/display/include/display_resource.h b/dev/gcdb/display/include/display_resource.h
index 5194022..6250427 100755
--- a/dev/gcdb/display/include/display_resource.h
+++ b/dev/gcdb/display/include/display_resource.h
@@ -66,7 +66,7 @@
/*---------------------------------------------------------------------------*/
/*GPIO pin structure to define reset pin, enable pin, te pin, etc. */
-typedef struct gpio_pin{
+struct gpio_pin{
char *pin_source;
uint32_t pin_id;
@@ -77,7 +77,7 @@
};
/*LDO entry structure for different LDO entries. */
-typedef struct ldo_entry{
+struct ldo_entry{
char *ldo_name;
uint32_t ldo_id;
uint32_t ldo_type;
diff --git a/dev/gcdb/display/include/panel.h b/dev/gcdb/display/include/panel.h
index 701f9e7..e20b76a 100755
--- a/dev/gcdb/display/include/panel.h
+++ b/dev/gcdb/display/include/panel.h
@@ -39,7 +39,7 @@
#define TOTAL_RESET_GPIO_CTRL 5
/*---------------------------------------------------------------------------*/
-/* panel type
+/* panel type */
/*---------------------------------------------------------------------------*/
enum {
PANEL_TYPE_UNKNOWN,
@@ -53,7 +53,7 @@
/*---------------------------------------------------------------------------*/
/*Panel Configuration */
-typedef struct panel_config{
+struct panel_config{
char *panel_node_id;
char *panel_controller;
@@ -78,7 +78,7 @@
char *slave_panel_node_id;
};
-typedef struct panel_resolution{
+struct panel_resolution{
uint16_t panel_width;
uint16_t panel_height;
@@ -100,7 +100,7 @@
uint16_t invert_hsync_polarity;
};
-typedef struct color_info{
+struct color_info{
uint8_t color_format;
uint8_t color_order;
uint8_t underflow_color;
@@ -109,12 +109,12 @@
uint8_t pixel_alignment;
};
-typedef struct command_state {
+struct command_state {
uint8_t oncommand_state;
uint8_t offcommand_state;
};
-typedef struct videopanel_info {
+struct videopanel_info {
uint8_t hsync_pulse;
uint8_t hfp_power_mode;
uint8_t hbp_power_mode;
@@ -126,7 +126,7 @@
uint32_t bllp_eof_power;
};
-typedef struct commandpanel_info {
+struct commandpanel_info {
uint8_t techeck_enable;
uint8_t tepin_select;
uint8_t teusing_tepin;
@@ -141,7 +141,7 @@
uint32_t cmdmode_idletime;
};
-typedef struct lane_configuration {
+struct lane_configuration {
uint8_t dsi_lanes;
uint8_t dsi_lanemap;
uint8_t lane0_state;
@@ -150,7 +150,7 @@
uint8_t lane3_state;
};
-typedef struct panel_timing {
+struct panel_timing {
uint8_t dsi_mdp_trigger;
uint8_t dsi_dma_trigger;
uint8_t tclk_post;
@@ -163,13 +163,13 @@
BL_DCS,
};
-typedef struct panel_reset_sequence {
+struct panel_reset_sequence {
uint8_t pin_state[TOTAL_RESET_GPIO_CTRL];
uint32_t sleep[TOTAL_RESET_GPIO_CTRL];
uint8_t pin_direction;
};
-typedef struct backlight {
+struct backlight {
uint16_t bl_interface_type;
uint16_t bl_min_level;
uint16_t bl_max_level;
@@ -178,7 +178,7 @@
char *bl_pmic_model;
};
-typedef struct fb_compression {
+struct fb_compression {
uint32_t enabled;
uint32_t comp_ratio;
uint32_t comp_mode;
diff --git a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
index ea638cf..528cb26 100755
--- a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
+++ b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
@@ -44,7 +44,7 @@
/*---------------------------------------------------------------------------*/
static struct panel_config hx8379a_truly_fwvga_video_panel_data = {
"qcom,mdss_dsi_hx8379a_truly_fwvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ""
};
/*---------------------------------------------------------------------------*/
diff --git a/dev/gcdb/display/include/panel_jdi_1080p_video.h b/dev/gcdb/display/include/panel_jdi_1080p_video.h
index bcee0c1..2dbc2ba 100755
--- a/dev/gcdb/display/include/panel_jdi_1080p_video.h
+++ b/dev/gcdb/display/include/panel_jdi_1080p_video.h
@@ -47,7 +47,7 @@
static struct panel_config jdi_1080p_video_panel_data = {
"qcom,mdss_dsi_jdi_1080p_video", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, ""
};
/*---------------------------------------------------------------------------*/
@@ -90,11 +90,11 @@
static struct mipi_dsi_cmd jdi_1080p_video_on_command[] = {
-{ 0x4 , jdi_1080p_video_on_cmd0},
-{ 0x4 , jdi_1080p_video_on_cmd1},
-{ 0x4 , jdi_1080p_video_on_cmd2},
-{ 0x4 , jdi_1080p_video_on_cmd3},
-{ 0x4 , jdi_1080p_video_on_cmd4}
+{ 0x4 , jdi_1080p_video_on_cmd0, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd1, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd2, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd3, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd4, 0x0}
};
#define JDI_1080P_VIDEO_ON_COMMAND 5
@@ -110,8 +110,8 @@
static struct mipi_dsi_cmd jdi_1080p_video_off_command[] = {
-{ 0x4 , jdi_1080p_videooff_cmd0},
-{ 0x4 , jdi_1080p_videooff_cmd1}
+{ 0x4 , jdi_1080p_videooff_cmd0, 0},
+{ 0x4 , jdi_1080p_videooff_cmd1, 0}
};
#define JDI_1080P_VIDEO_OFF_COMMAND 2
@@ -152,14 +152,6 @@
0xe7, 0x36, 0x24, 0x00, 0x66, 0x6a, 0x2a, 0x3a, 0x2d, 0x03, 0x04, 0x00
};
-
-
-static struct mipi_dsi_cmd jdi_1080p_video_rotation[] = {
-
-};
-#define JDI_1080P_VIDEO_ROTATION 0
-
-
static struct panel_timing jdi_1080p_video_timing_info = {
0x0, 0x04, 0x04, 0x1b
};
diff --git a/dev/gcdb/display/include/panel_sharp_wqxga_dualdsi_video.h b/dev/gcdb/display/include/panel_sharp_wqxga_dualdsi_video.h
index 2fccf8c..68a277d 100644
--- a/dev/gcdb/display/include/panel_sharp_wqxga_dualdsi_video.h
+++ b/dev/gcdb/display/include/panel_sharp_wqxga_dualdsi_video.h
@@ -147,6 +147,10 @@
1, 1, 4095, 100, 1, "PMIC_8941" /* BL_WLED */
};
+static struct labibb_desc sharp_wqxga_dualdsi_video_labibb = {
+ 0, 1, 5500000, 5500000, 5500000, 5500000, 3, 3, 1
+};
+
#define SHARP_WQXGA_DUALDSI_VIDEO_SIGNATURE 0x210000
#endif /*_PANEL_SHARP_WQXGA_DUALDSI_VIDEO_H_*/
diff --git a/dev/gcdb/display/panel_display.c b/dev/gcdb/display/panel_display.c
index 4844135..9ae9bf6 100755
--- a/dev/gcdb/display/panel_display.c
+++ b/dev/gcdb/display/panel_display.c
@@ -33,19 +33,19 @@
#include <stdint.h>
#include <msm_panel.h>
#include <mipi_dsi.h>
+#include <mdp5.h>
#include <sys/types.h>
#include <platform/iomap.h>
#include <err.h>
#include <reg.h>
-#include <mdp5.h>
#include <string.h>
-
/*---------------------------------------------------------------------------*/
/* Panel Header */
/*---------------------------------------------------------------------------*/
#include "panel_display.h"
#include "include/panel.h"
+#include "target/display.h"
static int dsi_panel_ctl_base_setup(struct msm_panel_info *pinfo,
char *panel_destination)
diff --git a/dev/gcdb/display/panel_display.h b/dev/gcdb/display/panel_display.h
index 3c99289..8860f00 100755
--- a/dev/gcdb/display/panel_display.h
+++ b/dev/gcdb/display/panel_display.h
@@ -52,7 +52,7 @@
/*---------------------------------------------------------------------------*/
/* struct definition */
/*---------------------------------------------------------------------------*/
-typedef struct panel_struct{
+struct panel_struct{
struct panel_config *paneldata;
struct panel_resolution *panelres;
struct color_info *color;
diff --git a/dev/qpnp_wled/include/qpnp_wled.h b/dev/qpnp_wled/include/qpnp_wled.h
index 8c6bb64..3584a32 100644
--- a/dev/qpnp_wled/include/qpnp_wled.h
+++ b/dev/qpnp_wled/include/qpnp_wled.h
@@ -141,9 +141,15 @@
#define QPNP_WLED_IBB_BIAS_SHIFT 7
#define QPNP_WLED_IBB_PWRUP_DLY_MASK 0xCF
#define QPNP_WLED_IBB_PWRUP_DLY_SHIFT 4
-#define QPNP_WLED_IBB_PWRUP_DLY_MIN_MS 1
-#define QPNP_WLED_IBB_PWRUP_DLY_MAX_MS 8
-
+#define QPNP_WLED_IBB_PWRUP_DLY_MIN_MS 0
+#define QPNP_WLED_IBB_PWRUP_DLY_MAX_MS 3
+#define QPNP_WLED_IBB_PWRDN_DLY_MIN_MS 0
+#define QPNP_WLED_IBB_PWRDN_DLY_MAX_MS 3
+#define IBB_LAB_VREG_STEP_SIZE 100000
+#define QPNP_LABIBB_OUTPUT_VOLTAGE 0x41
+#define QPNP_LAB_OUTPUT_OVERRIDE_EN BIT(7)
+#define QPNP_LAB_SET_VOLTAGE_MASK (BIT(4) - 1)
+#define QPNP_IBB_SET_VOLTAGE_MASK (BIT(6) - 1)
#define QPNP_WLED_LAB_IBB_RDY_REG(b) (b + 0x49)
#define QPNP_WLED_LAB_FAST_PC_REG(b) (b + 0x5E)
#define QPNP_WLED_LAB_FAST_PC_MASK 0xFB
@@ -233,6 +239,8 @@
uint16_t boost_duty_ns;
uint16_t fs_curr_ua;
uint16_t ibb_pwrup_dly_ms;
+ uint16_t ibb_pwrdn_dly_ms;
+ uint16_t ibb_discharge_en;
uint16_t ramp_ms;
uint16_t ramp_step;
uint8_t strings[QPNP_WLED_MAX_STRINGS];
@@ -243,11 +251,29 @@
bool disp_type_amoled;
bool ibb_bias_active;
bool lab_fast_precharge;
+ uint32_t lab_min_volt;
+ uint32_t lab_max_volt;
+ uint32_t ibb_min_volt;
+ uint32_t ibb_max_volt;
+ uint32_t ibb_init_volt;
+ uint32_t lab_init_volt;
};
+struct qpnp_wled_config_data {
+ bool display_type;
+ char pwr_up_delay;
+ char pwr_down_delay;
+ char ibb_discharge_en;
+ uint32_t lab_min_volt;
+ uint32_t lab_max_volt;
+ uint32_t ibb_min_volt;
+ uint32_t ibb_max_volt;
+ uint32_t ibb_init_volt;
+ uint32_t lab_init_volt;
+};
/* WLED Initial Setup */
-int qpnp_wled_init();
+int qpnp_wled_init(struct qpnp_wled_config_data *config);
/* Enable IBB */
-int qpnp_ibb_enable();
+int qpnp_ibb_enable(bool state);
void qpnp_wled_enable_backlight(int enable);
diff --git a/dev/qpnp_wled/qpnp_wled.c b/dev/qpnp_wled/qpnp_wled.c
index a342197..bc4cc0e 100644
--- a/dev/qpnp_wled/qpnp_wled.c
+++ b/dev/qpnp_wled/qpnp_wled.c
@@ -38,6 +38,7 @@
}
static struct qpnp_wled *gwled;
+static int qpnp_labibb_regulator_set_voltage(struct qpnp_wled *wled);
static int qpnp_wled_sec_access(struct qpnp_wled *wled, uint16_t base_addr)
{
@@ -106,9 +107,9 @@
/* enable lab */
if (gwled->ibb_bias_active) {
rc = qpnp_wled_enable(gwled, gwled->lab_base, state);
+ udelay(QPNP_WLED_LAB_START_DLY_US + 1);
if (rc < 0)
return rc;
- udelay(QPNP_WLED_LAB_START_DLY_US + 1);
} else {
reg = pm8x41_wled_reg_read(QPNP_WLED_LAB_IBB_RDY_REG(gwled->lab_base));
if (reg < 0)
@@ -436,6 +437,11 @@
else if (wled->ibb_pwrup_dly_ms > QPNP_WLED_IBB_PWRUP_DLY_MAX_MS)
wled->ibb_pwrup_dly_ms = QPNP_WLED_IBB_PWRUP_DLY_MAX_MS;
+ if (wled->ibb_pwrdn_dly_ms < QPNP_WLED_IBB_PWRDN_DLY_MIN_MS)
+ wled->ibb_pwrdn_dly_ms = QPNP_WLED_IBB_PWRDN_DLY_MIN_MS;
+ else if (wled->ibb_pwrdn_dly_ms > QPNP_WLED_IBB_PWRDN_DLY_MAX_MS)
+ wled->ibb_pwrdn_dly_ms = QPNP_WLED_IBB_PWRDN_DLY_MAX_MS;
+
reg = pm8x41_wled_reg_read(
QPNP_WLED_IBB_BIAS_REG(wled->ibb_base));
if (reg < 0)
@@ -444,9 +450,11 @@
reg &= QPNP_WLED_IBB_BIAS_MASK;
reg |= (!wled->ibb_bias_active << QPNP_WLED_IBB_BIAS_SHIFT);
- temp = fls(wled->ibb_pwrup_dly_ms) - 1;
+ temp = wled->ibb_pwrup_dly_ms;
reg &= QPNP_WLED_IBB_PWRUP_DLY_MASK;
reg |= (temp << QPNP_WLED_IBB_PWRUP_DLY_SHIFT);
+ reg |= wled->ibb_pwrdn_dly_ms;
+ reg |= (wled->ibb_discharge_en << 2);
rc = qpnp_wled_sec_access(wled, wled->ibb_base);
if (rc)
@@ -464,11 +472,15 @@
if (rc < 0)
return rc;
+ rc = qpnp_labibb_regulator_set_voltage(wled);
+ if (rc < 0)
+ return rc;
+
return 0;
}
/* Setup wled default parameters */
-static int qpnp_wled_setup(struct qpnp_wled *wled)
+static int qpnp_wled_setup(struct qpnp_wled *wled, struct qpnp_wled_config_data *config)
{
int rc, i;
@@ -501,14 +513,22 @@
wled->strings[i] = i;
wled->ibb_bias_active = false;
- wled->ibb_pwrup_dly_ms = 8;
- wled->lab_fast_precharge = false;
- wled->disp_type_amoled = false;
+ wled->lab_fast_precharge = true;
+ wled->ibb_pwrup_dly_ms = config->pwr_up_delay;
+ wled->ibb_pwrdn_dly_ms = config->pwr_down_delay;
+ wled->ibb_discharge_en = config->ibb_discharge_en;
+ wled->disp_type_amoled = config->display_type;
+ wled->lab_min_volt = config->lab_min_volt;
+ wled->lab_max_volt = config->lab_max_volt;
+ wled->ibb_min_volt = config->ibb_min_volt;
+ wled->ibb_max_volt = config->ibb_max_volt;
+ wled->ibb_init_volt = config->ibb_init_volt;
+ wled->lab_init_volt = config->lab_init_volt;
return 0;
}
-int qpnp_wled_init()
+int qpnp_wled_init(struct qpnp_wled_config_data *config)
{
int rc, i;
struct qpnp_wled *wled;
@@ -519,7 +539,7 @@
memset(wled, 0, sizeof(struct qpnp_wled));
- rc = qpnp_wled_setup(wled);
+ rc = qpnp_wled_setup(wled, config);
if (rc) {
dprintf(CRITICAL, "Setting WLED parameters failed\n");
return rc;
@@ -535,3 +555,55 @@
return rc;
}
+
+static int qpnp_labibb_regulator_set_voltage(struct qpnp_wled *wled)
+{
+ int rc=-1, new_uV;
+ uint8_t val, mask=0;
+
+ if (wled->lab_min_volt < wled->lab_init_volt) {
+ dprintf(CRITICAL,"qpnp_lab_regulator_set_voltage failed, min_uV %d is less than init volt %d\n",
+ wled->lab_min_volt, wled->lab_init_volt);
+ return rc;
+ }
+
+ val = (((wled->lab_min_volt - wled->lab_init_volt) + (IBB_LAB_VREG_STEP_SIZE - 1)) / IBB_LAB_VREG_STEP_SIZE);
+ new_uV = val * IBB_LAB_VREG_STEP_SIZE + wled->lab_init_volt;
+
+ if (new_uV > wled->lab_max_volt) {
+ dprintf(CRITICAL,"qpnp_ibb_regulator_set_voltage unable to set voltage (%d %d)\n",
+ wled->lab_min_volt, wled->lab_max_volt);
+ return rc;
+ }
+ val |= QPNP_LAB_OUTPUT_OVERRIDE_EN;
+ mask = pm8x41_wled_reg_read(wled->lab_base + QPNP_LABIBB_OUTPUT_VOLTAGE);
+ mask &= ~(QPNP_LAB_SET_VOLTAGE_MASK | QPNP_LAB_OUTPUT_OVERRIDE_EN);
+ mask |= val & (QPNP_LAB_SET_VOLTAGE_MASK | QPNP_LAB_OUTPUT_OVERRIDE_EN);
+
+ pm8x41_wled_reg_write(wled->lab_base + QPNP_LABIBB_OUTPUT_VOLTAGE, mask);
+ udelay(2);
+
+ /* IBB Set Voltage */
+ if (wled->ibb_min_volt < wled->ibb_init_volt) {
+ dprintf(CRITICAL, "qpnp_ibb_regulator_set_voltage failed, min_uV %d is less than init volt %d\n",
+ wled->ibb_min_volt, wled->ibb_init_volt);
+ return rc;
+ }
+
+ val = (((wled->ibb_min_volt - wled->ibb_init_volt) + (IBB_LAB_VREG_STEP_SIZE - 1)) / IBB_LAB_VREG_STEP_SIZE);
+ new_uV = val * IBB_LAB_VREG_STEP_SIZE + wled->ibb_init_volt;
+ if (new_uV > wled->ibb_max_volt) {
+ dprintf(CRITICAL,"qpnp_ibb_regulator_set_voltage unable to set voltage %d %d\n",
+ wled->ibb_min_volt, wled->ibb_max_volt);
+ return rc;
+ }
+ val |= QPNP_LAB_OUTPUT_OVERRIDE_EN;
+ mask = pm8x41_wled_reg_read(wled->ibb_base + QPNP_LABIBB_OUTPUT_VOLTAGE);
+ udelay(2);
+ mask &= ~(QPNP_IBB_SET_VOLTAGE_MASK | QPNP_LAB_OUTPUT_OVERRIDE_EN);
+ mask |= (val & (QPNP_IBB_SET_VOLTAGE_MASK | QPNP_LAB_OUTPUT_OVERRIDE_EN));
+
+ pm8x41_wled_reg_write(wled->ibb_base + QPNP_LABIBB_OUTPUT_VOLTAGE,mask);
+
+ return 0;
+}
diff --git a/platform/apq8084/platform.c b/platform/apq8084/platform.c
index 923588d..cf13b5a 100644
--- a/platform/apq8084/platform.c
+++ b/platform/apq8084/platform.c
@@ -167,8 +167,3 @@
/* Using 1-1 mapping on this platform. */
return phys_addr;
}
-
-int boot_device_mask(int val)
-{
- return ((val & 0x3E) >> 1);
-}
diff --git a/platform/init.c b/platform/init.c
index 095f6e2..4783eba 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -130,3 +130,8 @@
{
return 0;
}
+
+__WEAK int boot_device_mask(int val)
+{
+ return ((val & 0x3E) >> 1);
+}
diff --git a/platform/msm8994/include/platform/gpio.h b/platform/msm8994/include/platform/gpio.h
index bce399b..154fbdf 100644
--- a/platform/msm8994/include/platform/gpio.h
+++ b/platform/msm8994/include/platform/gpio.h
@@ -57,4 +57,7 @@
void gpio_config_uart_dm(uint8_t id);
void gpio_config_blsp_i2c(uint8_t, uint8_t);
+void gpio_set(uint32_t gpio, uint32_t dir);
+void gpio_tlmm_config(uint32_t gpio, uint8_t func, uint8_t dir, uint8_t pull,
+ uint8_t drvstr, uint32_t enable);
#endif
diff --git a/platform/msm8994/include/platform/iomap.h b/platform/msm8994/include/platform/iomap.h
index 4419306..1774aa5 100644
--- a/platform/msm8994/include/platform/iomap.h
+++ b/platform/msm8994/include/platform/iomap.h
@@ -255,69 +255,251 @@
#define MDP_PP_1_BASE REG_MDP(0x71800)
#define REG_MDP(off) (MDP_BASE + (off))
+
+#ifdef MDP_HW_REV
+#undef MDP_HW_REV
+#endif
#define MDP_HW_REV REG_MDP(0x1000)
+
+#ifdef MDP_INTR_EN
+#undef MDP_INTR_EN
+#endif
#define MDP_INTR_EN REG_MDP(0x1010)
+
+#ifdef MDP_INTR_CLEAR
+#undef MDP_INTR_CLEAR
+#endif
#define MDP_INTR_CLEAR REG_MDP(0x1018)
+
+#ifdef MDP_HIST_INTR_EN
+#undef MDP_HIST_INTR_EN
+#endif
#define MDP_HIST_INTR_EN REG_MDP(0x101C)
+#ifdef MDP_DISP_INTF_SEL
+#undef MDP_DISP_INTF_SEL
+#endif
#define MDP_DISP_INTF_SEL REG_MDP(0x1004)
+
+#ifdef MDP_VIDEO_INTF_UNDERFLOW_CTL
+#undef MDP_VIDEO_INTF_UNDERFLOW_CTL
+#endif
#define MDP_VIDEO_INTF_UNDERFLOW_CTL REG_MDP(0x12E0)
+
+#ifdef MDP_UPPER_NEW_ROI_PRIOR_RO_START
+#undef MDP_UPPER_NEW_ROI_PRIOR_RO_START
+#endif
#define MDP_UPPER_NEW_ROI_PRIOR_RO_START REG_MDP(0x11EC)
+
+#ifdef MDP_LOWER_NEW_ROI_PRIOR_TO_START
+#undef MDP_LOWER_NEW_ROI_PRIOR_TO_START
+#endif
#define MDP_LOWER_NEW_ROI_PRIOR_TO_START REG_MDP(0x13F8)
+#ifdef MDP_INTF_0_TIMING_ENGINE_EN
+#undef MDP_INTF_0_TIMING_ENGINE_EN
+#endif
#define MDP_INTF_0_TIMING_ENGINE_EN REG_MDP(0x6b000)
+
+#ifdef MDP_INTF_1_TIMING_ENGINE_EN
+#undef MDP_INTF_1_TIMING_ENGINE_EN
+#endif
#define MDP_INTF_1_TIMING_ENGINE_EN REG_MDP(0x6b800)
#define MDP_INTF_2_TIMING_ENGINE_EN REG_MDP(0x6C000)
-#define MDP_CTL_0_BASE REG_MDP(0x2000)
-#define MDP_CTL_1_BASE REG_MDP(0x2200)
+#ifdef MDP_CTL_0_BASE
+#undef MDP_CTL_0_BASE
+#endif
+#define MDP_CTL_0_BASE REG_MDP(0x2000)
+#ifdef MDP_CTL_1_BASE
+#undef MDP_CTL_1_BASE
+#endif
+#define MDP_CTL_1_BASE REG_MDP(0x2200)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_EN
+#undef MDP_REG_SPLIT_DISPLAY_EN
+#endif
#define MDP_REG_SPLIT_DISPLAY_EN REG_MDP(0x12F4)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#endif
#define MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL REG_MDP(0x12F8)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#endif
#define MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL REG_MDP(0x13F0)
-/* can not find following two registers */
-#define MDP_REG_PPB0_CNTL REG_MDP(0x1420)
-#define MDP_REG_PPB0_CONFIG REG_MDP(0x1424)
-
+#ifdef MDP_INTF_0_BASE
+#undef MDP_INTF_0_BASE
+#endif
#define MDP_INTF_0_BASE REG_MDP(0x6b000)
+
+#ifdef MDP_INTF_1_BASE
+#undef MDP_INTF_1_BASE
+#endif
#define MDP_INTF_1_BASE REG_MDP(0x6b800)
+
+#ifdef MDP_INTF_2_BASE
+#undef MDP_INTF_2_BASE
+#endif
#define MDP_INTF_2_BASE REG_MDP(0x6c000)
-
+#ifdef MDP_CLK_CTRL0
+#undef MDP_CLK_CTRL0
+#endif
#define MDP_CLK_CTRL0 REG_MDP(0x12AC)
+
+#ifdef MDP_CLK_CTRL1
+#undef MDP_CLK_CTRL1
+#endif
#define MDP_CLK_CTRL1 REG_MDP(0x12B4)
+
+#ifdef MDP_CLK_CTRL2
+#undef MDP_CLK_CTRL2
+#endif
#define MDP_CLK_CTRL2 REG_MDP(0x12BC)
+
+#ifdef MDP_CLK_CTRL3
+#undef MDP_CLK_CTRL3
+#endif
#define MDP_CLK_CTRL3 REG_MDP(0x13A8)
+
+#ifdef MDP_CLK_CTRL4
+#undef MDP_CLK_CTRL4
+#endif
#define MDP_CLK_CTRL4 REG_MDP(0x13B0)
+
+#ifdef MDP_CLK_CTRL5
+#undef MDP_CLK_CTRL5
+#endif
#define MDP_CLK_CTRL5 REG_MDP(0x13B8)
+
+#ifdef MDP_CLK_CTRL6
+#undef MDP_CLK_CTRL6
+#endif
#define MDP_CLK_CTRL6 REG_MDP(0x12C4)
+
+#ifdef MDP_CLK_CTRL7
+#undef MDP_CLK_CTRL7
+#endif
#define MDP_CLK_CTRL7 REG_MDP(0x13D0)
+#ifdef MMSS_MDP_SMP_ALLOC_W_BASE
+#undef MMSS_MDP_SMP_ALLOC_W_BASE
+#endif
#define MMSS_MDP_SMP_ALLOC_W_BASE REG_MDP(0x1080)
+
+#ifdef MMSS_MDP_SMP_ALLOC_R_BASE
+#undef MMSS_MDP_SMP_ALLOC_R_BASE
+#endif
#define MMSS_MDP_SMP_ALLOC_R_BASE REG_MDP(0x1130)
+#ifdef MDP_QOS_REMAPPER_CLASS_0
+#undef MDP_QOS_REMAPPER_CLASS_0
+#endif
#define MDP_QOS_REMAPPER_CLASS_0 REG_MDP(0x11E0)
+
+#ifdef MDP_QOS_REMAPPER_CLASS_1
+#undef MDP_QOS_REMAPPER_CLASS_1
+#endif
#define MDP_QOS_REMAPPER_CLASS_1 REG_MDP(0x11E4)
+#ifdef VBIF_VBIF_DDR_FORCE_CLK_ON
+#undef VBIF_VBIF_DDR_FORCE_CLK_ON
+#endif
#define VBIF_VBIF_DDR_FORCE_CLK_ON REG_MDP(0xc8004)
+
+#ifdef VBIF_VBIF_DDR_OUT_MAX_BURST
+#undef VBIF_VBIF_DDR_OUT_MAX_BURST
+#endif
#define VBIF_VBIF_DDR_OUT_MAX_BURST REG_MDP(0xc80D8)
+
+#ifdef VBIF_VBIF_DDR_ARB_CTRL
+#undef VBIF_VBIF_DDR_ARB_CTRL
+#endif
#define VBIF_VBIF_DDR_ARB_CTRL REG_MDP(0xc80F0)
+
+#ifdef VBIF_VBIF_DDR_RND_RBN_QOS_ARB
+#undef VBIF_VBIF_DDR_RND_RBN_QOS_ARB
+#endif
#define VBIF_VBIF_DDR_RND_RBN_QOS_ARB REG_MDP(0xc8124)
+
+#ifdef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0
+#undef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0
+#endif
#define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0 REG_MDP(0xc8160)
+
+#ifdef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1
+#undef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1
+#endif
#define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1 REG_MDP(0xc8164)
+
+#ifdef VBIF_VBIF_DDR_OUT_AOOO_AXI_EN
+#undef VBIF_VBIF_DDR_OUT_AOOO_AXI_EN
+#endif
#define VBIF_VBIF_DDR_OUT_AOOO_AXI_EN REG_MDP(0xc8178)
+
+#ifdef VBIF_VBIF_DDR_OUT_AX_AOOO
+#undef VBIF_VBIF_DDR_OUT_AX_AOOO
+#endif
#define VBIF_VBIF_DDR_OUT_AX_AOOO REG_MDP(0xc817C)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF0
+#undef VBIF_VBIF_IN_RD_LIM_CONF0
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF0 REG_MDP(0xc80B0)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF1
+#undef VBIF_VBIF_IN_RD_LIM_CONF1
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF1 REG_MDP(0xc80B4)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF2
+#undef VBIF_VBIF_IN_RD_LIM_CONF2
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF2 REG_MDP(0xc80B8)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF3
+#undef VBIF_VBIF_IN_RD_LIM_CONF3
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF3 REG_MDP(0xc80BC)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF0
+#undef VBIF_VBIF_IN_WR_LIM_CONF0
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF0 REG_MDP(0xc80C0)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF1
+#undef VBIF_VBIF_IN_WR_LIM_CONF1
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF1 REG_MDP(0xc80C4)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF2
+#undef VBIF_VBIF_IN_WR_LIM_CONF2
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF2 REG_MDP(0xc80C8)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF3
+#undef VBIF_VBIF_IN_WR_LIM_CONF3
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF3 REG_MDP(0xc80CC)
+
+#ifdef VBIF_VBIF_ABIT_SHORT
+#undef VBIF_VBIF_ABIT_SHORT
+#endif
#define VBIF_VBIF_ABIT_SHORT REG_MDP(0xc8070)
+
+#ifdef VBIF_VBIF_ABIT_SHORT_CONF
+#undef VBIF_VBIF_ABIT_SHORT_CONF
+#endif
#define VBIF_VBIF_ABIT_SHORT_CONF REG_MDP(0xc8074)
+
+#ifdef VBIF_VBIF_GATE_OFF_WRREQ_EN
+#undef VBIF_VBIF_GATE_OFF_WRREQ_EN
+#endif
#define VBIF_VBIF_GATE_OFF_WRREQ_EN REG_MDP(0xc80A8)
#define MDP_VP_0_VIG_0_BASE REG_MDP(0x5000)
diff --git a/platform/msm8994/msm8994-clock.c b/platform/msm8994/msm8994-clock.c
index 5ee2d5c..358db25 100644
--- a/platform/msm8994/msm8994-clock.c
+++ b/platform/msm8994/msm8994-clock.c
@@ -158,24 +158,6 @@
F_END
};
-static struct rcg_clk blsp2_uart2_apps_clk_src =
-{
- .cmd_reg = (uint32_t *) BLSP2_UART2_APPS_CMD_RCGR,
- .cfg_reg = (uint32_t *) BLSP2_UART2_APPS_CFG_RCGR,
- .m_reg = (uint32_t *) BLSP2_UART2_APPS_M,
- .n_reg = (uint32_t *) BLSP2_UART2_APPS_N,
- .d_reg = (uint32_t *) BLSP2_UART2_APPS_D,
-
- .set_rate = clock_lib2_rcg_set_rate_mnd,
- .freq_tbl = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
- .current_freq = &rcg_dummy_freq,
-
- .c = {
- .dbg_name = "blsp1_uart2_apps_clk",
- .ops = &clk_ops_rcg_mnd,
- },
-};
-
static struct rcg_clk blsp1_uart2_apps_clk_src =
{
.cmd_reg = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
@@ -194,17 +176,6 @@
},
};
-static struct branch_clk gcc_blsp2_uart2_apps_clk =
-{
- .cbcr_reg = (uint32_t *) BLSP2_UART2_APPS_CBCR,
- .parent = &blsp2_uart2_apps_clk_src.c,
-
- .c = {
- .dbg_name = "gcc_blsp2_uart2_apps_clk",
- .ops = &clk_ops_branch,
- },
-};
-
static struct branch_clk gcc_blsp1_uart2_apps_clk =
{
.cbcr_reg = (uint32_t *) BLSP1_UART2_APPS_CBCR,
@@ -227,17 +198,6 @@
},
};
-static struct vote_clk gcc_blsp2_ahb_clk = {
- .cbcr_reg = (uint32_t *) BLSP2_AHB_CBCR,
- .vote_reg = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
- .en_mask = BIT(15),
-
- .c = {
- .dbg_name = "gcc_blsp2_ahb_clk",
- .ops = &clk_ops_vote,
- },
-};
-
/* USB Clocks */
static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] =
{
@@ -708,7 +668,7 @@
};
static struct branch_clk mdss_mdp_lut_clk = {
- .cbcr_reg = MDP_LUT_CBCR,
+ .cbcr_reg = (uint32_t *) MDP_LUT_CBCR,
.parent = &mdss_mdp_clk_src.c,
.has_sibling = 1,
@@ -719,7 +679,7 @@
};
static struct branch_clk mdss_vsync_clk = {
- .cbcr_reg = MDSS_VSYNC_CBCR,
+ .cbcr_reg = (uint32_t *) MDSS_VSYNC_CBCR,
.parent = &vsync_clk_src.c,
.has_sibling = 0,
@@ -746,7 +706,7 @@
};
static struct branch_clk mdss_edpaux_clk = {
- .cbcr_reg = MDSS_EDPAUX_CBCR,
+ .cbcr_reg = (uint32_t *) MDSS_EDPAUX_CBCR,
.parent = &edpaux_clk_src.c,
.has_sibling = 0,
@@ -811,7 +771,7 @@
};
static struct branch_clk mmss_misc_ahb_clk = {
- .cbcr_reg = MMSS_MISC_AHB_CBCR,
+ .cbcr_reg = (uint32_t *) MMSS_MISC_AHB_CBCR,
.has_sibling = 1,
.c = {
diff --git a/platform/msm8994/platform.c b/platform/msm8994/platform.c
index 80f4ad3..560a021 100644
--- a/platform/msm8994/platform.c
+++ b/platform/msm8994/platform.c
@@ -180,8 +180,3 @@
else
return ((addr_t)BS_INFO_ADDR2);
}
-
-int boot_device_mask(int val)
-{
- return ((val & 0x3E) >> 1);
-}
diff --git a/platform/msm_shared/include/msm_panel.h b/platform/msm_shared/include/msm_panel.h
index ffcbb12..6c55f0e 100755
--- a/platform/msm_shared/include/msm_panel.h
+++ b/platform/msm_shared/include/msm_panel.h
@@ -244,6 +244,18 @@
char channel_swap;
};
+struct labibb_desc {
+ char amoled_panel; /* lcd = 0, amoled = 1*/
+ char force_config; /* 0 to use default value */
+ uint32_t ibb_min_volt;
+ uint32_t ibb_max_volt;
+ uint32_t lab_min_volt;
+ uint32_t lab_max_volt;
+ char pwr_up_delay; /* ndx to => 1250, 2500, 5000 and 10000 us */
+ char pwr_down_delay; /* ndx to => 1250, 2500, 5000 and 10000 us */
+ char ibb_discharge_en;
+};
+
struct msm_panel_info {
uint32_t xres;
uint32_t yres;
@@ -270,6 +282,8 @@
struct hdmi_panel_info hdmi;
struct edp_panel_info edp;
+ struct labibb_desc *labibb;
+
int (*on) (void);
int (*off) (void);
int (*pre_on) (void);
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index c8bf43d..5bd2353 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -35,6 +35,7 @@
#include <string.h>
#include <debug.h>
#include <target/display.h>
+#include <mdp5.h>
#include <platform/iomap.h>
#include <platform/clock.h>
#include <platform/timer.h>
diff --git a/target/msm8909/target_display.c b/target/msm8909/target_display.c
index 93837f9..c7c8c2d 100755
--- a/target/msm8909/target_display.c
+++ b/target/msm8909/target_display.c
@@ -216,10 +216,9 @@
int target_ldo_ctrl(uint8_t enable)
{
- /*
- * The PMIC regulators needed for display are enabled in SBL.
- * There is no access to the regulators is LK.
- */
+ if (enable)
+ regulator_enable(); /* L2, L6, and L17 */
+
return NO_ERROR;
}
diff --git a/target/msm8994/include/target/display.h b/target/msm8994/include/target/display.h
index b9d5dfe..35643a0 100644
--- a/target/msm8994/include/target/display.h
+++ b/target/msm8994/include/target/display.h
@@ -34,31 +34,6 @@
/*---------------------------------------------------------------------------*/
#include <display_resource.h>
-/*---------------------------------------------------------------------------*/
-/* GPIO configuration */
-/*---------------------------------------------------------------------------*/
-static struct gpio_pin reset_gpio = {
- "msmgpio", 78, 3, 1, 0, 1
-};
-
-static struct gpio_pin lcd_reg_en = { /* boost regulator */
- "pm8994_gpios", 14, 3, 1, 0, 1
-};
-
-static struct gpio_pin bklt_gpio = { /* lcd_bklt_reg_en */
- "pmi8994_gpios", 2, 3, 1, 0, 1
-};
-
-/*---------------------------------------------------------------------------*/
-/* LDO configuration */
-/*---------------------------------------------------------------------------*/
-static struct ldo_entry ldo_entry_array[] = {
- { "vdd", 14, 0, 1800000, 100000, 100, 0, 20, 0, 0},
- { "vddio", 12, 0, 1800000, 100000, 100, 0, 20, 0, 0},
- { "vdda", 2, 1, 1250000, 100000, 100, 0, 0, 0, 0},
- { "vcca", 28, 1, 1000000, 10000, 100, 0, 0, 0, 0},
-};
-
#define TOTAL_LDO_DEFINED 3
/*---------------------------------------------------------------------------*/
@@ -107,3 +82,16 @@
#define PWM_BL_LPG_CHAN_ID 4 /* lpg_out<3> */
#endif
+
+/*---------------------------------------------------------------------------*/
+/* Functions */
+/*---------------------------------------------------------------------------*/
+int target_display_pre_on();
+int target_display_pre_off();
+int target_display_post_on();
+int target_display_post_off();
+int target_cont_splash_screen();
+void target_force_cont_splash_disable(uint8_t override);
+uint8_t target_panel_auto_detect_enabled();
+
+
diff --git a/target/msm8994/init.c b/target/msm8994/init.c
index e0917f3..c4e467c 100644
--- a/target/msm8994/init.c
+++ b/target/msm8994/init.c
@@ -58,8 +58,8 @@
#include <qusb2_phy.h>
#include <rpm-smd.h>
#include <sdhci_msm.h>
-#include <pm8x41_wled.h>
-#include <qpnp_wled.h>
+
+#include "target/display.h"
#define CE_INSTANCE 2
#define CE_EE 1
@@ -334,10 +334,6 @@
mmc_read_partition_table(0);
rpm_smd_init();
-
- /* QPNP WLED init for display backlight */
- pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID);
- qpnp_wled_init();
}
unsigned board_machtype(void)
@@ -363,7 +359,6 @@
case HW_PLATFORM_MTP:
case HW_PLATFORM_FLUID:
case HW_PLATFORM_LIQUID:
- case HW_PLATFORM_DRAGON:
dprintf(SPEW, "Target_cont_splash=1\n");
splash_screen = 1;
break;
diff --git a/target/msm8994/oem_panel.c b/target/msm8994/oem_panel.c
index 859c706..ac227a4 100644
--- a/target/msm8994/oem_panel.c
+++ b/target/msm8994/oem_panel.c
@@ -28,11 +28,13 @@
*/
#include <debug.h>
+#include <string.h>
#include <err.h>
#include <smem.h>
#include <msm_panel.h>
#include <board.h>
#include <mipi_dsi.h>
+#include <qtimer.h>
#include "include/panel.h"
#include "panel_display.h"
@@ -133,6 +135,9 @@
panelstruct->panelresetseq
= &sharp_wqxga_dualdsi_video_reset_seq;
panelstruct->backlightinfo = &sharp_wqxga_dualdsi_video_backlight;
+
+ pinfo->labibb = &sharp_wqxga_dualdsi_video_labibb;
+
pinfo->mipi.panel_on_cmds
= sharp_wqxga_dualdsi_video_on_command;
pinfo->mipi.num_of_panel_on_cmds
@@ -378,9 +383,6 @@
case HW_PLATFORM_LIQUID:
panel_id = JDI_4K_DUALDSI_VIDEO_PANEL;
break;
- case HW_PLATFORM_DRAGON:
- panel_id = HX8379A_TRULY_FWVGA_VIDEO_PANEL;
- break;
default:
dprintf(CRITICAL, "Display not enabled for %d HW type\n"
, hw_id);
diff --git a/target/msm8994/target_display.c b/target/msm8994/target_display.c
index 89579d8..6cca296 100644
--- a/target/msm8994/target_display.c
+++ b/target/msm8994/target_display.c
@@ -28,6 +28,7 @@
*/
#include <debug.h>
+#include <string.h>
#include <smem.h>
#include <err.h>
#include <msm_panel.h>
@@ -39,12 +40,16 @@
#include <mdp5.h>
#include <scm.h>
#include <endian.h>
+#include <regulator.h>
+#include <qtimer.h>
+#include <arch/defines.h>
#include <platform/gpio.h>
#include <platform/clock.h>
#include <platform/iomap.h>
#include <target/display.h>
#include "include/panel.h"
#include "include/display_resource.h"
+#include "gcdb_display.h"
#define HFPLL_LDO_ID 12
@@ -57,6 +62,21 @@
#define PMIC_WLED_SLAVE_ID 3
#define PMIC_MPP_SLAVE_ID 2
+/*---------------------------------------------------------------------------*/
+/* GPIO configuration */
+/*---------------------------------------------------------------------------*/
+static struct gpio_pin reset_gpio = {
+ "msmgpio", 78, 3, 1, 0, 1
+};
+
+static struct gpio_pin lcd_reg_en = { /* boost regulator */
+ "pm8994_gpios", 14, 3, 1, 0, 1
+};
+
+static struct gpio_pin bklt_gpio = { /* lcd_bklt_reg_en */
+ "pmi8994_gpios", 2, 3, 1, 0, 1
+};
+
static void dsi_pll_20nm_phy_init( uint32_t pll_base, int off)
{
mdss_dsi_pll_20nm_sw_reset_st_machine(pll_base);
@@ -337,11 +357,68 @@
return NO_ERROR;
}
+static void wled_init(struct msm_panel_info *pinfo)
+{
+ struct qpnp_wled_config_data config = {0};
+ struct labibb_desc *labibb;
+ int display_type = 0;
+
+ labibb = pinfo->labibb;
+
+ if (labibb)
+ display_type = labibb->amoled_panel;
+
+ config.display_type = display_type;
+ config.lab_init_volt = 4600000; /* fixed, see pmi register */
+ config.ibb_init_volt = 1400000; /* fixed, see pmi register */
+
+ if (labibb && labibb->force_config) {
+ config.lab_min_volt = labibb->lab_min_volt;
+ config.lab_max_volt = labibb->lab_max_volt;
+ config.ibb_min_volt = labibb->ibb_min_volt;
+ config.ibb_max_volt = labibb->ibb_max_volt;
+ config.pwr_up_delay = labibb->pwr_up_delay;
+ config.pwr_down_delay = labibb->pwr_down_delay;
+ config.ibb_discharge_en = labibb->ibb_discharge_en;
+ } else {
+ /* default */
+ config.pwr_up_delay = 3;
+ config.pwr_down_delay = 3;
+ config.ibb_discharge_en = 1;
+ if (display_type) { /* amoled */
+ config.lab_min_volt = 4600000;
+ config.lab_max_volt = 4600000;
+ config.ibb_min_volt = 4000000;
+ config.ibb_max_volt = 4000000;
+ } else { /* lcd */
+ config.lab_min_volt = 5500000;
+ config.lab_max_volt = 5500000;
+ config.ibb_min_volt = 5500000;
+ config.ibb_max_volt = 5500000;
+ }
+ }
+
+ dprintf(SPEW, "%s: %d %d %d %d %d %d %d %d %d %d\n", __func__,
+ config.display_type,
+ config.lab_min_volt, config.lab_max_volt,
+ config.ibb_min_volt, config.ibb_max_volt,
+ config.lab_init_volt, config.ibb_init_volt,
+ config.pwr_up_delay, config.pwr_down_delay,
+ config.ibb_discharge_en);
+
+
+ /* QPNP WLED init for display backlight */
+ pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID);
+
+ qpnp_wled_init(&config);
+}
+
int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo)
{
if (enable) {
regulator_enable(); /* L2, L12, L14, and L28 */
mdelay(10);
+ wled_init(pinfo);
qpnp_ibb_enable(true); /* +5V and -5V */
mdelay(50);
@@ -373,12 +450,8 @@
bool target_display_panel_node(char *panel_name, char *pbuf, uint16_t buf_size)
{
- int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
- bool ret = true;
+ return gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
- ret = gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
-
- return ret;
}
void target_display_init(const char *panel_name)
@@ -394,7 +467,7 @@
panel_name);
return;
}
- if (gcdb_display_init(panel_name, MDP_REV_50, MIPI_FB_ADDR)) {
+ if (gcdb_display_init(panel_name, MDP_REV_50, (void *)MIPI_FB_ADDR)) {
target_force_cont_splash_disable(true);
msm_display_off();
}
diff --git a/target/target_display.c b/target/target_display.c
index 4b07cc8..a16a46e 100644
--- a/target/target_display.c
+++ b/target/target_display.c
@@ -30,6 +30,8 @@
#include <debug.h>
#include <platform.h>
+#include "include/msm_panel.h"
+
__WEAK int mdp_lcdc_config(void)
{
return 0;