Merge "dev: gcdb: support dual dsi command mode panel in GCDB"
diff --git a/platform/msm_shared/include/sdhci_msm.h b/platform/msm_shared/include/sdhci_msm.h
index 8cccb5e..bc36348 100644
--- a/platform/msm_shared/include/sdhci_msm.h
+++ b/platform/msm_shared/include/sdhci_msm.h
@@ -34,6 +34,10 @@
#define SDHCI_HC_START_BIT 0x0
#define SDHCI_HC_WIDTH 0x1
+#define SDCC_MCI_POWER 0x0
+#define CORE_SW_RST_START 0x7
+#define CORE_SW_RST_WIDTH 0x1
+
/* DLL & CDC registers
* DLL: Delay Line
* CDC: Calibrated Delay Circuit
diff --git a/platform/msm_shared/sdhci_msm.c b/platform/msm_shared/sdhci_msm.c
index dd92745..9c1129a 100644
--- a/platform/msm_shared/sdhci_msm.c
+++ b/platform/msm_shared/sdhci_msm.c
@@ -139,6 +139,15 @@
*/
void sdhci_msm_init(struct sdhci_host *host, struct sdhci_msm_data *config)
{
+ /* Disable HC mode */
+ RMWREG32((config->pwrctl_base + SDCC_MCI_HC_MODE), SDHCI_HC_START_BIT, SDHCI_HC_WIDTH, 0);
+
+ /* Core power reset */
+ RMWREG32((config->pwrctl_base + SDCC_MCI_POWER), CORE_SW_RST_START, CORE_SW_RST_WIDTH, 1);
+
+ /* Wait for the core power reset to complete*/
+ mdelay(1);
+
/* Enable sdhc mode */
RMWREG32((config->pwrctl_base + SDCC_MCI_HC_MODE), SDHCI_HC_START_BIT, SDHCI_HC_WIDTH, SDHCI_HC_MODE_EN);
diff --git a/target/apq8084/init.c b/target/apq8084/init.c
index b18c9f0..4d9e889 100644
--- a/target/apq8084/init.c
+++ b/target/apq8084/init.c
@@ -135,6 +135,9 @@
pm8x41_gpio_config(2, &gpio);
+ /* Wait for the pmic gpio config to take effect */
+ thread_sleep(1);
+
/* Get status of P_GPIO_2 */
pm8x41_gpio_get(2, &status);