Merge "msm8660: Switch mdp and pixel clock to use secure io calls"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 0ff82e1..31635ea 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -64,10 +64,10 @@
static const char *emmc_cmdline = " androidboot.emmc=true";
static const char *battchg_pause = " androidboot.battchg_pause=true";
-static const char *baseband_apq = " androidboot.baseband=apq";
-static const char *baseband_msm = " androidboot.baseband=msm";
-static const char *baseband_csfb = " androidboot.baseband=csfb";
-static const char *baseband_svlte = " androidboot.baseband=svlte";
+static const char *baseband_apq = " androidboot.baseband=apq";
+static const char *baseband_msm = " androidboot.baseband=msm";
+static const char *baseband_csfb = " androidboot.baseband=csfb";
+static const char *baseband_svlte2a = " androidboot.baseband=svlte2a";
static struct udc_device surf_udc_device = {
.vendor_id = 0x18d1,
@@ -184,8 +184,8 @@
cmdline_len += strlen(baseband_csfb);
break;
- case BASEBAND_SVLTE:
- cmdline_len += strlen(baseband_svlte);
+ case BASEBAND_SVLTE2A:
+ cmdline_len += strlen(baseband_svlte2a);
break;
}
@@ -234,8 +234,8 @@
while ((*dst++ = *src++));
break;
- case BASEBAND_SVLTE:
- src = baseband_svlte;
+ case BASEBAND_SVLTE2A:
+ src = baseband_svlte2a;
if (have_cmdline) --dst;
while ((*dst++ = *src++));
break;
diff --git a/platform/msm7k/include/platform/iomap.h b/platform/msm7k/include/platform/iomap.h
index 9d58c30..1294542 100644
--- a/platform/msm7k/include/platform/iomap.h
+++ b/platform/msm7k/include/platform/iomap.h
@@ -47,5 +47,8 @@
#define MSM_SHARED_BASE 0x00100000
#define MSM_SDC1_BASE 0xA0400000
+#define MSM_SDC2_BASE 0xA0500000
+#define MSM_SDC3_BASE 0xA0600000
+#define MSM_SDC4_BASE 0xA0700000
#endif
diff --git a/platform/msm8x60/gpio.c b/platform/msm8x60/gpio.c
index 021678e..966bbeb 100644
--- a/platform/msm8x60/gpio.c
+++ b/platform/msm8x60/gpio.c
@@ -42,7 +42,14 @@
val |= func << 2;
val |= drvstr << 6;
val |= enable << 9;
- unsigned int *addr = (unsigned int *)GPIO_BASE_ADDR(gpio);
+ unsigned int *addr = (unsigned int *)GPIO_CONFIG_ADDR(gpio);
writel(val, addr);
return;
}
+
+void gpio_set(uint32_t gpio, uint32_t dir)
+{
+ unsigned int *addr = (unsigned int *)GPIO_IN_OUT_ADDR(gpio);
+ writel(dir, addr);
+ return;
+}
diff --git a/platform/msm8x60/include/platform/gpio_hw.h b/platform/msm8x60/include/platform/gpio_hw.h
index 14f0762..97c2b17 100644
--- a/platform/msm8x60/include/platform/gpio_hw.h
+++ b/platform/msm8x60/include/platform/gpio_hw.h
@@ -30,8 +30,10 @@
#define __PLATFORM_MSM8X60_GPIO_HW_H
#define TLMM_BASE_ADDR (0x800000)
-#define GPIO_BASE (0x1000)
-#define GPIO_BASE_ADDR(x) (TLMM_BASE_ADDR + GPIO_BASE + (x)*0x10)
+#define GPIO_CONFIG (0x1000)
+#define GPIO_IN_OUT (0x1004)
+#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + GPIO_CONFIG + (x)*0x10)
+#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + GPIO_IN_OUT + (x)*0x10)
/* GPIO TLMM: Direction */
#define GPIO_INPUT 0
diff --git a/platform/msm8x60/include/platform/pmic.h b/platform/msm8x60/include/platform/pmic.h
index d761d9c..cb8ab3a 100755
--- a/platform/msm8x60/include/platform/pmic.h
+++ b/platform/msm8x60/include/platform/pmic.h
@@ -48,6 +48,7 @@
#define PM8901_LDO_L6_TEST_BANK (PM8901_LDO_BASE + 0x0D)
#define PM8901_LDO_L7 (PM8901_LDO_BASE + 0x0E)
#define PM8901_LDO_L7_TEST_BANK (PM8901_LDO_BASE + 0x0F)
+#define PM8901_PMR_7 (0xAD)
#define PM8901_LDO_TEST_BANK(n) ((n)<<4)
diff --git a/platform/msm8x60/panel.c b/platform/msm8x60/panel.c
index ee94eb8..9139030 100644
--- a/platform/msm8x60/panel.c
+++ b/platform/msm8x60/panel.c
@@ -94,6 +94,7 @@
int ret = 0;
/* Configure LDO L2 TEST Bank 2, to Range Select 0 */
+ /* Not updating reference voltage */
buffer = (0x80); /* Write mode */
buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
@@ -108,6 +109,26 @@
return ret;
}
+ /* Enable LDO L2 at Max Voltage (should be around 3.3v) */
+ buffer = (0x0 << PM8901_LDO_CTL_ENABLE__S);
+ /* Disable Pull Down */
+ buffer |= (0x1 << PM8901_LDO_CTL_PULL_DOWN__S);
+ /* Put LDO into normal mode instead of low power mode */
+ buffer |= (0x0 << PM8901_LDO_CTL_MODE__S);
+ /* Write a 31 into the Voltage Programming value to obtain 3.3v VREG =
+ 1.75V + X * 100mV */
+ buffer |= (0xF);
+ mask = buffer | LDO_CTL_ENABLE_MASK |
+ LDO_CTL_PULL_DOWN_MASK |
+ LDO_CTL_NORMAL_POWER_MODE_MASK | LDO_CTL_VOLTAGE_SET_MASK;
+
+ /* Do a normal read here, as to not destroy the value in LDO control */
+ if ((ret = pm8901_read(&prev_val, 1, PM8901_LDO_L2))) {
+ return ret;
+ }
+ /* Configure the LDO2 for 3.3v */
+ ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2, prev_val);
+
/* Configure LDO L2 TEST Bank 4, for High Range Mode */
buffer = (0x80); /* Write mode */
buffer |= (PM8901_LDO_TEST_BANK(4)); /* Test Bank 4 */
@@ -124,14 +145,16 @@
return ret;
}
- /* Configure LDO L2 TEST Bank 5, for XO_EN<3-0> to 1 */
+ /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
buffer = (0x80); /* Write mode */
- buffer |= (PM8901_LDO_TEST_BANK(5)); /* Test Bank 5 */
- buffer |= (0x0F); /* Enable XO_EN */
- mask = buffer | LDO_TEST_XO_EN_ALL_MASK;
+ buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
+ buffer |= (1<<1); /* For fine step 50 mV */
+ buffer |= (1<<3); /* to update reference voltage */
+ mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
+ mask |= (1<<2); /* Setting mask to make ref voltage as 1.25 V */
if ((ret = pm8901_test_bank_read(&prev_val,
- PM8901_LDO_TEST_BANK(5),
+ PM8901_LDO_TEST_BANK(2),
PM8901_LDO_L2_TEST_BANK))) {
return ret;
}
@@ -140,25 +163,13 @@
return ret;
}
- /* Enable LDO L2 at Max Voltage (should be around 3.3v) */
- buffer = (0x1 << PM8901_LDO_CTL_ENABLE__S);
- /* Disable Pull Down */
- buffer |= (0x0 << PM8901_LDO_CTL_PULL_DOWN__S);
- /* Put LDO into normal mode instead of low power mode */
- buffer |= (0x0 << PM8901_LDO_CTL_MODE__S);
- /* Write a 31 into the Voltage Programming value to obtain 3.3v VREG =
- 1.75V + X * 100mV */
- buffer |= (0x1F);
- mask = buffer | LDO_CTL_ENABLE_MASK |
- LDO_CTL_PULL_DOWN_MASK |
- LDO_CTL_NORMAL_POWER_MODE_MASK | LDO_CTL_VOLTAGE_SET_MASK;
-
- /* Do a normal read here, as to not destroy the value in LDO control */
- if ((ret = pm8901_read(&prev_val, 1, PM8901_LDO_L2))) {
+ /* Enable PMR for LDO L2 */
+ buffer = 0x7F;
+ mask = 0x7F;
+ if ((ret = pm8901_read(&prev_val, 1, PM8901_PMR_7))) {
return ret;
}
- /* Configure the LDO2 for 3.3v */
- ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2, prev_val);
+ ret = pm8901_vreg_write(&buffer, mask, PM8901_PMR_7, prev_val);
return ret;
}
diff --git a/platform/msm_shared/hsusb.c b/platform/msm_shared/hsusb.c
index 64fdd70..20c0c18 100644
--- a/platform/msm_shared/hsusb.c
+++ b/platform/msm_shared/hsusb.c
@@ -533,6 +533,13 @@
hsusb_clock_init();
#endif
+#ifdef PLATFORM_MSM8X60
+#ifndef PLATFORM_MSM8960
+ /* Configure GPIOs for HS_USB */
+ hsusb_gpio_init();
+#endif
+#endif
+
epts = memalign(4096, 4096);
dprintf(INFO, "USB init ept @ %p\n", epts);
diff --git a/platform/msm_shared/include/baseband.h b/platform/msm_shared/include/baseband.h
index 2fd1352..433f783 100644
--- a/platform/msm_shared/include/baseband.h
+++ b/platform/msm_shared/include/baseband.h
@@ -1,42 +1,43 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
-
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- * * Neither the name of Code Aurora Forum, Inc. nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __BASEBAND_H__
-#define __BASEBAND_H__
-
-enum baseband
-{
- BASEBAND_MSM = 0,
- BASEBAND_APQ = 1,
- BASEBAND_CSFB = 2,
- BASEBAND_SVLTE = 3,
- BASEBAND_32BITS = 0x7FFFFFFF
-};
-
-#endif
-
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of Code Aurora Forum, Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __BASEBAND_H__
+#define __BASEBAND_H__
+
+enum baseband
+{
+ BASEBAND_MSM = 0,
+ BASEBAND_APQ = 1,
+ BASEBAND_CSFB = 2,
+ BASEBAND_SVLTE1 = 3,
+ BASEBAND_SVLTE2A = 4,
+ BASEBAND_32BITS = 0x7FFFFFFF
+};
+
+#endif
+
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 20534ae..71da345 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -64,6 +64,16 @@
struct smem_alloc_info alloc_info[128];
};
+struct smem_board_info_v2
+{
+ unsigned format;
+ unsigned msm_id;
+ unsigned msm_version;
+ char build_id[32];
+ unsigned raw_msm_id;
+ unsigned raw_msm_version;
+};
+
struct smem_board_info_v3
{
unsigned format;
@@ -89,6 +99,15 @@
unsigned fused_chip;
};
+struct smem_board_info_v6
+{
+ struct smem_board_info_v3 board_info_v3;
+ unsigned platform_version;
+ unsigned fused_chip;
+ unsigned platform_subtype;
+ unsigned buffer_align; //Need for 8 bytes alignment while reading from shared memory.
+};
+
/* chip information */
enum {
UNKNOWN = 0,
@@ -110,6 +129,15 @@
HW_PLATFORM_32BITS = 0x7FFFFFFF
};
+enum platform_subtype
+{
+ HW_PLATFORM_SUBTYPE_UNKNOWN = 0,
+ HW_PLATFORM_SUBTYPE_CSFB = 1,
+ HW_PLATFORM_SUBTYPE_SVLTE1 = 2,
+ HW_PLATFORM_SUBTYPE_SVLTE2A = 3,
+ HW_PLATFORM_SUBTYPE_32BITS = 0x7FFFFFFF
+};
+
typedef enum {
SMEM_SPINLOCK_ARRAY = 7,
diff --git a/target/msm7627_ffa/init.c b/target/msm7627_ffa/init.c
index f2125fc..de997bd 100644
--- a/target/msm7627_ffa/init.c
+++ b/target/msm7627_ffa/init.c
@@ -66,7 +66,7 @@
},
{
.start = DIFF_START_ADDR,
- .length = 1 /* In MB */,
+ .length = 4 /* In MB */,
.name = "cache",
},
{
diff --git a/target/msm7627_surf/init.c b/target/msm7627_surf/init.c
index 7a09c4a..f14d029 100644
--- a/target/msm7627_surf/init.c
+++ b/target/msm7627_surf/init.c
@@ -38,13 +38,17 @@
#include <smem.h>
#include <platform/iomap.h>
-#define LINUX_MACHTYPE 2705
+#define LINUX_MACHTYPE_7x27_SURF 2705
+#define LINUX_MACHTYPE_7x27_FFA 2706
+
#define VARIABLE_LENGTH 0x10101010
#define DIFF_START_ADDR 0xF0F0F0F0
#define NUM_PAGES_PER_BLOCK 0x40
static struct ptable flash_ptable;
+static unsigned mmc_sdc_base[] = { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE};
+static int hw_platform_type = -1;
/* for these partitions, start will be offset by either what we get from
* smem, or from the above offset if smem is not useful. Also, we should
@@ -67,7 +71,7 @@
},
{
.start = DIFF_START_ADDR,
- .length = 1 /* In MB */,
+ .length = 4 /* In MB */,
.name = "cache",
},
{
@@ -100,6 +104,7 @@
int target_is_emmc_boot(void);
+
void target_init(void)
{
unsigned offset;
@@ -107,6 +112,8 @@
unsigned total_num_of_blocks;
unsigned next_ptr_start_adr = 0;
unsigned blocks_per_1MB = 8; /* Default value of 2k page size on 256MB flash drive*/
+ unsigned char slot;
+ unsigned int base_addr;
int i;
dprintf(INFO, "target_init()\n");
@@ -118,10 +125,19 @@
if (target_is_emmc_boot())
{
- if(mmc_boot_main(MMC_SLOT, MSM_SDC1_BASE))
+ /* Trying SDC3 first */
+ slot = 3;
+ base_addr = mmc_sdc_base[slot - 1];
+ if(mmc_boot_main(slot, base_addr))
{
- dprintf(CRITICAL, "mmc init failed!");
- ASSERT(0);
+ /* Trying SDC1 next */
+ slot = 1;
+ base_addr = mmc_sdc_base[slot - 1];
+ if(mmc_boot_main(slot, base_addr))
+ {
+ dprintf(CRITICAL, "mmc init failed!");
+ ASSERT(0);
+ }
}
return;
}
@@ -175,7 +191,43 @@
unsigned board_machtype(void)
{
- return LINUX_MACHTYPE;
+ struct smem_board_info_v2 board_info_v2;
+ unsigned int board_info_len = 0;
+ enum platform platform_type = 0;
+ unsigned smem_status;
+ unsigned format = 0;
+
+ if(hw_platform_type != -1)
+ return hw_platform_type;
+
+ smem_status = smem_read_alloc_entry_offset(SMEM_BOARD_INFO_LOCATION,
+ &format, sizeof(format), 0);
+ if(!smem_status)
+ {
+ if(format == 2)
+ {
+ board_info_len = sizeof(board_info_v2);
+
+ smem_status = smem_read_alloc_entry(SMEM_BOARD_INFO_LOCATION,
+ &board_info_v2, board_info_len);
+ if(!smem_status)
+ {
+ char *build_type = (char *)(board_info_v2.build_id)+ 12;
+ switch (*build_type)
+ {
+ case 'F':
+ hw_platform_type = LINUX_MACHTYPE_7x27_FFA; break;
+ case 'S':
+ hw_platform_type = LINUX_MACHTYPE_7x27_SURF; break;
+ default:
+ hw_platform_type = LINUX_MACHTYPE_7x27_SURF; break;
+ }
+ }
+ }
+ } else {
+ hw_platform_type = LINUX_MACHTYPE_7x27_SURF;
+ }
+ return hw_platform_type;
}
void reboot_device(unsigned reboot_reason)
diff --git a/target/msm8660_surf/init.c b/target/msm8660_surf/init.c
index 934a278..c0472e3 100644
--- a/target/msm8660_surf/init.c
+++ b/target/msm8660_surf/init.c
@@ -37,6 +37,7 @@
#include <dev/flash.h>
#include <smem.h>
#include <platform/iomap.h>
+#include <platform/gpio_hw.h>
#include <baseband.h>
#include <reg.h>
@@ -78,6 +79,7 @@
unsigned board_machtype(void)
{
struct smem_board_info_v5 board_info_v5;
+ struct smem_board_info_v6 board_info_v6;
unsigned int board_info_len = 0;
unsigned smem_status = 0;
unsigned format = 0;
@@ -91,7 +93,7 @@
&format, sizeof(format), 0);
if(!smem_status)
{
- if (format >= 5)
+ if (format == 5)
{
board_info_len = sizeof(board_info_v5);
@@ -100,12 +102,24 @@
if(!smem_status)
{
fused_chip = board_info_v5.fused_chip;
+ id = board_info_v5.board_info_v3.hw_platform;
+ }
+ }
+ else if (format == 6)
+ {
+ board_info_len = sizeof(board_info_v6);
+
+ smem_status = smem_read_alloc_entry(SMEM_BOARD_INFO_LOCATION,
+ &board_info_v6, board_info_len);
+ if(!smem_status)
+ {
+ fused_chip = board_info_v6.fused_chip;
+ id = board_info_v6.board_info_v3.hw_platform;
}
}
}
/* Detect SURF v/s FFA v/s Fluid */
- id = board_info_v5.board_info_v3.hw_platform;
switch(id)
{
case 0x1:
@@ -242,6 +256,7 @@
unsigned target_baseband()
{
struct smem_board_info_v5 board_info_v5;
+ struct smem_board_info_v6 board_info_v6;
unsigned int board_info_len = 0;
unsigned smem_status = 0;
unsigned format = 0;
@@ -251,7 +266,7 @@
&format, sizeof(format), 0);
if(!smem_status)
{
- if (format >= 5)
+ if (format == 5)
{
board_info_len = sizeof(board_info_v5);
@@ -263,15 +278,33 @@
if (board_info_v5.fused_chip == MDM9200)
baseband = BASEBAND_CSFB;
else if (board_info_v5.fused_chip == MDM9600)
- baseband = BASEBAND_SVLTE;
+ baseband = BASEBAND_SVLTE2A;
else if (board_info_v5.board_info_v3.msm_id == APQ8060)
baseband = BASEBAND_APQ;
else
baseband = BASEBAND_MSM;
}
}
- }
+ else if (format >= 6)
+ {
+ board_info_len = sizeof(board_info_v6);
+ smem_status = smem_read_alloc_entry(SMEM_BOARD_INFO_LOCATION,
+ &board_info_v6, board_info_len);
+ if(!smem_status)
+ {
+ /* Check for LTE fused targets or APQ. Default to MSM */
+ if (board_info_v6.platform_subtype == HW_PLATFORM_SUBTYPE_CSFB)
+ baseband = BASEBAND_CSFB;
+ else if (board_info_v6.platform_subtype == HW_PLATFORM_SUBTYPE_SVLTE2A)
+ baseband = BASEBAND_SVLTE2A;
+ else if (board_info_v6.board_info_v3.msm_id == APQ8060)
+ baseband = BASEBAND_APQ;
+ else
+ baseband = BASEBAND_MSM;
+ }
+ }
+ }
return baseband;
}
@@ -299,3 +332,32 @@
return 0;
}
+
+void hsusb_gpio_init(void)
+{
+ uint32_t func;
+ uint32_t pull;
+ uint32_t dir;
+ uint32_t enable;
+ uint32_t drv;
+
+ /* GPIO 131 and 132 need to be configured for connecting to USB HS PHY */
+
+ func = 0;
+ enable = 1;
+ pull = GPIO_NO_PULL;
+ dir = 2;
+ drv = GPIO_2MA;
+ gpio_tlmm_config(131, func, dir, pull, drv, enable);
+ gpio_set(131, dir);
+
+ func = 0;
+ enable = 1;
+ pull = GPIO_NO_PULL;
+ dir = 1;
+ drv = GPIO_2MA;
+ gpio_tlmm_config(132, func, dir, pull, drv, enable);
+ gpio_set(132, dir);
+
+ return;
+}