| /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * * Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * * Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * * Neither the name of Code Aurora nor |
| * the names of its contributors may be used to endorse or promote |
| * products derived from this software without specific prior written |
| * permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| * |
| */ |
| |
| #ifndef __IRQS_9615_H |
| #define __IRQS_9615_H |
| |
| /* MSM ACPU Interrupt Numbers */ |
| |
| /* 0-15: STI/SGI (software triggered/generated interrupts) |
| * 16-31: PPI (private peripheral interrupts) |
| * 32+: SPI (shared peripheral interrupts) |
| */ |
| |
| #define GIC_PPI_START 16 |
| #define GIC_SPI_START 32 |
| |
| #define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1) |
| |
| #define USB1_HS_BAM_IRQ (GIC_SPI_START + 94) |
| #define USB1_HS_IRQ (GIC_SPI_START + 100) |
| #define USB2_IRQ (GIC_SPI_START + 141) |
| #define USB1_IRQ (GIC_SPI_START + 142) |
| |
| #define GSBI_QUP_IRQ(id) ((id) <= 8 ? (GIC_SPI_START + 145 + 2*((id))) : \ |
| (GIC_SPI_START + 187 + 2*((id)-8))) |
| |
| |
| /* Retrofit universal macro names */ |
| #define INT_USB_HS USB1_HS_IRQ |
| |
| #define NR_MSM_IRQS 256 |
| #define NR_GPIO_IRQS 173 |
| #define NR_BOARD_IRQS 0 |
| |
| #define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS) |
| |
| #endif /* __IRQS_9615_H */ |