Merge "msm7627a: Fix nand partition table for SKU3 device"
diff --git a/platform/msm7x27a/acpuclock.c b/platform/msm7x27a/acpuclock.c
index 3cf9386..96aa21d 100644
--- a/platform/msm7x27a/acpuclock.c
+++ b/platform/msm7x27a/acpuclock.c
@@ -73,7 +73,6 @@
#define DIV_16 15
#define WAIT_CNT 100
-#define VDD_LEVEL 7
#define MIN_AXI_HZ 120000000
#define ACPU_800MHZ 41
@@ -149,8 +148,12 @@
static uint8_t sdc_clk[] = { 0, SDC1_CLK, SDC2_CLK, SDC3_CLK, SDC4_CLK };
static uint8_t sdc_pclk[] = { 0, SDC1_PCLK, SDC2_PCLK, SDC3_PCLK, SDC4_PCLK };
+/* VDD_PLEVEL */
+unsigned vdd_plevel = 0;
+
void mdelay(unsigned msecs);
unsigned board_msm_id(void);
+unsigned board_msm_version(void);
void pll_enable(void *pll_mode_addr)
{
@@ -208,11 +211,16 @@
uint32_t i, clk;
uint32_t val;
uint32_t *clk_cntl_reg_val, size;
- unsigned msm_id;
+ unsigned msm_id, msm_version;
- /* Increase VDD level to the final value. */
- writel((1 << 7) | (VDD_LEVEL << 3), VDD_SVS_PLEVEL_ADDR);
+ msm_version = board_msm_version();
+ if (msm_version == 2)
+ vdd_plevel = 4;
+ else
+ vdd_plevel = 6;
+ /* Set VDD plevel */
+ writel((1 << 7) | (vdd_plevel << 3), VDD_SVS_PLEVEL_ADDR);
#if (!ENABLE_NANDWRITE)
thread_sleep(1);
#else
diff --git a/target/msm7627a/init.c b/target/msm7627a/init.c
index 7f73ee3..95477c2 100644
--- a/target/msm7627a/init.c
+++ b/target/msm7627a/init.c
@@ -54,6 +54,7 @@
static struct ptable flash_ptable;
unsigned hw_platform = 0;
unsigned target_msm_id = 0;
+unsigned msm_version = 0;
/* Setting this variable to different values defines the
* behavior of CE engine:
@@ -256,7 +257,6 @@
ptable_dump(&flash_ptable);
flash_set_ptable(&flash_ptable);
}
-
void board_info(void)
{
struct smem_board_info_v4 board_info_v4;
@@ -284,6 +284,8 @@
id = board_info_v4.board_info_v3.hw_platform;
target_msm_id =
board_info_v4.board_info_v3.msm_id;
+ msm_version =
+ board_info_v4.board_info_v3.msm_version;
}
}
@@ -381,6 +383,13 @@
return target_msm_id;
}
+unsigned board_msm_version(void)
+{
+ board_info();
+ msm_version = (msm_version & 0xffff0000) >> 16;
+ return msm_version;
+}
+
crypto_engine_type board_ce_type(void)
{
return platform_ce_type;