commit 229e5b8885bb1202c075e710faa98ee4cab8ded0
author Linux Build Service Account <lnxbuild@localhost> Fri Mar 27 22:27:17 2015 -0700
committer Gerrit - the friendly Code Review server <code-review@localhost> Fri Mar 27 22:27:17 2015 -0700
tree 492e26f9d75dd05d89ec48bdd7fcd4b52726f90c
parent eae362f99aa639a30a26b81f301d291c7e526a63
parent dc20de1c4e4746109e1b29d7f698bc925027a998

Merge "platform: msm_shared: add support for checking alarmboot mode"

dev/gcdb/display/include/panel_ili9806e_fwvga_video.h

diff --git a/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h b/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h
index c4941c5..1055c3c 100644
--- a/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h
+++ b/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h
@@ -87,12 +87,12 @@
 
 static char ili9806e_fwvga_video_on_cmd4[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x31, 0x00, 0xFF, 0xFF,
+	0x31, 0x02, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd5[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x40, 0x16, 0xFF, 0xFF,
+	0x40, 0x1A, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd6[] = {
@@ -107,22 +107,22 @@
 
 static char ili9806e_fwvga_video_on_cmd8[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x43, 0x89, 0xFF, 0xFF,
+	0x43, 0x09, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd9[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x44, 0x06, 0xFF, 0xFF,
+	0x44, 0x09, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd10[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x50, 0x80, 0xFF, 0xFF,
+	0x50, 0x78, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd11[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x51, 0x80, 0xFF, 0xFF,
+	0x51, 0x78, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd12[] = {
@@ -132,497 +132,2791 @@
 
 static char ili9806e_fwvga_video_on_cmd13[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x53, 0x43, 0xFF, 0xFF,
+	0x53, 0x2B, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd14[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x60, 0x07, 0xFF, 0xFF,
+	0x57, 0x50, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd15[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x61, 0x00, 0xFF, 0xFF,
+	0x60, 0x07, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd16[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x62, 0x07, 0xFF, 0xFF,
+	0x61, 0x00, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd17[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x63, 0x00, 0xFF, 0xFF,
+	0x62, 0x08, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd18[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA0, 0x00, 0xFF, 0xFF,
+	0x63, 0x00, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd19[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA1, 0x01, 0xFF, 0xFF,
+	0xA0, 0x00, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd20[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA2, 0x0A, 0xFF, 0xFF,
+	0xA1, 0x06, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd21[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA3, 0x10, 0xFF, 0xFF,
+	0xA2, 0x10, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd22[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA4, 0x0B, 0xFF, 0xFF,
+	0xA3, 0x11, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd23[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA5, 0x1C, 0xFF, 0xFF,
+	0xA4, 0x08, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd24[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA6, 0x0B, 0xFF, 0xFF,
+	0xA5, 0x1A, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd25[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA7, 0x09, 0xFF, 0xFF,
+	0xA6, 0x09, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd26[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA8, 0x05, 0xFF, 0xFF,
+	0xA7, 0x08, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd27[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xA9, 0x0B, 0xFF, 0xFF,
+	0xA8, 0x05, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd28[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xAA, 0x07, 0xFF, 0xFF,
+	0xA9, 0x0A, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd29[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xAB, 0x06, 0xFF, 0xFF,
+	0xAA, 0x04, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd30[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xAC, 0x0E, 0xFF, 0xFF,
+	0xAB, 0x08, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd31[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xAD, 0x29, 0xFF, 0xFF,
+	0xAC, 0x10, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd32[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xAE, 0x25, 0xFF, 0xFF,
+	0xAD, 0x38, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd33[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xAF, 0x00, 0xFF, 0xFF,
+	0xAE, 0x34, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd34[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC0, 0x00, 0xFF, 0xFF,
+	0xAF, 0x00, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd35[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC1, 0x02, 0xFF, 0xFF,
+	0xC0, 0x00, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd36[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC2, 0x07, 0xFF, 0xFF,
+	0xC1, 0x07, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd37[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC3, 0x0C, 0xFF, 0xFF,
+	0xC2, 0x15, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd38[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC4, 0x06, 0xFF, 0xFF,
+	0xC3, 0x11, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd39[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC5, 0x18, 0xFF, 0xFF,
+	0xC4, 0x0A, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd40[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC6, 0x0B, 0xFF, 0xFF,
+	0xC5, 0x18, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd41[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC7, 0x0A, 0xFF, 0xFF,
+	0xC6, 0x08, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd42[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC8, 0x02, 0xFF, 0xFF,
+	0xC7, 0x07, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd43[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xC9, 0x06, 0xFF, 0xFF,
+	0xC8, 0x03, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd44[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xCA, 0x03, 0xFF, 0xFF,
+	0xC9, 0x08, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd45[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xCB, 0x03, 0xFF, 0xFF,
+	0xCA, 0x07, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd46[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xCC, 0x0B, 0xFF, 0xFF,
+	0xCB, 0x05, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd47[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xCD, 0x2A, 0xFF, 0xFF,
+	0xCC, 0x0C, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd48[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xCE, 0x25, 0xFF, 0xFF,
+	0xCD, 0x1E, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd49[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0xCF, 0x00, 0xFF, 0xFF,
+	0xCE, 0x1A, 0xFF, 0xFF,
 };
 
 static char ili9806e_fwvga_video_on_cmd50[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0xCF, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd51[] = {
+	0x06, 0x00, 0x39, 0xC0,
+	0xFF, 0xFF, 0x98, 0x06,
+	0x04, 0x02, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd52[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x40, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd53[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd54[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x01, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd55[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x02, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd56[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x03, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd57[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x04, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd58[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x05, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd59[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x06, 0x09, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd60[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x07, 0x19, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd61[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x08, 0x19, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd62[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x09, 0x19, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd63[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0A, 0x19, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd64[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0B, 0x19, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd65[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0C, 0x1C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd66[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0D, 0x1C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd67[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0E, 0x1C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd68[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0F, 0x1C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd69[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x10, 0x1D, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd70[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x11, 0x1D, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd71[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x12, 0x1D, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd72[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x13, 0x1D, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd73[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x14, 0x1D, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd74[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x15, 0x3E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd75[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x16, 0x3E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd76[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x17, 0x3E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd77[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x18, 0x3E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd78[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x19, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd79[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1A, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd80[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1B, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd81[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1C, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd82[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1D, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd83[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1E, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd84[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1F, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd85[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x20, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd86[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x21, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd87[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x22, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd88[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x23, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd89[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x24, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd90[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x25, 0x4E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd91[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x26, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd92[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x27, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd93[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x28, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd94[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x29, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd95[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2A, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd96[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2B, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd97[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2C, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd98[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2D, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd99[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2E, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd100[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2F, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd101[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x30, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd102[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x31, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd103[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x32, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd104[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x33, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd105[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x34, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd106[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x35, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd107[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x36, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd108[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x37, 0x5E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd109[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x38, 0x5C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd110[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x39, 0x4C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd111[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3A, 0x4C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd112[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3B, 0x3B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd113[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3C, 0x3B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd114[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3D, 0x2A, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd115[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3E, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd116[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd117[] = {
+	0x06, 0x00, 0x39, 0xC0,
+	0xFF, 0xFF, 0x98, 0x06,
+	0x04, 0x03, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd118[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd119[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x01, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd120[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x02, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd121[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x03, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd122[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x04, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd123[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x05, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd124[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x06, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd125[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x07, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd126[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x08, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd127[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x09, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd128[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd129[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd130[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd131[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd132[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd133[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd134[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x10, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd135[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x11, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd136[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x12, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd137[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x13, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd138[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x14, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd139[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x15, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd140[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x16, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd141[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x17, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd142[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x18, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd143[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x19, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd144[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd145[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd146[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd147[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd148[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd149[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd150[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x20, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd151[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x21, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd152[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x22, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd153[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x23, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd154[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x24, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd155[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x25, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd156[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x26, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd157[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x27, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd158[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x28, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd159[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x29, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd160[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd161[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd162[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd163[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd164[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd165[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd166[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x30, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd167[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x31, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd168[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x32, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd169[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x33, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd170[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x34, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd171[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x35, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd172[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x36, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd173[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x37, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd174[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x38, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd175[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x39, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd176[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd177[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd178[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd179[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd180[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd181[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd182[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x40, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd183[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x41, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd184[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x42, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd185[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x43, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd186[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x44, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd187[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x45, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd188[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x46, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd189[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x47, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd190[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x48, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd191[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x49, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd192[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd193[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd194[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd195[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd196[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd197[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd198[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x50, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd199[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x51, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd200[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x52, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd201[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x53, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd202[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x54, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd203[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x55, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd204[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x56, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd205[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x57, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd206[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x58, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd207[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x59, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd208[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd209[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd210[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd211[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd212[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd213[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd214[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x60, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd215[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x61, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd216[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x62, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd217[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x63, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd218[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x64, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd219[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x65, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd220[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x66, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd221[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x67, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd222[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x68, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd223[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x69, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd224[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd225[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd226[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd227[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd228[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd229[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd230[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x70, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd231[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x71, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd232[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x72, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd233[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x73, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd234[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x74, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd235[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x75, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd236[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x76, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd237[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x77, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd238[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x78, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd239[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x79, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd240[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd241[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd242[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd243[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd244[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd245[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd246[] = {
+	0x06, 0x00, 0x39, 0xC0,
+	0xFF, 0xFF, 0x98, 0x06,
+	0x04, 0x04, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd247[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd248[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x01, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd249[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x02, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd250[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x03, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd251[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x04, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd252[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x05, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd253[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x06, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd254[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x07, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd255[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x08, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd256[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x09, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd257[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd258[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd259[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd260[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd261[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd262[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd263[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x10, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd264[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x11, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd265[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x12, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd266[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x13, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd267[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x14, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd268[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x15, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd269[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x16, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd270[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x17, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd271[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x18, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd272[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x19, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd273[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd274[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd275[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd276[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd277[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd278[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd279[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x20, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd280[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x21, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd281[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x22, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd282[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x23, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd283[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x24, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd284[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x25, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd285[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x26, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd286[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x27, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd287[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x28, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd288[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x29, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd289[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd290[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd291[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd292[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd293[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd294[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd295[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x30, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd296[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x31, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd297[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x32, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd298[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x33, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd299[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x34, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd300[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x35, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd301[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x36, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd302[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x37, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd303[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x38, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd304[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x39, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd305[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd306[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd307[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd308[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd309[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd310[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd311[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x40, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd312[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x41, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd313[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x42, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd314[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x43, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd315[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x44, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd316[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x45, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd317[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x46, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd318[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x47, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd319[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x48, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd320[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x49, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd321[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd322[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd323[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd324[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd325[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd326[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd327[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x50, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd328[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x51, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd329[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x52, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd330[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x53, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd331[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x54, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd332[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x55, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd333[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x56, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd334[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x57, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd335[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x58, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd336[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x59, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd337[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd338[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd339[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd340[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd341[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd342[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd343[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x60, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd344[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x61, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd345[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x62, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd346[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x63, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd347[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x64, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd348[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x65, 0x20, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd349[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x66, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd350[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x67, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd351[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x68, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd352[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x69, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd353[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd354[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd355[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd356[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd357[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd358[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd359[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x70, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd360[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x71, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd361[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x72, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd362[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x73, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd363[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x74, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd364[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x75, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd365[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x76, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd366[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x77, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd367[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x78, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd368[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x79, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd369[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd370[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd371[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd372[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd373[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd374[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd375[] = {
+	0x06, 0x00, 0x39, 0xC0,
+	0xFF, 0xFF, 0x98, 0x06,
+	0x04, 0x04, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd376[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd377[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x01, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd378[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x02, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd379[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x03, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd380[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x04, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd381[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x05, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd382[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x06, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd383[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x07, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd384[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x08, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd385[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x09, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd386[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd387[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd388[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd389[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd390[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd391[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x0F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd392[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x10, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd393[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x11, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd394[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x12, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd395[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x13, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd396[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x14, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd397[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x15, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd398[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x16, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd399[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x17, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd400[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x18, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd401[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x19, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd402[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd403[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd404[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd405[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd406[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd407[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x1F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd408[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x20, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd409[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x21, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd410[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x22, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd411[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x23, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd412[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x24, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd413[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x25, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd414[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x26, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd415[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x27, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd416[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x28, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd417[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x29, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd418[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd419[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd420[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd421[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd422[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd423[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x2F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd424[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x30, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd425[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x31, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd426[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x32, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd427[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x33, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd428[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x34, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd429[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x35, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd430[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x36, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd431[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x37, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd432[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x38, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd433[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x39, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd434[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd435[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd436[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd437[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd438[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd439[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x3F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd440[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x40, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd441[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x41, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd442[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x42, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd443[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x43, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd444[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x44, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd445[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x45, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd446[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x46, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd447[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x47, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd448[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x48, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd449[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x49, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd450[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd451[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd452[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd453[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd454[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd455[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x4F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd456[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x50, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd457[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x51, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd458[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x52, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd459[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x53, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd460[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x54, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd461[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x55, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd462[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x56, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd463[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x57, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd464[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x58, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd465[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x59, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd466[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd467[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd468[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd469[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd470[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd471[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x5F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd472[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x60, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd473[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x61, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd474[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x62, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd475[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x63, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd476[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x64, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd477[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x65, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd478[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x66, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd479[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x67, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd480[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x68, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd481[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x69, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd482[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd483[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd484[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd485[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd486[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd487[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x6F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd488[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x70, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd489[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x71, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd490[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x72, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd491[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x73, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd492[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x74, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd493[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x75, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd494[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x76, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd495[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x77, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd496[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x78, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd497[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x79, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd498[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd499[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd500[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd501[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd502[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7E, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd503[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x7F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd504[] = {
 	0x06, 0x00, 0x39, 0xC0,
 	0xFF, 0xFF, 0x98, 0x06,
 	0x04, 0x06, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd51[] = {
+static char ili9806e_fwvga_video_on_cmd505[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x00, 0x20, 0xFF, 0xFF,
+	0x00, 0x21, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd52[] = {
+static char ili9806e_fwvga_video_on_cmd506[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x01, 0x0A, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd53[] = {
+static char ili9806e_fwvga_video_on_cmd507[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x02, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd54[] = {
+static char ili9806e_fwvga_video_on_cmd508[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x03, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd55[] = {
+static char ili9806e_fwvga_video_on_cmd509[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x04, 0x01, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd56[] = {
+static char ili9806e_fwvga_video_on_cmd510[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x05, 0x01, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd57[] = {
+static char ili9806e_fwvga_video_on_cmd511[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x06, 0x98, 0xFF, 0xFF,
+	0x06, 0x80, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd58[] = {
+static char ili9806e_fwvga_video_on_cmd512[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x07, 0x06, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd59[] = {
+static char ili9806e_fwvga_video_on_cmd513[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x08, 0x01, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd60[] = {
+static char ili9806e_fwvga_video_on_cmd514[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x09, 0x80, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd61[] = {
+static char ili9806e_fwvga_video_on_cmd515[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x0A, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd62[] = {
+static char ili9806e_fwvga_video_on_cmd516[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x0B, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd63[] = {
+static char ili9806e_fwvga_video_on_cmd517[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x0C, 0x01, 0xFF, 0xFF,
+	0x0C, 0x0A, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd64[] = {
+static char ili9806e_fwvga_video_on_cmd518[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x0D, 0x01, 0xFF, 0xFF,
+	0x0D, 0x0A, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd65[] = {
+static char ili9806e_fwvga_video_on_cmd519[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x0E, 0x05, 0xFF, 0xFF,
+	0x0E, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd66[] = {
+static char ili9806e_fwvga_video_on_cmd520[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x0F, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd67[] = {
+static char ili9806e_fwvga_video_on_cmd521[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x10, 0xF0, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd68[] = {
+static char ili9806e_fwvga_video_on_cmd522[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x11, 0xF4, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd69[] = {
+static char ili9806e_fwvga_video_on_cmd523[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x12, 0x01, 0xFF, 0xFF,
+	0x12, 0x04, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd70[] = {
+static char ili9806e_fwvga_video_on_cmd524[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x13, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd71[] = {
+static char ili9806e_fwvga_video_on_cmd525[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x14, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd72[] = {
+static char ili9806e_fwvga_video_on_cmd526[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x15, 0xC0, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd73[] = {
+static char ili9806e_fwvga_video_on_cmd527[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x16, 0x08, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd74[] = {
+static char ili9806e_fwvga_video_on_cmd528[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x17, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd75[] = {
+static char ili9806e_fwvga_video_on_cmd529[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x18, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd76[] = {
+static char ili9806e_fwvga_video_on_cmd530[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x19, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd77[] = {
+static char ili9806e_fwvga_video_on_cmd531[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x1A, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd78[] = {
+static char ili9806e_fwvga_video_on_cmd532[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x1B, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd79[] = {
+static char ili9806e_fwvga_video_on_cmd533[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x1C, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd80[] = {
+static char ili9806e_fwvga_video_on_cmd534[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x1D, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd81[] = {
+static char ili9806e_fwvga_video_on_cmd535[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x20, 0x01, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd82[] = {
+static char ili9806e_fwvga_video_on_cmd536[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x21, 0x23, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd83[] = {
+static char ili9806e_fwvga_video_on_cmd537[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x22, 0x45, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd84[] = {
+static char ili9806e_fwvga_video_on_cmd538[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x23, 0x67, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd85[] = {
+static char ili9806e_fwvga_video_on_cmd539[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x24, 0x01, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd86[] = {
+static char ili9806e_fwvga_video_on_cmd540[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x25, 0x23, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd87[] = {
+static char ili9806e_fwvga_video_on_cmd541[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x26, 0x45, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd88[] = {
+static char ili9806e_fwvga_video_on_cmd542[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x27, 0x67, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd89[] = {
+static char ili9806e_fwvga_video_on_cmd543[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x30, 0x11, 0xFF, 0xFF,
+	0x30, 0x01, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd90[] = {
+static char ili9806e_fwvga_video_on_cmd544[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x31, 0x11, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd91[] = {
+static char ili9806e_fwvga_video_on_cmd545[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x32, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd92[] = {
+static char ili9806e_fwvga_video_on_cmd546[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x33, 0xEE, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd93[] = {
+static char ili9806e_fwvga_video_on_cmd547[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x34, 0xFF, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd94[] = {
+static char ili9806e_fwvga_video_on_cmd548[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x35, 0xBB, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd95[] = {
+static char ili9806e_fwvga_video_on_cmd549[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x36, 0xAA, 0xFF, 0xFF,
+	0x36, 0xCA, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd96[] = {
+static char ili9806e_fwvga_video_on_cmd550[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x37, 0xDD, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd97[] = {
+static char ili9806e_fwvga_video_on_cmd551[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x38, 0xCC, 0xFF, 0xFF,
+	0x38, 0xAC, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd98[] = {
+static char ili9806e_fwvga_video_on_cmd552[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x39, 0x66, 0xFF, 0xFF,
+	0x39, 0x76, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd99[] = {
+static char ili9806e_fwvga_video_on_cmd553[] = {
 	0x02, 0x00, 0x39, 0xC0,
-	0x3A, 0x77, 0xFF, 0xFF,
+	0x3A, 0x67, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd100[] = {
+static char ili9806e_fwvga_video_on_cmd554[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x3B, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd101[] = {
+static char ili9806e_fwvga_video_on_cmd555[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x3C, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd102[] = {
+static char ili9806e_fwvga_video_on_cmd556[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x3D, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd103[] = {
+static char ili9806e_fwvga_video_on_cmd557[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x3E, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd104[] = {
+static char ili9806e_fwvga_video_on_cmd558[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x3F, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd105[] = {
+static char ili9806e_fwvga_video_on_cmd559[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x40, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd106[] = {
+static char ili9806e_fwvga_video_on_cmd560[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x52, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd561[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x53, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd562[] = {
 	0x06, 0x00, 0x39, 0xC0,
 	0xFF, 0xFF, 0x98, 0x06,
 	0x04, 0x07, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd107[] = {
+static char ili9806e_fwvga_video_on_cmd563[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x17, 0x22, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd108[] = {
+static char ili9806e_fwvga_video_on_cmd564[] = {
 	0x02, 0x00, 0x39, 0xC0,
 	0x02, 0x77, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd109[] = {
+static char ili9806e_fwvga_video_on_cmd565[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0xE1, 0x79, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd566[] = {
+	0x02, 0x00, 0x39, 0xC0,
+	0x06, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd567[] = {
 	0x06, 0x00, 0x39, 0xC0,
 	0xFF, 0xFF, 0x98, 0x06,
 	0x04, 0x00, 0xFF, 0xFF,
 };
 
-static char ili9806e_fwvga_video_on_cmd110[] = {
+static char ili9806e_fwvga_video_on_cmd568[] = {
 	0x11, 0x00, 0x05, 0x80
 };
 
-static char ili9806e_fwvga_video_on_cmd111[] = {
+static char ili9806e_fwvga_video_on_cmd569[] = {
 	0x29, 0x00, 0x05, 0x80
 };
 
@@ -677,8 +2971,8 @@
 	{0x8, ili9806e_fwvga_video_on_cmd47, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd48, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd49, 0x00},
-	{0xc, ili9806e_fwvga_video_on_cmd50, 0x00},
-	{0x8, ili9806e_fwvga_video_on_cmd51, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd50, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd51, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd52, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd53, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd54, 0x00},
@@ -733,15 +3027,472 @@
 	{0x8, ili9806e_fwvga_video_on_cmd103, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd104, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd105, 0x00},
-	{0xc, ili9806e_fwvga_video_on_cmd106, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd106, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd107, 0x00},
 	{0x8, ili9806e_fwvga_video_on_cmd108, 0x00},
-	{0xc, ili9806e_fwvga_video_on_cmd109, 0x00},
-	{0x4, ili9806e_fwvga_video_on_cmd110, 0x96},
-	{0x4, ili9806e_fwvga_video_on_cmd111, 0x78}
+	{0x8, ili9806e_fwvga_video_on_cmd109, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd110, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd111, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd112, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd113, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd114, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd115, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd116, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd117, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd118, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd119, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd120, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd121, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd122, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd123, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd124, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd125, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd126, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd127, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd128, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd129, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd130, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd131, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd132, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd133, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd134, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd135, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd136, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd137, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd138, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd139, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd140, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd141, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd142, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd143, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd144, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd145, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd146, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd147, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd148, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd149, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd150, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd151, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd152, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd153, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd154, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd155, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd156, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd157, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd158, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd159, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd160, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd161, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd162, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd163, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd164, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd165, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd166, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd167, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd168, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd169, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd170, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd171, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd172, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd173, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd174, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd175, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd176, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd177, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd178, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd179, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd180, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd181, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd182, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd183, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd184, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd185, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd186, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd187, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd188, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd189, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd190, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd191, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd192, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd193, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd194, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd195, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd196, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd197, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd198, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd199, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd200, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd201, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd202, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd203, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd204, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd205, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd206, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd207, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd208, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd209, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd210, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd211, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd212, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd213, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd214, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd215, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd216, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd217, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd218, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd219, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd220, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd221, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd222, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd223, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd224, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd225, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd226, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd227, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd228, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd229, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd230, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd231, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd232, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd233, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd234, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd235, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd236, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd237, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd238, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd239, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd240, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd241, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd242, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd243, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd244, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd245, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd246, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd247, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd248, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd249, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd250, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd251, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd252, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd253, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd254, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd255, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd256, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd257, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd258, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd259, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd260, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd261, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd262, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd263, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd264, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd265, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd266, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd267, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd268, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd269, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd270, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd271, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd272, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd273, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd274, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd275, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd276, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd277, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd278, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd279, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd280, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd281, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd282, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd283, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd284, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd285, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd286, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd287, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd288, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd289, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd290, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd291, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd292, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd293, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd294, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd295, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd296, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd297, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd298, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd299, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd300, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd301, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd302, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd303, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd304, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd305, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd306, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd307, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd308, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd309, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd310, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd311, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd312, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd313, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd314, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd315, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd316, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd317, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd318, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd319, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd320, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd321, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd322, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd323, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd324, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd325, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd326, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd327, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd328, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd329, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd330, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd331, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd332, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd333, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd334, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd335, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd336, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd337, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd338, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd339, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd340, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd341, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd342, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd343, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd344, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd345, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd346, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd347, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd348, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd349, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd350, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd351, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd352, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd353, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd354, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd355, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd356, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd357, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd358, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd359, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd360, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd361, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd362, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd363, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd364, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd365, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd366, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd367, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd368, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd369, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd370, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd371, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd372, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd373, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd374, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd375, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd376, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd377, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd378, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd379, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd380, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd381, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd382, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd383, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd384, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd385, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd386, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd387, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd388, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd389, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd390, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd391, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd392, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd393, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd394, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd395, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd396, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd397, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd398, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd399, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd400, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd401, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd402, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd403, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd404, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd405, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd406, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd407, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd408, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd409, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd410, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd411, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd412, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd413, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd414, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd415, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd416, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd417, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd418, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd419, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd420, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd421, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd422, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd423, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd424, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd425, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd426, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd427, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd428, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd429, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd430, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd431, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd432, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd433, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd434, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd435, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd436, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd437, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd438, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd439, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd440, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd441, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd442, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd443, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd444, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd445, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd446, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd447, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd448, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd449, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd450, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd451, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd452, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd453, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd454, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd455, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd456, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd457, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd458, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd459, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd460, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd461, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd462, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd463, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd464, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd465, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd466, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd467, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd468, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd469, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd470, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd471, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd472, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd473, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd474, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd475, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd476, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd477, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd478, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd479, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd480, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd481, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd482, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd483, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd484, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd485, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd486, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd487, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd488, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd489, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd490, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd491, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd492, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd493, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd494, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd495, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd496, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd497, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd498, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd499, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd500, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd501, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd502, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd503, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd504, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd505, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd506, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd507, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd508, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd509, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd510, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd511, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd512, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd513, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd514, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd515, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd516, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd517, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd518, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd519, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd520, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd521, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd522, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd523, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd524, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd525, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd526, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd527, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd528, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd529, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd530, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd531, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd532, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd533, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd534, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd535, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd536, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd537, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd538, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd539, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd540, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd541, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd542, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd543, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd544, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd545, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd546, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd547, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd548, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd549, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd550, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd551, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd552, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd553, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd554, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd555, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd556, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd557, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd558, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd559, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd560, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd561, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd562, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd563, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd564, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd565, 0x00},
+	{0x8, ili9806e_fwvga_video_on_cmd566, 0x00},
+	{0xc, ili9806e_fwvga_video_on_cmd567, 0x00},
+	{0x4, ili9806e_fwvga_video_on_cmd568, 0x78},
+	{0x4, ili9806e_fwvga_video_on_cmd569, 0x0A}
 };
-
-#define ILI9806E_FWVGA_VIDEO_ON_COMMAND 112
+#define ILI9806E_FWVGA_VIDEO_ON_COMMAND 570
 
 
 static char ili9806e_fwvga_videooff_cmd0[] = {

platform/msm8916/include/platform/iomap.h

diff --git a/platform/msm8916/include/platform/iomap.h b/platform/msm8916/include/platform/iomap.h
index d98bbdf..2d9197c 100644
--- a/platform/msm8916/include/platform/iomap.h
+++ b/platform/msm8916/include/platform/iomap.h
@@ -51,9 +51,6 @@
 #define ABOOT_FORCE_RAMDISK_ADDR    DDR_START + 0x2000000
 #define ABOOT_FORCE_TAGS_ADDR       DDR_START + 0x1E00000
 
-/* 3GB DDR devices consider 0x40000000 as new mem base */
-#define BASE_ADDR_1                 0x40000000
-
 #define MSM_GIC_DIST_BASE           APPS_SS_BASE
 #define MSM_GIC_CPU_BASE            (APPS_SS_BASE + 0x2000)
 #define APPS_APCS_QTMR_AC_BASE      (APPS_SS_BASE + 0x00020000)

platform/msm8916/platform.c

diff --git a/platform/msm8916/platform.c b/platform/msm8916/platform.c
index 4b646fe..1531b28 100644
--- a/platform/msm8916/platform.c
+++ b/platform/msm8916/platform.c
@@ -39,6 +39,7 @@
 #include <board.h>
 #include <boot_stats.h>
 #include <platform.h>
+#include <target/display.h>
 
 #define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB)
 #define A53_SS_SIZE    ((A53_SS_END - A53_SS_BASE)/MB)
@@ -65,9 +66,8 @@
 	{    A53_SS_BASE,       A53_SS_BASE,      A53_SS_SIZE,      IOMAP_MEMORY},
 	{    SYSTEM_IMEM_BASE,  SYSTEM_IMEM_BASE, 1,                COMMON_MEMORY},
 	{    MSM_SHARED_BASE,   MSM_SHARED_BASE,  1,                COMMON_MEMORY},
-	{    BASE_ADDR,         BASE_ADDR,        90,               COMMON_MEMORY},
-	{    SCRATCH_ADDR,      SCRATCH_ADDR,     256,              SCRATCH_MEMORY},
-	{    BASE_ADDR_1,       BASE_ADDR_1,     1024,              COMMON_MEMORY},
+	{    SCRATCH_ADDR,      SCRATCH_ADDR,     256,              COMMON_MEMORY},
+	{    MIPI_FB_ADDR,      MIPI_FB_ADDR,     10,              COMMON_MEMORY},
 };
 
 
@@ -122,7 +122,14 @@
 	uint32_t i;
 	uint32_t sections;
 	uint32_t table_size = ARRAY_SIZE(mmu_section_table);
+	uint32_t ddr_start = get_ddr_start();
 
+	/*Mapping the ddr start address for loading the kernel about 90 MB*/
+	sections = 90;
+	while(sections--)
+	{
+		arm_mmu_map_section(ddr_start + sections * MB, ddr_start + sections* MB, COMMON_MEMORY);
+	}
 	/* Configure the MMU page entries for memory read from the
 	   mmu_section_table */
 	for (i = 0; i < table_size; i++)
@@ -211,30 +218,3 @@
 	else
 		return MSM_SHARED_BASE;
 }
-uint32_t get_ddr_start()
-{
-	uint32_t i;
-	ram_partition ptn_entry;
-	uint32_t len = 0;
-
-	ASSERT(smem_ram_ptable_init_v1());
-
-	len = smem_get_ram_ptable_len();
-
-	/* Determine the Start addr of the DDR RAM */
-	for(i = 0; i < len; i++)
-	{
-		smem_get_ram_ptable_entry(&ptn_entry, i);
-		if(ptn_entry.type == SYS_MEMORY)
-		{
-			if((ptn_entry.category == SDRAM) ||
-			   (ptn_entry.category == IMEM))
-			{
-				/* Check to ensure that start address is 1MB aligned */
-				ASSERT((ptn_entry.start & (MB-1)) == 0);
-				return ptn_entry.start;
-			}
-		}
-	}
-	ASSERT("DDR Start Mem Not found\n");
-}

platform/msm8952/acpuclock.c

diff --git a/platform/msm8952/acpuclock.c b/platform/msm8952/acpuclock.c
new file mode 100644
index 0000000..ffb8b92
--- /dev/null
+++ b/platform/msm8952/acpuclock.c
@@ -0,0 +1,92 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <err.h>
+#include <assert.h>
+#include <debug.h>
+#include <reg.h>
+#include <platform/timer.h>
+#include <platform/iomap.h>
+#include <mmc.h>
+#include <clock.h>
+#include <platform/clock.h>
+#include <platform.h>
+
+void hsusb_clock_init(void)
+{
+
+}
+
+void clock_init_mmc(uint32_t interface)
+{
+
+}
+
+/* Configure MMC clock */
+void clock_config_mmc(uint32_t interface, uint32_t freq)
+{
+	mmc_boot_mci_clk_enable();
+}
+
+/* Configure UART clock based on the UART block id*/
+void clock_config_uart_dm(uint8_t id)
+{
+
+}
+
+/* Function to asynchronously reset CE.
+ * Function assumes that all the CE clocks are off.
+ */
+static void ce_async_reset(uint8_t instance)
+{
+
+}
+
+void clock_ce_enable(uint8_t instance)
+{
+
+}
+
+void clock_ce_disable(uint8_t instance)
+{
+
+}
+
+void clock_config_ce(uint8_t instance)
+{
+	/* Need to enable the clock before disabling since the clk_disable()
+	 * has a check to default to nop when the clk_enable() is not called
+	 * on that particular clock.
+	 */
+	clock_ce_enable(instance);
+
+	clock_ce_disable(instance);
+
+	ce_async_reset(instance);
+
+	clock_ce_enable(instance);
+}

platform/msm8952/gpio.c

diff --git a/platform/msm8952/gpio.c b/platform/msm8952/gpio.c
new file mode 100644
index 0000000..05b4977
--- /dev/null
+++ b/platform/msm8952/gpio.c
@@ -0,0 +1,72 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+#include <platform/gpio.h>
+#include <blsp_qup.h>
+
+void gpio_tlmm_config(uint32_t gpio, uint8_t func,
+			uint8_t dir, uint8_t pull,
+			uint8_t drvstr, uint32_t enable)
+{
+	uint32_t val = 0;
+
+	val |= pull;
+	val |= func << 2;
+	val |= drvstr << 6;
+	val |= enable << 9;
+
+	writel(val, (uint32_t *)GPIO_CONFIG_ADDR(gpio));
+	return;
+}
+
+void gpio_set_dir(uint32_t gpio, uint32_t dir)
+{
+	writel(dir, (uint32_t *)GPIO_IN_OUT_ADDR(gpio));
+
+	return;
+}
+
+uint32_t gpio_status(uint32_t gpio)
+{
+	return readl(GPIO_IN_OUT_ADDR(gpio)) & GPIO_IN;
+}
+
+/* Configure gpio for blsp uart 2 */
+void gpio_config_uart_dm(uint8_t id)
+{
+	/* configure rx gpio */
+	gpio_tlmm_config(5, 2, GPIO_INPUT, GPIO_NO_PULL,
+				GPIO_8MA, GPIO_DISABLE);
+
+	/* configure tx gpio */
+	gpio_tlmm_config(4, 2, GPIO_OUTPUT, GPIO_NO_PULL,
+				GPIO_8MA, GPIO_DISABLE);
+}

platform/msm8952/include/platform/clock.h

diff --git a/platform/msm8952/include/platform/clock.h b/platform/msm8952/include/platform/clock.h
new file mode 100644
index 0000000..c7efe6e
--- /dev/null
+++ b/platform/msm8952/include/platform/clock.h
@@ -0,0 +1,44 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __MSM8952_CLOCK_H
+#define __MSM8952_CLOCK_H
+
+#include <clock.h>
+#include <clock_lib2.h>
+
+#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
+
+void platform_clock_init(void);
+
+void clock_init_mmc(uint32_t interface);
+void clock_config_mmc(uint32_t interface, uint32_t freq);
+void clock_config_uart_dm(uint8_t id);
+void hsusb_clock_init(void);
+void clock_config_ce(uint8_t instance);
+#endif

platform/msm8952/include/platform/gpio.h

diff --git a/platform/msm8952/include/platform/gpio.h b/platform/msm8952/include/platform/gpio.h
new file mode 100644
index 0000000..b4d12e8
--- /dev/null
+++ b/platform/msm8952/include/platform/gpio.h
@@ -0,0 +1,72 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __PLATFORM_MSM8952_GPIO_H
+#define __PLATFORM_MSM8952_GPIO_H
+
+#include <bits.h>
+#include <gpio.h>
+
+/* GPIO TLMM: Direction */
+#define GPIO_INPUT      0
+#define GPIO_OUTPUT     1
+
+/* GPIO TLMM: Pullup/Pulldown */
+#define GPIO_NO_PULL    0
+#define GPIO_PULL_DOWN  1
+#define GPIO_KEEPER     2
+#define GPIO_PULL_UP    3
+
+/* GPIO TLMM: Drive Strength */
+#define GPIO_2MA        0
+#define GPIO_4MA        1
+#define GPIO_6MA        2
+#define GPIO_8MA        3
+#define GPIO_10MA       4
+#define GPIO_12MA       5
+#define GPIO_14MA       6
+#define GPIO_16MA       7
+
+/* GPIO TLMM: Status */
+#define GPIO_ENABLE     0
+#define GPIO_DISABLE    1
+
+/* GPIO_IN_OUT register shifts. */
+#define GPIO_IN         BIT(0)
+#define GPIO_OUT        BIT(1)
+
+void gpio_config_uart_dm(uint8_t id);
+uint32_t gpio_status(uint32_t gpio);
+void gpio_set_dir(uint32_t gpio, uint32_t dir);
+void gpio_tlmm_config(uint32_t gpio,
+			uint8_t func,
+			uint8_t dir,
+			uint8_t pull,
+			uint8_t drvstr,
+			uint32_t enable);
+#endif

platform/msm8952/include/platform/iomap.h

diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
new file mode 100644
index 0000000..ac40933
--- /dev/null
+++ b/platform/msm8952/include/platform/iomap.h
@@ -0,0 +1,123 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM8952_IOMAP_H_
+#define _PLATFORM_MSM8952_IOMAP_H_
+
+#define MSM_IOMAP_BASE                     0x00000000
+#define MSM_IOMAP_END                      0x08000000
+
+#define SDRAM_START_ADDR                   0x80000000
+
+#define DDR_START                          get_ddr_start()
+#define ABOOT_FORCE_KERNEL_ADDR            DDR_START + 0x8000
+#define ABOOT_FORCE_KERNEL64_ADDR          DDR_START + 0x80000
+#define ABOOT_FORCE_RAMDISK_ADDR           DDR_START + 0x2000000
+#define ABOOT_FORCE_TAGS_ADDR              DDR_START + 0x1E00000
+
+#define MSM_SHARED_BASE                    0x86300000
+#define MSM_SHARED_IMEM_BASE               0x08600000
+
+#define BS_INFO_OFFSET                     (0x6B0)
+#define BS_INFO_ADDR                       (MSM_SHARED_IMEM_BASE + BS_INFO_OFFSET)
+
+#define RESTART_REASON_ADDR                (MSM_SHARED_IMEM_BASE + 0x65C)
+
+#define APPS_SS_BASE                       0x0B000000
+#define APPS_SS_END                        0x0B200000
+
+#define MSM_GIC_DIST_BASE                  APPS_SS_BASE
+#define MSM_GIC_CPU_BASE                   (APPS_SS_BASE + 0x2000)
+#define APPS_APCS_QTMR_AC_BASE             (APPS_SS_BASE + 0x00020000)
+#define APPS_APCS_F0_QTMR_V1_BASE          (APPS_SS_BASE + 0x00021000)
+#define QTMR_BASE                          APPS_APCS_F0_QTMR_V1_BASE
+
+#define PERIPH_SS_BASE                     0x07800000
+
+#define MSM_SDC1_BASE                      (PERIPH_SS_BASE + 0x00024000)
+#define MSM_SDC2_BASE                      (PERIPH_SS_BASE + 0x00064000)
+
+#define BLSP1_UART0_BASE                   (PERIPH_SS_BASE + 0x000AF000)
+#define BLSP1_UART1_BASE                   (PERIPH_SS_BASE + 0x000B0000)
+#define MSM_USB_BASE                       (PERIPH_SS_BASE + 0x000DB000)
+
+#define CLK_CTL_BASE                       0x1800000
+
+#define SPMI_BASE                          0x02000000
+#define SPMI_GENI_BASE                     (SPMI_BASE + 0xA000)
+#define SPMI_PIC_BASE                      (SPMI_BASE +  0x01800000)
+#define PMIC_ARB_CORE                      0x200F000
+
+#define TLMM_BASE_ADDR                     0x1000000
+#define GPIO_CONFIG_ADDR(x)                (TLMM_BASE_ADDR + (x)*0x1000)
+#define GPIO_IN_OUT_ADDR(x)                (TLMM_BASE_ADDR + 0x00000004 + (x)*0x1000)
+
+#define MPM2_MPM_CTRL_BASE                 0x004A0000
+#define MPM2_MPM_PS_HOLD                   0x004AB000
+#define MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL  0x004A3000
+
+/* CRYPTO ENGINE */
+#define  MSM_CE1_BASE                      0x073A000
+#define  MSM_CE1_BAM_BASE                  0x0704000
+
+
+/* GPLL */
+#define GPLL0_STATUS                       (CLK_CTL_BASE + 0x2101C)
+#define APCS_GPLL_ENA_VOTE                 (CLK_CTL_BASE + 0x45000)
+#define APCS_CLOCK_BRANCH_ENA_VOTE         (CLK_CTL_BASE + 0x45004)
+
+/* SDCC */
+#define SDC1_HDRV_PULL_CTL                 (TLMM_BASE_ADDR + 0x10A000)
+#define SDCC1_BCR                          (CLK_CTL_BASE + 0x42000) /* block reset*/
+#define SDCC1_APPS_CBCR                    (CLK_CTL_BASE + 0x42018) /* branch ontrol */
+#define SDCC1_AHB_CBCR                     (CLK_CTL_BASE + 0x4201C)
+#define SDCC1_CMD_RCGR                     (CLK_CTL_BASE + 0x42004) /* cmd */
+#define SDCC1_CFG_RCGR                     (CLK_CTL_BASE + 0x42008) /* cfg */
+#define SDCC1_M                            (CLK_CTL_BASE + 0x4200C) /* m */
+#define SDCC1_N                            (CLK_CTL_BASE + 0x42010) /* n */
+#define SDCC1_D                            (CLK_CTL_BASE + 0x42014) /* d */
+
+/* UART */
+#define BLSP1_AHB_CBCR                     (CLK_CTL_BASE + 0x1008)
+#define BLSP1_UART2_APPS_CBCR              (CLK_CTL_BASE + 0x302C)
+#define BLSP1_UART2_APPS_CMD_RCGR          (CLK_CTL_BASE + 0x3034)
+#define BLSP1_UART2_APPS_CFG_RCGR          (CLK_CTL_BASE + 0x3038)
+#define BLSP1_UART2_APPS_M                 (CLK_CTL_BASE + 0x303C)
+#define BLSP1_UART2_APPS_N                 (CLK_CTL_BASE + 0x3040)
+#define BLSP1_UART2_APPS_D                 (CLK_CTL_BASE + 0x3044)
+
+/* USB */
+#define USB_HS_BCR                         (CLK_CTL_BASE + 0x41000)
+#define USB_HS_SYSTEM_CBCR                 (CLK_CTL_BASE + 0x41004)
+#define USB_HS_AHB_CBCR                    (CLK_CTL_BASE + 0x41008)
+#define USB_HS_SYSTEM_CMD_RCGR             (CLK_CTL_BASE + 0x41010)
+#define USB_HS_SYSTEM_CFG_RCGR             (CLK_CTL_BASE + 0x41014)
+
+#define TCSR_TZ_WONCE               0x193D000
+#define TCSR_BOOT_MISC_DETECT       0x193D100
+#endif

platform/msm8952/include/platform/irqs.h

diff --git a/platform/thulium/include/platform/irqs.h b/platform/msm8952/include/platform/irqs.h
similarity index 60%
copy from platform/thulium/include/platform/irqs.h
copy to platform/msm8952/include/platform/irqs.h
index 696c83f..31da373 100644
--- a/platform/thulium/include/platform/irqs.h
+++ b/platform/msm8952/include/platform/irqs.h
@@ -1,17 +1,17 @@
-/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
-
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
  * met:
- *   * Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- *   * Redistributions in binary form must reproduce the above
- *     copyright notice, this list of conditions and the following
- *     disclaimer in the documentation and/or other materials provided
- *     with the distribution.
- *   * Neither the name of The Linux Foundation, Inc. nor the names of its
- *     contributors may be used to endorse or promote products derived
- *     from this software without specific prior written permission.
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
@@ -26,9 +26,8 @@
  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-
-#ifndef __IRQS_THULIUM_H
-#define __IRQS_THULIUM_H
+#ifndef __IRQS_MSM8952_H
+#define __IRQS_MSM8952_H
 
 /* MSM ACPU Interrupt Numbers */
 
@@ -43,23 +42,16 @@
 #define INT_QTMR_NON_SECURE_PHY_TIMER_EXP      (GIC_PPI_START + 3)
 #define INT_QTMR_VIRTUAL_TIMER_EXP             (GIC_PPI_START + 4)
 
-#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP      (GIC_SPI_START + 31)
+#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP      (GIC_SPI_START + 257)
 
-#define USB30_EE1_IRQ                          (GIC_SPI_START + 131)
-
-#define GLINK_IPC_IRQ                          (GIC_SPI_START + 168)
+#define USB1_HS_BAM_IRQ                        (GIC_SPI_START + 135)
+#define USB1_HS_IRQ                            (GIC_SPI_START + 134)
 
 /* Retrofit universal macro names */
-#define INT_USB_HS                             USB30_EE1_IRQ
+#define INT_USB_HS                             USB1_HS_IRQ
 
-#define SDCC1_PWRCTL_IRQ                       (GIC_SPI_START + 134)
-#define SDCC2_PWRCTL_IRQ                       (GIC_SPI_START + 221)
+#define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ         (GIC_SPI_START + 190)
 
-#define UFS_IRQ                                (GIC_SPI_START + 265)
-
-#define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ         (GIC_SPI_START + 265)
-
-/* Fix this: where this comes from? */
 #define NR_MSM_IRQS                            256
 #define NR_GPIO_IRQS                           173
 #define NR_BOARD_IRQS                          0
@@ -67,4 +59,4 @@
 #define NR_IRQS                                (NR_MSM_IRQS + NR_GPIO_IRQS + \
                                                NR_BOARD_IRQS)
 
-#endif	/* __IRQS_THULIUM_H */
+#endif /* __IRQS_MSM8952_H */

platform/msm8952/msm8952-clock.c

diff --git a/platform/msm8952/msm8952-clock.c b/platform/msm8952/msm8952-clock.c
new file mode 100644
index 0000000..ed39611
--- /dev/null
+++ b/platform/msm8952/msm8952-clock.c
@@ -0,0 +1,403 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <assert.h>
+#include <reg.h>
+#include <err.h>
+#include <clock.h>
+#include <clock_pll.h>
+#include <clock_lib2.h>
+#include <platform/clock.h>
+#include <platform/iomap.h>
+#include <platform.h>
+
+/* Mux source select values */
+#define cxo_source_val    0
+#define gpll0_source_val  1
+#define gpll4_source_val  2
+#define cxo_mm_source_val 0
+#define gpll0_mm_source_val 1
+
+struct clk_freq_tbl rcg_dummy_freq = F_END;
+
+
+/* Clock Operations */
+static struct clk_ops clk_ops_branch =
+{
+	.enable     = clock_lib2_branch_clk_enable,
+	.disable    = clock_lib2_branch_clk_disable,
+	.set_rate   = clock_lib2_branch_set_rate,
+};
+
+static struct clk_ops clk_ops_rcg_mnd =
+{
+	.enable     = clock_lib2_rcg_enable,
+	.set_rate   = clock_lib2_rcg_set_rate,
+};
+
+static struct clk_ops clk_ops_rcg =
+{
+	.enable     = clock_lib2_rcg_enable,
+	.set_rate   = clock_lib2_rcg_set_rate,
+};
+
+static struct clk_ops clk_ops_cxo =
+{
+	.enable     = cxo_clk_enable,
+	.disable    = cxo_clk_disable,
+};
+
+static struct clk_ops clk_ops_pll_vote =
+{
+	.enable     = pll_vote_clk_enable,
+	.disable    = pll_vote_clk_disable,
+	.auto_off   = pll_vote_clk_disable,
+	.is_enabled = pll_vote_clk_is_enabled,
+};
+
+static struct clk_ops clk_ops_vote =
+{
+	.enable     = clock_lib2_vote_clk_enable,
+	.disable    = clock_lib2_vote_clk_disable,
+};
+
+/* Clock Sources */
+static struct fixed_clk cxo_clk_src =
+{
+	.c = {
+		.rate     = 19200000,
+		.dbg_name = "cxo_clk_src",
+		.ops      = &clk_ops_cxo,
+	},
+};
+
+static struct pll_vote_clk gpll0_clk_src =
+{
+	.en_reg       = (void *) APCS_GPLL_ENA_VOTE,
+	.en_mask      = BIT(0),
+	.status_reg   = (void *) GPLL0_STATUS,
+	.status_mask  = BIT(17),
+	.parent       = &cxo_clk_src.c,
+
+	.c = {
+		.rate     = 800000000,
+		.dbg_name = "gpll0_clk_src",
+		.ops      = &clk_ops_pll_vote,
+	},
+};
+
+/* SDCC Clocks */
+static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk[] =
+{
+	F(   144000,    cxo,  16,   3,  25),
+	F(   400000,    cxo,  12,   1,   4),
+	F( 20000000,  gpll0,  10,   1,   4),
+	F( 25000000,  gpll0,  16,   1,   2),
+	F( 50000000,  gpll0,  16,   0,   0),
+	F(100000000,  gpll0,   8,   0,   0),
+	F(177770000,  gpll0, 4.5,   0,   0),
+	F(200000000,  gpll0,   4,   0,   0),
+	F(400000000,  gpll4,   3,   0,   0),
+	F_END
+};
+
+static struct rcg_clk sdcc1_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) SDCC1_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) SDCC1_CFG_RCGR,
+	.m_reg        = (uint32_t *) SDCC1_M,
+	.n_reg        = (uint32_t *) SDCC1_N,
+	.d_reg        = (uint32_t *) SDCC1_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_sdcc1_2_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "sdc1_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+static struct branch_clk gcc_sdcc1_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC1_APPS_CBCR,
+	.parent       = &sdcc1_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_sdcc1_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk gcc_sdcc1_ahb_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC1_AHB_CBCR,
+	.has_sibling  = 1,
+
+	.c = {
+		.dbg_name = "gcc_sdcc1_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct clk_freq_tbl ftbl_gcc_sdcc2_apps_clk[] =
+{
+	F(   144000,    cxo,  16,   3,  25),
+	F(   400000,    cxo,  12,   1,   4),
+	F( 20000000,  gpll0,  10,   1,   4),
+	F( 25000000,  gpll0,  16,   1,   2),
+	F( 50000000,  gpll0,  16,   0,   0),
+	F(100000000,  gpll0,   8,   0,   0),
+	F(177770000,  gpll0, 4.5,   0,   0),
+	F(200000000,  gpll0,   4,   0,   0),
+	F_END
+};
+
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) SDCC2_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) SDCC2_CFG_RCGR,
+	.m_reg        = (uint32_t *) SDCC2_M,
+	.n_reg        = (uint32_t *) SDCC2_N,
+	.d_reg        = (uint32_t *) SDCC2_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_sdcc2_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "sdc2_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC2_APPS_CBCR,
+	.parent       = &sdcc2_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_sdcc2_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC2_AHB_CBCR,
+	.has_sibling  = 1,
+
+	.c = {
+		.dbg_name = "gcc_sdcc2_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+/* UART Clocks */
+static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_2_apps_clk[] =
+{
+	F( 3686400,  gpll0,    1,  72,  15625),
+	F( 7372800,  gpll0,    1, 144,  15625),
+	F(14745600,  gpll0,    1, 288,  15625),
+	F(16000000,  gpll0,   10,   1,      5),
+	F(19200000,    cxo,    1,   0,      0),
+	F(24000000,  gpll0,    1,   3,    100),
+	F(25000000,  gpll0,   16,   1,      2),
+	F(32000000,  gpll0,    1,   1,     25),
+	F(40000000,  gpll0,    1,   1,     20),
+	F(46400000,  gpll0,    1,  29,    500),
+	F(48000000,  gpll0,    1,   3,     50),
+	F(51200000,  gpll0,    1,   8,    125),
+	F(56000000,  gpll0,    1,   7,    100),
+	F(58982400,  gpll0,    1,1152,  15625),
+	F(60000000,  gpll0,    1,   3,     40),
+	F_END
+};
+
+static struct rcg_clk blsp1_uart2_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) BLSP1_UART2_APPS_CFG_RCGR,
+	.m_reg        = (uint32_t *) BLSP1_UART2_APPS_M,
+	.n_reg        = (uint32_t *) BLSP1_UART2_APPS_N,
+	.d_reg        = (uint32_t *) BLSP1_UART2_APPS_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_blsp1_2_uart1_2_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "blsp1_uart2_apps_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+static struct branch_clk gcc_blsp1_uart2_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) BLSP1_UART2_APPS_CBCR,
+	.parent       = &blsp1_uart2_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_blsp1_uart2_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct vote_clk gcc_blsp1_ahb_clk = {
+	.cbcr_reg     = (uint32_t *) BLSP1_AHB_CBCR,
+	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask      = BIT(10),
+
+	.c = {
+		.dbg_name = "gcc_blsp1_ahb_clk",
+		.ops      = &clk_ops_vote,
+	},
+};
+
+/* USB Clocks */
+static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] =
+{
+	F(133330000,  gpll0,    6,   0,   0),
+	F_END
+};
+
+static struct rcg_clk usb_hs_system_clk_src =
+{
+	.cmd_reg      = (uint32_t *) USB_HS_SYSTEM_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) USB_HS_SYSTEM_CFG_RCGR,
+
+	.set_rate     = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl     = ftbl_gcc_usb_hs_system_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "usb_hs_system_clk",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct branch_clk gcc_usb_hs_system_clk =
+{
+	.cbcr_reg     = (uint32_t *) USB_HS_SYSTEM_CBCR,
+	.parent       = &usb_hs_system_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_usb_hs_system_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk gcc_usb_hs_ahb_clk =
+{
+	.cbcr_reg     = (uint32_t *) USB_HS_AHB_CBCR,
+	.has_sibling  = 1,
+
+	.c = {
+		.dbg_name = "gcc_usb_hs_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct clk_freq_tbl ftbl_gcc_ce1_clk[] = {
+	F(160000000,  gpll0,   5,   0,   0),
+	F_END
+};
+
+static struct rcg_clk ce1_clk_src = {
+	.cmd_reg      = (uint32_t *) GCC_CRYPTO_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) GCC_CRYPTO_CFG_RCGR,
+	.set_rate     = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl     = ftbl_gcc_ce1_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "ce1_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct vote_clk gcc_ce1_clk = {
+	.cbcr_reg      = (uint32_t *) GCC_CRYPTO_CBCR,
+	.vote_reg      = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask       = BIT(2),
+
+	.c = {
+		.dbg_name  = "gcc_ce1_clk",
+		.ops       = &clk_ops_vote,
+	},
+};
+
+static struct vote_clk gcc_ce1_ahb_clk = {
+	.cbcr_reg     = (uint32_t *) GCC_CRYPTO_AHB_CBCR,
+	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask      = BIT(0),
+
+	.c = {
+		.dbg_name = "gcc_ce1_ahb_clk",
+		.ops      = &clk_ops_vote,
+	},
+};
+
+static struct vote_clk gcc_ce1_axi_clk = {
+	.cbcr_reg     = (uint32_t *) GCC_CRYPTO_AXI_CBCR,
+	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask      = BIT(1),
+
+	.c = {
+		.dbg_name = "gcc_ce1_axi_clk",
+		.ops      = &clk_ops_vote,
+	},
+};
+
+/* Clock lookup table */
+static struct clk_lookup msm_clocks_8952[] =
+{
+	CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
+	CLK_LOOKUP("sdc1_core_clk",  gcc_sdcc1_apps_clk.c),
+
+	CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+	CLK_LOOKUP("sdc2_core_clk",  gcc_sdcc2_apps_clk.c),
+
+	CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
+	CLK_LOOKUP("uart2_core_clk",  gcc_blsp1_uart2_apps_clk.c),
+
+	CLK_LOOKUP("usb_iface_clk",  gcc_usb_hs_ahb_clk.c),
+	CLK_LOOKUP("usb_core_clk",   gcc_usb_hs_system_clk.c),
+
+
+	CLK_LOOKUP("ce1_ahb_clk",  gcc_ce1_ahb_clk.c),
+	CLK_LOOKUP("ce1_axi_clk",  gcc_ce1_axi_clk.c),
+	CLK_LOOKUP("ce1_core_clk", gcc_ce1_clk.c),
+	CLK_LOOKUP("ce1_src_clk",  ce1_clk_src.c),
+};
+
+void platform_clock_init(void)
+{
+	clk_init(msm_clocks_8952, ARRAY_SIZE(msm_clocks_8952));
+}

platform/msm8952/platform.c

diff --git a/platform/msm8952/platform.c b/platform/msm8952/platform.c
new file mode 100644
index 0000000..4648638
--- /dev/null
+++ b/platform/msm8952/platform.c
@@ -0,0 +1,164 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+#include <qgic.h>
+#include <qtimer.h>
+#include <mmu.h>
+#include <arch/arm/mmu.h>
+#include <smem.h>
+#include <board.h>
+
+#define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB)
+#define APPS_SS_SIZE   ((APPS_SS_END - APPS_SS_BASE)/MB)
+
+/* LK memory - cacheable, write through */
+#define LK_MEMORY         (MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | \
+				MMU_MEMORY_AP_READ_WRITE)
+
+/* Peripherals - non-shared device */
+#define IOMAP_MEMORY      (MMU_MEMORY_TYPE_DEVICE_SHARED | \
+				MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
+
+/* IMEM memory - cacheable, write through */
+#define COMMON_MEMORY     (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
+				MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
+
+#define SCRATCH_MEMORY    (MMU_MEMORY_TYPE_NORMAL_WRITE_BACK_ALLOCATE | \
+				MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
+
+static mmu_section_t mmu_section_table[] = {
+/*           Physical addr,         Virtual addr,            Size (in MB),     Flags */
+	{    MEMBASE,               MEMBASE,                 (MEMSIZE / MB),   LK_MEMORY},
+	{    MSM_IOMAP_BASE,        MSM_IOMAP_BASE,          MSM_IOMAP_SIZE,   IOMAP_MEMORY},
+	{    APPS_SS_BASE,          APPS_SS_BASE,            APPS_SS_SIZE,      IOMAP_MEMORY},
+	{    MSM_SHARED_IMEM_BASE,  MSM_SHARED_IMEM_BASE,    1,                COMMON_MEMORY},
+	{    SCRATCH_ADDR,          SCRATCH_ADDR,            256,              SCRATCH_MEMORY},
+};
+
+void platform_early_init(void)
+{
+	board_init();
+	qgic_init();
+	qtimer_init();
+	scm_init();
+}
+
+void platform_init(void)
+{
+	dprintf(INFO, "platform_init()\n");
+}
+
+void platform_uninit(void)
+{
+	qtimer_uninit();
+}
+
+uint32_t platform_get_sclk_count(void)
+{
+	return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL);
+}
+
+addr_t get_bs_info_addr()
+{
+	return ((addr_t)BS_INFO_ADDR);
+}
+
+int platform_use_identity_mmu_mappings(void)
+{
+	/* Use only the mappings specified in this file. */
+	return 0;
+}
+
+/* Setup MMU mapping for this platform */
+void platform_init_mmu_mappings(void)
+{
+	uint32_t i;
+	uint32_t sections;
+	uint32_t table_size = ARRAY_SIZE(mmu_section_table);
+	uint32_t ddr_start = get_ddr_start();
+	uint32_t smem_addr = platform_get_smem_base_addr();
+
+	/*Mapping the ddr start address for loading the kernel about 90 MB*/
+	sections = 90;
+	while(sections--)
+	{
+		arm_mmu_map_section(ddr_start + sections * MB, ddr_start + sections* MB, COMMON_MEMORY);
+	}
+
+
+	/* Mapping the SMEM addr */
+	arm_mmu_map_section(smem_addr, smem_addr, COMMON_MEMORY);
+
+	/* Configure the MMU page entries for memory read from the
+	   mmu_section_table */
+	for (i = 0; i < table_size; i++)
+	{
+		sections = mmu_section_table[i].num_of_sections;
+
+		while (sections--)
+		{
+			arm_mmu_map_section(mmu_section_table[i].paddress +
+								sections * MB,
+								mmu_section_table[i].vaddress +
+								sections * MB,
+								mmu_section_table[i].flags);
+		}
+	}
+}
+
+addr_t platform_get_virt_to_phys_mapping(addr_t virt_addr)
+{
+	/* Using 1-1 mapping on this platform. */
+	return virt_addr;
+}
+
+addr_t platform_get_phys_to_virt_mapping(addr_t phys_addr)
+{
+	/* Using 1-1 mapping on this platform. */
+	return phys_addr;
+}
+
+/* DYNAMIC SMEM REGION feature enables LK to dynamically
+ * read the SMEM addr info from TCSR_TZ_WONCE register.
+ * The first word read, if indicates a MAGIC number, then
+ * Dynamic SMEM is assumed to be enabled. Read the remaining
+ * SMEM info for SMEM Size and Phy_addr from the other bytes.
+ */
+uint32_t platform_get_smem_base_addr()
+{
+	struct smem_addr_info *smem_info = NULL;
+
+	smem_info = (struct smem_addr_info *)readl(TCSR_TZ_WONCE);
+	if(smem_info && (smem_info->identifier == SMEM_TARGET_INFO_IDENTIFIER))
+		return smem_info->phy_addr;
+	else
+		return MSM_SHARED_BASE;
+}

platform/msm8952/rules.mk

diff --git a/platform/thulium/rules.mk b/platform/msm8952/rules.mk
similarity index 61%
copy from platform/thulium/rules.mk
copy to platform/msm8952/rules.mk
index 10afc50..ebae71e 100644
--- a/platform/thulium/rules.mk
+++ b/platform/msm8952/rules.mk
@@ -1,27 +1,25 @@
 LOCAL_DIR := $(GET_LOCAL_DIR)
 
 ARCH    := arm
+#Compiling this as cortex-a8 until the compiler supports krait
 ARM_CPU := cortex-a8
 CPU     := generic
 
-DEFINES += ARM_CPU_CORE_KRAIT
+DEFINES += ARM_CPU_CORE_A7
+DEFINES += ARM_CORE_V8
 
 MMC_SLOT         := 1
 
 DEFINES += PERIPH_BLK_BLSP=1
 DEFINES += WITH_CPU_EARLY_INIT=0 WITH_CPU_WARM_BOOT=0 \
-	   MMC_SLOT=$(MMC_SLOT)
+           MMC_SLOT=$(MMC_SLOT)
 
 INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared/include
 
-DEVS += fbcon
-MODULES += dev/fbcon
-
 OBJS += \
-	$(LOCAL_DIR)/platform.o \
-	$(LOCAL_DIR)/acpuclock.o \
-	$(LOCAL_DIR)/thulium-clock.o \
-	$(LOCAL_DIR)/gpio.o
+       $(LOCAL_DIR)/platform.o \
+       $(LOCAL_DIR)/acpuclock.o \
+       $(LOCAL_DIR)/gpio.o
 
 LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
 

platform/msm8994/acpuclock.c

diff --git a/platform/msm8994/acpuclock.c b/platform/msm8994/acpuclock.c
index 6b77ea0..c59e61a 100644
--- a/platform/msm8994/acpuclock.c
+++ b/platform/msm8994/acpuclock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
@@ -37,6 +37,7 @@
 #include <platform/timer.h>
 #include <rpm-smd.h>
 #include <regulator.h>
+#include <platform.h>
 
 #define RPM_CE_CLK_TYPE    0x6563
 #define CE2_CLK_ID         0x1
@@ -161,7 +162,10 @@
 	}
 	else if(freq == MMC_CLK_192MHZ)
 	{
-		ret = clk_get_set_enable(clk_name, 192000000, 1);
+		if (platform_is_msm8992())
+			ret = clk_get_set_enable(clk_name, 172000000, 1);
+		else
+			ret = clk_get_set_enable(clk_name, 192000000, 1);
 	}
 	else if(freq == MMC_CLK_200MHZ)
 	{
@@ -169,7 +173,10 @@
 	}
 	else if(freq == MMC_CLK_400MHZ)
 	{
-		ret = clk_get_set_enable(clk_name, 384000000, 1);
+		if (platform_is_msm8992())
+			ret = clk_get_set_enable(clk_name, 344000000, 1);
+		else
+			ret = clk_get_set_enable(clk_name, 384000000, 1);
 	}
 	else
 	{

platform/msm8994/msm8994-clock.c

diff --git a/platform/msm8994/msm8994-clock.c b/platform/msm8994/msm8994-clock.c
index 358db25..8653f8d 100644
--- a/platform/msm8994/msm8994-clock.c
+++ b/platform/msm8994/msm8994-clock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
@@ -34,6 +34,7 @@
 #include <clock_lib2.h>
 #include <platform/clock.h>
 #include <platform/iomap.h>
+#include <platform.h>
 
 
 /* Mux source select values */
@@ -256,6 +257,19 @@
 	F_END
 };
 
+static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk_8992[] =
+{
+	F(   144000,    cxo,  16,   3,  25),
+	F(   400000,    cxo,  12,   1,   4),
+	F( 20000000,  gpll0,  15,   1,   2),
+	F( 25000000,  gpll0,  12,   1,   2),
+	F( 50000000,  gpll0,  12,   0,   0),
+	F( 96000000,  gpll4,   6,   0,   0),
+	F(172000000,  gpll4,   2,   0,   0),
+	F(344000000,  gpll4,   1,   0,   0),
+	F_END
+};
+
 static struct clk_freq_tbl ftbl_gcc_sdcc2_4_apps_clk[] =
 {
 	F(   144000,    cxo,  16,   3,  25),
@@ -825,7 +839,16 @@
 	CLK_LOOKUP("edp_aux_clk",          mdss_edpaux_clk.c),
 };
 
+void msm8992_sdc1_clock_override()
+{
+	sdcc1_apps_clk_src.freq_tbl = ftbl_gcc_sdcc1_apps_clk_8992;
+}
+
 void platform_clock_init(void)
 {
+	if (platform_is_msm8992())
+	{
+		msm8992_sdc1_clock_override();
+	}
 	clk_init(msm_8994_clocks, ARRAY_SIZE(msm_8994_clocks));
 }

platform/msm8996/acpuclock.c

diff --git a/platform/thulium/acpuclock.c b/platform/msm8996/acpuclock.c
similarity index 100%
rename from platform/thulium/acpuclock.c
rename to platform/msm8996/acpuclock.c

platform/msm8996/gpio.c

diff --git a/platform/thulium/gpio.c b/platform/msm8996/gpio.c
similarity index 100%
rename from platform/thulium/gpio.c
rename to platform/msm8996/gpio.c

platform/msm8996/include/platform/clock.h

diff --git a/platform/thulium/include/platform/clock.h b/platform/msm8996/include/platform/clock.h
similarity index 100%
rename from platform/thulium/include/platform/clock.h
rename to platform/msm8996/include/platform/clock.h

platform/msm8996/include/platform/gpio.h

diff --git a/platform/thulium/include/platform/gpio.h b/platform/msm8996/include/platform/gpio.h
similarity index 96%
rename from platform/thulium/include/platform/gpio.h
rename to platform/msm8996/include/platform/gpio.h
index c00512b..5626d50 100644
--- a/platform/thulium/include/platform/gpio.h
+++ b/platform/msm8996/include/platform/gpio.h
@@ -9,7 +9,7 @@
  *    copyright notice, this list of conditions and the following
  *    disclaimer in the documentation and/or other materials provided
  *    with the distribution.
- *  * Neither the name of The Linux Foundation, Inc. nor the names of its
+ *  * Neither the name of The Linux Foundation nor the names of its
  *    contributors may be used to endorse or promote products derived
  *    from this software without specific prior written permission.
  *

platform/msm8996/include/platform/iomap.h

diff --git a/platform/thulium/include/platform/iomap.h b/platform/msm8996/include/platform/iomap.h
similarity index 100%
rename from platform/thulium/include/platform/iomap.h
rename to platform/msm8996/include/platform/iomap.h

platform/msm8996/include/platform/irqs.h

diff --git a/platform/thulium/include/platform/irqs.h b/platform/msm8996/include/platform/irqs.h
similarity index 97%
rename from platform/thulium/include/platform/irqs.h
rename to platform/msm8996/include/platform/irqs.h
index 696c83f..ab5e2ff 100644
--- a/platform/thulium/include/platform/irqs.h
+++ b/platform/msm8996/include/platform/irqs.h
@@ -9,7 +9,7 @@
  *     copyright notice, this list of conditions and the following
  *     disclaimer in the documentation and/or other materials provided
  *     with the distribution.
- *   * Neither the name of The Linux Foundation, Inc. nor the names of its
+ *   * Neither the name of The Linux Foundation nor the names of its
  *     contributors may be used to endorse or promote products derived
  *     from this software without specific prior written permission.
  *

platform/msm8996/include/platform/partial_goods.h

diff --git a/platform/thulium/include/platform/partial_goods.h b/platform/msm8996/include/platform/partial_goods.h
similarity index 96%
rename from platform/thulium/include/platform/partial_goods.h
rename to platform/msm8996/include/platform/partial_goods.h
index 03c16ec..926c0c6 100644
--- a/platform/thulium/include/platform/partial_goods.h
+++ b/platform/msm8996/include/platform/partial_goods.h
@@ -9,7 +9,7 @@
  *     copyright notice, this list of conditions and the following
  *     disclaimer in the documentation and/or other materials provided
  *     with the distribution.
- *   * Neither the name of The Linux Foundation. nor the names of its
+ *   * Neither the name of The Linux Foundation nor the names of its
  *     contributors may be used to endorse or promote products derived
  *     from this software without specific prior written permission.
  *

platform/msm8996/msm8996-clock.c

diff --git a/platform/thulium/thulium-clock.c b/platform/msm8996/msm8996-clock.c
similarity index 98%
rename from platform/thulium/thulium-clock.c
rename to platform/msm8996/msm8996-clock.c
index d0a23ed..c082dc5 100644
--- a/platform/thulium/thulium-clock.c
+++ b/platform/msm8996/msm8996-clock.c
@@ -405,7 +405,7 @@
 
 
 /* Clock lookup table */
-static struct clk_lookup msm_thulium_clocks[] =
+static struct clk_lookup msm_msm8996_clocks[] =
 {
 	CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
 	CLK_LOOKUP("sdc1_core_clk",  gcc_sdcc1_apps_clk.c),
@@ -428,5 +428,5 @@
 
 void platform_clock_init(void)
 {
-	clk_init(msm_thulium_clocks, ARRAY_SIZE(msm_thulium_clocks));
+	clk_init(msm_msm8996_clocks, ARRAY_SIZE(msm_msm8996_clocks));
 }

platform/msm8996/platform.c

diff --git a/platform/thulium/platform.c b/platform/msm8996/platform.c
similarity index 83%
rename from platform/thulium/platform.c
rename to platform/msm8996/platform.c
index def91a1..a1c2dde 100644
--- a/platform/thulium/platform.c
+++ b/platform/msm8996/platform.c
@@ -13,17 +13,17 @@
  *       contributors may be used to endorse or promote products derived
  *       from this software without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 #include <debug.h>

platform/msm8996/rules.mk

diff --git a/platform/thulium/rules.mk b/platform/msm8996/rules.mk
similarity index 94%
rename from platform/thulium/rules.mk
rename to platform/msm8996/rules.mk
index 10afc50..8db37d5 100644
--- a/platform/thulium/rules.mk
+++ b/platform/msm8996/rules.mk
@@ -20,7 +20,7 @@
 OBJS += \
 	$(LOCAL_DIR)/platform.o \
 	$(LOCAL_DIR)/acpuclock.o \
-	$(LOCAL_DIR)/thulium-clock.o \
+	$(LOCAL_DIR)/msm8996-clock.o \
 	$(LOCAL_DIR)/gpio.o
 
 LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld

platform/msm_shared/mdp5.c

diff --git a/platform/msm_shared/mdp5.c b/platform/msm_shared/mdp5.c
index 9978e3a..b48efb7 100755
--- a/platform/msm_shared/mdp5.c
+++ b/platform/msm_shared/mdp5.c
@@ -565,6 +565,9 @@
 	if (pinfo->lcdc.split_display)
 		adjust_xres /= 2;
 
+	if (pinfo->fbc.enabled && pinfo->fbc.comp_ratio)
+		adjust_xres /= pinfo->fbc.comp_ratio;
+
 	/*
 	 * Fetch should always be outside the active lines. If the fetching
 	 * is programmed within active region, hardware behavior is unknown.

platform/msm_shared/mmc_wrapper.c

diff --git a/platform/msm_shared/mmc_wrapper.c b/platform/msm_shared/mmc_wrapper.c
index 11d50cf..23fbd05 100755
--- a/platform/msm_shared/mmc_wrapper.c
+++ b/platform/msm_shared/mmc_wrapper.c
@@ -636,6 +636,11 @@
 			/* Write protect api takes the size in bytes, convert size to bytes */
 			size = card->wp_grp_size * block_size;
 		}
+		else
+		{
+			size *= block_size;
+		}
+
 		/* Set the power on WP bit */
 		return mmc_set_clr_power_on_wp_user((struct mmc_device *)dev, (ptn / block_size), size, set_clr);
 	}

platform/msm_shared/rules.mk

diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index 2454c9c..7e2cb3a 100644
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -499,7 +499,7 @@
 			$(LOCAL_DIR)/mipi_dsi_autopll.o
 endif
 
-ifeq ($(PLATFORM),thulium)
+ifeq ($(PLATFORM),msm8996)
 	OBJS += $(LOCAL_DIR)/qtimer.o \
 			$(LOCAL_DIR)/qtimer_mmap.o \
 			$(LOCAL_DIR)/interrupts.o \
@@ -534,6 +534,24 @@
 			$(LOCAL_DIR)/dme.o
 endif
 
+ifeq ($(PLATFORM),msm8952)
+	OBJS += $(LOCAL_DIR)/qgic.o \
+			$(LOCAL_DIR)/qtimer.o \
+			$(LOCAL_DIR)/qtimer_mmap.o \
+			$(LOCAL_DIR)/interrupts.o \
+			$(LOCAL_DIR)/clock.o \
+			$(LOCAL_DIR)/clock_pll.o \
+			$(LOCAL_DIR)/clock_lib2.o \
+			$(LOCAL_DIR)/uart_dm.o \
+			$(LOCAL_DIR)/board.o \
+			$(LOCAL_DIR)/spmi.o \
+			$(LOCAL_DIR)/bam.o \
+			$(LOCAL_DIR)/qpic_nand.o \
+			$(LOCAL_DIR)/scm.o \
+			$(LOCAL_DIR)/dev_tree.o \
+			$(LOCAL_DIR)/gpio.o
+endif
+
 ifeq ($(ENABLE_BOOT_CONFIG_SUPPORT), 1)
 	OBJS += \
 		$(LOCAL_DIR)/boot_device.o

platform/msm_shared/smem.h

diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index b3b6fed..f6e85a0 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -54,6 +54,7 @@
 {
 	SMEM_RAM_PTABLE_VERSION_0,
 	SMEM_RAM_PTABLE_VERSION_1,
+	SMEM_RAM_PTABLE_VERSION_2,
 };
 
 struct smem_proc_comm {
@@ -550,6 +551,21 @@
 	uint32_t reserved5;     /* Reserved for future use */
 } __attribute__ ((__packed__));
 
+struct smem_ram_ptn_v2 {
+	char name[RAM_PART_NAME_LENGTH];
+	uint64_t start;
+	uint64_t size;
+	uint32_t attr;          /* RAM Partition attribute: READ_ONLY, READWRITE etc.*/
+	uint32_t category;      /* RAM Partition category: EBI0, EBI1, IRAM, IMEM */
+	uint32_t domain;        /* RAM Partition domain: APPS, MODEM, APPS & MODEM (SHARED) etc. */
+	uint32_t type;          /* RAM Partition type: system, bootloader, appsboot, apps etc. */
+	uint32_t num_partitions;/* Number of memory partitions */
+	uint32_t hw_info;       /* hw information such as type and frequency */
+	uint64_t available_length; /* Available partition length in RAM in bytes */
+	uint64_t reserved4;
+	uint64_t reserved5;     /* Reserved for future use */
+} __attribute__ ((__packed__));
+
 struct smem_ram_ptable {
 	unsigned magic[2];
 	unsigned version;
@@ -573,6 +589,12 @@
 	struct smem_ram_ptn_v1 parts[RAM_NUM_PART_ENTRIES];
 } __attribute__ ((__packed__));
 
+struct smem_ram_ptable_v2 {
+	struct smem_ram_ptable_hdr hdr;
+	uint32_t reserved2;     /* Added for 8 bytes alignment of header */
+	struct smem_ram_ptn_v2 parts[RAM_NUM_PART_ENTRIES];
+} __attribute__ ((__packed__));
+
 /* Power on reason/status info */
 #define PWR_ON_EVENT_RTC_ALARM 0x2
 #define PWR_ON_EVENT_USB_CHG   0x20
@@ -601,8 +623,8 @@
 	struct smem_ptn parts[SMEM_PTABLE_MAX_PARTS];
 } __attribute__ ((__packed__));
 
-typedef struct smem_ram_ptable_v1 ram_partition_table;
-typedef struct smem_ram_ptn_v1 ram_partition;
+typedef struct smem_ram_ptable_v2 ram_partition_table;
+typedef struct smem_ram_ptn_v2 ram_partition;
 
 unsigned smem_read_alloc_entry_offset(smem_mem_type_t type, void *buf, int len, int offset);
 int smem_ram_ptable_init(struct smem_ram_ptable *smem_ram_ptable);
@@ -611,4 +633,5 @@
 uint32_t smem_get_ram_ptable_version(void);
 uint32_t smem_get_ram_ptable_len(void);
 void* smem_get_alloc_entry(smem_mem_type_t type, uint32_t* size);
+uint32_t get_ddr_start();
 #endif				/* __PLATFORM_MSM_SHARED_SMEM_H */

platform/msm_shared/smem_ptable.c

diff --git a/platform/msm_shared/smem_ptable.c b/platform/msm_shared/smem_ptable.c
index fd27e10..23528ff 100644
--- a/platform/msm_shared/smem_ptable.c
+++ b/platform/msm_shared/smem_ptable.c
@@ -2,7 +2,7 @@
  * Copyright (c) 2009, Google Inc.
  * All rights reserved.
  *
- * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2012,2015 The Linux Foundation. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -35,6 +35,7 @@
 #include <platform/iomap.h>
 #include <lib/ptable.h>
 
+#include "board.h"
 #include "smem.h"
 
 
@@ -154,18 +155,34 @@
 
 static void smem_copy_ram_ptable(void *buf)
 {
-	struct smem_ram_ptable *table_v0;
-	struct smem_ram_ptable_v1 *table_v1;
+	struct smem_ram_ptable *table_v0 = NULL;
+	struct smem_ram_ptable_v1 *table_v1 = NULL;
+	struct smem_ram_ptable_v2 *table_v2 = NULL;
 	uint32_t pentry = 0;
 
 	ptable.hdr = *(struct smem_ram_ptable_hdr*)buf;
 
 	/* Perform member to member copy from smem_ram_ptable to wrapper struct ram_ptable */
+	if(ptable.hdr.version == SMEM_RAM_PTABLE_VERSION_2)
+	{
+		table_v2 = (struct smem_ram_ptable_v2*)buf;
+
+		memcpy(&ptable, table_v2, sizeof(ram_partition_table));
+	}
 	if(ptable.hdr.version == SMEM_RAM_PTABLE_VERSION_1)
 	{
 		table_v1 = (struct smem_ram_ptable_v1*)buf;
 
-		memcpy(&ptable, table_v1, sizeof(ram_partition_table));
+		for(pentry = 0; pentry < ((struct smem_ram_ptable_hdr*)buf)->len; pentry++)
+		{
+			ptable.parts[pentry].start          = table_v1->parts[pentry].start;
+			ptable.parts[pentry].size           = table_v1->parts[pentry].size;
+			ptable.parts[pentry].attr           = table_v1->parts[pentry].attr;
+			ptable.parts[pentry].category       = table_v1->parts[pentry].category;
+			ptable.parts[pentry].domain         = table_v1->parts[pentry].domain;
+			ptable.parts[pentry].type           = table_v1->parts[pentry].type;
+			ptable.parts[pentry].num_partitions = table_v1->parts[pentry].num_partitions;
+		}
 	}
 	else if(ptable.hdr.version == SMEM_RAM_PTABLE_VERSION_0)
 	{
@@ -214,7 +231,7 @@
 }
 
 /* RAM Partition table from SMEM */
-static uint32_t buffer[sizeof(struct smem_ram_ptable_v1)];
+static uint32_t buffer[sizeof(struct smem_ram_ptable_v2)];
 int smem_ram_ptable_init_v1()
 {
 	uint32_t i;
@@ -232,6 +249,8 @@
 	if(ret)
 		return 0;
 
+	if(version == SMEM_RAM_PTABLE_VERSION_2)
+		smem_ram_ptable_size = sizeof(struct smem_ram_ptable_v2);
 	if(version == SMEM_RAM_PTABLE_VERSION_1)
 		smem_ram_ptable_size = sizeof(struct smem_ram_ptable_v1);
 	else if(version == SMEM_RAM_PTABLE_VERSION_0)
@@ -276,3 +295,32 @@
 {
 	return ptable.hdr.version;
 }
+
+uint32_t get_ddr_start()
+{
+	uint32_t i;
+	ram_partition ptn_entry;
+	uint32_t len = 0;
+
+	ASSERT(smem_ram_ptable_init_v1());
+
+	len = smem_get_ram_ptable_len();
+
+	/* Determine the Start addr of the DDR RAM */
+	for(i = 0; i < len; i++)
+	{
+		smem_get_ram_ptable_entry(&ptn_entry, i);
+		if(ptn_entry.type == SYS_MEMORY)
+		{
+			if((ptn_entry.category == SDRAM) ||
+			   (ptn_entry.category == IMEM))
+			{
+				/* Check to ensure that start address is 1MB aligned */
+				ASSERT((ptn_entry.start & (MB-1)) == 0);
+				return ptn_entry.start;
+			}
+		}
+	}
+	ASSERT("DDR Start Mem Not found\n");
+	return 0;
+}

project/msm8952.mk

diff --git a/project/msm8952.mk b/project/msm8952.mk
new file mode 100644
index 0000000..926697c
--- /dev/null
+++ b/project/msm8952.mk
@@ -0,0 +1,60 @@
+# top level project rules for the MSM8952 project
+#
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+TARGET := msm8952
+
+MODULES += app/aboot
+
+ifeq ($(TARGET_BUILD_VARIANT),user)
+DEBUG := 0
+else
+DEBUG := 1
+endif
+
+EMMC_BOOT := 1
+
+#ENABLE_SMD_SUPPORT := 1
+#ENABLE_PWM_SUPPORT := true
+
+#DEFINES += WITH_DEBUG_DCC=1
+DEFINES += WITH_DEBUG_LOG_BUF=1
+DEFINES += WITH_DEBUG_UART=1
+#DEFINES += WITH_DEBUG_FBCON=1
+DEFINES += DEVICE_TREE=1
+#DEFINES += MMC_BOOT_BAM=1
+#DEFINES += CRYPTO_BAM=1
+DEFINES += SPMI_CORE_V2=1
+DEFINES += ABOOT_IGNORE_BOOT_HEADER_ADDRS=1
+
+#DEFINES += BAM_V170=1
+
+#Enable the feature of long press power on
+#DEFINES += LONG_PRESS_POWER_ON=1
+
+#Disable thumb mode
+ENABLE_THUMB := false
+
+#ENABLE_SDHCI_SUPPORT := 1
+
+ifeq ($(ENABLE_SDHCI_SUPPORT),1)
+DEFINES += MMC_SDHCI_SUPPORT=1
+endif
+
+#enable power on vibrator feature
+#ENABLE_PON_VIB_SUPPORT := true
+
+ifeq ($(EMMC_BOOT),1)
+DEFINES += _EMMC_BOOT=1
+endif
+
+ifeq ($(ENABLE_PON_VIB_SUPPORT),true)
+DEFINES += PON_VIB_SUPPORT=1
+endif
+
+ifeq ($(ENABLE_SMD_SUPPORT),1)
+DEFINES += SMD_SUPPORT=1
+endif
+
+#SCM call before entering DLOAD mode
+DEFINES += PLATFORM_USE_SCM_DLOAD=1

project/msm8996.mk

diff --git a/project/thulium.mk b/project/msm8996.mk
similarity index 94%
rename from project/thulium.mk
rename to project/msm8996.mk
index 4d9bb5e..a78e6b4 100644
--- a/project/thulium.mk
+++ b/project/msm8996.mk
@@ -1,8 +1,8 @@
-# top level project rules for the thulium project
+# top level project rules for the msm8996 project
 #
 LOCAL_DIR := $(GET_LOCAL_DIR)
 
-TARGET := thulium
+TARGET := msm8996
 
 MODULES += app/aboot
 

scripts/buildall

diff --git a/scripts/buildall b/scripts/buildall
index c355387..38db25e 100755
--- a/scripts/buildall
+++ b/scripts/buildall
@@ -1,6 +1,6 @@
 #!/bin/sh
 
-PROJECTS="msm8226 msm8974 apq8084 msm8994 mdm9630 mdm9640 msm8610 msm8916 thulium"
+PROJECTS="msm8226 msm8974 apq8084 msm8994 mdm9630 mdm9640 msm8610 msm8916 msm8996"
 FAILED=""
 
 for p in $PROJECTS; do

target/mdm9640/init.c

diff --git a/target/mdm9640/init.c b/target/mdm9640/init.c
index adaccfd..09dedef 100644
--- a/target/mdm9640/init.c
+++ b/target/mdm9640/init.c
@@ -182,7 +182,10 @@
 	 * This call should be based on the pmic version
 	 * when PM8019 v2 is available.
 	 */
-	pm8x41_v2_reset_configure(PON_PSHOLD_WARM_RESET);
+	if (reboot_reason)
+		pm8x41_v2_reset_configure(PON_PSHOLD_WARM_RESET);
+	else
+		pm8x41_v2_reset_configure(PON_PSHOLD_HARD_RESET);
 
 	/* Drop PS_HOLD for MSM */
 	writel(0x00, MPM2_MPM_PS_HOLD);

target/msm8916/init.c

diff --git a/target/msm8916/init.c b/target/msm8916/init.c
index 3ef6917..f0f6bba 100644
--- a/target/msm8916/init.c
+++ b/target/msm8916/init.c
@@ -287,7 +287,7 @@
 	{
 		{ SDC1_CLK_HDRV_CTL_OFF,  TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, 0},
 		{ SDC1_CMD_HDRV_CTL_OFF,  TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, 0},
-		{ SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_6MA, TLMM_HDRV_MASK , 0},
+		{ SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , 0},
 	};
 
 	/* Pull configs for sdc pins */

target/msm8952/init.c

diff --git a/target/msm8952/init.c b/target/msm8952/init.c
new file mode 100644
index 0000000..c61c631
--- /dev/null
+++ b/target/msm8952/init.c
@@ -0,0 +1,321 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <platform/iomap.h>
+#include <reg.h>
+#include <target.h>
+#include <platform.h>
+#include <uart_dm.h>
+#include <mmc.h>
+#include <platform/gpio.h>
+#include <dev/keys.h>
+#include <spmi_v2.h>
+#include <pm8x41.h>
+#include <board.h>
+#include <baseband.h>
+#include <hsusb.h>
+#include <scm.h>
+#include <platform/gpio.h>
+#include <platform/gpio.h>
+#include <platform/irqs.h>
+#include <platform/clock.h>
+#include <crypto5_wrapper.h>
+#include <partition_parser.h>
+#include <stdlib.h>
+
+#if LONG_PRESS_POWER_ON
+#include <shutdown_detect.h>
+#endif
+
+#define PMIC_ARB_CHANNEL_NUM    0
+#define PMIC_ARB_OWNER_ID       0
+#define TLMM_VOL_UP_BTN_GPIO    85
+
+#define FASTBOOT_MODE           0x77665500
+#define PON_SOFT_RB_SPARE       0x88F
+
+static uint32_t mmc_sdc_base[] =
+	{ MSM_SDC1_BASE, MSM_SDC2_BASE };
+
+
+void target_early_init(void)
+{
+#if WITH_DEBUG_UART
+	uart_dm_init(1, 0, BLSP1_UART1_BASE);
+#endif
+}
+
+void target_mmc_caps(struct mmc_host *host)
+{
+	host->caps.ddr_mode = 0;
+	host->caps.hs200_mode = 0;
+	host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
+	host->caps.hs_clk_rate = MMC_CLK_50MHZ;
+}
+
+/* Return 1 if vol_up pressed */
+static int target_volume_up()
+{
+	uint8_t status = 0;
+
+	gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE);
+
+	/* Wait for the gpio config to take effect - debounce time */
+	thread_sleep(10);
+
+	/* Get status of GPIO */
+	status = gpio_status(TLMM_VOL_UP_BTN_GPIO);
+
+	/* Active high signal. */
+	return status;
+}
+
+/* Return 1 if vol_down pressed */
+uint32_t target_volume_down()
+{
+	/* Volume down button tied in with PMIC RESIN. */
+	return pm8x41_resin_status();
+}
+
+static void target_keystatus()
+{
+	keys_init();
+
+	if(target_volume_down())
+		keys_post_event(KEY_VOLUMEDOWN, 1);
+
+	if(target_volume_up())
+		keys_post_event(KEY_VOLUMEUP, 1);
+}
+
+/* Configure PMIC and Drop PS_HOLD for shutdown */
+void shutdown_device()
+{
+	dprintf(CRITICAL, "Going down for shutdown.\n");
+
+	/* Configure PMIC for shutdown */
+	pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
+
+	/* Drop PS_HOLD for MSM */
+	writel(0x00, MPM2_MPM_PS_HOLD);
+
+	mdelay(5000);
+
+	dprintf(CRITICAL, "shutdown failed\n");
+
+	ASSERT(0);
+}
+
+
+void target_init(void)
+{
+	uint32_t base_addr;
+	uint8_t slot;
+
+	dprintf(INFO, "target_init()\n");
+
+	spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
+
+	target_keystatus();
+
+	/* Trying Slot 1*/
+	slot = 1;
+	base_addr = mmc_sdc_base[slot - 1];
+	if (mmc_boot_main(slot, base_addr))
+	{
+
+	/* Trying Slot 2 next */
+	slot = 2;
+	base_addr = mmc_sdc_base[slot - 1];
+	if (mmc_boot_main(slot, base_addr)) {
+		dprintf(CRITICAL, "mmc init failed!");
+		ASSERT(0);
+		}
+	}
+#if LONG_PRESS_POWER_ON
+	shutdown_detect();
+#endif
+}
+
+void target_serialno(unsigned char *buf)
+{
+	uint32_t serialno;
+	if (target_is_emmc_boot()) {
+		serialno = mmc_get_psn();
+		snprintf((char *)buf, 13, "%x", serialno);
+	}
+}
+
+unsigned board_machtype(void)
+{
+	return LINUX_MACHTYPE_UNKNOWN;
+}
+
+/* Detect the target type */
+void target_detect(struct board_data *board)
+{
+	/* This is already filled as part of board.c */
+}
+
+/* Detect the modem type */
+void target_baseband_detect(struct board_data *board)
+{
+	uint32_t platform;
+
+	platform = board->platform;
+
+	switch(platform) {
+	case MSM8952:
+	case MSM8956:
+	case MSM8976:
+		board->baseband = BASEBAND_MSM;
+		break;
+	default:
+		dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
+		ASSERT(0);
+	};
+}
+
+unsigned target_baseband()
+{
+	return board_baseband();
+}
+
+unsigned check_reboot_mode(void)
+{
+	uint32_t restart_reason = 0;
+
+	/* Read reboot reason and scrub it */
+	restart_reason = readl(RESTART_REASON_ADDR);
+	writel(0x00, RESTART_REASON_ADDR);
+
+	return restart_reason;
+}
+
+unsigned check_hard_reboot_mode(void)
+{
+	uint8_t hard_restart_reason = 0;
+	uint8_t value = 0;
+
+	/* Read reboot reason and scrub it
+	  * Bit-5, bit-6 and bit-7 of SOFT_RB_SPARE for hard reset reason
+	  */
+	value = pm8x41_reg_read(PON_SOFT_RB_SPARE);
+	hard_restart_reason = value >> 5;
+	pm8x41_reg_write(PON_SOFT_RB_SPARE, value & 0x1f);
+
+	return hard_restart_reason;
+}
+
+int set_download_mode(enum dload_mode mode)
+{
+	int ret = 0;
+	ret = scm_dload_mode(mode);
+
+	pm8x41_clear_pmic_watchdog();
+
+	return ret;
+}
+
+int emmc_recovery_init(void)
+{
+	return _emmc_recovery_init();
+}
+
+void reboot_device(unsigned reboot_reason)
+{
+	uint8_t reset_type = 0;
+	uint32_t ret = 0;
+
+	/* Need to clear the SW_RESET_ENTRY register and
+	 * write to the BOOT_MISC_REG for known reset cases
+	 */
+	if(reboot_reason != DLOAD)
+		scm_dload_mode(NORMAL_MODE);
+
+	writel(reboot_reason, RESTART_REASON_ADDR);
+
+	/* For Reboot-bootloader and Dload cases do a warm reset
+	 * For Reboot cases do a hard reset
+	 */
+	if((reboot_reason == FASTBOOT_MODE) || (reboot_reason == DLOAD))
+		reset_type = PON_PSHOLD_WARM_RESET;
+	else
+		reset_type = PON_PSHOLD_HARD_RESET;
+
+	pm8x41_reset_configure(reset_type);
+
+	ret = scm_halt_pmic_arbiter();
+	if (ret)
+		dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret);
+
+	/* Drop PS_HOLD for MSM */
+	writel(0x00, MPM2_MPM_PS_HOLD);
+
+	mdelay(5000);
+
+	dprintf(CRITICAL, "Rebooting failed\n");
+}
+
+#if USER_FORCE_RESET_SUPPORT
+/* Return 1 if it is a force resin triggered by user. */
+uint32_t is_user_force_reset(void)
+{
+	uint8_t poff_reason1 = pm8x41_get_pon_poff_reason1();
+	uint8_t poff_reason2 = pm8x41_get_pon_poff_reason2();
+
+	dprintf(SPEW, "poff_reason1: %d\n", poff_reason1);
+	dprintf(SPEW, "poff_reason2: %d\n", poff_reason2);
+	if (pm8x41_get_is_cold_boot() && (poff_reason1 == KPDPWR_AND_RESIN ||
+							poff_reason2 == STAGE3))
+		return 1;
+	else
+		return 0;
+}
+#endif
+
+unsigned target_pause_for_battery_charge(void)
+{
+	uint8_t pon_reason = pm8x41_get_pon_reason();
+	uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
+	dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
+		pon_reason, is_cold_boot);
+	/* In case of fastboot reboot,adb reboot or if we see the power key
+	* pressed we do not want go into charger mode.
+	* fastboot reboot is warm boot with PON hard reset bit not set
+	* adb reboot is a cold boot with PON hard reset bit set
+	*/
+	if (is_cold_boot &&
+			(!(pon_reason & HARD_RST)) &&
+			(!(pon_reason & KPDPWR_N)) &&
+			((pon_reason & USB_CHG) || (pon_reason & DC_CHG) || (pon_reason & CBLPWR_N)))
+		return 1;
+	else
+		return 0;
+}

target/msm8952/meminfo.c

diff --git a/target/thulium/meminfo.c b/target/msm8952/meminfo.c
similarity index 96%
rename from target/thulium/meminfo.c
rename to target/msm8952/meminfo.c
index 9aa1dd5..b2f46df 100644
--- a/target/thulium/meminfo.c
+++ b/target/msm8952/meminfo.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
@@ -64,14 +64,11 @@
 
 			if (ret)
 			{
-				dprintf(CRITICAL, "Failed to add secondary banks memory addresses\n"
-);
+				dprintf(CRITICAL, "Failed to add secondary banks memory addresses\n");
 				goto target_dev_tree_mem_err;
 			}
-
 		}
 	}
-
 target_dev_tree_mem_err:
 
 	return ret;

target/msm8952/rules.mk

diff --git a/target/msm8952/rules.mk b/target/msm8952/rules.mk
new file mode 100644
index 0000000..31d4c36
--- /dev/null
+++ b/target/msm8952/rules.mk
@@ -0,0 +1,29 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
+
+PLATFORM := msm8952
+
+MEMBASE := 0x8F600000 # SDRAM
+MEMSIZE := 0x00100000 # 1MB
+
+BASE_ADDR        := 0x80000000
+SCRATCH_ADDR     := 0x90000000
+
+MODULES += \
+	dev/keys \
+	dev/vib \
+	lib/ptable \
+	dev/pmic/pm8x41 \
+	lib/libfdt
+
+DEFINES += \
+	MEMSIZE=$(MEMSIZE) \
+	MEMBASE=$(MEMBASE) \
+	BASE_ADDR=$(BASE_ADDR) \
+	SCRATCH_ADDR=$(SCRATCH_ADDR)
+
+
+OBJS += \
+	$(LOCAL_DIR)/init.o \
+	$(LOCAL_DIR)/meminfo.o

target/msm8952/tools/makefile

diff --git a/target/msm8952/tools/makefile b/target/msm8952/tools/makefile
new file mode 100644
index 0000000..da48f0d
--- /dev/null
+++ b/target/msm8952/tools/makefile
@@ -0,0 +1,12 @@
+#Makefile to generate appsboot.mbn
+
+ifeq ($(BOOTLOADER_OUT),.)
+APPSBOOTOUT_DIR  := $(BUILDDIR)
+else
+APPSBOOTOUT_DIR  := $(BOOTLOADER_OUT)/../..
+endif
+
+APPSBOOTHEADER: emmc_appsboot.mbn
+
+emmc_appsboot.mbn: $(OUTELF_STRIP)
+	$(hide) cp -f $(OUTELF_STRIP) $(APPSBOOTOUT_DIR)/emmc_appsboot.mbn

target/msm8996/init.c

diff --git a/target/thulium/init.c b/target/msm8996/init.c
similarity index 93%
rename from target/thulium/init.c
rename to target/msm8996/init.c
index 0d640db..c2c0738 100644
--- a/target/thulium/init.c
+++ b/target/msm8996/init.c
@@ -415,3 +415,23 @@
 
 	crypto_init_params(&ce_params);
 }
+
+unsigned target_pause_for_battery_charge(void)
+{
+	uint8_t pon_reason = pm8x41_get_pon_reason();
+	uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
+	dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
+		pon_reason, is_cold_boot);
+	/* In case of fastboot reboot,adb reboot or if we see the power key
+	* pressed we do not want go into charger mode.
+	* fastboot reboot is warm boot with PON hard reset bit not set
+	* adb reboot is a cold boot with PON hard reset bit set
+	*/
+	if (is_cold_boot &&
+			(!(pon_reason & HARD_RST)) &&
+			(!(pon_reason & KPDPWR_N)) &&
+			((pon_reason & PON1)))
+		return 1;
+	else
+		return 0;
+}

target/msm8996/meminfo.c

diff --git a/target/thulium/meminfo.c b/target/msm8996/meminfo.c
similarity index 91%
copy from target/thulium/meminfo.c
copy to target/msm8996/meminfo.c
index 9aa1dd5..c65525f 100644
--- a/target/thulium/meminfo.c
+++ b/target/msm8996/meminfo.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
@@ -41,6 +41,7 @@
 	unsigned int index;
 	int ret = 0;
 	uint32_t len = 0;
+	uint64_t size = 0;
 
 	/* Make sure RAM partition table is initialized */
 	ASSERT(smem_ram_ptable_init_v1());
@@ -56,11 +57,16 @@
 			(ptn_entry.type == SYS_MEMORY))
 		{
 
+			if (smem_get_ram_ptable_version() == SMEM_RAM_PTABLE_VERSION_2)
+				size = ptn_entry.available_length;
+			else
+				size = ptn_entry.size;
+
 			/* Pass along all other usable memory regions to Linux */
 			ret = dev_tree_add_mem_info(fdt,
 							memory_node_offset,
 							ptn_entry.start,
-							ptn_entry.size);
+							size);
 
 			if (ret)
 			{

target/msm8996/rules.mk

diff --git a/target/thulium/rules.mk b/target/msm8996/rules.mk
similarity index 97%
rename from target/thulium/rules.mk
rename to target/msm8996/rules.mk
index 982f4ee..28ab538 100644
--- a/target/thulium/rules.mk
+++ b/target/msm8996/rules.mk
@@ -2,7 +2,7 @@
 
 INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
 
-PLATFORM := thulium
+PLATFORM := msm8996
 
 MEMBASE := 0x8F000000 # SDRAM
 MEMSIZE := 0x00200000 # 2MB

target/msm8996/tools/makefile

diff --git a/target/thulium/tools/makefile b/target/msm8996/tools/makefile
similarity index 100%
rename from target/thulium/tools/makefile
rename to target/msm8996/tools/makefile