dev: gcdb: display: roundup the pixel clock for msm8996
The pixel clock value for msm8996 is used to generate the
n2 divider. This n2 divider is rounded off based on bitclock
rate. The pixel clock rate without roundoff generates the
invalid n2 divider and causes the display boot up failure.
Change-Id: I12990ddea7a08cf14a44b72435af8fecb8668613
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
index b78cecc..562ca0b 100755
--- a/dev/gcdb/display/gcdb_autopll.c
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -242,10 +242,17 @@
}
#endif
-static uint32_t calculate_vco_thulium()
+static uint32_t calculate_vco_thulium(uint8_t bpp, uint8_t lanes)
{
uint32_t rate;
uint32_t mod;
+ int bpp_lane;
+
+ /* round up the pixel clock to get the correct n2 div */
+ bpp_lane = bpp / lanes;
+ mod = pll_data.bit_clock % bpp_lane;
+ if (mod)
+ pll_data.pixel_clock++;
pll_data.vco_min = MIN_THULIUM_VCO_RATE;
pll_data.vco_max = MAX_THULIUM_VCO_RATE;