[msm8x60]: Add support for msm8x60 in LK
-- Adds new project for msm8660_surf
-- Adds new platform for msm8x60
-- Adds support for Generic Interrupt Controller (GIC)
Change-Id: Ide4baba25dad6b799f835a29ea158035ab8f5ff0
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
old mode 100644
new mode 100755
index 95d9180..3b220d0
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -185,6 +185,7 @@
arch_disable_cache(UCACHE);
arch_disable_mmu();
+ secondary_core((unsigned)kernel);
entry(0, machtype, tags);
}
@@ -196,6 +197,79 @@
static unsigned char buf[4096]; //Equal to max-supported pagesize
+int boot_linux_from_mmc(void)
+{
+ struct boot_img_hdr *hdr = (void*) buf;
+ struct boot_img_hdr *uhdr;
+ unsigned offset = 0;
+ unsigned long long ptn = 0;
+ unsigned n = 0;
+ const char *cmdline;
+
+ uhdr = (struct boot_img_hdr *)EMMC_BOOT_IMG_HEADER_ADDR;
+ if (!memcmp(uhdr->magic, BOOT_MAGIC, BOOT_MAGIC_SIZE)) {
+ dprintf(INFO, "Unified boot method!\n");
+ hdr = uhdr;
+ goto unified_boot;
+ }
+
+ ptn = mmc_ptn_offset("boot");
+ if(ptn == 0) {
+ dprintf(CRITICAL, "ERROR: No boot partition found\n");
+ return -1;
+ }
+
+ if (mmc_read(ptn + offset, (unsigned int *)buf, page_size)) {
+ dprintf(CRITICAL, "ERROR: Cannot read boot image header\n");
+ return -1;
+ }
+ offset += page_size;
+
+ if (memcmp(hdr->magic, BOOT_MAGIC, BOOT_MAGIC_SIZE)) {
+ dprintf(CRITICAL, "ERROR: Invaled boot image header\n");
+ return -1;
+ }
+
+ if (hdr->page_size != page_size) {
+ dprintf(CRITICAL, "ERROR: Invaled boot image pagesize. Device pagesize: %d, Image pagesize: %d\n",page_size,hdr->page_size);
+ return -1;
+ }
+
+ n = ROUND_TO_PAGE(hdr->kernel_size, page_mask);
+ if (mmc_read(ptn + offset, (void *)hdr->kernel_addr, n)) {
+ dprintf(CRITICAL, "ERROR: Cannot read kernel image\n");
+ return -1;
+ }
+ offset += n;
+
+ n = ROUND_TO_PAGE(hdr->ramdisk_size, page_mask);
+ if (mmc_read(ptn + offset, (void *)hdr->ramdisk_addr, n)) {
+ dprintf(CRITICAL, "ERROR: Cannot read ramdisk image\n");
+ return -1;
+ }
+ offset += n;
+
+unified_boot:
+ dprintf(INFO, "\nkernel @ %x (%d bytes)\n", hdr->kernel_addr,
+ hdr->kernel_size);
+ dprintf(INFO, "ramdisk @ %x (%d bytes)\n", hdr->ramdisk_addr,
+ hdr->ramdisk_size);
+
+ if(hdr->cmdline[0]) {
+ cmdline = (char*) hdr->cmdline;
+ } else {
+ cmdline = DEFAULT_CMDLINE;
+ }
+ dprintf(INFO, "cmdline = '%s'\n", cmdline);
+
+ dprintf(INFO, "\nBooting Linux\n");
+ boot_linux((void *)hdr->kernel_addr, (void *)TAGS_ADDR,
+ (const char *)cmdline, board_machtype(),
+ (void *)hdr->ramdisk_addr, hdr->ramdisk_size);
+
+ return 0;
+}
+
int boot_linux_from_flash(void)
{
struct boot_img_hdr *hdr = (void*) buf;
@@ -368,6 +442,30 @@
fastboot_okay("");
}
+void cmd_flash_mmc(const char *arg, void *data, unsigned sz)
+{
+ unsigned long long ptn = 0;
+ ptn = mmc_ptn_offset(arg);
+ if(ptn == 0) {
+ fastboot_fail("partition table doesn't exist");
+ return;
+ }
+
+ if (!strcmp(arg, "boot") || !strcmp(arg, "recovery")) {
+ if (memcmp((void *)data, BOOT_MAGIC, BOOT_MAGIC_SIZE)) {
+ fastboot_fail("image is not a boot image");
+ return;
+ }
+ }
+
+ if (mmc_write(ptn , sz, (unsigned int *)data)) {
+ fastboot_fail("flash write failure");
+ return;
+ }
+ fastboot_okay("");
+ return;
+}
+
void cmd_flash(const char *arg, void *data, unsigned sz)
{
struct ptentry *ptn;
@@ -413,8 +511,14 @@
fastboot_okay("");
target_battery_charging_enable(0, 1);
udc_stop();
-
- boot_linux_from_flash();
+ if (target_is_emmc_boot())
+ {
+ boot_linux_from_mmc();
+ }
+ else
+ {
+ boot_linux_from_flash();
+ }
}
void cmd_reboot(const char *arg, void *data, unsigned sz)
@@ -440,23 +544,32 @@
dprintf(INFO, "Diplay initialized\n");
disp_init = 1;
#endif
- page_size = flash_page_size();
- page_mask = page_size - 1;
- if (keys_get_state(KEY_HOME) != 0)
- boot_into_recovery = 1;
- if (keys_get_state(KEY_BACK) != 0)
- goto fastboot;
- if (keys_get_state(KEY_CLEAR) != 0)
- goto fastboot;
-
- reboot_mode = check_reboot_mode();
- if (reboot_mode == RECOVERY_MODE){
- boot_into_recovery = 1;
- }else if(reboot_mode == FASTBOOT_MODE){
- goto fastboot;
+ if (target_is_emmc_boot())
+ {
+ page_size = 2048;
+ page_mask = page_size - 1;
+ boot_linux_from_mmc();
}
- recovery_init();
- boot_linux_from_flash();
+ else
+ {
+ page_size = flash_page_size();
+ page_mask = page_size - 1;
+ if (keys_get_state(KEY_HOME) != 0)
+ boot_into_recovery = 1;
+ if (keys_get_state(KEY_BACK) != 0)
+ goto fastboot;
+ if (keys_get_state(KEY_CLEAR) != 0)
+ goto fastboot;
+
+ reboot_mode = check_reboot_mode();
+ if (reboot_mode == RECOVERY_MODE){
+ boot_into_recovery = 1;
+ }else if(reboot_mode == FASTBOOT_MODE){
+ goto fastboot;
+ }
+ recovery_init();
+ boot_linux_from_flash();
+ }
dprintf(CRITICAL, "ERROR: Could not do normal boot. Reverting "
"to fastboot mode.\n");
@@ -471,8 +584,15 @@
fastboot_register("boot", cmd_boot);
fastboot_register("erase:", cmd_erase);
- fastboot_register("flash:", cmd_flash);
- fastboot_register("continue", cmd_continue);
+ if (target_is_emmc_boot())
+ {
+ fastboot_register("flash:", cmd_flash_mmc);
+ }
+ else
+ {
+ fastboot_register("flash:", cmd_flash);
+ }
+ fastboot_register("continue", cmd_continue);
fastboot_register("reboot", cmd_reboot);
fastboot_register("reboot-bootloader", cmd_reboot_bootloader);
fastboot_publish("product", "swordfish");
diff --git a/platform/init.c b/platform/init.c
index 30b9324..c6982da 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -44,3 +44,7 @@
__WEAK void display_init(void)
{
}
+
+__WEAK void secondary_core(unsigned sec_entry)
+{
+}
diff --git a/platform/msm8x60/acpuclock.c b/platform/msm8x60/acpuclock.c
new file mode 100755
index 0000000..cfe1be8
--- /dev/null
+++ b/platform/msm8x60/acpuclock.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Code Aurora nor
+ * the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdint.h>
+#include <debug.h>
+#include <kernel/thread.h>
+#include <platform/iomap.h>
+#include <reg.h>
+
+void acpu_clock_init (void)
+{
+}
diff --git a/platform/msm8x60/include/platform/iomap.h b/platform/msm8x60/include/platform/iomap.h
new file mode 100755
index 0000000..fa642c8
--- /dev/null
+++ b/platform/msm8x60/include/platform/iomap.h
@@ -0,0 +1,58 @@
+/* Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM8X60_IOMAP_H_
+#define _PLATFORM_MSM8X60_IOMAP_H_
+
+#define MSM_UART3_BASE 0xA9C00000
+
+#define MSM_VIC_BASE 0x02080000
+#define MSM_TMR_BASE 0x02000000
+#define MSM_GPT_BASE (MSM_TMR_BASE + 0x04)
+#define MSM_CSR_BASE 0x02081000
+#define MSM_GCC_BASE 0x02082000
+#define MSM_ACC0_BASE 0x02041000
+#define MSM_ACC1_BASE 0x02051000
+
+
+#define MSM_GIC_CPU_BASE 0x02081000
+#define MSM_GIC_DIST_BASE 0x02080000
+
+#define MSM_SDC1_BASE 0x12400000
+#define MMC_BOOT_MCI_BASE MSM_SDC1_BASE
+
+#if defined(PLATFORM_MSM8X60)
+#define MSM_SHARED_BASE 0x00000000
+#else
+#define MSM_SHARED_BASE 0x01F00000
+#endif
+#endif
diff --git a/platform/msm8x60/include/platform/irqs.h b/platform/msm8x60/include/platform/irqs.h
new file mode 100755
index 0000000..2cfc93a
--- /dev/null
+++ b/platform/msm8x60/include/platform/irqs.h
@@ -0,0 +1,54 @@
+/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Code Aurora nor
+ * the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_8x60_H
+#define __ASM_ARCH_MSM_IRQS_8x60_H
+
+/* MSM ACPU Interrupt Numbers */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 0)
+
+#define USB1_HS_IRQ (GIC_SPI_START + 100)
+#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
+#define USB2_IRQ (GIC_SPI_START + 141)
+#define USB1_IRQ (GIC_SPI_START + 142)
+
+
+
+/* Retrofit universal macro names */
+#define INT_USB_HS USB1_HS_IRQ
+
+#define NR_MSM_IRQS 256
+#define NR_GPIO_IRQS 173
+#define NR_BOARD_IRQS 0
+
+#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
+
+#endif /* __ASM_ARCH_MSM_IRQS_8x60_H */
diff --git a/platform/msm8x60/interrupts.c b/platform/msm8x60/interrupts.c
new file mode 100755
index 0000000..8118981
--- /dev/null
+++ b/platform/msm8x60/interrupts.c
@@ -0,0 +1,187 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <arch/arm.h>
+#include <reg.h>
+#include <kernel/thread.h>
+#include <platform/interrupts.h>
+
+#include <platform/irqs.h>
+#include <platform/iomap.h>
+
+#define GIC_CPU_REG(off) (MSM_GIC_CPU_BASE + (off))
+#define GIC_DIST_REG(off) (MSM_GIC_DIST_BASE + (off))
+
+#define GIC_CPU_CTRL GIC_CPU_REG(0x00)
+#define GIC_CPU_PRIMASK GIC_CPU_REG(0x04)
+#define GIC_CPU_BINPOINT GIC_CPU_REG(0x08)
+#define GIC_CPU_INTACK GIC_CPU_REG(0x0c)
+#define GIC_CPU_EOI GIC_CPU_REG(0x10)
+#define GIC_CPU_RUNNINGPRI GIC_CPU_REG(0x14)
+#define GIC_CPU_HIGHPRI GIC_CPU_REG(0x18)
+
+#define GIC_DIST_CTRL GIC_DIST_REG(0x000)
+#define GIC_DIST_CTR GIC_DIST_REG(0x004)
+#define GIC_DIST_ENABLE_SET GIC_DIST_REG(0x100)
+#define GIC_DIST_ENABLE_CLEAR GIC_DIST_REG(0x180)
+#define GIC_DIST_PENDING_SET GIC_DIST_REG(0x200)
+#define GIC_DIST_PENDING_CLEAR GIC_DIST_REG(0x280)
+#define GIC_DIST_ACTIVE_BIT GIC_DIST_REG(0x300)
+#define GIC_DIST_PRI GIC_DIST_REG(0x400)
+#define GIC_DIST_TARGET GIC_DIST_REG(0x800)
+#define GIC_DIST_CONFIG GIC_DIST_REG(0xc00)
+#define GIC_DIST_SOFTINT GIC_DIST_REG(0xf00)
+
+struct ihandler {
+ int_handler func;
+ void *arg;
+};
+
+static struct ihandler handler[NR_IRQS];
+
+void platform_init_interrupts(void)
+{
+ platform_gic_dist_init();
+ platform_gic_cpu_init();
+}
+
+void platform_gic_dist_init(void)
+{
+ unsigned int i;
+ unsigned num_irq = 0;
+ unsigned cpumask = 1;
+
+ cpumask |= cpumask << 8;
+ cpumask |= cpumask << 16;
+
+ /* Disabling GIC */
+ writel(0, GIC_DIST_CTRL);
+
+ /*
+ * Find out how many interrupts are supported.
+ */
+ num_irq = readl(GIC_DIST_CTR) & 0x1f;
+ num_irq = (num_irq + 1) * 32;
+
+ /* Set each interrupt line to use N-N software model
+ and edge sensitive, active high */
+ for (i=32; i < num_irq; i += 16)
+ writel(0xffffffff, GIC_DIST_CONFIG + i * 4/16 );
+
+ writel(0xffffffff, GIC_DIST_CONFIG + 4);
+
+ /* Set up interrupts for this CPU */
+ for (i = 32; i < num_irq; i += 4)
+ writel(cpumask, GIC_DIST_TARGET + i * 4 / 4);
+
+ /* Set priority of all interrupts*/
+
+ /*
+ * In bootloader we dont care about priority so
+ * setting up equal priorities for all
+ */
+ for (i=0; i < num_irq; i += 4)
+ writel(0xa0a0a0a0, GIC_DIST_PRI + i * 4/4);
+
+ /*Disabling interrupts*/
+ for (i=0; i < num_irq; i += 32)
+ writel(0xffffffff, GIC_DIST_ENABLE_CLEAR + i * 4/32);
+
+ writel(0x0000ffff, GIC_DIST_ENABLE_SET);
+
+ /*Enabling GIC*/
+ writel(1, GIC_DIST_CTRL);
+}
+
+void platform_gic_cpu_init(void)
+{
+ writel(0xf0, GIC_CPU_PRIMASK);
+ writel(1, GIC_CPU_CTRL);
+}
+
+enum handler_return platform_irq(struct arm_iframe *frame)
+{
+ unsigned num;
+ enum handler_return ret;
+ num = readl(GIC_CPU_INTACK);
+ if (num > NR_IRQS)
+ return 0;
+ ret = handler[num].func(handler[num].arg);
+ writel(num, GIC_CPU_EOI);
+ return ret;
+}
+
+void platform_fiq(struct arm_iframe *frame)
+{
+ PANIC_UNIMPLEMENTED;
+}
+
+status_t mask_interrupt(unsigned int vector)
+{
+ unsigned reg = GIC_DIST_ENABLE_CLEAR + (vector/32)*4;
+ unsigned bit = 1 << (vector & 31);
+ writel(bit, reg);
+ return 0;
+}
+
+status_t unmask_interrupt(unsigned int vector)
+{
+
+ unsigned reg = GIC_DIST_ENABLE_SET + (vector/32)*4;
+ unsigned bit = 1 << (vector & 31);
+ writel(bit, reg);
+ return 0;
+}
+
+void register_int_handler(unsigned int vector, int_handler func, void *arg)
+{
+ if (vector >= NR_IRQS)
+ return;
+
+ enter_critical_section();
+ handler[vector].func = func;
+ handler[vector].arg = arg;
+ exit_critical_section();
+}
+
+void clear_pending_int(void)
+{
+ unsigned num_irq = 0;
+
+ num_irq = readl(GIC_DIST_CTR) & 0x1f;
+ num_irq = (num_irq + 1) * 32;
+ unsigned i;
+ for (i = 0; i < num_irq; i += 32)
+ writel(0xffffffff, GIC_DIST_PENDING_CLEAR + i * 4 / 32);
+}
diff --git a/platform/msm8x60/mmc_init.c b/platform/msm8x60/mmc_init.c
new file mode 100755
index 0000000..9e67025
--- /dev/null
+++ b/platform/msm8x60/mmc_init.c
@@ -0,0 +1,101 @@
+/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of Code Aurora Forum, Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <string.h>
+#include <stdlib.h>
+#include <debug.h>
+#include <reg.h>
+
+#define MMC_BOOT_VREG_ID 18
+
+#define CLK_CTL_BASE 0x00900000
+
+#define SDC_NS(n) (CLK_CTL_BASE + 0x282C + 32*((n) - 1))
+#define SDC1_NS SDC_NS(1)
+#define SDC2_NS SDC_NS(2)
+#define SDC3_NS SDC_NS(3)
+#define SDC4_NS SDC_NS(4)
+#define SDC5_NS SDC_NS(5)
+
+#define SDC_MD(n) (CLK_CTL_BASE + 0x2828 + 32*((n) - 1))
+#define SDC1_MD SDC_MD(1)
+#define SDC2_MD SDC_MD(2)
+#define SDC3_MD SDC_MD(3)
+#define SDC4_MD SDC_MD(4)
+#define SDC5_MD SDC_MD(5)
+
+static void mmc_set_clk(unsigned ns, unsigned md)
+{
+ unsigned int val;
+ /*Clock Init*/
+ // 1. Set bit 7 in the NS registers
+ val = 1 << 7;
+ writel(val, SDC1_NS);
+
+ //2. Program MD registers
+ writel(md, SDC1_MD);
+
+ //3. Program NS resgister OR'd with Bit 7
+ val = 1 << 7;
+ val |= ns;
+ writel(val, SDC1_NS);
+
+ //4. Clear bit 7 of NS register
+ val = 1 << 7;
+ val = ~val;
+ val = val & readl(SDC1_NS);
+ writel(val, SDC1_NS);
+
+ //5. For MD != NA set bit 8 of NS register
+ val = 1 << 8;
+ val = val | readl(SDC1_NS);
+ writel(val, SDC1_NS);
+
+ //6. Set bit 11 in NS register
+ val = 1 << 11;
+ val = val | readl(SDC1_NS);
+ writel(val, SDC1_NS);
+
+ //7. Set bit 9 in NS register
+ val = 1 << 9;
+ val = val | readl(SDC1_NS);
+ writel(val, SDC1_NS);
+}
+
+
+void clock_set_enable (unsigned int mclk)
+{
+ if (mclk == 400000)
+ {
+ mmc_set_clk(0x0010005B, 0x0001000F);
+ }
+ if (mclk == 20000000)
+ {
+ mmc_set_clk(0x00ED0043, 0x000100EC);
+ }
+}
diff --git a/platform/msm8x60/platform.c b/platform/msm8x60/platform.c
new file mode 100755
index 0000000..7fe6f31
--- /dev/null
+++ b/platform/msm8x60/platform.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+
+#include <dev/fbcon.h>
+#include <kernel/thread.h>
+#include <platform/debug.h>
+#include <platform/iomap.h>
+
+void platform_init_interrupts(void);
+void platform_init_timer();
+
+void uart3_clock_init(void);
+void uart_init(void);
+
+struct fbcon_config *lcdc_init(void);
+
+void platform_early_init(void)
+{
+ platform_init_interrupts();
+ platform_init_timer();
+}
+
+void platform_init(void)
+{
+ dprintf(INFO, "platform_init()\n");
+}
+
+void display_init(void)
+{
+}
+
+void secondary_core(unsigned sec_entry)
+{
+ writel(sec_entry, 0x2A040020);
+ writel(0x0, 0x009035A0); //VDD_SC1_ARRAY_CLAMP_GFS_CTL
+ writel(0x0, 0x00902D80); //SCSS_CPU1CORE_RESET
+ writel(0x3, 0x00902E64); //SCSS_DBG_STATUS_CORE_PWRDUP
+}
diff --git a/platform/msm8x60/rules.mk b/platform/msm8x60/rules.mk
new file mode 100755
index 0000000..cf28cc6
--- /dev/null
+++ b/platform/msm8x60/rules.mk
@@ -0,0 +1,27 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+ARCH := arm
+ARM_CPU := cortex-a8
+#arm1136j-s
+CPU := generic
+
+MMC_SLOT := 1
+
+DEFINES += WITH_CPU_EARLY_INIT=0 WITH_CPU_WARM_BOOT=0 \
+ MMC_SLOT=$(MMC_SLOT)
+
+INCLUDES += -I$(LOCAL_DIR)/include
+
+DEVS += fbcon
+MODULES += dev/fbcon
+
+OBJS += \
+ $(LOCAL_DIR)/platform.o \
+ $(LOCAL_DIR)/interrupts.o \
+ $(LOCAL_DIR)/acpuclock.o \
+ $(LOCAL_DIR)/mmc_init.o
+
+LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
+
+include platform/msm_shared/rules.mk
+
diff --git a/platform/msm_shared/hsusb.c b/platform/msm_shared/hsusb.c
old mode 100644
new mode 100755
index 3d953fa..7ae346f
--- a/platform/msm_shared/hsusb.c
+++ b/platform/msm_shared/hsusb.c
@@ -2,6 +2,8 @@
* Copyright (c) 2008, Google Inc.
* All rights reserved.
*
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -497,6 +499,80 @@
while(readl(USB_ULPI_VIEWPORT) & ULPI_RUN) ;
}
+#define USB_CLK 0x00902910
+#define USB_PHY_CLK 0x00902E20
+#define CLK_RESET_ASSERT 0x1
+#define CLK_RESET_DEASSERT 0x0
+#define CLK_RESET(x,y) writel((y), (x));
+
+static int msm_otg_xceiv_reset()
+{
+ CLK_RESET(USB_CLK, CLK_RESET_ASSERT);
+ CLK_RESET(USB_PHY_CLK, CLK_RESET_ASSERT);
+ mdelay(20);
+ CLK_RESET(USB_PHY_CLK, CLK_RESET_DEASSERT);
+ CLK_RESET(USB_CLK, CLK_RESET_DEASSERT);
+ mdelay(20);
+
+ /* select ULPI phy */
+ writel(0x81000000, USB_PORTSC);
+ return 0;
+}
+#define USB_HS1_XVCR_FS_CLK_MD 0x00902908
+#define USB_HS1_XVCR_FS_CLK_NS 0x0090290C
+void hsusb_8x60_clock_init(void)
+{
+ unsigned int val = 0;
+
+ //Enable PLL8
+ writel(0xF, 0x00903144);
+ writel(0x5, 0x00903148);
+ writel(0x8, 0x0090314C);
+
+ val = readl(0x00903154);
+ val &= ~(0xC30000);
+ val |= 0xC10000;
+ writel(val, 0x00903154);
+
+ val = readl(0x00903140);
+ val &= ~(0x7);
+ val |= 0x7;
+ writel(val, 0x00903140);
+
+
+ //Set 7th bit in NS Register
+ val = 1 << 7;
+ writel(val, USB_HS1_XVCR_FS_CLK_NS);
+
+ //Set rate specific value in MD
+ writel(0x000500DF, USB_HS1_XVCR_FS_CLK_MD);
+
+ //Set value in NS register
+ val = 1 << 7;
+ val |= 0x00E400C3;
+ writel(val, USB_HS1_XVCR_FS_CLK_NS);
+
+ // Clear 7th bit
+ val = 1 << 7;
+ val = ~val;
+ val = val & readl(USB_HS1_XVCR_FS_CLK_NS);
+ writel(val, USB_HS1_XVCR_FS_CLK_NS);
+
+ //set 11th bit
+ val = 1 << 11;
+ val |= readl(USB_HS1_XVCR_FS_CLK_NS);
+ writel(val, USB_HS1_XVCR_FS_CLK_NS);
+
+ //set 9th bit
+ val = 1 << 9;
+ val |= readl(USB_HS1_XVCR_FS_CLK_NS);
+ writel(val, USB_HS1_XVCR_FS_CLK_NS);
+
+ //set 8th bit
+ val = 1 << 8;
+ val |= readl(USB_HS1_XVCR_FS_CLK_NS);
+ writel(val, USB_HS1_XVCR_FS_CLK_NS);
+}
void hsusb_clock_init(void)
{
@@ -508,6 +584,8 @@
writel(0x00000900, USBH_NS_REG);
writel(0x00000A00, USBH_NS_REG);
writel(0x00002A00, USBH_NS_REG);
+#elif PLATFORM_MSM8X60
+ hsusb_8x60_clock_init();
#endif
}
@@ -527,8 +605,11 @@
// board_usb_init();
/* select ULPI phy */
+#ifdef PLATFORM_MSM8X60
+ msm_otg_xceiv_reset();
+#else
writel(0x81000000, USB_PORTSC);
-
+#endif
/* RESET */
writel(0x00080002, USB_USBCMD);
diff --git a/platform/msm_shared/hsusb.h b/platform/msm_shared/hsusb.h
index 68559a9..0035851 100644
--- a/platform/msm_shared/hsusb.h
+++ b/platform/msm_shared/hsusb.h
@@ -2,6 +2,8 @@
* Copyright (c) 2008, Google Inc.
* All rights reserved.
*
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -31,6 +33,8 @@
#ifdef PLATFORM_MSM7X30
#define MSM_USB_BASE 0xA3600000
+#elif PLATFORM_MSM8X60
+#define MSM_USB_BASE 0x12500000
#else
#define MSM_USB_BASE 0xA0800000
#endif
diff --git a/platform/msm_shared/mmc.c b/platform/msm_shared/mmc.c
index 0968dcf..af0b78a 100755
--- a/platform/msm_shared/mmc.c
+++ b/platform/msm_shared/mmc.c
@@ -1117,6 +1117,9 @@
mmc_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_8_BIT;
}
writel( mmc_reg, MMC_BOOT_MCI_CLK );
+
+ mdelay(10); // Giving some time to card to stabilize.
+
return MMC_BOOT_E_SUCCESS;
}
diff --git a/platform/msm_shared/timer.c b/platform/msm_shared/timer.c
index b30153a..57cf854 100644
--- a/platform/msm_shared/timer.c
+++ b/platform/msm_shared/timer.c
@@ -2,6 +2,8 @@
* Copyright (c) 2008, Google Inc.
* All rights reserved.
*
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -39,7 +41,7 @@
#include <platform/interrupts.h>
#include <kernel/thread.h>
-#ifdef PLATFORM_MSM7X30
+#if PLATFORM_MSM7X30 || PLATFORM_MSM8X60
#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
@@ -122,6 +124,9 @@
if(val & mask)
writel(1, DGT_CLK_CTL);
#endif
+#ifdef PLATFORM_MSM8X60
+ writel(1, DGT_CLK_CTL);
+#endif
enter_critical_section();
timer_callback = callback;
@@ -152,7 +157,7 @@
static void wait_for_timer_op(void)
{
-#if PLATFORM_QSD8K || PLATFORM_MSM7X30
+#if PLATFORM_QSD8K || PLATFORM_MSM7X30 || PLATFORM_MSM8X60
while(readl(SPSS_TIMER_STATUS)) ;
#endif
}
diff --git a/project/msm8660_surf.mk b/project/msm8660_surf.mk
new file mode 100755
index 0000000..a42d832
--- /dev/null
+++ b/project/msm8660_surf.mk
@@ -0,0 +1,11 @@
+# top level project rules for the msm7630_surf project
+#
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+TARGET := msm8660_surf
+
+MODULES += app/aboot
+
+#DEFINES += WITH_DEBUG_DCC=1
+#DEFINES += WITH_DEBUG_UART=1
+#DEFINES += WITH_DEBUG_FBCON=1
\ No newline at end of file
diff --git a/target/msm8660_surf/atags.c b/target/msm8660_surf/atags.c
new file mode 100755
index 0000000..66c5dfb
--- /dev/null
+++ b/target/msm8660_surf/atags.c
@@ -0,0 +1,60 @@
+/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Code Aurora nor
+ * the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <reg.h>
+#include <debug.h>
+#include <smem.h>
+
+#define EBI1_SIZE_60M 0x03C00000
+#define EBI1_SIZE_128M 0x08000000
+#define EBI1_SIZE_60M (254 * 1024 * 1024)
+#define EBI1_ADDR_60M 0x40200000
+#define EBI1_ADDR_128M 0x48000000
+
+unsigned* target_atag_mem(unsigned* ptr)
+{
+ /* ATAG_MEM for 51MB + 128MB setup */
+ *ptr++ = 4;
+ *ptr++ = 0x54410002;
+ *ptr++ = EBI1_SIZE_60M;
+ *ptr++ = EBI1_ADDR_60M;
+
+ /* ATAG_MEM */
+ /*
+ *ptr++ = 4;
+ *ptr++ = 0x54410002;
+ *ptr++ = EBI1_SIZE_128M;
+ *ptr++ = EBI1_ADDR_128M;
+ */
+ return ptr;
+}
+
+void *target_get_scratch_address(void)
+{
+ return ((void *)SCRATCH_ADDR);
+}
diff --git a/target/msm8660_surf/init.c b/target/msm8660_surf/init.c
new file mode 100755
index 0000000..5543f3d
--- /dev/null
+++ b/target/msm8660_surf/init.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2009, Google Inc.
+ * All rights reserved.
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <dev/keys.h>
+#include <dev/gpio_keypad.h>
+#include <lib/ptable.h>
+#include <dev/flash.h>
+#include <smem.h>
+
+#define LINUX_MACHTYPE_SURF 0xf656a
+
+
+void keypad_init(void);
+
+static int emmc_boot = -1; /* set to uninitialized */
+int target_is_emmc_boot(void);
+
+void target_init(void)
+{
+
+ dprintf(INFO, "target_init()\n");
+
+ if(mmc_boot_main())
+ {
+ dprintf(CRITICAL, "mmc init failed!");
+ ASSERT(0);
+ }
+}
+
+unsigned board_machtype(void)
+{
+ return LINUX_MACHTYPE_SURF;
+}
+
+void reboot_device(unsigned reboot_reason)
+{
+ return;
+}
+
+unsigned check_reboot_mode(void)
+{
+ return 0;
+}
+
+void target_battery_charging_enable(unsigned enable, unsigned disconnect)
+{
+}
diff --git a/target/msm8660_surf/rules.mk b/target/msm8660_surf/rules.mk
new file mode 100755
index 0000000..a77136b
--- /dev/null
+++ b/target/msm8660_surf/rules.mk
@@ -0,0 +1,36 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
+
+PLATFORM := msm8x60
+
+MEMBASE := 0x40100000 # SMI
+MEMSIZE := 0x00100000 # 1MB
+
+BASE_ADDR := 0x40200000
+
+TAGS_ADDR := BASE_ADDR+0x00000100
+KERNEL_ADDR := BASE_ADDR+0x00008000
+RAMDISK_ADDR := BASE_ADDR+0x01000000
+SCRATCH_ADDR := BASE_ADDR+0x00008000
+
+KEYS_USE_GPIO_KEYPAD := 1
+
+DEFINES += DISPLAY_TYPE_MDDI=1
+
+MODULES += \
+ dev/keys \
+ lib/ptable
+
+DEFINES += \
+ SDRAM_SIZE=$(MEMSIZE) \
+ MEMBASE=$(MEMBASE) \
+ BASE_ADDR=$(BASE_ADDR) \
+ TAGS_ADDR=$(TAGS_ADDR) \
+ KERNEL_ADDR=$(KERNEL_ADDR) \
+ RAMDISK_ADDR=$(RAMDISK_ADDR) \
+ SCRATCH_ADDR=$(SCRATCH_ADDR)
+
+OBJS += \
+ $(LOCAL_DIR)/init.o \
+ $(LOCAL_DIR)/atags.o
diff --git a/target/msm8660_surf/tools/makefile b/target/msm8660_surf/tools/makefile
new file mode 100755
index 0000000..fdbf607
--- /dev/null
+++ b/target/msm8660_surf/tools/makefile
@@ -0,0 +1,41 @@
+#Makefile to generate appsboot.mbn
+
+ifeq ($(BOOTLOADER_OUT),.)
+APPSBOOTHEADER_DIR := $(BUILDDIR)
+else
+APPSBOOTHEADER_DIR := $(BOOTLOADER_OUT)/../../
+endif
+
+SRC_DIR := target/$(TARGET)/tools
+COMPILER := gcc
+
+ifeq ($(EMMC_BOOT), 1)
+ APPSBOOTHDR_FILES := emmc_appsboot.mbn
+else
+ ifeq ($(BUILD_NANDWRITE), 1)
+ APPSBOOTHDR_FILES :=
+ else
+ APPSBOOTHDR_FILES := appsboot.mbn
+ endif
+endif
+
+APPSBOOTHEADER: $(APPSBOOTHDR_FILES)
+
+
+appsboot.mbn: appsboothd.mbn $(OUTBIN)
+ cat $(APPSBOOTHEADER_DIR)/appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/appsboot.mbn
+ rm -f $(APPSBOOTHEADER_DIR)/appsboothd.mbn
+
+appsboothd.mbn: mkheader $(OUTBIN)
+ $(SRC_DIR)/mkheader $(OUTBIN) $(APPSBOOTHEADER_DIR)/appsboothd.mbn
+
+emmc_appsboot.mbn: emmc_appsboothd.mbn $(OUTBIN)
+ cat $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/emmc_appsboot.mbn
+ rm -f $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn
+
+emmc_appsboothd.mbn: mkheader $(OUTBIN)
+ $(SRC_DIR)/mkheader $(OUTBIN) $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn
+
+mkheader: $(SRC_DIR)/mkheader.c
+ ${COMPILER} -DMEMBASE=$(MEMBASE) $(SRC_DIR)/mkheader.c -o $(SRC_DIR)/mkheader
+
diff --git a/target/msm8660_surf/tools/mkheader.c b/target/msm8660_surf/tools/mkheader.c
new file mode 100755
index 0000000..2eb73e2
--- /dev/null
+++ b/target/msm8660_surf/tools/mkheader.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2007, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+
+#include <sys/stat.h>
+
+int main(int argc, char *argv[])
+{
+ struct stat s;
+ unsigned size, base;
+ int unified_boot = 0;
+ unsigned unified_boot_magic[20];
+ unsigned non_unified_boot_magic[10];
+ unsigned magic_len = 0;
+ unsigned *magic;
+ int fd;
+
+ if(argc < 3) {
+ fprintf(stderr,"usage: mkheader <bin> <hdr>\n");
+ return -1;
+ }
+
+ if (argc == 4) {
+ if(!strcmp("unified-boot",argv[3])) {
+ unified_boot = 1;
+ }
+ }
+
+ if(stat(argv[1], &s)) {
+ perror("cannot stat binary");
+ return -1;
+ }
+
+ if(unified_boot) {
+ magic = unified_boot_magic;
+ magic_len = sizeof(unified_boot_magic);
+ } else {
+ magic = non_unified_boot_magic;
+ magic_len = sizeof(non_unified_boot_magic);
+ }
+
+ size = s.st_size;
+#if MEMBASE
+ base = MEMBASE;
+#else
+ base = 0;
+#endif
+
+ magic[0] = 0x00000005; /* appsbl */
+ magic[1] = 0x00000002; /* nand */
+ magic[2] = 0x00000000;
+ magic[3] = base;
+ magic[4] = size;
+ magic[5] = size;
+ magic[6] = size + base;
+ magic[7] = 0x00000000;
+ magic[8] = size + base;
+ magic[9] = 0x00000000;
+
+ if (unified_boot == 1)
+ {
+ magic[10] = 0x33836685; /* cookie magic number */
+ magic[11] = 0x00000001; /* cookie version */
+ magic[12] = 0x00000002; /* file formats */
+ magic[13] = 0x00000000;
+ magic[14] = 0x00500000; /* 5M for boot.img */
+ magic[15] = 0x00000000;
+ magic[16] = 0x00000000;
+ magic[17] = 0x00000000;
+ magic[18] = 0x00000000;
+ magic[19] = 0x00000000;
+ }
+
+ fd = open(argv[2], O_WRONLY | O_CREAT | O_TRUNC, 0644);
+ if(fd < 0) {
+ perror("cannot open header for writing");
+ return -1;
+ }
+ if(write(fd, magic, magic_len) != magic_len) {
+ perror("cannot write header");
+ close(fd);
+ unlink(argv[2]);
+ return -1;
+ }
+ close(fd);
+
+ return 0;
+}