Merge "platform: msm8994: Fix compilation warnings in msm8994 platform"
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
index cff176f..646d575 100755
--- a/dev/gcdb/display/gcdb_autopll.c
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -97,7 +97,6 @@
static uint32_t calculate_div3(uint8_t bpp, uint8_t num_of_lanes)
{
- uint32_t ret = NO_ERROR;
pll_data.pclk_m = 0x1; /* M = 1, N= 1 */
pll_data.pclk_n = 0xFF; /* ~ (N-M) = 0xff */
pll_data.pclk_d = 0xFF; /* ~N = 0xFF */
@@ -138,6 +137,7 @@
}
pll_data.posdiv3--; /* Register needs one value less */
+ return NO_ERROR;
}
static uint32_t calculate_dec_frac_start()
@@ -165,13 +165,11 @@
dprintf(SPEW, "%s: dec_start=0x%x dec_frac=0x%x lock_comp=0x%x\n", __func__,
pll_data.dec_start, pll_data.frac_start, pll_data.lock_comp);
+ return NO_ERROR;
}
static uint32_t calculate_vco_28nm(uint8_t bpp, uint8_t num_of_lanes)
{
- uint8_t counter = 0;
- uint32_t temprate = 0;
-
/* If half bitclock is more than VCO min value */
if (pll_data.halfbit_clock > VCO_MIN_CLOCK) {
diff --git a/dev/gcdb/display/gcdb_display.c b/dev/gcdb/display/gcdb_display.c
index 2066e4d..051b3e6 100755
--- a/dev/gcdb/display/gcdb_display.c
+++ b/dev/gcdb/display/gcdb_display.c
@@ -30,11 +30,13 @@
#include <debug.h>
#include <err.h>
#include <smem.h>
+#include <clock.h>
#include <msm_panel.h>
#include <string.h>
#include <stdlib.h>
#include <board.h>
#include <mdp5.h>
+#include <qtimer.h>
#include <platform/gpio.h>
#include <mipi_dsi.h>
@@ -282,7 +284,6 @@
buf_size -= DSI_1_STRING_LEN;
strlcpy(pbuf, slave_panel_node, buf_size);
}
-end:
return ret;
}
diff --git a/dev/gcdb/display/include/display_resource.h b/dev/gcdb/display/include/display_resource.h
index ca392ff..660944c 100755
--- a/dev/gcdb/display/include/display_resource.h
+++ b/dev/gcdb/display/include/display_resource.h
@@ -61,7 +61,7 @@
/*---------------------------------------------------------------------------*/
/*GPIO pin structure to define reset pin, enable pin, te pin, etc. */
-typedef struct gpio_pin{
+struct gpio_pin{
char *pin_source;
uint32_t pin_id;
@@ -72,7 +72,7 @@
};
/*LDO entry structure for different LDO entries. */
-typedef struct ldo_entry{
+struct ldo_entry{
char *ldo_name;
uint32_t ldo_id;
uint32_t ldo_type;
diff --git a/dev/gcdb/display/include/panel.h b/dev/gcdb/display/include/panel.h
index c21383e..e20b76a 100755
--- a/dev/gcdb/display/include/panel.h
+++ b/dev/gcdb/display/include/panel.h
@@ -39,7 +39,7 @@
#define TOTAL_RESET_GPIO_CTRL 5
/*---------------------------------------------------------------------------*/
-/* panel type
+/* panel type */
/*---------------------------------------------------------------------------*/
enum {
PANEL_TYPE_UNKNOWN,
@@ -53,7 +53,7 @@
/*---------------------------------------------------------------------------*/
/*Panel Configuration */
-typedef struct panel_config{
+struct panel_config{
char *panel_node_id;
char *panel_controller;
@@ -78,7 +78,7 @@
char *slave_panel_node_id;
};
-typedef struct panel_resolution{
+struct panel_resolution{
uint16_t panel_width;
uint16_t panel_height;
@@ -100,7 +100,7 @@
uint16_t invert_hsync_polarity;
};
-typedef struct color_info{
+struct color_info{
uint8_t color_format;
uint8_t color_order;
uint8_t underflow_color;
@@ -109,12 +109,12 @@
uint8_t pixel_alignment;
};
-typedef struct command_state {
+struct command_state {
uint8_t oncommand_state;
uint8_t offcommand_state;
};
-typedef struct videopanel_info {
+struct videopanel_info {
uint8_t hsync_pulse;
uint8_t hfp_power_mode;
uint8_t hbp_power_mode;
@@ -126,7 +126,7 @@
uint32_t bllp_eof_power;
};
-typedef struct commandpanel_info {
+struct commandpanel_info {
uint8_t techeck_enable;
uint8_t tepin_select;
uint8_t teusing_tepin;
@@ -141,7 +141,7 @@
uint32_t cmdmode_idletime;
};
-typedef struct lane_configuration {
+struct lane_configuration {
uint8_t dsi_lanes;
uint8_t dsi_lanemap;
uint8_t lane0_state;
@@ -150,7 +150,7 @@
uint8_t lane3_state;
};
-typedef struct panel_timing {
+struct panel_timing {
uint8_t dsi_mdp_trigger;
uint8_t dsi_dma_trigger;
uint8_t tclk_post;
@@ -163,13 +163,13 @@
BL_DCS,
};
-typedef struct panel_reset_sequence {
+struct panel_reset_sequence {
uint8_t pin_state[TOTAL_RESET_GPIO_CTRL];
uint32_t sleep[TOTAL_RESET_GPIO_CTRL];
uint8_t pin_direction;
};
-typedef struct backlight {
+struct backlight {
uint16_t bl_interface_type;
uint16_t bl_min_level;
uint16_t bl_max_level;
@@ -178,7 +178,7 @@
char *bl_pmic_model;
};
-typedef struct fb_compression {
+struct fb_compression {
uint32_t enabled;
uint32_t comp_ratio;
uint32_t comp_mode;
@@ -196,6 +196,10 @@
uint32_t lossy_mode_thd;
uint32_t lossy_rgb_thd;
uint32_t lossy_mode_idx;
+
+ uint32_t slice_height;
+ uint32_t pred_mode;
+ uint32_t max_pred_err;
};
#endif /*_PANEL_H_ */
diff --git a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
index ea638cf..528cb26 100755
--- a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
+++ b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
@@ -44,7 +44,7 @@
/*---------------------------------------------------------------------------*/
static struct panel_config hx8379a_truly_fwvga_video_panel_data = {
"qcom,mdss_dsi_hx8379a_truly_fwvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ""
};
/*---------------------------------------------------------------------------*/
diff --git a/dev/gcdb/display/include/panel_jdi_1080p_video.h b/dev/gcdb/display/include/panel_jdi_1080p_video.h
index bcee0c1..2dbc2ba 100755
--- a/dev/gcdb/display/include/panel_jdi_1080p_video.h
+++ b/dev/gcdb/display/include/panel_jdi_1080p_video.h
@@ -47,7 +47,7 @@
static struct panel_config jdi_1080p_video_panel_data = {
"qcom,mdss_dsi_jdi_1080p_video", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, ""
};
/*---------------------------------------------------------------------------*/
@@ -90,11 +90,11 @@
static struct mipi_dsi_cmd jdi_1080p_video_on_command[] = {
-{ 0x4 , jdi_1080p_video_on_cmd0},
-{ 0x4 , jdi_1080p_video_on_cmd1},
-{ 0x4 , jdi_1080p_video_on_cmd2},
-{ 0x4 , jdi_1080p_video_on_cmd3},
-{ 0x4 , jdi_1080p_video_on_cmd4}
+{ 0x4 , jdi_1080p_video_on_cmd0, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd1, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd2, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd3, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd4, 0x0}
};
#define JDI_1080P_VIDEO_ON_COMMAND 5
@@ -110,8 +110,8 @@
static struct mipi_dsi_cmd jdi_1080p_video_off_command[] = {
-{ 0x4 , jdi_1080p_videooff_cmd0},
-{ 0x4 , jdi_1080p_videooff_cmd1}
+{ 0x4 , jdi_1080p_videooff_cmd0, 0},
+{ 0x4 , jdi_1080p_videooff_cmd1, 0}
};
#define JDI_1080P_VIDEO_OFF_COMMAND 2
@@ -152,14 +152,6 @@
0xe7, 0x36, 0x24, 0x00, 0x66, 0x6a, 0x2a, 0x3a, 0x2d, 0x03, 0x04, 0x00
};
-
-
-static struct mipi_dsi_cmd jdi_1080p_video_rotation[] = {
-
-};
-#define JDI_1080P_VIDEO_ROTATION 0
-
-
static struct panel_timing jdi_1080p_video_timing_info = {
0x0, 0x04, 0x04, 0x1b
};
diff --git a/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video.h b/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video.h
index 5f5e5d3..8c9cbce 100644
--- a/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video.h
+++ b/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video.h
@@ -159,7 +159,7 @@
};
static struct fb_compression jdi_4k_dualdsi_video_fbc = {
- 1, 2, 1, 1, 2, 1, 1, 1, 1200, 5, 91, 0x200, 192, 4, 3
+ 1, 2, 1, 1, 2, 1, 1, 1, 1200, 5, 91, 0x200, 192, 4, 3, 0, 0, 0
};
#endif /*_PANEL_JDI_4K_DUALDSI_VIDEO_H_*/
diff --git a/dev/gcdb/display/panel_display.c b/dev/gcdb/display/panel_display.c
index c09da68..9ecd88a 100755
--- a/dev/gcdb/display/panel_display.c
+++ b/dev/gcdb/display/panel_display.c
@@ -33,19 +33,19 @@
#include <stdint.h>
#include <msm_panel.h>
#include <mipi_dsi.h>
+#include <mdp5.h>
#include <sys/types.h>
#include <platform/iomap.h>
#include <err.h>
#include <reg.h>
-#include <mdp5.h>
#include <string.h>
-
/*---------------------------------------------------------------------------*/
/* Panel Header */
/*---------------------------------------------------------------------------*/
#include "panel_display.h"
#include "include/panel.h"
+#include "target/display.h"
/*---------------------------------------------------------------------------*/
/* Panel Init */
@@ -178,6 +178,10 @@
pinfo->fbc.lossy_mode_thd = pstruct->fbcinfo.lossy_mode_thd;
pinfo->fbc.lossy_rgb_thd = pstruct->fbcinfo.lossy_rgb_thd;
pinfo->fbc.lossy_mode_idx = pstruct->fbcinfo.lossy_mode_idx;
+ pinfo->fbc.slice_height = pstruct->fbcinfo.slice_height;
+ pinfo->fbc.pred_mode = pstruct->fbcinfo.pred_mode;
+ pinfo->fbc.max_pred_err = pstruct->fbcinfo.max_pred_err;
+
} else {
pinfo->fbc.comp_ratio = 1;
}
@@ -311,6 +315,8 @@
uint8_t lane_en = 0;
uint8_t ystride = pinfo->bpp / 8;
uint32_t panel_width = pinfo->xres;
+ uint32_t final_xres, final_yres, final_width;
+ uint32_t final_height;
if (pinfo->mipi.dual_dsi)
panel_width = panel_width / 2;
@@ -324,22 +330,32 @@
if (pinfo->mipi.data_lane3)
lane_en |= (1 << 3);
- ret = mdss_dsi_cmd_mode_config((panel_width + plcdc->xres_pad),
- (pinfo->yres + plcdc->yres_pad),
- panel_width, (pinfo->yres),
+ final_xres = panel_width;
+ final_width = panel_width + pinfo->lcdc.xres_pad;
+
+ if (pinfo->fbc.enabled && pinfo->fbc.comp_ratio) {
+ final_xres /= pinfo->fbc.comp_ratio;
+ final_width /= pinfo->fbc.comp_ratio;
+ dprintf(SPEW, "DSI xres =%d final_width=%d\n", final_xres,
+ final_width);
+ }
+ final_yres = pinfo->yres;
+ final_height = pinfo->yres + pinfo->lcdc.yres_pad;
+
+ ret = mdss_dsi_cmd_mode_config(final_width, final_height,
+ final_xres, final_yres,
pinfo->mipi.dst_format,
ystride, lane_en,
pinfo->mipi.interleave_mode,
MIPI_DSI0_BASE);
if (pinfo->mipi.dual_dsi)
- ret = mdss_dsi_cmd_mode_config((panel_width + plcdc->xres_pad),
- (pinfo->yres + plcdc->yres_pad),
- panel_width, (pinfo->yres),
- pinfo->mipi.dst_format,
- ystride, lane_en,
- pinfo->mipi.interleave_mode,
- MIPI_DSI1_BASE);
+ ret = mdss_dsi_cmd_mode_config(final_width, final_height,
+ final_xres, final_yres,
+ pinfo->mipi.dst_format,
+ ystride, lane_en,
+ pinfo->mipi.interleave_mode,
+ MIPI_DSI1_BASE);
return ret;
}
diff --git a/dev/gcdb/display/panel_display.h b/dev/gcdb/display/panel_display.h
index 3c99289..8860f00 100755
--- a/dev/gcdb/display/panel_display.h
+++ b/dev/gcdb/display/panel_display.h
@@ -52,7 +52,7 @@
/*---------------------------------------------------------------------------*/
/* struct definition */
/*---------------------------------------------------------------------------*/
-typedef struct panel_struct{
+struct panel_struct{
struct panel_config *paneldata;
struct panel_resolution *panelres;
struct color_info *color;
diff --git a/platform/apq8084/platform.c b/platform/apq8084/platform.c
index 923588d..cf13b5a 100644
--- a/platform/apq8084/platform.c
+++ b/platform/apq8084/platform.c
@@ -167,8 +167,3 @@
/* Using 1-1 mapping on this platform. */
return phys_addr;
}
-
-int boot_device_mask(int val)
-{
- return ((val & 0x3E) >> 1);
-}
diff --git a/platform/init.c b/platform/init.c
index 095f6e2..4783eba 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -130,3 +130,8 @@
{
return 0;
}
+
+__WEAK int boot_device_mask(int val)
+{
+ return ((val & 0x3E) >> 1);
+}
diff --git a/platform/msm8994/include/platform/iomap.h b/platform/msm8994/include/platform/iomap.h
index db20bf9..28b4b40 100644
--- a/platform/msm8994/include/platform/iomap.h
+++ b/platform/msm8994/include/platform/iomap.h
@@ -256,68 +256,250 @@
#define MDP_PP_1_BASE REG_MDP(0x71800)
#define REG_MDP(off) (MDP_BASE + (off))
+
+#ifdef MDP_HW_REV
+#undef MDP_HW_REV
+#endif
#define MDP_HW_REV REG_MDP(0x1000)
+
+#ifdef MDP_INTR_EN
+#undef MDP_INTR_EN
+#endif
#define MDP_INTR_EN REG_MDP(0x1010)
+
+#ifdef MDP_INTR_CLEAR
+#undef MDP_INTR_CLEAR
+#endif
#define MDP_INTR_CLEAR REG_MDP(0x1018)
+
+#ifdef MDP_HIST_INTR_EN
+#undef MDP_HIST_INTR_EN
+#endif
#define MDP_HIST_INTR_EN REG_MDP(0x101C)
+#ifdef MDP_DISP_INTF_SEL
+#undef MDP_DISP_INTF_SEL
+#endif
#define MDP_DISP_INTF_SEL REG_MDP(0x1004)
+
+#ifdef MDP_VIDEO_INTF_UNDERFLOW_CTL
+#undef MDP_VIDEO_INTF_UNDERFLOW_CTL
+#endif
#define MDP_VIDEO_INTF_UNDERFLOW_CTL REG_MDP(0x12E0)
+
+#ifdef MDP_UPPER_NEW_ROI_PRIOR_RO_START
+#undef MDP_UPPER_NEW_ROI_PRIOR_RO_START
+#endif
#define MDP_UPPER_NEW_ROI_PRIOR_RO_START REG_MDP(0x11EC)
+
+#ifdef MDP_LOWER_NEW_ROI_PRIOR_TO_START
+#undef MDP_LOWER_NEW_ROI_PRIOR_TO_START
+#endif
#define MDP_LOWER_NEW_ROI_PRIOR_TO_START REG_MDP(0x13F8)
+#ifdef MDP_INTF_0_TIMING_ENGINE_EN
+#undef MDP_INTF_0_TIMING_ENGINE_EN
+#endif
#define MDP_INTF_0_TIMING_ENGINE_EN REG_MDP(0x6b000)
+
+#ifdef MDP_INTF_1_TIMING_ENGINE_EN
+#undef MDP_INTF_1_TIMING_ENGINE_EN
+#endif
#define MDP_INTF_1_TIMING_ENGINE_EN REG_MDP(0x6b800)
-#define MDP_CTL_0_BASE REG_MDP(0x2000)
-#define MDP_CTL_1_BASE REG_MDP(0x2200)
+#ifdef MDP_CTL_0_BASE
+#undef MDP_CTL_0_BASE
+#endif
+#define MDP_CTL_0_BASE REG_MDP(0x2000)
+#ifdef MDP_CTL_1_BASE
+#undef MDP_CTL_1_BASE
+#endif
+#define MDP_CTL_1_BASE REG_MDP(0x2200)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_EN
+#undef MDP_REG_SPLIT_DISPLAY_EN
+#endif
#define MDP_REG_SPLIT_DISPLAY_EN REG_MDP(0x12F4)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#endif
#define MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL REG_MDP(0x12F8)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#endif
#define MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL REG_MDP(0x13F0)
-/* can not find following two registers */
-#define MDP_REG_PPB0_CNTL REG_MDP(0x1420)
-#define MDP_REG_PPB0_CONFIG REG_MDP(0x1424)
-
+#ifdef MDP_INTF_0_BASE
+#undef MDP_INTF_0_BASE
+#endif
#define MDP_INTF_0_BASE REG_MDP(0x6b000)
+
+#ifdef MDP_INTF_1_BASE
+#undef MDP_INTF_1_BASE
+#endif
#define MDP_INTF_1_BASE REG_MDP(0x6b800)
+
+#ifdef MDP_INTF_2_BASE
+#undef MDP_INTF_2_BASE
+#endif
#define MDP_INTF_2_BASE REG_MDP(0x6c000)
-
+#ifdef MDP_CLK_CTRL0
+#undef MDP_CLK_CTRL0
+#endif
#define MDP_CLK_CTRL0 REG_MDP(0x12AC)
+
+#ifdef MDP_CLK_CTRL1
+#undef MDP_CLK_CTRL1
+#endif
#define MDP_CLK_CTRL1 REG_MDP(0x12B4)
+
+#ifdef MDP_CLK_CTRL2
+#undef MDP_CLK_CTRL2
+#endif
#define MDP_CLK_CTRL2 REG_MDP(0x12BC)
+
+#ifdef MDP_CLK_CTRL3
+#undef MDP_CLK_CTRL3
+#endif
#define MDP_CLK_CTRL3 REG_MDP(0x13A8)
+
+#ifdef MDP_CLK_CTRL4
+#undef MDP_CLK_CTRL4
+#endif
#define MDP_CLK_CTRL4 REG_MDP(0x13B0)
+
+#ifdef MDP_CLK_CTRL5
+#undef MDP_CLK_CTRL5
+#endif
#define MDP_CLK_CTRL5 REG_MDP(0x13B8)
+
+#ifdef MDP_CLK_CTRL6
+#undef MDP_CLK_CTRL6
+#endif
#define MDP_CLK_CTRL6 REG_MDP(0x12C4)
+
+#ifdef MDP_CLK_CTRL7
+#undef MDP_CLK_CTRL7
+#endif
#define MDP_CLK_CTRL7 REG_MDP(0x13D0)
+#ifdef MMSS_MDP_SMP_ALLOC_W_BASE
+#undef MMSS_MDP_SMP_ALLOC_W_BASE
+#endif
#define MMSS_MDP_SMP_ALLOC_W_BASE REG_MDP(0x1080)
+
+#ifdef MMSS_MDP_SMP_ALLOC_R_BASE
+#undef MMSS_MDP_SMP_ALLOC_R_BASE
+#endif
#define MMSS_MDP_SMP_ALLOC_R_BASE REG_MDP(0x1130)
+#ifdef MDP_QOS_REMAPPER_CLASS_0
+#undef MDP_QOS_REMAPPER_CLASS_0
+#endif
#define MDP_QOS_REMAPPER_CLASS_0 REG_MDP(0x11E0)
+
+#ifdef MDP_QOS_REMAPPER_CLASS_1
+#undef MDP_QOS_REMAPPER_CLASS_1
+#endif
#define MDP_QOS_REMAPPER_CLASS_1 REG_MDP(0x11E4)
+#ifdef VBIF_VBIF_DDR_FORCE_CLK_ON
+#undef VBIF_VBIF_DDR_FORCE_CLK_ON
+#endif
#define VBIF_VBIF_DDR_FORCE_CLK_ON REG_MDP(0xc8004)
+
+#ifdef VBIF_VBIF_DDR_OUT_MAX_BURST
+#undef VBIF_VBIF_DDR_OUT_MAX_BURST
+#endif
#define VBIF_VBIF_DDR_OUT_MAX_BURST REG_MDP(0xc80D8)
+
+#ifdef VBIF_VBIF_DDR_ARB_CTRL
+#undef VBIF_VBIF_DDR_ARB_CTRL
+#endif
#define VBIF_VBIF_DDR_ARB_CTRL REG_MDP(0xc80F0)
+
+#ifdef VBIF_VBIF_DDR_RND_RBN_QOS_ARB
+#undef VBIF_VBIF_DDR_RND_RBN_QOS_ARB
+#endif
#define VBIF_VBIF_DDR_RND_RBN_QOS_ARB REG_MDP(0xc8124)
+
+#ifdef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0
+#undef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0
+#endif
#define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0 REG_MDP(0xc8160)
+
+#ifdef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1
+#undef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1
+#endif
#define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1 REG_MDP(0xc8164)
+
+#ifdef VBIF_VBIF_DDR_OUT_AOOO_AXI_EN
+#undef VBIF_VBIF_DDR_OUT_AOOO_AXI_EN
+#endif
#define VBIF_VBIF_DDR_OUT_AOOO_AXI_EN REG_MDP(0xc8178)
+
+#ifdef VBIF_VBIF_DDR_OUT_AX_AOOO
+#undef VBIF_VBIF_DDR_OUT_AX_AOOO
+#endif
#define VBIF_VBIF_DDR_OUT_AX_AOOO REG_MDP(0xc817C)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF0
+#undef VBIF_VBIF_IN_RD_LIM_CONF0
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF0 REG_MDP(0xc80B0)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF1
+#undef VBIF_VBIF_IN_RD_LIM_CONF1
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF1 REG_MDP(0xc80B4)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF2
+#undef VBIF_VBIF_IN_RD_LIM_CONF2
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF2 REG_MDP(0xc80B8)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF3
+#undef VBIF_VBIF_IN_RD_LIM_CONF3
+#endif
#define VBIF_VBIF_IN_RD_LIM_CONF3 REG_MDP(0xc80BC)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF0
+#undef VBIF_VBIF_IN_WR_LIM_CONF0
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF0 REG_MDP(0xc80C0)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF1
+#undef VBIF_VBIF_IN_WR_LIM_CONF1
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF1 REG_MDP(0xc80C4)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF2
+#undef VBIF_VBIF_IN_WR_LIM_CONF2
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF2 REG_MDP(0xc80C8)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF3
+#undef VBIF_VBIF_IN_WR_LIM_CONF3
+#endif
#define VBIF_VBIF_IN_WR_LIM_CONF3 REG_MDP(0xc80CC)
+
+#ifdef VBIF_VBIF_ABIT_SHORT
+#undef VBIF_VBIF_ABIT_SHORT
+#endif
#define VBIF_VBIF_ABIT_SHORT REG_MDP(0xc8070)
+
+#ifdef VBIF_VBIF_ABIT_SHORT_CONF
+#undef VBIF_VBIF_ABIT_SHORT_CONF
+#endif
#define VBIF_VBIF_ABIT_SHORT_CONF REG_MDP(0xc8074)
+
+#ifdef VBIF_VBIF_GATE_OFF_WRREQ_EN
+#undef VBIF_VBIF_GATE_OFF_WRREQ_EN
+#endif
#define VBIF_VBIF_GATE_OFF_WRREQ_EN REG_MDP(0xc80A8)
#define MDP_VP_0_VIG_0_BASE REG_MDP(0x5000)
diff --git a/platform/msm8994/platform.c b/platform/msm8994/platform.c
index 80f4ad3..560a021 100644
--- a/platform/msm8994/platform.c
+++ b/platform/msm8994/platform.c
@@ -180,8 +180,3 @@
else
return ((addr_t)BS_INFO_ADDR2);
}
-
-int boot_device_mask(int val)
-{
- return ((val & 0x3E) >> 1);
-}
diff --git a/platform/msm_shared/include/msm_panel.h b/platform/msm_shared/include/msm_panel.h
index 1d0d17b..677e707 100755
--- a/platform/msm_shared/include/msm_panel.h
+++ b/platform/msm_shared/include/msm_panel.h
@@ -133,6 +133,10 @@
uint32_t lossy_mode_thd;
uint32_t lossy_rgb_thd;
uint32_t lossy_mode_idx;
+
+ uint32_t slice_height;
+ uint32_t pred_mode;
+ uint32_t max_pred_err;
};
/* intf timing settings */
diff --git a/platform/msm_shared/mdp5.c b/platform/msm_shared/mdp5.c
index 5509bc8..63b824d 100755
--- a/platform/msm_shared/mdp5.c
+++ b/platform/msm_shared/mdp5.c
@@ -621,39 +621,46 @@
uint32_t mode = 0;
uint32_t budget_ctl = 0;
uint32_t lossy_mode = 0;
- uint32_t xres;
struct fbc_panel_info *fbc;
- uint32_t enc_mode;
+ uint32_t enc_mode, width;
fbc = &pinfo->fbc;
- xres = pinfo->xres;
if (!pinfo->fbc.enabled)
return;
- if (pinfo->mipi.dual_dsi)
- xres /= 2;
-
/* enc_mode defines FBC version. 0 = FBC 1.0 and 1 = FBC 2.0 */
enc_mode = (fbc->comp_ratio == 2) ? 0 : 1;
- mode = ((xres) << 16) | (enc_mode) << 9 | ((fbc->comp_mode) << 8) |
- ((fbc->qerr_enable) << 7) | ((fbc->cd_bias) << 4) |
- ((fbc->pat_enable) << 3) | ((fbc->vlc_enable) << 2) |
- ((fbc->bflc_enable) << 1) | 1;
+ width = pinfo->xres;
+ if (enc_mode)
+ width = (pinfo->xres/fbc->comp_ratio);
- dprintf(SPEW, "xres = %d, comp_mode %d, qerr_enable = %d, cd_bias = %d\n",
- xres, fbc->comp_mode, fbc->qerr_enable, fbc->cd_bias);
+ if (pinfo->mipi.dual_dsi)
+ width /= 2;
+
+ mode = ((width) << 16) | ((fbc->slice_height) << 11) |
+ ((fbc->pred_mode) << 10) | (enc_mode) << 9 |
+ ((fbc->comp_mode) << 8) | ((fbc->qerr_enable) << 7) |
+ ((fbc->cd_bias) << 4) | ((fbc->pat_enable) << 3) |
+ ((fbc->vlc_enable) << 2) | ((fbc->bflc_enable) << 1) | 1;
+
+ dprintf(SPEW, "width = %d, slice height = %d, pred_mode =%d, enc_mode = %d, \
+ comp_mode %d, qerr_enable = %d, cd_bias = %d\n",
+ width, fbc->slice_height, fbc->pred_mode, enc_mode,
+ fbc->comp_mode, fbc->qerr_enable, fbc->cd_bias);
dprintf(SPEW, "pat_enable %d, vlc_enable = %d, bflc_enable\n",
fbc->pat_enable, fbc->vlc_enable, fbc->bflc_enable);
budget_ctl = ((fbc->line_x_budget) << 12) |
((fbc->block_x_budget) << 8) | fbc->block_budget;
- lossy_mode = ((fbc->lossless_mode_thd) << 16) |
+ lossy_mode = (((fbc->max_pred_err) << 28) | (fbc->lossless_mode_thd) << 16) |
((fbc->lossy_mode_thd) << 8) |
((fbc->lossy_rgb_thd) << 4) | fbc->lossy_mode_idx;
+ dprintf(SPEW, "mode= 0x%x, budget_ctl = 0x%x, lossy_mode= 0x%x\n",
+ mode, budget_ctl, lossy_mode);
writel(mode, MDP_PP_0_BASE + MDSS_MDP_REG_PP_FBC_MODE);
writel(budget_ctl, MDP_PP_0_BASE + MDSS_MDP_REG_PP_FBC_BUDGET_CTL);
writel(lossy_mode, MDP_PP_0_BASE + MDSS_MDP_REG_PP_FBC_LOSSY_MODE);
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 9211dd3..f33d06a 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -35,6 +35,7 @@
#include <string.h>
#include <debug.h>
#include <target/display.h>
+#include <mdp5.h>
#include <platform/iomap.h>
#include <platform/clock.h>
#include <platform/timer.h>
diff --git a/platform/thulium/include/platform/iomap.h b/platform/thulium/include/platform/iomap.h
index a11db96..8108fd6 100644
--- a/platform/thulium/include/platform/iomap.h
+++ b/platform/thulium/include/platform/iomap.h
@@ -87,13 +87,13 @@
#define APCS_CLOCK_BRANCH_ENA_VOTE (CLK_CTL_BASE + 0x52004)
/* UART Clocks */
-#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x17004)
-#define BLSP1_UART2_APPS_CBCR (CLK_CTL_BASE + 0x1C004)
-#define BLSP1_UART2_APPS_CMD_RCGR (CLK_CTL_BASE + 0x1C00C)
-#define BLSP1_UART2_APPS_CFG_RCGR (CLK_CTL_BASE + 0x1C010)
-#define BLSP1_UART2_APPS_M (CLK_CTL_BASE + 0x1C014)
-#define BLSP1_UART2_APPS_N (CLK_CTL_BASE + 0x1C018)
-#define BLSP1_UART2_APPS_D (CLK_CTL_BASE + 0x1C01C)
+#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x29004)
+#define BLSP2_UART2_APPS_CBCR (CLK_CTL_BASE + 0x29008)
+#define BLSP2_UART2_APPS_CMD_RCGR (CLK_CTL_BASE + 0x2900C)
+#define BLSP2_UART2_APPS_CFG_RCGR (CLK_CTL_BASE + 0x29010)
+#define BLSP2_UART2_APPS_M (CLK_CTL_BASE + 0x29014)
+#define BLSP2_UART2_APPS_N (CLK_CTL_BASE + 0x29018)
+#define BLSP2_UART2_APPS_D (CLK_CTL_BASE + 0x2901C)
/* USB3 clocks */
#define USB_30_BCR (CLK_CTL_BASE + 0xF000)
diff --git a/platform/thulium/thulium-clock.c b/platform/thulium/thulium-clock.c
index b02bec4..ae1d0de 100644
--- a/platform/thulium/thulium-clock.c
+++ b/platform/thulium/thulium-clock.c
@@ -156,31 +156,31 @@
F_END
};
-static struct rcg_clk blsp1_uart2_apps_clk_src =
+static struct rcg_clk blsp2_uart2_apps_clk_src =
{
- .cmd_reg = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
- .cfg_reg = (uint32_t *) BLSP1_UART2_APPS_CFG_RCGR,
- .m_reg = (uint32_t *) BLSP1_UART2_APPS_M,
- .n_reg = (uint32_t *) BLSP1_UART2_APPS_N,
- .d_reg = (uint32_t *) BLSP1_UART2_APPS_D,
+ .cmd_reg = (uint32_t *) BLSP2_UART2_APPS_CMD_RCGR,
+ .cfg_reg = (uint32_t *) BLSP2_UART2_APPS_CFG_RCGR,
+ .m_reg = (uint32_t *) BLSP2_UART2_APPS_M,
+ .n_reg = (uint32_t *) BLSP2_UART2_APPS_N,
+ .d_reg = (uint32_t *) BLSP2_UART2_APPS_D,
.set_rate = clock_lib2_rcg_set_rate_mnd,
.freq_tbl = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
.current_freq = &rcg_dummy_freq,
.c = {
- .dbg_name = "blsp1_uart2_apps_clk",
+ .dbg_name = "blsp2_uart2_apps_clk",
.ops = &clk_ops_rcg_mnd,
},
};
-static struct branch_clk gcc_blsp1_uart2_apps_clk =
+static struct branch_clk gcc_blsp2_uart2_apps_clk =
{
- .cbcr_reg = (uint32_t *) BLSP1_UART2_APPS_CBCR,
- .parent = &blsp1_uart2_apps_clk_src.c,
+ .cbcr_reg = (uint32_t *) BLSP2_UART2_APPS_CBCR,
+ .parent = &blsp2_uart2_apps_clk_src.c,
.c = {
- .dbg_name = "gcc_blsp1_uart2_apps_clk",
+ .dbg_name = "gcc_blsp2_uart2_apps_clk",
.ops = &clk_ops_branch,
},
};
@@ -398,8 +398,8 @@
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
- CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
- CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
+ CLK_LOOKUP("uart8_iface_clk", gcc_blsp1_ahb_clk.c),
+ CLK_LOOKUP("uart8_core_clk", gcc_blsp2_uart2_apps_clk.c),
/* USB30 clocks */
CLK_LOOKUP("usb30_master_clk", gcc_usb30_master_clk.c),
diff --git a/target/msm8994/include/target/display.h b/target/msm8994/include/target/display.h
index b9d5dfe..35643a0 100644
--- a/target/msm8994/include/target/display.h
+++ b/target/msm8994/include/target/display.h
@@ -34,31 +34,6 @@
/*---------------------------------------------------------------------------*/
#include <display_resource.h>
-/*---------------------------------------------------------------------------*/
-/* GPIO configuration */
-/*---------------------------------------------------------------------------*/
-static struct gpio_pin reset_gpio = {
- "msmgpio", 78, 3, 1, 0, 1
-};
-
-static struct gpio_pin lcd_reg_en = { /* boost regulator */
- "pm8994_gpios", 14, 3, 1, 0, 1
-};
-
-static struct gpio_pin bklt_gpio = { /* lcd_bklt_reg_en */
- "pmi8994_gpios", 2, 3, 1, 0, 1
-};
-
-/*---------------------------------------------------------------------------*/
-/* LDO configuration */
-/*---------------------------------------------------------------------------*/
-static struct ldo_entry ldo_entry_array[] = {
- { "vdd", 14, 0, 1800000, 100000, 100, 0, 20, 0, 0},
- { "vddio", 12, 0, 1800000, 100000, 100, 0, 20, 0, 0},
- { "vdda", 2, 1, 1250000, 100000, 100, 0, 0, 0, 0},
- { "vcca", 28, 1, 1000000, 10000, 100, 0, 0, 0, 0},
-};
-
#define TOTAL_LDO_DEFINED 3
/*---------------------------------------------------------------------------*/
@@ -107,3 +82,16 @@
#define PWM_BL_LPG_CHAN_ID 4 /* lpg_out<3> */
#endif
+
+/*---------------------------------------------------------------------------*/
+/* Functions */
+/*---------------------------------------------------------------------------*/
+int target_display_pre_on();
+int target_display_pre_off();
+int target_display_post_on();
+int target_display_post_off();
+int target_cont_splash_screen();
+void target_force_cont_splash_disable(uint8_t override);
+uint8_t target_panel_auto_detect_enabled();
+
+
diff --git a/target/msm8994/init.c b/target/msm8994/init.c
index e0917f3..d12a60f 100644
--- a/target/msm8994/init.c
+++ b/target/msm8994/init.c
@@ -61,6 +61,8 @@
#include <pm8x41_wled.h>
#include <qpnp_wled.h>
+#include "target/display.h"
+
#define CE_INSTANCE 2
#define CE_EE 1
#define CE_FIFO_SIZE 64
diff --git a/target/msm8994/oem_panel.c b/target/msm8994/oem_panel.c
index ec7a940..2da4eca 100644
--- a/target/msm8994/oem_panel.c
+++ b/target/msm8994/oem_panel.c
@@ -28,11 +28,13 @@
*/
#include <debug.h>
+#include <string.h>
#include <err.h>
#include <smem.h>
#include <msm_panel.h>
#include <board.h>
#include <mipi_dsi.h>
+#include <qtimer.h>
#include "include/panel.h"
#include "panel_display.h"
diff --git a/target/msm8994/target_display.c b/target/msm8994/target_display.c
index 171f3d6..7e6cdea 100644
--- a/target/msm8994/target_display.c
+++ b/target/msm8994/target_display.c
@@ -28,6 +28,7 @@
*/
#include <debug.h>
+#include <string.h>
#include <smem.h>
#include <err.h>
#include <msm_panel.h>
@@ -39,12 +40,16 @@
#include <mdp5.h>
#include <scm.h>
#include <endian.h>
+#include <regulator.h>
+#include <qtimer.h>
+#include <arch/defines.h>
#include <platform/gpio.h>
#include <platform/clock.h>
#include <platform/iomap.h>
#include <target/display.h>
#include "include/panel.h"
#include "include/display_resource.h"
+#include "gcdb_display.h"
#define HFPLL_LDO_ID 12
@@ -57,6 +62,21 @@
#define PMIC_WLED_SLAVE_ID 3
#define PMIC_MPP_SLAVE_ID 2
+/*---------------------------------------------------------------------------*/
+/* GPIO configuration */
+/*---------------------------------------------------------------------------*/
+static struct gpio_pin reset_gpio = {
+ "msmgpio", 78, 3, 1, 0, 1
+};
+
+static struct gpio_pin lcd_reg_en = { /* boost regulator */
+ "pm8994_gpios", 14, 3, 1, 0, 1
+};
+
+static struct gpio_pin bklt_gpio = { /* lcd_bklt_reg_en */
+ "pmi8994_gpios", 2, 3, 1, 0, 1
+};
+
static void dsi_pll_20nm_phy_init( uint32_t pll_base, int off)
{
mdss_dsi_pll_20nm_sw_reset_st_machine(pll_base);
@@ -363,12 +383,8 @@
bool target_display_panel_node(char *panel_name, char *pbuf, uint16_t buf_size)
{
- int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
- bool ret = true;
+ return gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
- ret = gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
-
- return ret;
}
void target_display_init(const char *panel_name)
@@ -384,7 +400,7 @@
panel_name);
return;
}
- if (gcdb_display_init(panel_name, MDP_REV_50, MIPI_FB_ADDR)) {
+ if (gcdb_display_init(panel_name, MDP_REV_50, (void *)MIPI_FB_ADDR)) {
target_force_cont_splash_disable(true);
msm_display_off();
}
diff --git a/target/target_display.c b/target/target_display.c
index 4b07cc8..a16a46e 100644
--- a/target/target_display.c
+++ b/target/target_display.c
@@ -30,6 +30,8 @@
#include <debug.h>
#include <platform.h>
+#include "include/msm_panel.h"
+
__WEAK int mdp_lcdc_config(void)
{
return 0;
diff --git a/target/thulium/init.c b/target/thulium/init.c
index c1b13bb..50e48d9 100644
--- a/target/thulium/init.c
+++ b/target/thulium/init.c
@@ -75,7 +75,7 @@
void target_early_init(void)
{
#if WITH_DEBUG_UART
- uart_dm_init(2, 0, BLSP1_UART1_BASE);
+ uart_dm_init(8, 0, BLSP2_UART1_BASE);
#endif
}