| /* Copyright (c) 2015, The Linux Foundation. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are |
| * met: |
| * * Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * * Redistributions in binary form must reproduce the above |
| * copyright notice, this list of conditions and the following |
| * disclaimer in the documentation and/or other materials provided |
| * with the distribution. |
| * * Neither the name of The Linux Foundation nor the names of its |
| * contributors may be used to endorse or promote products derived |
| * from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #include <err.h> |
| #include <assert.h> |
| #include <debug.h> |
| #include <reg.h> |
| #include <platform/timer.h> |
| #include <platform/iomap.h> |
| #include <clock.h> |
| #include <platform/clock.h> |
| #include <platform.h> |
| |
| void hsusb_clock_init(void) |
| { |
| int ret; |
| struct clk *iclk, *cclk; |
| |
| ret = clk_get_set_enable("usb_iface_clk", 0, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set usb_iface_clk ret = %d\n", ret); |
| ASSERT(0); |
| } |
| |
| ret = clk_get_set_enable("usb_core_clk", 133330000, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set usb_core_clk ret = %d\n", ret); |
| ASSERT(0); |
| } |
| |
| mdelay(20); |
| |
| iclk = clk_get("usb_iface_clk"); |
| cclk = clk_get("usb_core_clk"); |
| |
| clk_disable(iclk); |
| clk_disable(cclk); |
| |
| mdelay(20); |
| |
| /* Start the block reset for usb */ |
| writel(1, USB_HS_BCR); |
| |
| mdelay(20); |
| |
| /* Take usb block out of reset */ |
| writel(0, USB_HS_BCR); |
| |
| mdelay(20); |
| |
| ret = clk_enable(iclk); |
| |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set usb_iface_clk after async ret = %d\n", ret); |
| ASSERT(0); |
| } |
| |
| ret = clk_enable(cclk); |
| |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set usb_iface_clk after async ret = %d\n", ret); |
| ASSERT(0); |
| } |
| } |
| |
| /* Configure UART clock based on the UART block id*/ |
| void clock_config_uart_dm(uint8_t id) |
| { |
| int ret; |
| char iclk[64]; |
| char cclk[64]; |
| |
| snprintf(iclk, sizeof(iclk), "uart%u_iface_clk", id); |
| snprintf(cclk, sizeof(cclk), "uart%u_core_clk", id); |
| |
| ret = clk_get_set_enable(iclk, 0, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set %s ret = %d\n", iclk, ret); |
| ASSERT(0); |
| } |
| |
| ret = clk_get_set_enable(cclk, 7372800, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set %s ret = %d\n", cclk, ret); |
| ASSERT(0); |
| } |
| } |
| |
| void clock_ce_enable(uint8_t instance) |
| { |
| int ret; |
| char clk_name[64]; |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_src_clk", instance); |
| ret = clk_get_set_enable(clk_name, 160000000, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set ce%u_src_clk ret = %d\n", instance, ret); |
| ASSERT(0); |
| } |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_core_clk", instance); |
| ret = clk_get_set_enable(clk_name, 0, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set ce%u_core_clk ret = %d\n", instance, ret); |
| ASSERT(0); |
| } |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_ahb_clk", instance); |
| ret = clk_get_set_enable(clk_name, 0, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set ce%u_ahb_clk ret = %d\n", instance, ret); |
| ASSERT(0); |
| } |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_axi_clk", instance); |
| ret = clk_get_set_enable(clk_name, 0, 1); |
| if(ret) |
| { |
| dprintf(CRITICAL, "failed to set ce%u_axi_clk ret = %d\n", instance, ret); |
| ASSERT(0); |
| } |
| |
| /* Wait for 48 * #pipes cycles. |
| * This is necessary as immediately after an access control reset (boot up) |
| * or a debug re-enable, the Crypto core sequentially clears its internal |
| * pipe key storage memory. If pipe key initialization writes are attempted |
| * during this time, they may be overwritten by the internal clearing logic. |
| */ |
| udelay(1); |
| } |
| void clock_ce_disable(uint8_t instance) |
| { |
| struct clk *ahb_clk; |
| struct clk *cclk; |
| struct clk *axi_clk; |
| struct clk *src_clk; |
| char clk_name[64]; |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_src_clk", instance); |
| src_clk = clk_get(clk_name); |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_ahb_clk", instance); |
| ahb_clk = clk_get(clk_name); |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_axi_clk", instance); |
| axi_clk = clk_get(clk_name); |
| |
| snprintf(clk_name, sizeof(clk_name), "ce%u_core_clk", instance); |
| cclk = clk_get(clk_name); |
| |
| clk_disable(ahb_clk); |
| clk_disable(axi_clk); |
| clk_disable(cclk); |
| clk_disable(src_clk); |
| |
| /* Some delay for the clocks to stabalize. */ |
| udelay(1); |
| } |
| /* Function to asynchronously reset CE. |
| * Function assumes that all the CE clocks are off. |
| */ |
| static void ce_async_reset(uint8_t instance) |
| { |
| /* Start the block reset for CE */ |
| writel(1, GCC_CRYPTO_BCR); |
| |
| udelay(2); |
| |
| /* Take CE block out of reset */ |
| writel(0, GCC_CRYPTO_BCR); |
| |
| udelay(2); |
| } |
| |
| void clock_config_ce(uint8_t instance) |
| { |
| /* Need to enable the clock before disabling since the clk_disable() |
| * has a check to default to nop when the clk_enable() is not called |
| * on that particular clock. |
| */ |
| clock_ce_enable(instance); |
| |
| clock_ce_disable(instance); |
| |
| ce_async_reset(instance); |
| |
| clock_ce_enable(instance); |
| } |