Merge "dev: gcdb: display: add support to swap DSI lanes to drive a panel"
diff --git a/dev/gcdb/display/fastboot_oem_display.h b/dev/gcdb/display/fastboot_oem_display.h
index 9dd8b5c..e68aad0 100644
--- a/dev/gcdb/display/fastboot_oem_display.h
+++ b/dev/gcdb/display/fastboot_oem_display.h
@@ -76,6 +76,7 @@
{"jdi_fhd_video", "qcom,mdss_dsi_jdi_fhd_video", false},
{"jdi_qhd_dualdsi_cmd", "qcom,mdss_dsi_jdi_qhd_dualmipi_cmd", true},
{"jdi_qhd_dualdsi_video", "qcom,dsi_jdi_qhd_video", true},
+ {"jdi_4k_dualdsi_video_nofbc", "qcom,dsi_jdi_4k_nofbc_video", true},
{"nt35521_720p_video", "qcom,mdss_dsi_nt35521_720p_video", false},
{"nt35521_wxga_video", "qcom,mdss_dsi_nt35521_wxga_video", false},
{"nt35590_720p_cmd", "qcom,mdss_dsi_nt35590_720p_cmd", false},
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
index 1d2db47..b78cecc 100755
--- a/dev/gcdb/display/gcdb_autopll.c
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -42,6 +42,7 @@
uint32_t h_period = 0, v_period = 0;
uint32_t width = pinfo->xres;
struct dsc_desc *dsc = NULL;
+ int bpp_lane;
if (pinfo->mipi.dual_dsi)
width /= 2;
@@ -62,19 +63,22 @@
pinfo->lcdc.v_front_porch + pinfo->lcdc.v_pulse_width +
pinfo->lcdc.yres_pad;
+ bpp_lane = pinfo->bpp / pinfo->mipi.num_of_lanes;
+
/*
* If a bit clock rate is not specified, calculate it based
* on panel parameters
*/
if (pinfo->mipi.bitclock == 0)
pll_data.bit_clock = (h_period * v_period *
- pinfo->mipi.frame_rate * pinfo->bpp) /
- pinfo->mipi.num_of_lanes;
+ pinfo->mipi.frame_rate * bpp_lane);
else
pll_data.bit_clock = pinfo->mipi.bitclock;
- pll_data.pixel_clock = (pll_data.bit_clock * pinfo->mipi.num_of_lanes) /
- pinfo->bpp;
+ pll_data.pixel_clock = (pll_data.bit_clock / bpp_lane);
+
+ dprintf(SPEW, "%s: bit_clk=%d pix_clk=%d\n", __func__,
+ pll_data.bit_clock, pll_data.pixel_clock);
pll_data.byte_clock = pll_data.bit_clock >> 3;
@@ -273,6 +277,11 @@
return ERROR;
}
+ pll_data.vco_clock = pll_data.bit_clock * pll_data.ndiv *
+ pll_data.n1div;
+
+ rate = pll_data.vco_clock;
+
rate /= pll_data.n1div;
rate /= FIX_PIXEL_CLOCK_DIV;
@@ -287,7 +296,6 @@
__func__, pll_data.n2div);
return ERROR;
}
- pll_data.vco_clock = pll_data.bit_clock * pll_data.ndiv * pll_data.n1div;
dprintf(SPEW, "%s: vco:%u n1div:%d n2div:%d bit_clk:%u pixel_clk:%u\n",
__func__, pll_data.vco_clock, pll_data.n1div, pll_data.n2div,
diff --git a/dev/gcdb/display/include/panel_fl10802_fwvga_video.h b/dev/gcdb/display/include/panel_fl10802_fwvga_video.h
index 80c64bd..4a511df 100644
--- a/dev/gcdb/display/include/panel_fl10802_fwvga_video.h
+++ b/dev/gcdb/display/include/panel_fl10802_fwvga_video.h
@@ -328,7 +328,7 @@
/* Backlight setting */
/*---------------------------------------------------------------------------*/
static struct backlight fl10802_fwvga_video_backlight = {
- 1, 1, 255, 100, 2, "PMIC_8941"
+ BL_DCS, 1, 255, 100, 2, "PMIC_8941"
};
#define FL10802_FWVGA_VIDEO_SIGNATURE 0xFFFF
diff --git a/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video_nofbc.h b/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video_nofbc.h
new file mode 100644
index 0000000..ae73869
--- /dev/null
+++ b/dev/gcdb/display/include/panel_jdi_4k_dualdsi_video_nofbc.h
@@ -0,0 +1,184 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_JDI_4K_DUALDSI_VIDEO_NOFBC__H_
+#define _PANEL_JDI_4K_DUALDSI_VIDEO_NOFBC__H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+static struct panel_config jdi_4k_dualdsi_video_nofbc_panel_data = {
+ "qcom,dsi_jdi_4k_nofbc_video", "dsi:0:", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 40, 0, 0, 1, 0, 0, 0, 0, 0, 11, 0, 0,
+ "qcom,dsi_jdi_4k_nofbc_video",
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution jdi_4k_dualdsi_video_nofbc_panel_res = {
+ 3840, 2160, 100, 80, 12, 0, 16, 16, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel color information */
+/*---------------------------------------------------------------------------*/
+static struct color_info jdi_4k_dualdsi_video_nofbc_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel on/off command information */
+/*---------------------------------------------------------------------------*/
+static char jdi_4k_dualdsi_video_on_cmd0[] = {
+ 0x51, 0xff, 0x15, 0x80,
+};
+
+static char jdi_4k_dualdsi_video_on_cmd1[] = {
+ 0x53, 0x24, 0x15, 0x80,
+};
+
+static char jdi_4k_dualdsi_video_on_cmd2[] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+
+static char jdi_4k_dualdsi_video_on_cmd3[] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static char jdi_4k_dualdsi_video_on_cmd_ip_0[] = {
+ 0xb0, 0x04, 0x23, 0x80
+};
+
+static char jdi_4k_dualdsi_video_on_cmd_ip_1[] = {
+ 0x08, 0x00, 0x29, 0xC0,
+ 0xb3, 0x14, 0x08, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+};
+
+static char jdi_4k_dualdsi_video_on_cmd_ip_2[] = {
+ 0xd6, 0x01, 0x23, 0x80
+};
+
+static struct mipi_dsi_cmd jdi_4k_dualdsi_video_nofbc_on_command[] = {
+ {0x4, jdi_4k_dualdsi_video_on_cmd0, 0x0a},
+ {0x4, jdi_4k_dualdsi_video_on_cmd1, 0x0a},
+ {0x4, jdi_4k_dualdsi_video_on_cmd2, 0xc9},
+ {0x4, jdi_4k_dualdsi_video_on_cmd_ip_0, 0x0a},
+ {0xc, jdi_4k_dualdsi_video_on_cmd_ip_1, 0x0a},
+ {0x4, jdi_4k_dualdsi_video_on_cmd_ip_2, 0x0a},
+ {0x4, jdi_4k_dualdsi_video_on_cmd3, 0x78}
+};
+
+#define JDI_4K_DUALDSI_VIDEO_NOFBC_ON_COMMAND 7
+
+static char jdi_4k_dualdsi_videooff_cmd0[] = {
+ 0x28, 0x00, 0x05, 0x80
+};
+
+static char jdi_4k_dualdsi_videooff_cmd1[] = {
+ 0x10, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd jdi_4k_dualdsi_video_nofbc_off_command[] = {
+ {0x4, jdi_4k_dualdsi_videooff_cmd0, 0x32},
+ {0x4, jdi_4k_dualdsi_videooff_cmd1, 0x78}
+};
+
+#define JDI_4K_DUALDSI_VIDEO_NOFBC_OFF_COMMAND 2
+
+
+static struct command_state jdi_4k_dualdsi_video_nofbc_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct commandpanel_info jdi_4k_dualdsi_video_nofbc_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct videopanel_info jdi_4k_dualdsi_video_nofbc_video_panel = {
+ 0, 0, 0, 0, 1, 1, 1, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane configuration */
+/*---------------------------------------------------------------------------*/
+static struct lane_configuration jdi_4k_dualdsi_video_nofbc_lane_config = {
+ 4, 0, 1, 1, 1, 1, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel timing */
+/*---------------------------------------------------------------------------*/
+static const uint32_t jdi_4k_dualdsi_video_nofbc_timings[] = {
+ 0x3e, 0x38, 0x26, 0x00, 0x68, 0x6e, 0x2a, 0x3c, 0x2c, 0x03, 0x04, 0x00
+};
+
+
+static const uint32_t jdi_4k_dualdsi_thulium_video_nofbc_timings[] = {
+ 0x2c, 0x27, 0x0e, 0x10, 0x0a, 0x03, 0x04, 0xa0,
+ 0x2c, 0x27, 0x0e, 0x10, 0x0a, 0x03, 0x04, 0xa0,
+ 0x2c, 0x27, 0x0e, 0x10, 0x0a, 0x03, 0x04, 0xa0,
+ 0x2c, 0x27, 0x0e, 0x10, 0x0a, 0x03, 0x04, 0xa0,
+ 0x2c, 0x32, 0x0e, 0x0f, 0x0a, 0x03, 0x04, 0xa0,
+};
+
+static struct panel_timing jdi_4k_dualdsi_video_nofbc_timing_info = {
+ 0x0, 0x04, 0x0d, 0x3e
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel reset sequence */
+/*---------------------------------------------------------------------------*/
+static struct panel_reset_sequence jdi_4k_dualdsi_video_nofbc_reset_seq = {
+ {0, 0, 1, }, {200, 200, 200, }, 2
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight setting */
+/*---------------------------------------------------------------------------*/
+static struct backlight jdi_4k_dualdsi_video_nofbc_backlight = {
+ 0, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+static struct labibb_desc jdi_4k_dualdsi_video_nofbc_labibb = {
+ 0, 1, 5500000, 5500000, 5500000, 5500000, 3, 3, 1
+};
+
+#endif /*_PANEL_JDI_4K_DUALDSI_VIDEO_NOFBC__H_*/
diff --git a/dev/gcdb/display/include/panel_r69007_wqxga_cmd.h b/dev/gcdb/display/include/panel_r69007_wqxga_cmd.h
new file mode 100644
index 0000000..ab68848
--- /dev/null
+++ b/dev/gcdb/display/include/panel_r69007_wqxga_cmd.h
@@ -0,0 +1,381 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_R69007_WQXGA_CMD_H_
+#define _PANEL_R69007_WQXGA_CMD_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+static struct panel_config r69007_wqxga_cmd_panel_data = {
+ "qcom,mdss_dsi_r69007_wqxga_cmd", "dsi:0:", "qcom,mdss-dsi-panel",
+ 10, 1, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0,
+ "qcom,mdss_dsi_r69007_wqxga_cmd"
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution r69007_wqxga_cmd_panel_res = {
+ 1440, 2560, 112, 70, 10, 0, 9, 8, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel color information */
+/*---------------------------------------------------------------------------*/
+static struct color_info r69007_wqxga_cmd_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel on/off command information */
+/*---------------------------------------------------------------------------*/
+static char r69007_wqxga_cmd_on_cmd0[] = {
+ 0x02, 0x00, 0x29, 0xC0,
+ 0xB0, 0x00, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd1[] = {
+ 0x04, 0x00, 0x29, 0xC0,
+ 0xB3, 0x00, 0x00, 0x00,
+};
+
+static char r69007_wqxga_cmd_on_cmd2[] = {
+ 0x04, 0x00, 0x29, 0xC0,
+ 0xB6, 0x3b, 0xd3, 0x00,
+};
+
+static char r69007_wqxga_cmd_on_cmd3[] = {
+ 0x28, 0x00, 0x29, 0xC0,
+ 0xC1, 0x80, 0x08, 0x11,
+ 0x1F, 0xFC, 0xF2, 0xC9,
+ 0x1F, 0x5F, 0x98, 0xB3,
+ 0xFE, 0xFF, 0xF7, 0xFE,
+ 0xFF, 0xD7, 0x31, 0xF1,
+ 0xCB, 0x3F, 0x3F, 0xFD,
+ 0xEF, 0x03, 0x24, 0x69,
+ 0x18, 0xAA, 0x40, 0x01,
+ 0x42, 0x02, 0x08, 0x00,
+ 0x01, 0x00, 0x01, 0x00,
+};
+
+static char r69007_wqxga_cmd_on_cmd4[] = {
+ 0x0F, 0x00, 0x29, 0xC0,
+ 0xC2, 0x01, 0xFA, 0x00,
+ 0x04, 0x64, 0x08, 0x00,
+ 0x60, 0x00, 0x38, 0x70,
+ 0x00, 0x00, 0x00, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd5[] = {
+ 0x09, 0x00, 0x29, 0xC0,
+ 0xC3, 0x07, 0x01, 0x08,
+ 0x01, 0x00, 0x00, 0x00,
+ 0x00, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd6[] = {
+ 0x12, 0x00, 0x29, 0xC0,
+ 0xC4, 0x70, 0x00, 0x00,
+ 0x00, 0x02, 0x00, 0x00,
+ 0x00, 0x00, 0x02, 0x01,
+ 0x00, 0x01, 0x01, 0x00,
+ 0x00, 0x00, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd7[] = {
+ 0x11, 0x00, 0x29, 0xC0,
+ 0xC6, 0x3C, 0x00, 0x3C,
+ 0x02, 0x37, 0x01, 0x0E,
+ 0x01, 0x02, 0x01, 0x02,
+ 0x03, 0x0F, 0x04, 0x3C,
+ 0x46, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd8[] = {
+ 0x1F, 0x00, 0x29, 0xC0,
+ 0xC7, 0x00, 0x16, 0x22,
+ 0x2C, 0x3B, 0x48, 0x51,
+ 0x5D, 0x40, 0x47, 0x53,
+ 0x61, 0x6A, 0x71, 0x78,
+ 0x00, 0x16, 0x22, 0x2C,
+ 0x3B, 0x48, 0x51, 0x5D,
+ 0x40, 0x47, 0x53, 0x61,
+ 0x6A, 0x71, 0x78, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd9[] = {
+ 0x14, 0x00, 0x29, 0xC0,
+ 0xC8, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0xFC, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0xFC, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0xFC, 0x00,
+};
+
+static char r69007_wqxga_cmd_on_cmd10[] = {
+ 0x14, 0x00, 0x29, 0xC0,
+ 0xC9, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0xFC, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0xFC, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0xFC, 0x00,
+};
+
+static char r69007_wqxga_cmd_on_cmd11[] = {
+ 0x14, 0x00, 0x29, 0xC0,
+ 0xCB, 0xAA, 0x1E, 0xE3,
+ 0x55, 0xF1, 0xFF, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+};
+
+static char r69007_wqxga_cmd_on_cmd12[] = {
+ 0x02, 0x00, 0x29, 0xC0,
+ 0xCC, 0x07, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd13[] = {
+ 0x0B, 0x00, 0x29, 0xC0,
+ 0xCD, 0x3A, 0x86, 0x3A,
+ 0x86, 0x8D, 0x8D, 0x04,
+ 0x04, 0x00, 0x00, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd14[] = {
+ 0x11, 0x00, 0x29, 0xC0,
+ 0xD0, 0x2A, 0x01, 0x91,
+ 0x6A, 0xDC, 0x59, 0x19,
+ 0x00, 0x00, 0x00, 0x19,
+ 0x99, 0x04, 0x00, 0x00,
+ 0x00, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd15[] = {
+ 0x21, 0x00, 0x29, 0xC0,
+ 0xD3, 0x1B, 0x3B, 0xBB,
+ 0x77, 0x77, 0x77, 0xBB,
+ 0xB3, 0x33, 0x00, 0x80,
+ 0xA7, 0xAF, 0x5B, 0x5B,
+ 0x33, 0x33, 0x33, 0xC0,
+ 0x00, 0xF2, 0x0F, 0x7D,
+ 0x7C, 0xFF, 0x0F, 0x99,
+ 0x00, 0x33, 0x00, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd16[] = {
+ 0x06, 0x00, 0x29, 0xC0,
+ 0xD4, 0x57, 0x33, 0x05,
+ 0x00, 0xF4, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd17[] = {
+ 0x0C, 0x00, 0x29, 0xC0,
+ 0xD5, 0x66, 0x00, 0x00,
+ 0x01, 0x3D, 0x01, 0x3D,
+ 0x00, 0x38, 0x00, 0x38,
+};
+
+static char r69007_wqxga_cmd_on_cmd18[] = {
+ 0x22, 0x00, 0x29, 0xC0,
+ 0xD7, 0x04, 0xff, 0x23,
+ 0x15, 0x75, 0xa4, 0xc3,
+ 0x1f, 0xc3, 0x1f, 0xd9,
+ 0x07, 0x1c, 0x1f, 0x30,
+ 0x8e, 0x87, 0xc7, 0xe3,
+ 0xf1, 0xcc, 0xf0, 0x1f,
+ 0xf0, 0x0d, 0x70, 0x00,
+ 0x2A, 0x00, 0x7e, 0x1d,
+ 0x07, 0x00, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd19[] = {
+ 0x05, 0x00, 0x29, 0xC0,
+ 0xDE, 0x00, 0x3f, 0xff,
+ 0x10, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd20[] = {
+ 0x02, 0x00, 0x29, 0xC0,
+ 0xD6, 0x01, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd21[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x35, 0x00, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd22[] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0x2A, 0x00, 0x00, 0x05,
+ 0x9F, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd23[] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0x2B, 0x00, 0x00, 0x09,
+ 0xFF, 0xFF, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd24[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x2C, 0x00, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd25[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x36, 0x40, 0xFF, 0xFF,
+};
+
+static char r69007_wqxga_cmd_on_cmd26[] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static char r69007_wqxga_cmd_on_cmd27[] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd r69007_wqxga_cmd_on_command[] = {
+ {0x8, r69007_wqxga_cmd_on_cmd0, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd1, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd2, 0x00},
+ {0x2c, r69007_wqxga_cmd_on_cmd3, 0x00},
+ {0x14, r69007_wqxga_cmd_on_cmd4, 0x00},
+ {0x10, r69007_wqxga_cmd_on_cmd5, 0x00},
+ {0x18, r69007_wqxga_cmd_on_cmd6, 0x00},
+ {0x18, r69007_wqxga_cmd_on_cmd7, 0x00},
+ {0x24, r69007_wqxga_cmd_on_cmd8, 0x00},
+ {0x18, r69007_wqxga_cmd_on_cmd9, 0x00},
+ {0x18, r69007_wqxga_cmd_on_cmd10, 0x00},
+ {0x18, r69007_wqxga_cmd_on_cmd11, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd12, 0x00},
+ {0x10, r69007_wqxga_cmd_on_cmd13, 0x00},
+ {0x18, r69007_wqxga_cmd_on_cmd14, 0x00},
+ {0x28, r69007_wqxga_cmd_on_cmd15, 0x00},
+ {0xc, r69007_wqxga_cmd_on_cmd16, 0x00},
+ {0x10, r69007_wqxga_cmd_on_cmd17, 0x00},
+ {0x28, r69007_wqxga_cmd_on_cmd18, 0x00},
+ {0xc, r69007_wqxga_cmd_on_cmd19, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd20, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd21, 0x00},
+ {0xc, r69007_wqxga_cmd_on_cmd22, 0x00},
+ {0xc, r69007_wqxga_cmd_on_cmd23, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd24, 0x00},
+ {0x8, r69007_wqxga_cmd_on_cmd25, 0x00},
+ {0x4, r69007_wqxga_cmd_on_cmd26, 0x78},
+ {0x4, r69007_wqxga_cmd_on_cmd27, 0x14}
+};
+
+#define R69007_WQXGA_CMD_ON_COMMAND 28
+
+
+static char r69007_wqxga_cmdoff_cmd0[] = {
+ 0x28, 0x00, 0x05, 0x80
+};
+
+static char r69007_wqxga_cmdoff_cmd1[] = {
+ 0x10, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd r69007_wqxga_cmd_off_command[] = {
+ {0x4, r69007_wqxga_cmdoff_cmd0, 0x32},
+ {0x4, r69007_wqxga_cmdoff_cmd1, 0x78}
+};
+
+#define R69007_WQXGA_CMD_OFF_COMMAND 2
+
+
+static struct command_state r69007_wqxga_cmd_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct commandpanel_info r69007_wqxga_cmd_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct videopanel_info r69007_wqxga_cmd_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane configuration */
+/*---------------------------------------------------------------------------*/
+static struct lane_configuration r69007_wqxga_cmd_lane_config = {
+ 4, 0, 1, 1, 1, 1, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel timing */
+/*---------------------------------------------------------------------------*/
+static const uint32_t r69007_wqxga_cmd_timings[] = {
+ 0xDA, 0x34, 0x24, 0x00, 0x64, 0x68, 0x28, 0x38, 0x2A, 0x03, 0x04, 0x00
+};
+
+static const uint32_t r69007_wqxga_thulium_cmd_timings[] = {
+ 0x23, 0x1F, 0x07, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x1F, 0x07, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x1F, 0x07, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x1F, 0x07, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x19, 0x08, 0x08, 0x05, 0x03, 0x04, 0xa0
+};
+
+static struct panel_timing r69007_wqxga_cmd_timing_info = {
+ 0x0, 0x04, 0x03, 0x29
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel reset sequence */
+/*---------------------------------------------------------------------------*/
+static struct panel_reset_sequence r69007_wqxga_cmd_reset_seq = {
+ {1, 0, 1, }, {2, 5, 120, }, 2
+};
+
+static struct labibb_desc r69007_wqxga_cmd_labibb = {
+ 0, 1, 5500000, 5500000, 5500000, 5500000, 3, 3, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight setting */
+/*---------------------------------------------------------------------------*/
+static struct backlight r69007_wqxga_cmd_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+#endif /*_PANEL_R69007_WQXGA_CMD_H_*/
diff --git a/dev/pmic/pmi8994/include/pm_app_smbchg.h b/dev/pmic/pmi8994/include/pm_app_smbchg.h
index bfc12ca..81a7b39 100644
--- a/dev/pmic/pmi8994/include/pm_app_smbchg.h
+++ b/dev/pmic/pmi8994/include/pm_app_smbchg.h
@@ -201,5 +201,6 @@
bool pm_appsbl_display_init_done();
bool pm_appsbl_charging_in_progress();
pm_err_flag_type pm_appsbl_set_dcin_suspend();
+bool pm_app_display_shutdown_in_prgs();
#endif //PM_APP_SMBCHG__H
diff --git a/platform/mdm9640/include/platform/iomap.h b/platform/mdm9640/include/platform/iomap.h
index 5803acd..f92f556 100644
--- a/platform/mdm9640/include/platform/iomap.h
+++ b/platform/mdm9640/include/platform/iomap.h
@@ -180,6 +180,8 @@
/* SS QMP (Qulacomm Multi Protocol) */
#define QMP_PHY_BASE 0x78000
+#define AHB2_PHY_BASE 0x0007e000
+#define PERIPH_SS_AHB2PHY_TOP_CFG (AHB2_PHY_BASE + 0x10)
/* QMP register offset */
#define PLATFORM_QMP_OFFSET 0x8
diff --git a/platform/msm8996/include/platform/iomap.h b/platform/msm8996/include/platform/iomap.h
index 2ae1d17..d3ba81a 100644
--- a/platform/msm8996/include/platform/iomap.h
+++ b/platform/msm8996/include/platform/iomap.h
@@ -78,6 +78,9 @@
#define QUSB2_PHY_BASE 0x7411000
#define GCC_QUSB2_PHY_BCR (CLK_CTL_BASE + 0x00012038)
+#define AHB2_PHY_BASE 0x7416000
+#define PERIPH_SS_AHB2PHY_TOP_CFG (AHB2_PHY_BASE + 0x10)
+
/* Clocks */
#define CLK_CTL_BASE 0x300000
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 06c4804..0474f37 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -781,7 +781,7 @@
writel(data, ctl_base + COMMAND_MODE_MDP_STREAM1_TOTAL);
if (dsc->dsi_dsc_config)
- dsc->dsi_dsc_config(pinfo->mipi.ctl_base, DSI_VIDEO_MODE, dsc);
+ dsc->dsi_dsc_config(pinfo->mipi.ctl_base, DSI_CMD_MODE, dsc);
} else {
writel((img_width * ystride + 1) << 16 | 0x0039,
diff --git a/platform/msm_shared/qusb2_phy.c b/platform/msm_shared/qusb2_phy.c
index fab6e09..871bbcc 100644
--- a/platform/msm_shared/qusb2_phy.c
+++ b/platform/msm_shared/qusb2_phy.c
@@ -25,7 +25,7 @@
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-
+#include <arch/defines.h>
#include <platform/iomap.h>
#include <qusb2_phy.h>
#include <reg.h>
@@ -55,6 +55,10 @@
udelay(10);
writel(val & ~BIT(0), GCC_QUSB2_PHY_BCR);
+ /* configure the abh2 phy to wait state */
+ writel(0x11, PERIPH_SS_AHB2PHY_TOP_CFG);
+ dmb();
+
/* set CLAMP_N_EN and stay with disabled USB PHY */
writel(0x23, QUSB2PHY_PORT_POWERDOWN);
diff --git a/target/msm8996/init.c b/target/msm8996/init.c
index 418178a..9f49ceb 100644
--- a/target/msm8996/init.c
+++ b/target/msm8996/init.c
@@ -326,6 +326,7 @@
case HW_PLATFORM_SURF:
case HW_PLATFORM_MTP:
case HW_PLATFORM_FLUID:
+ case HW_PLATFORM_QRD:
dprintf(SPEW, "Target_cont_splash=1\n");
splash_screen = 1;
break;
diff --git a/target/msm8996/oem_panel.c b/target/msm8996/oem_panel.c
index 3fbb979..25ef683 100644
--- a/target/msm8996/oem_panel.c
+++ b/target/msm8996/oem_panel.c
@@ -53,6 +53,7 @@
#include "include/panel_sharp_wqxga_dualdsi_video.h"
#include "include/panel_jdi_qhd_dualdsi_video.h"
#include "include/panel_jdi_qhd_dualdsi_cmd.h"
+#include "include/panel_r69007_wqxga_cmd.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -65,6 +66,7 @@
NT35597_WQXGA_DSC_CMD_PANEL,
JDI_QHD_DUALDSI_VIDEO_PANEL,
JDI_QHD_DUALDSI_CMD_PANEL,
+ R69007_WQXGA_CMD_PANEL,
UNKNOWN_PANEL
};
@@ -80,6 +82,7 @@
{"nt35597_wqxga_dsc_cmd", NT35597_WQXGA_DSC_CMD_PANEL},
{"jdi_qhd_dualdsi_video", JDI_QHD_DUALDSI_VIDEO_PANEL},
{"jdi_qhd_dualdsi_cmd", JDI_QHD_DUALDSI_CMD_PANEL},
+ {"r69007_wqxga_cmd", R69007_WQXGA_CMD_PANEL},
};
static uint32_t panel_id;
@@ -341,6 +344,36 @@
jdi_qhd_dualdsi_thulium_video_timings,
MAX_TIMING_CONFIG * sizeof(uint32_t));
break;
+ case R69007_WQXGA_CMD_PANEL:
+ pan_type = PANEL_TYPE_DSI;
+ pinfo->lcd_reg_en = 0;
+ panelstruct->paneldata = &r69007_wqxga_cmd_panel_data;
+ panelstruct->panelres = &r69007_wqxga_cmd_panel_res;
+ panelstruct->color = &r69007_wqxga_cmd_color;
+ panelstruct->videopanel = &r69007_wqxga_cmd_video_panel;
+ panelstruct->commandpanel = &r69007_wqxga_cmd_command_panel;
+ panelstruct->state = &r69007_wqxga_cmd_state;
+ panelstruct->laneconfig = &r69007_wqxga_cmd_lane_config;
+ panelstruct->paneltiminginfo
+ = &r69007_wqxga_cmd_timing_info;
+ panelstruct->panelresetseq
+ = &r69007_wqxga_cmd_reset_seq;
+ panelstruct->backlightinfo = &r69007_wqxga_cmd_backlight;
+
+ pinfo->labibb = &r69007_wqxga_cmd_labibb;
+
+ pinfo->mipi.panel_on_cmds
+ = r69007_wqxga_cmd_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = R69007_WQXGA_CMD_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = r69007_wqxga_cmd_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = R69007_WQXGA_CMD_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ r69007_wqxga_thulium_cmd_timings,
+ MAX_TIMING_CONFIG * sizeof(uint32_t));
+ break;
default:
case UNKNOWN_PANEL:
pan_type = PANEL_TYPE_UNKNOWN;
@@ -381,6 +414,9 @@
case HW_PLATFORM_SURF:
panel_id = SHARP_WQXGA_DUALDSI_VIDEO_PANEL;
break;
+ case HW_PLATFORM_QRD:
+ panel_id = R69007_WQXGA_CMD_PANEL;
+ break;
default:
dprintf(CRITICAL, "Display not enabled for %d HW type\n"
, hw_id);