Merge 97e7c7fdb72f7420237126d3c5894215429b98ea on remote branch
Change-Id: If00b46e72bf881b7ee81e589c77851aed8745b62
diff --git a/app/tests/spi_test.c b/app/tests/spi_test.c
index f373626..818672c 100644
--- a/app/tests/spi_test.c
+++ b/app/tests/spi_test.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, 2020 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -30,13 +30,14 @@
#include <spi_qup.h>
#include <blsp_qup.h>
#include <stdlib.h>
+#include <platform/gpio.h>
#define spi_panel_dc_gpio 110
static int spidev_write_cmd(struct qup_spi_dev *dev, char cmd)
{
int ret = 0;
- char buf[4] = {0};
+ unsigned char buf[4] = {0};
if (!dev) {
dprintf(CRITICAL, "SPI has not been initialized\n");
@@ -59,8 +60,8 @@
static int spidev_read_cmd(struct qup_spi_dev *dev, unsigned char *buf,
unsigned int bytes_per_word, unsigned int len)
{
- int i, ret = 0;
- unsigned int max_speed_hz;
+ unsigned int i;
+ int ret = 0;
if (!dev) {
dprintf(CRITICAL, "SPI has not been initialized\n");
@@ -86,7 +87,7 @@
unsigned int data_size = 240*320*2;
struct qup_spi_dev *spi_dev;
int i,j,k;
- char rx_buf[8] = {0};
+ unsigned char rx_buf[8] = {0};
dprintf(CRITICAL, "-----start %s----\n", __func__);
diff --git a/dev/gcdb/display/include/panel_st7789v2_320p_spi_cmd.h b/dev/gcdb/display/include/panel_st7789v2_320p_spi_cmd.h
new file mode 100644
index 0000000..466d0cb
--- /dev/null
+++ b/dev/gcdb/display/include/panel_st7789v2_320p_spi_cmd.h
@@ -0,0 +1,183 @@
+/* Copyright (c) 2017-2018, 2020, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_ST7789v2_320P_SPI_CMD_H_
+#define _PANEL_ST7789v2_320P_SPI_CMD_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+static struct panel_config st7789v2_320p_cmd_panel_data = {
+ "qcom,mdss_spi_st7789v2_320p_cmd", "spi:0:", "qcom,mdss-spi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution st7789v2_320p_cmd_panel_res = {
+ 240, 320, 10, 20, 2, 0, 10, 20, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel color information */
+/*---------------------------------------------------------------------------*/
+static struct color_info st7789v2_320p_cmd_color = {
+ 16, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel on/off command information */
+/*---------------------------------------------------------------------------*/
+static char st7789v2_320p_cmd_on_cmd0[] = {
+ 0x11,
+};
+
+static char st7789v2_320p_cmd_on_cmd1[] = {
+ 0x35, 0x00,
+};
+
+static char st7789v2_320p_cmd_on_cmd2[] = {
+ 0x44, 0x00, 0x20,
+};
+
+static char st7789v2_320p_cmd_on_cmd3[] = {
+ 0x36, 0x00,
+};
+
+static char st7789v2_320p_cmd_on_cmd4[] = {
+ 0x3A, 0x05,
+};
+
+static char st7789v2_320p_cmd_on_cmd5[] = {
+ 0xB2, 0x0C, 0x0C, 0x00,
+ 0x33, 0x33,
+};
+
+static char st7789v2_320p_cmd_on_cmd6[] = {
+ 0xB7, 0x35,
+};
+
+static char st7789v2_320p_cmd_on_cmd7[] = {
+ 0xBB, 0x35,
+};
+
+static char st7789v2_320p_cmd_on_cmd8[] = {
+ 0xC0, 0x2C,
+};
+
+static char st7789v2_320p_cmd_on_cmd9[] = {
+ 0xC2, 0x01,
+};
+
+static char st7789v2_320p_cmd_on_cmd10[] = {
+ 0xC3, 0x0B,
+};
+
+static char st7789v2_320p_cmd_on_cmd11[] = {
+ 0xC4, 0x20,
+};
+
+static char st7789v2_320p_cmd_on_cmd12[] = {
+ 0xC6, 0x0F,
+};
+
+static char st7789v2_320p_cmd_on_cmd13[] = {
+ 0xD0, 0xA4, 0xA1,
+};
+
+static char st7789v2_320p_cmd_on_cmd14[] = {
+ 0xE0, 0xD0, 0x00, 0x02,
+ 0x07, 0x0B, 0x1A, 0x31,
+ 0x54, 0x40, 0x29, 0x12,
+ 0x12, 0x12, 0x17,
+};
+
+static char st7789v2_320p_cmd_on_cmd15[] = {
+ 0xE1, 0xD0, 0x00, 0x02,
+ 0x07, 0x05, 0x25, 0x2D,
+ 0x44, 0x45, 0x1C, 0x18,
+ 0x16, 0x1C, 0x1D,
+};
+
+static char st7789v2_320p_cmd_on_cmd16[] = {
+ 0x29,
+};
+
+static char st7789v2_320p_cmd_on_cmd17[] = {
+ 0x2c
+};
+
+static struct mdss_spi_cmd st7789v2_320p_cmd_on_command[] = {
+ {0x01, st7789v2_320p_cmd_on_cmd0, 0x78, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd1, 0x00, 0},
+ {0x03, st7789v2_320p_cmd_on_cmd2, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd3, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd4, 0x00, 0},
+ {0x06, st7789v2_320p_cmd_on_cmd5, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd6, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd7, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd8, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd9, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd10, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd11, 0x00, 0},
+ {0x02, st7789v2_320p_cmd_on_cmd12, 0x00, 0},
+ {0x03, st7789v2_320p_cmd_on_cmd13, 0x00, 0},
+ {0x0F, st7789v2_320p_cmd_on_cmd14, 0x00, 0},
+ {0x0F, st7789v2_320p_cmd_on_cmd15, 0x00, 0},
+ {0x01, st7789v2_320p_cmd_on_cmd16, 0x78, 0},
+ {0x01, st7789v2_320p_cmd_on_cmd17, 0x20, 0},
+};
+
+#define ST7789v2_320p_CMD_ON_COMMAND 18
+
+/*---------------------------------------------------------------------------*/
+/* Panel reset sequence */
+/*---------------------------------------------------------------------------*/
+static struct panel_reset_sequence st7789v2_320p_cmd_reset_seq = {
+ {1, 0, 1, }, {20, 2, 20, }, 2
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight setting */
+/*---------------------------------------------------------------------------*/
+static struct backlight st7789v2_320p_cmd_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+static uint8_t st7789v2_signature_addr = 0x04;
+
+static uint8_t st7789v2_signature[] = {
+ 0x85, 0x85, 0x52
+};
+
+#endif /* PANEL_ST7789v2_320p_SPI_CMD_H */
diff --git a/platform/msm8952/acpuclock.c b/platform/msm8952/acpuclock.c
index 9efe09b..3c631e4 100644
--- a/platform/msm8952/acpuclock.c
+++ b/platform/msm8952/acpuclock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2018-2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -35,6 +35,7 @@
#include <clock.h>
#include <platform/clock.h>
#include <platform.h>
+#include <blsp_qup.h>
#define MAX_LOOPS 500
@@ -507,3 +508,39 @@
clock_ce_enable(instance);
}
+
+/* Configure spi clock */
+void clock_config_blsp_spi(uint8_t blsp_id, uint8_t qup_id, unsigned long rate)
+{
+ uint8_t ret = 0;
+ char clk_name[64];
+
+ qup_id = qup_id + 1;
+
+ if ((blsp_id != BLSP_ID_1)) {
+ dprintf(CRITICAL, "Incorrect BLSP-%d configuration\n", blsp_id);
+ ASSERT(0);
+ }
+
+ snprintf(clk_name, sizeof(clk_name), "blsp1_ahb_iface_clk");
+
+ ret = clk_get_set_enable(clk_name, 0, 1);
+
+ if (ret) {
+ dprintf(CRITICAL, "%s: Failed to enable %s clock\n",
+ __func__, clk_name);
+ return;
+ }
+
+ snprintf(clk_name, sizeof(clk_name), "gcc_blsp1_qup%u_spi_apps_clk",
+ qup_id);
+
+ /* Set the highest clk frequency by default for good performance. */
+ ret = clk_get_set_enable(clk_name, rate, 1);
+
+ if (ret) {
+ dprintf(CRITICAL, "%s: Failed to enable %s\n",
+ __func__, clk_name);
+ return;
+ }
+}
diff --git a/platform/msm8952/gpio.c b/platform/msm8952/gpio.c
index 05b4977..19e6bbe 100644
--- a/platform/msm8952/gpio.c
+++ b/platform/msm8952/gpio.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -47,6 +47,12 @@
return;
}
+void gpio_set(uint32_t gpio, uint32_t dir)
+{
+ writel(dir, (uint32_t *)GPIO_IN_OUT_ADDR(gpio));
+ return;
+}
+
void gpio_set_dir(uint32_t gpio, uint32_t dir)
{
writel(dir, (uint32_t *)GPIO_IN_OUT_ADDR(gpio));
@@ -70,3 +76,72 @@
gpio_tlmm_config(4, 2, GPIO_OUTPUT, GPIO_NO_PULL,
GPIO_8MA, GPIO_DISABLE);
}
+
+void gpio_config_blsp_spi(uint8_t blsp_id, uint8_t qup_id)
+{
+
+ if (blsp_id == BLSP_ID_1) {
+ switch (qup_id) {
+ case QUP_ID_2:
+ /* configure SPI MOSI gpio */
+ gpio_tlmm_config(8, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI MISO gpio */
+ gpio_tlmm_config(9, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI CS_N gpio */
+ gpio_tlmm_config(11, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI CLK gpio */
+ gpio_tlmm_config(10, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+ break;
+ case QUP_ID_3:
+ /* configure SPI MOSI gpio */
+ gpio_tlmm_config(12, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI MISO gpio */
+ gpio_tlmm_config(13, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI CS_N gpio */
+ gpio_tlmm_config(14, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI CLK gpio */
+ gpio_tlmm_config(15, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+ break;
+ case QUP_ID_4:
+ /* configure SPI MOSI gpio */
+ gpio_tlmm_config(16, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI MISO gpio */
+ gpio_tlmm_config(17, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI CS_N gpio */
+ gpio_tlmm_config(18, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+
+ /* configure SPI CLK gpio */
+ gpio_tlmm_config(19, 1, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_16MA, GPIO_DISABLE);
+ break;
+ case QUP_ID_0:
+ case QUP_ID_1:
+ case QUP_ID_5:
+ default:
+ dprintf(CRITICAL, "Incorrect QUP id %d\n", qup_id);
+ ASSERT(0);
+ };
+ } else {
+ dprintf(CRITICAL, "Incorrect BLSP id %d\n", blsp_id);
+ ASSERT(0);
+ }
+}
diff --git a/platform/msm8952/include/platform/clock.h b/platform/msm8952/include/platform/clock.h
index e6734cb..8d8c3c2 100644
--- a/platform/msm8952/include/platform/clock.h
+++ b/platform/msm8952/include/platform/clock.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, 2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2018, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -99,4 +99,5 @@
uint8_t pclk0_n, uint8_t pclk0_d);
void gcc_dsi_lp_clock_enable(uint32_t flags);
void gcc_dsi_clocks_disable(uint32_t flags);
+void clock_config_blsp_spi(uint8_t blsp_id, uint8_t qup_id, unsigned long rate);
#endif
diff --git a/platform/msm8952/include/platform/gpio.h b/platform/msm8952/include/platform/gpio.h
index b4d12e8..6ebd37f 100644
--- a/platform/msm8952/include/platform/gpio.h
+++ b/platform/msm8952/include/platform/gpio.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -69,4 +69,5 @@
uint8_t pull,
uint8_t drvstr,
uint32_t enable);
+void gpio_config_blsp_spi(uint8_t blsp_id, uint8_t qup_id);
#endif
diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 057d909..eea0d80 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -71,7 +71,7 @@
#define MSM_USB_BASE (PERIPH_SS_BASE + 0x000DB000)
#define CLK_CTL_BASE 0x1800000
-
+#define BLSP_QUP_BASE(blsp_id, qup_id) (PERIPH_SS_BASE + 0xB5000 + 0x1000 * qup_id)
#define PMI_SLAVE_BASE 2
#define PMI_FIRST_SLAVE_OFFSET 0
#define PMI_SECOND_SLAVE_OFFSET 1
@@ -151,6 +151,28 @@
#define BLSP1_UART2_APPS_N (CLK_CTL_BASE + 0x3040)
#define BLSP1_UART2_APPS_D (CLK_CTL_BASE + 0x3044)
+#define GCC_BLSP1_QUP3_SPI_APPS_CBCR (CLK_CTL_BASE + 0x401C)
+#define GCC_BLSP1_QUP3_SPI_APPS_CMD_RCGR (CLK_CTL_BASE + 0x4024)
+#define GCC_BLSP1_QUP3_SPI_CFG_RCGR (CLK_CTL_BASE + 0x4028)
+#define GCC_BLSP1_QUP3_SPI_APPS_M (CLK_CTL_BASE + 0x402C)
+#define GCC_BLSP1_QUP3_SPI_APPS_N (CLK_CTL_BASE + 0x4030)
+#define GCC_BLSP1_QUP3_SPI_APPS_D (CLK_CTL_BASE + 0x4034)
+
+#define GCC_BLSP1_QUP4_SPI_APPS_CBCR (CLK_CTL_BASE + 0x501C)
+#define GCC_BLSP1_QUP4_SPI_APPS_CMD_RCGR (CLK_CTL_BASE + 0x5024)
+#define GCC_BLSP1_QUP4_SPI_CFG_RCGR (CLK_CTL_BASE + 0x5028)
+#define GCC_BLSP1_QUP4_SPI_APPS_M (CLK_CTL_BASE + 0x502C)
+#define GCC_BLSP1_QUP4_SPI_APPS_N (CLK_CTL_BASE + 0x5030)
+#define GCC_BLSP1_QUP4_SPI_APPS_D (CLK_CTL_BASE + 0x5034)
+
+#define GCC_BLSP1_QUP5_SPI_APPS_CBCR (CLK_CTL_BASE + 0x601C)
+#define GCC_BLSP1_QUP5_SPI_APPS_CMD_RCGR (CLK_CTL_BASE + 0x6024)
+#define GCC_BLSP1_QUP5_SPI_CFG_RCGR (CLK_CTL_BASE + 0x6028)
+#define GCC_BLSP1_QUP5_SPI_APPS_M (CLK_CTL_BASE + 0x602C)
+#define GCC_BLSP1_QUP5_SPI_APPS_N (CLK_CTL_BASE + 0x6030)
+#define GCC_BLSP1_QUP5_SPI_APPS_D (CLK_CTL_BASE + 0x6034)
+
+
/* USB */
#define USB_HS_BCR (CLK_CTL_BASE + 0x41000)
#define USB_HS_SYSTEM_CBCR (CLK_CTL_BASE + 0x41004)
diff --git a/platform/msm8952/include/platform/irqs.h b/platform/msm8952/include/platform/irqs.h
index 59408bd..6434358 100644
--- a/platform/msm8952/include/platform/irqs.h
+++ b/platform/msm8952/include/platform/irqs.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -48,7 +48,7 @@
#define USB1_HS_IRQ (GIC_SPI_START + 134)
#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
-
+#define BLSP_QUP_IRQ(blsp_id, qup_id) (GIC_SPI_START + 95 + qup_id)
/* Retrofit universal macro names */
#define INT_USB_HS USB1_HS_IRQ
diff --git a/platform/msm8952/msm8952-clock.c b/platform/msm8952/msm8952-clock.c
index 85d5069..0da464a 100644
--- a/platform/msm8952/msm8952-clock.c
+++ b/platform/msm8952/msm8952-clock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, 2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2016, 2018, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -342,6 +342,94 @@
},
};
+static struct clk_freq_tbl ftbl_gcc_blsp1_qup1_spi_apps_clk[] = {
+ F( 960000, cxo, 10, 1, 2),
+ F( 4800000, cxo, 4, 0, 0),
+ F( 9600000, cxo, 2, 0, 0),
+ F( 16000000, gpll0, 10, 1, 5),
+ F( 19200000, cxo, 1, 0, 0),
+ F( 25000000, gpll0, 16, 1, 2),
+ F( 50000000, gpll0, 16, 0, 0),
+ F_END
+};
+
+static struct rcg_clk gcc_blsp1_qup3_spi_apps_clk_src = {
+ .cmd_reg = (uint32_t *) GCC_BLSP1_QUP3_SPI_APPS_CMD_RCGR,
+ .cfg_reg = (uint32_t *) GCC_BLSP1_QUP3_SPI_CFG_RCGR,
+ .m_reg = (uint32_t *) GCC_BLSP1_QUP3_SPI_APPS_M,
+ .n_reg = (uint32_t *) GCC_BLSP1_QUP3_SPI_APPS_N,
+ .d_reg = (uint32_t *) GCC_BLSP1_QUP3_SPI_APPS_D,
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_qup1_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "gcc_blsp1_qup3_spi_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup3_spi_apps_clk = {
+ .cbcr_reg = (uint32_t *) GCC_BLSP1_QUP3_SPI_APPS_CBCR,
+ .parent = &gcc_blsp1_qup3_spi_apps_clk_src.c,
+ .c = {
+ .dbg_name = "gcc_blsp1_qup3_spi_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct rcg_clk gcc_blsp1_qup4_spi_apps_clk_src = {
+ .cmd_reg = (uint32_t *) GCC_BLSP1_QUP4_SPI_APPS_CMD_RCGR,
+ .cfg_reg = (uint32_t *) GCC_BLSP1_QUP4_SPI_CFG_RCGR,
+ .m_reg = (uint32_t *) GCC_BLSP1_QUP4_SPI_APPS_M,
+ .n_reg = (uint32_t *) GCC_BLSP1_QUP4_SPI_APPS_N,
+ .d_reg = (uint32_t *) GCC_BLSP1_QUP4_SPI_APPS_D,
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_qup1_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "gcc_blsp1_qup4_spi_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup4_spi_apps_clk = {
+ .cbcr_reg = (uint32_t *) GCC_BLSP1_QUP4_SPI_APPS_CBCR,
+ .parent = &gcc_blsp1_qup4_spi_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_blsp1_qup4_spi_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct rcg_clk gcc_blsp1_qup5_spi_apps_clk_src = {
+ .cmd_reg = (uint32_t *) GCC_BLSP1_QUP5_SPI_APPS_CMD_RCGR,
+ .cfg_reg = (uint32_t *) GCC_BLSP1_QUP5_SPI_CFG_RCGR,
+ .m_reg = (uint32_t *) GCC_BLSP1_QUP5_SPI_APPS_M,
+ .n_reg = (uint32_t *) GCC_BLSP1_QUP5_SPI_APPS_N,
+ .d_reg = (uint32_t *) GCC_BLSP1_QUP5_SPI_APPS_D,
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_qup1_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "gcc_blsp1_qup5_spi_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup5_spi_apps_clk = {
+ .cbcr_reg = (uint32_t *) GCC_BLSP1_QUP5_SPI_APPS_CBCR,
+ .parent = &gcc_blsp1_qup5_spi_apps_clk_src.c,
+ .c = {
+ .dbg_name = "gcc_blsp1_qup5_spi_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+
/* USB Clocks */
static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] =
{
@@ -608,6 +696,13 @@
CLK_LOOKUP("usb_iface_clk", gcc_usb_hs_ahb_clk.c),
CLK_LOOKUP("usb_core_clk", gcc_usb_hs_system_clk.c),
+ CLK_LOOKUP("blsp1_ahb_iface_clk", gcc_blsp1_ahb_clk.c),
+ CLK_LOOKUP("gcc_blsp1_qup3_spi_apps_clk_src", gcc_blsp1_qup3_spi_apps_clk_src.c),
+ CLK_LOOKUP("gcc_blsp1_qup3_spi_apps_clk", gcc_blsp1_qup3_spi_apps_clk.c),
+ CLK_LOOKUP("gcc_blsp1_qup4_spi_apps_clk_src", gcc_blsp1_qup4_spi_apps_clk_src.c),
+ CLK_LOOKUP("gcc_blsp1_qup4_spi_apps_clk", gcc_blsp1_qup4_spi_apps_clk.c),
+ CLK_LOOKUP("gcc_blsp1_qup5_spi_apps_clk_src", gcc_blsp1_qup5_spi_apps_clk_src.c),
+ CLK_LOOKUP("gcc_blsp1_qup5_spi_apps_clk", gcc_blsp1_qup5_spi_apps_clk.c),
CLK_LOOKUP("mdp_ahb_clk", mdp_ahb_clk.c),
CLK_LOOKUP("mdss_esc0_clk", mdss_esc0_clk.c),
diff --git a/platform/msm8952/rules.mk b/platform/msm8952/rules.mk
index c1d86c8..0dc2280 100644
--- a/platform/msm8952/rules.mk
+++ b/platform/msm8952/rules.mk
@@ -11,6 +11,7 @@
MMC_SLOT := 1
DEFINES += PERIPH_BLK_BLSP=1
+DEFINES += QM215_MDSS_SPI=1
DEFINES += WITH_CPU_EARLY_INIT=0 WITH_CPU_WARM_BOOT=0 \
MMC_SLOT=$(MMC_SLOT) SSD_ENABLE
diff --git a/platform/msm_shared/mdss_spi.c b/platform/msm_shared/mdss_spi.c
index fccbffd..386a56b 100644
--- a/platform/msm_shared/mdss_spi.c
+++ b/platform/msm_shared/mdss_spi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -31,13 +31,23 @@
#include <msm_panel.h>
#include <target/display.h>
#include <platform/gpio.h>
+#include <dev/gpio.h>
+#include <platform/timer.h>
#define SUCCESS 0
#define FAIL 1
static struct qup_spi_dev *dev = NULL;
-static int mdss_spi_write_cmd(const char *buf)
+#if QM215_MDSS_SPI
+static struct gpio_pin spi_dc_gpio = {
+ "msmgpio", 64, 3, 1, 0, 1
+};
+
+#define SPI_BLSP_ID 1
+#define SPI_QUP_ID 2
+#endif
+static int mdss_spi_write_cmd(const unsigned char *buf)
{
int ret = 0;
@@ -58,7 +68,7 @@
return ret;
}
-static int mdss_spi_write_data(const char *buf, size_t len)
+static int mdss_spi_write_data(const unsigned char *buf, size_t len)
{
int ret = 0;
@@ -78,7 +88,7 @@
return ret;
}
-static int mdss_spi_write_frame(const char *buf, size_t len)
+static int mdss_spi_write_frame(const unsigned char *buf, size_t len)
{
int ret = 0;
@@ -102,14 +112,14 @@
int ret = 0;
if (!dev) {
- dprintf(CRITICAL, "SPI has not been initialized\n");
- return -ENODEV;
+ dprintf(CRITICAL, "SPI has not been initialized\n");
+ return;
}
dev->bytes_per_word = 1;
dev->bit_shift_en = 1;
gpio_set(spi_dc_gpio.pin_id, 0);
- ret = spi_qup_transfer(dev, buf, len);
+ ret = spi_qup_read(dev, buf, len);
gpio_set(spi_dc_gpio.pin_id, 2);
if (ret)
@@ -137,7 +147,6 @@
int mdss_spi_panel_init(struct msm_panel_info *pinfo)
{
int cmd_count = 0;
- int ret = 0;
while (cmd_count < pinfo->spi.num_of_panel_cmds) {
if (pinfo->spi.panel_cmds[cmd_count].cmds_post_tg){
@@ -145,10 +154,10 @@
continue;
}
- mdss_spi_write_cmd(pinfo->spi.panel_cmds[cmd_count].payload);
+ mdss_spi_write_cmd((unsigned char *) pinfo->spi.panel_cmds[cmd_count].payload);
if (pinfo->spi.panel_cmds[cmd_count].size > 1)
mdss_spi_write_data(
- pinfo->spi.panel_cmds[cmd_count].payload + 1,
+ (unsigned char *) pinfo->spi.panel_cmds[cmd_count].payload + 1,
pinfo->spi.panel_cmds[cmd_count].size - 1);
if (pinfo->spi.panel_cmds[cmd_count].wait)
@@ -185,9 +194,9 @@
while (cmd_count < pinfo->spi.num_of_panel_cmds) {
if (pinfo->spi.panel_cmds[cmd_count].cmds_post_tg){
payload = pinfo->spi.panel_cmds[cmd_count].payload;
- mdss_spi_write_cmd(payload);
+ mdss_spi_write_cmd((unsigned char *) payload);
if (pinfo->spi.panel_cmds[cmd_count].size > 1)
- mdss_spi_write_data(payload + 1,
+ mdss_spi_write_data((unsigned char *) payload + 1,
pinfo->spi.panel_cmds[cmd_count].size
- 1);
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
old mode 100755
new mode 100644
index 3f0f003..cfbff7f
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -624,6 +624,8 @@
$(LOCAL_DIR)/qseecom_lk.o \
$(LOCAL_DIR)/dev_tree.o \
$(LOCAL_DIR)/gpio.o \
+ $(LOCAL_DIR)/spi_qup.o \
+ $(LOCAL_DIR)/mdss_spi.o \
$(LOCAL_DIR)/dload_util.o \
$(LOCAL_DIR)/shutdown_detect.o \
$(LOCAL_DIR)/certificate.o \
diff --git a/platform/msm_shared/spi_qup.c b/platform/msm_shared/spi_qup.c
index 22359fe..d7bab01 100644
--- a/platform/msm_shared/spi_qup.c
+++ b/platform/msm_shared/spi_qup.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, 2020, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -300,7 +300,7 @@
static void spi_qup_fifo_read(struct qup_spi_dev *dev, struct spi_transfer *xfer)
{
unsigned char *rx_buf = xfer->rx_buf;
- unsigned int word, state, data;
+ unsigned int word, state;
unsigned int idx, shift;
while (dev->rx_bytes < xfer->len) {
@@ -410,7 +410,7 @@
if (!xfer || !dev)
return ret;
- mTmpbuff = xfer->rx_buf > 0 ? xfer->rx_buf : xfer->tx_buf;
+ mTmpbuff = xfer->rx_buf ? (unsigned char *) xfer->rx_buf : (unsigned char *) xfer->tx_buf;
if (!mTmpbuff || !xfer->len)
return ret;
diff --git a/target/msm8952/oem_panel.c b/target/msm8952/oem_panel.c
index 0a20579..eac085d 100644
--- a/target/msm8952/oem_panel.c
+++ b/target/msm8952/oem_panel.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, 2018-2019 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2016, 2018-2020 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -69,6 +69,7 @@
#include "include/panel_truly_rm69090_qvga_cmd.h"
#include "include/panel_nt35695b_truly_fhd_video.h"
#include "include/panel_nt35695b_truly_fhd_cmd.h"
+#include "include/panel_st7789v2_320p_spi_cmd.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -98,6 +99,7 @@
NT35695B_TRULY_FHD_CMD_PANEL,
RM67162_QVGA_CMD_PANEL,
RM69090_QVGA_CMD_PANEL,
+ ST7789v2_320P_SPI_CMD_PANEL,
UNKNOWN_PANEL
};
@@ -134,6 +136,7 @@
{"nt35695b_truly_fhd_cmd", NT35695B_TRULY_FHD_CMD_PANEL},
{"rm67162_qvga_cmd", RM67162_QVGA_CMD_PANEL},
{"rm69090_qvga_cmd", RM69090_QVGA_CMD_PANEL},
+ {"st7789v2_320p_cmd", ST7789v2_320P_SPI_CMD_PANEL},
};
static uint32_t panel_id;
@@ -953,6 +956,18 @@
pinfo->mipi.signature = NT35695B_TRULY_FHD_CMD_SIGNATURE;
pinfo->mipi.tx_eot_append = true;
break;
+ case ST7789v2_320P_SPI_CMD_PANEL:
+ panelstruct->paneldata = &st7789v2_320p_cmd_panel_data;
+ panelstruct->panelres = &st7789v2_320p_cmd_panel_res;
+ panelstruct->color = &st7789v2_320p_cmd_color;
+ panelstruct->panelresetseq = &st7789v2_320p_cmd_reset_seq;
+ panelstruct->backlightinfo = &st7789v2_320p_cmd_backlight;
+ pinfo->spi.panel_cmds = st7789v2_320p_cmd_on_command;
+ pinfo->spi.num_of_panel_cmds = ST7789v2_320p_CMD_ON_COMMAND;
+ pinfo->spi.signature_addr = &st7789v2_signature_addr;
+ pinfo->spi.signature = st7789v2_signature;
+ pan_type = PANEL_TYPE_SPI;
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
diff --git a/target/msm8952/target_display.c b/target/msm8952/target_display.c
index af32186..32e5246 100644
--- a/target/msm8952/target_display.c
+++ b/target/msm8952/target_display.c
@@ -683,6 +683,8 @@
ldo_num &= ~(REG_LDO17 | REG_LDO5);
ldo_num |= REG_LDO13 | REG_LDO15;
}
+ if (platform_is_qm215() && (pinfo->type == SPI_PANEL))
+ ldo_num |= REG_LDO17;
if (enable) {
regulator_enable(ldo_num);