msm8960: Add async reset support for CE1
CRs-Fixed: 331832
Change-Id: I1b377ec4e9f12f841de8692808f8cb1e752b8538
diff --git a/platform/msm8960/acpuclock.c b/platform/msm8960/acpuclock.c
index 1b4a11e..0301de8 100644
--- a/platform/msm8960/acpuclock.c
+++ b/platform/msm8960/acpuclock.c
@@ -264,3 +264,25 @@
writel((1 << 4), CE1_CORE_CLK_CTL);
return;
}
+
+/* Async Reset CE1 */
+void ce_async_reset()
+{
+ /* Enable Async reset bit for HCLK CE1 */
+ writel((1<<7) | (1 << 4), CE1_HCLK_CTL);
+ /* Enable Async reset bit for core clk for CE1 */
+ writel((1<<7) | (1 << 4), CE1_CORE_CLK_CTL);
+
+ /* Add a small delay between switching the
+ * async intput from high to low
+ */
+ udelay(2);
+
+ /* Disable Async reset bit for HCLK for CE1 */
+ writel((1 << 4), CE1_HCLK_CTL);
+ /* Disable Async reset bit for core clk for CE1 */
+ writel((1 << 4), CE1_CORE_CLK_CTL);
+
+ return;
+}
+
diff --git a/platform/msm_shared/crypto4_eng.c b/platform/msm_shared/crypto4_eng.c
index aeeca5f..62f5666 100755
--- a/platform/msm_shared/crypto4_eng.c
+++ b/platform/msm_shared/crypto4_eng.c
@@ -37,6 +37,7 @@
#include <scm.h>
extern void dsb(void);
+extern void ce_async_reset();
/*
* Function to reset the crypto engine.
@@ -44,6 +45,7 @@
void crypto_eng_reset(void)
{
+ ce_async_reset();
return;
}