platform: mdm9640,msm_shared: Rename target sdxhedgehog to sdx20
Rename target sdxhedgehog to sdx20.
Change-Id: I68ab342a7ff84f622915a1fba40b3b33856503e2
diff --git a/include/platform.h b/include/platform.h
index 884d29e..292cd1a 100644
--- a/include/platform.h
+++ b/include/platform.h
@@ -1,7 +1,7 @@
/*
* Copyright (c) 2008 Travis Geiselbrecht
*
- * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files
@@ -86,7 +86,7 @@
void get_baseband_version(unsigned char *buf);
bool is_device_locked();
bool platform_is_mdm9650();
-bool platform_is_sdxhedgehog();
+bool platform_is_sdx20();
uint64_t platform_get_ddr_start();
bool platform_is_glink_enabled();
bool platform_is_mdm9206();
diff --git a/platform/mdm9640/acpuclock.c b/platform/mdm9640/acpuclock.c
index 74f86c9..5faa147 100644
--- a/platform/mdm9640/acpuclock.c
+++ b/platform/mdm9640/acpuclock.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -106,8 +106,8 @@
clock_usb30_gdsc_enable();
- if (platform_is_sdxhedgehog())
- ret = clk_get_set_enable("usb30_master_clk_sdxhedgehog", 200000000, 1);
+ if (platform_is_sdx20())
+ ret = clk_get_set_enable("usb30_master_clk_sdx20", 200000000, 1);
else
ret = clk_get_set_enable("usb30_master_clk", 125000000, 1);
if(ret)
@@ -118,8 +118,8 @@
if (platform_is_mdm9650())
ret = clk_get_set_enable("usb30_pipe_clk_mdm9650", 0, 1);
- else if (platform_is_sdxhedgehog())
- ret = clk_get_set_enable("usb30_pipe_clk_sdxhedgehog", 0, 1);
+ else if (platform_is_sdx20())
+ ret = clk_get_set_enable("usb30_pipe_clk_sdx20", 0, 1);
else
ret = clk_get_set_enable("usb30_pipe_clk", 19200000, 1);
@@ -136,8 +136,8 @@
ASSERT(0);
}
- if (platform_is_sdxhedgehog())
- ret = clk_get_set_enable("usb30_mock_utmi_clk_sdxhedgehog", 19200000, 1);
+ if (platform_is_sdx20())
+ ret = clk_get_set_enable("usb30_mock_utmi_clk_sdx20", 19200000, 1);
else
ret = clk_get_set_enable("usb30_mock_utmi_clk", 60000000, true);
if(ret)
@@ -183,8 +183,8 @@
int ret = 0;
char clk_name[64];
- if(platform_is_sdxhedgehog())
- snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk_sdxhedgehog", interface);
+ if(platform_is_sdx20())
+ snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk_sdx20", interface);
else
snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk", interface);
@@ -251,8 +251,8 @@
phy_reset_clk = clk_get("usb30_phy_reset");
ASSERT(phy_reset_clk);
- if(platform_is_sdxhedgehog()){
- pipe_reset_clk = clk_get("usb30_pipe_clk_sdxhedgehog");
+ if(platform_is_sdx20()){
+ pipe_reset_clk = clk_get("usb30_pipe_clk_sdx20");
ASSERT(pipe_reset_clk);
}
else{
diff --git a/platform/mdm9640/mdm9640-clock.c b/platform/mdm9640/mdm9640-clock.c
index bc47cac..8746183 100644
--- a/platform/mdm9640/mdm9640-clock.c
+++ b/platform/mdm9640/mdm9640-clock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -147,7 +147,7 @@
},
};
-static struct clk_freq_tbl ftbl_gcc_sdcc1_2_apps_clk_sdxhedgehog[] =
+static struct clk_freq_tbl ftbl_gcc_sdcc1_2_apps_clk_sdx20[] =
{
F( 144000, cxo, 16, 3, 25),
F( 400000, cxo, 12, 1, 4),
@@ -158,7 +158,7 @@
F_END
};
-static struct rcg_clk sdcc1_apps_clk_src_sdxhedgehog =
+static struct rcg_clk sdcc1_apps_clk_src_sdx20 =
{
.cmd_reg = (uint32_t *) SDCC1_CMD_RCGR,
.cfg_reg = (uint32_t *) SDCC1_CFG_RCGR,
@@ -167,7 +167,7 @@
.d_reg = (uint32_t *) SDCC1_D,
.set_rate = clock_lib2_rcg_set_rate_mnd,
- .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk_sdxhedgehog,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk_sdx20,
.current_freq = &rcg_dummy_freq,
.c = {
@@ -176,10 +176,10 @@
},
};
-static struct branch_clk gcc_sdcc1_apps_clk_sdxhedgehog =
+static struct branch_clk gcc_sdcc1_apps_clk_sdx20 =
{
.cbcr_reg = (uint32_t *) SDCC1_APPS_CBCR,
- .parent = &sdcc1_apps_clk_src_sdxhedgehog.c,
+ .parent = &sdcc1_apps_clk_src_sdx20.c,
.c = {
.dbg_name = "gcc_sdcc1_apps_clk",
@@ -316,7 +316,7 @@
},
};
-static struct clk_freq_tbl ftbl_gcc_usb30_master_clk_sdxhedgehog[] =
+static struct clk_freq_tbl ftbl_gcc_usb30_master_clk_sdx20[] =
{
F(30000000, gpll0, 10, 0, 0),
F(60000000, gpll0, 5, 0, 0),
@@ -326,7 +326,7 @@
F_END
};
-static struct rcg_clk usb30_master_clk_src_sdxhedgehog =
+static struct rcg_clk usb30_master_clk_src_sdx20 =
{
.cmd_reg = (uint32_t *) GCC_USB30_MASTER_CMD_RCGR,
.cfg_reg = (uint32_t *) GCC_USB30_MASTER_CFG_RCGR,
@@ -335,11 +335,11 @@
.d_reg = (uint32_t *) GCC_USB30_MASTER_D,
.set_rate = clock_lib2_rcg_set_rate_mnd,
- .freq_tbl = ftbl_gcc_usb30_master_clk_sdxhedgehog,
+ .freq_tbl = ftbl_gcc_usb30_master_clk_sdx20,
.current_freq = &rcg_dummy_freq,
.c = {
- .dbg_name = "usb30_master_clk_src_sdxhedgehog",
+ .dbg_name = "usb30_master_clk_src_sdx20",
.ops = &clk_ops_rcg,
},
};
@@ -356,14 +356,14 @@
},
};
-static struct branch_clk gcc_usb30_master_clk_sdxhedgehog =
+static struct branch_clk gcc_usb30_master_clk_sdx20 =
{
.cbcr_reg = (uint32_t *) GCC_USB30_MASTER_CBCR,
.bcr_reg = (uint32_t *) USB_30_BCR,
- .parent = &usb30_master_clk_src_sdxhedgehog.c,
+ .parent = &usb30_master_clk_src_sdx20.c,
.c = {
- .dbg_name = "gcc_usb30_master_clk_sdxhedgehog",
+ .dbg_name = "gcc_usb30_master_clk_sdx20",
.ops = &clk_ops_branch,
},
};
@@ -399,14 +399,14 @@
},
};
-static struct branch_clk gcc_usb30_pipe_clk_sdxhedgehog = {
+static struct branch_clk gcc_usb30_pipe_clk_sdx20 = {
.bcr_reg = (uint32_t *) USB3_PIPE_BCR,
.cbcr_reg = (uint32_t *) USB3_PIPE_CBCR,
.has_sibling = 1,
.halt_check = 0,
.c = {
- .dbg_name = "usb30_pipe_clk_sdxhedgehog",
+ .dbg_name = "usb30_pipe_clk_sdx20",
.ops = &clk_ops_branch,
},
};
@@ -543,20 +543,20 @@
},
};
-static struct clk_freq_tbl ftbl_gcc_usb30_mock_utmi_clk_src_sdxhedgehog[] = {
+static struct clk_freq_tbl ftbl_gcc_usb30_mock_utmi_clk_src_sdx20[] = {
F( 19200000, cxo, 1, 0, 0),
F_END
};
-static struct rcg_clk usb30_mock_utmi_clk_src_sdxhedgehog = {
+static struct rcg_clk usb30_mock_utmi_clk_src_sdx20 = {
.cmd_reg = (uint32_t *) USB30_MOCK_UTMI_CMD_RCGR,
.cfg_reg = (uint32_t *) USB30_MOCK_UTMI_CFG_RCGR,
.set_rate = clock_lib2_rcg_set_rate_hid,
- .freq_tbl = ftbl_gcc_usb30_mock_utmi_clk_src_sdxhedgehog,
+ .freq_tbl = ftbl_gcc_usb30_mock_utmi_clk_src_sdx20,
.current_freq = &rcg_dummy_freq,
.c = {
- .dbg_name = "usb30_mock_utmi_clk_src_sdxhedgehog",
+ .dbg_name = "usb30_mock_utmi_clk_src_sdx20",
.ops = &clk_ops_rcg,
},
};
@@ -572,13 +572,13 @@
},
};
-static struct branch_clk gcc_usb30_mock_utmi_clk_sdxhedgehog = {
+static struct branch_clk gcc_usb30_mock_utmi_clk_sdx20 = {
.cbcr_reg = (uint32_t *) USB30_MOCK_UTMI_CBCR,
.has_sibling = 0,
- .parent = &usb30_mock_utmi_clk_src_sdxhedgehog.c,
+ .parent = &usb30_mock_utmi_clk_src_sdx20.c,
.c = {
- .dbg_name = "usb30_mock_utmi_clk_sdxhedgehog",
+ .dbg_name = "usb30_mock_utmi_clk_sdx20",
.ops = &clk_ops_branch,
},
};
@@ -599,24 +599,24 @@
{
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
- CLK_LOOKUP("sdc1_core_clk_sdxhedgehog", gcc_sdcc1_apps_clk_sdxhedgehog.c),
+ CLK_LOOKUP("sdc1_core_clk_sdx20", gcc_sdcc1_apps_clk_sdx20.c),
CLK_LOOKUP("uart3_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart3_core_clk", gcc_blsp1_uart3_apps_clk.c),
CLK_LOOKUP("usb30_iface_clk", gcc_sys_noc_usb30_axi_clk.c),
CLK_LOOKUP("usb30_master_clk", gcc_usb30_master_clk.c),
- CLK_LOOKUP("usb30_master_clk_sdxhedgehog", gcc_usb30_master_clk_sdxhedgehog.c),
+ CLK_LOOKUP("usb30_master_clk_sdx20", gcc_usb30_master_clk_sdx20.c),
CLK_LOOKUP("usb30_pipe_clk", gcc_usb30_pipe_clk.c),
CLK_LOOKUP("usb30_pipe_clk_mdm9650", gcc_usb30_pipe_clk_mdm9650.c),
- CLK_LOOKUP("usb30_pipe_clk_sdxhedgehog", gcc_usb30_pipe_clk_sdxhedgehog.c),
+ CLK_LOOKUP("usb30_pipe_clk_sdx20", gcc_usb30_pipe_clk_sdx20.c),
CLK_LOOKUP("usb30_aux_clk", gcc_usb30_aux_clk.c),
CLK_LOOKUP("usb2b_phy_sleep_clk", gcc_usb2a_phy_sleep_clk.c),
CLK_LOOKUP("usb30_phy_reset", gcc_usb30_phy_reset.c),
CLK_LOOKUP("usb30_mock_utmi_clk", gcc_usb30_mock_utmi_clk.c),
- CLK_LOOKUP("usb30_mock_utmi_clk_sdxhedgehog", gcc_usb30_mock_utmi_clk_sdxhedgehog.c),
+ CLK_LOOKUP("usb30_mock_utmi_clk_sdx20", gcc_usb30_mock_utmi_clk_sdx20.c),
CLK_LOOKUP("usb_phy_cfg_ahb_clk", gcc_usb_phy_cfg_ahb_clk.c),
CLK_LOOKUP("usb30_sleep_clk", gcc_usb30_sleep_clk.c),
CLK_LOOKUP("ce1_ahb_clk", gcc_ce1_ahb_clk.c),
diff --git a/platform/mdm9640/platform.c b/platform/mdm9640/platform.c
index 37a9aa2..1cfc048 100644
--- a/platform/mdm9640/platform.c
+++ b/platform/mdm9640/platform.c
@@ -176,15 +176,15 @@
return ret;
}
-bool platform_is_sdxhedgehog()
+bool platform_is_sdx20()
{
uint32_t platform_id = board_platform_id();
bool ret;
switch(platform_id)
{
- case SDXHEDGEHOG1:
- case SDXHEDGEHOG2:
+ case SDX201:
+ case SDX202:
ret = true;
break;
default:
@@ -198,7 +198,7 @@
{
uint32_t boot_config;
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
boot_config = BOOT_CONFIG_REG_V2;
/* Else the platform is 9x45 */
else if (board_soc_version() >= 0x20000)
@@ -217,7 +217,7 @@
bool platform_is_glink_enabled()
{
- if (platform_is_sdxhedgehog())
+ if (platform_is_sdx20())
return 1;
else
return 0;
diff --git a/platform/msm_shared/include/qusb2_phy.h b/platform/msm_shared/include/qusb2_phy.h
index d446add..4ad7ab7 100644
--- a/platform/msm_shared/include/qusb2_phy.h
+++ b/platform/msm_shared/include/qusb2_phy.h
@@ -51,18 +51,18 @@
#define QUSB2PHY_PLL_STATUS (QUSB2_PHY_BASE + 0x00000038)
-/* QUSB2 PHY SDXHEDGEHOG */
-#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x4)
-#define QUSB2PHY_PLL_DIGITAL_TIMERS_TWO_SDXHEDGEHOG (QUSB2_PHY_BASE + 0xb4)
-#define QUSB2PHY_PLL_CLOCK_INVERTERS_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x18c)
-#define QUSB2PHY_PLL_CMODE_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x02c)
-#define QUSB2PHY_PLL_LOCK_DELAY_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x90)
-#define QUSB2PHY_TUNE1_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x23c)
-#define QUSB2PHY_TUNE2_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x240)
-#define QUSB2PHY_IMP_CTRL1_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x21c)
-#define QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x210)
-#define QUSB2PHY_DEBUG_CTRL2_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x278)
-#define QUSB2PHY_DEBUG_STAT5_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x298)
+/* QUSB2 PHY SDX20 */
+#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDX20 (QUSB2_PHY_BASE + 0x4)
+#define QUSB2PHY_PLL_DIGITAL_TIMERS_TWO_SDX20 (QUSB2_PHY_BASE + 0xb4)
+#define QUSB2PHY_PLL_CLOCK_INVERTERS_SDX20 (QUSB2_PHY_BASE + 0x18c)
+#define QUSB2PHY_PLL_CMODE_SDX20 (QUSB2_PHY_BASE + 0x02c)
+#define QUSB2PHY_PLL_LOCK_DELAY_SDX20 (QUSB2_PHY_BASE + 0x90)
+#define QUSB2PHY_TUNE1_SDX20 (QUSB2_PHY_BASE + 0x23c)
+#define QUSB2PHY_TUNE2_SDX20 (QUSB2_PHY_BASE + 0x240)
+#define QUSB2PHY_IMP_CTRL1_SDX20 (QUSB2_PHY_BASE + 0x21c)
+#define QUSB2PHY_PWR_CTRL1_SDX20 (QUSB2_PHY_BASE + 0x210)
+#define QUSB2PHY_DEBUG_CTRL2_SDX20 (QUSB2_PHY_BASE + 0x278)
+#define QUSB2PHY_DEBUG_STAT5_SDX20 (QUSB2_PHY_BASE + 0x298)
#define USB30_GENERAL_CFG_PIPE 0x08af8808
diff --git a/platform/msm_shared/qusb2_phy.c b/platform/msm_shared/qusb2_phy.c
index 14aa425..48ae058 100644
--- a/platform/msm_shared/qusb2_phy.c
+++ b/platform/msm_shared/qusb2_phy.c
@@ -59,7 +59,7 @@
return 0;
}
-__WEAK int platform_is_sdxhedgehog()
+__WEAK int platform_is_sdx20()
{
return 0;
}
@@ -89,8 +89,8 @@
dmb();
/* set CLAMP_N_EN and stay with disabled USB PHY */
- if(platform_is_sdxhedgehog())
- writel(0x23, QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG);
+ if(platform_is_sdx20())
+ writel(0x23, QUSB2PHY_PWR_CTRL1_SDX20);
else
writel(0x23, QUSB2PHY_PORT_POWERDOWN);
@@ -131,22 +131,22 @@
writel(0x9F, QUSB2PHY_PLL_AUTOPGM_CTL1);
writel(0x00, QUSB2PHY_PLL_PWR_CTL);
}
- else if (platform_is_sdxhedgehog())
+ else if (platform_is_sdx20())
{
/* HPG init sequence 0x13 for CML and 0x03 for CMOS */
if (se_clock)
- writel(0x03, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDXHEDGEHOG);
+ writel(0x03, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDX20);
else
- writel(0x13, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDXHEDGEHOG);
+ writel(0x13, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDX20);
- writel(0x7C, QUSB2PHY_PLL_CLOCK_INVERTERS_SDXHEDGEHOG);
- writel(0x80, QUSB2PHY_PLL_CMODE_SDXHEDGEHOG);
- writel(0x0a, QUSB2PHY_PLL_LOCK_DELAY_SDXHEDGEHOG);
- writel(0x19, QUSB2PHY_PLL_DIGITAL_TIMERS_TWO_SDXHEDGEHOG);
- writel(0xa5, QUSB2PHY_TUNE1_SDXHEDGEHOG);
- writel(0x09, QUSB2PHY_TUNE2_SDXHEDGEHOG);
- writel(0x00, QUSB2PHY_IMP_CTRL1_SDXHEDGEHOG);
- writel(0x22, QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG);
+ writel(0x7C, QUSB2PHY_PLL_CLOCK_INVERTERS_SDX20);
+ writel(0x80, QUSB2PHY_PLL_CMODE_SDX20);
+ writel(0x0a, QUSB2PHY_PLL_LOCK_DELAY_SDX20);
+ writel(0x19, QUSB2PHY_PLL_DIGITAL_TIMERS_TWO_SDX20);
+ writel(0xa5, QUSB2PHY_TUNE1_SDX20);
+ writel(0x09, QUSB2PHY_TUNE2_SDX20);
+ writel(0x00, QUSB2PHY_IMP_CTRL1_SDX20);
+ writel(0x22, QUSB2PHY_PWR_CTRL1_SDX20);
}
else
{
@@ -168,9 +168,9 @@
writel(0x0, QUSB2PHY_PORT_UTMI_CTRL2);
/* set CLAMP_N_EN and USB PHY is enabled*/
- if (platform_is_sdxhedgehog()){
- writel(0x22, QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG);
- writel(0x04, QUSB2PHY_DEBUG_CTRL2_SDXHEDGEHOG);
+ if (platform_is_sdx20()){
+ writel(0x22, QUSB2PHY_PWR_CTRL1_SDX20);
+ writel(0x04, QUSB2PHY_DEBUG_CTRL2_SDX20);
udelay(88);
}
else{
@@ -183,8 +183,8 @@
*/
if (se_clock)
{
- /* PLL TEST is not valid for sdxhedgehog */
- if(!platform_is_sdxhedgehog())
+ /* PLL TEST is not valid for sdx20 */
+ if(!platform_is_sdx20())
writel(0x80, QUSB2PHY_PLL_TEST);
}
else
@@ -198,8 +198,8 @@
udelay(100);
/* Check PLL status */
- if (platform_is_sdxhedgehog()){
- status_reg = QUSB2PHY_DEBUG_STAT5_SDXHEDGEHOG;
+ if (platform_is_sdx20()){
+ status_reg = QUSB2PHY_DEBUG_STAT5_SDX20;
}
else{
status_reg = QUSB2PHY_PLL_STATUS;
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 2fa7090..5919e47 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -459,8 +459,8 @@
MSM8996AU = 310,
APQ8096AU = 311,
APQ8096SG = 312,
- SDXHEDGEHOG1 = 314,
- SDXHEDGEHOG2 = 333,
+ SDX201 = 314,
+ SDX202 = 333,
MSM8909W = 300,
APQ8009W = 301,
MDM9206 = 322
diff --git a/target/mdm9640/init.c b/target/mdm9640/init.c
index 6eabed2..802e720 100644
--- a/target/mdm9640/init.c
+++ b/target/mdm9640/init.c
@@ -151,7 +151,7 @@
pmic_info_populate();
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
- if(!platform_is_sdxhedgehog())
+ if(!platform_is_sdx20())
{
rpm_smd_init();
}
@@ -214,7 +214,7 @@
{
uint8_t reset_type = 0;
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
{
/* Clear the boot partition select cookie to indicate
* its a normal reset and avoid going to download mode */
@@ -229,7 +229,7 @@
else
reset_type = PON_PSHOLD_HARD_RESET;
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
{
/* PMD9655 is the PMIC used for MDM9650 */
pm8x41_reset_configure(reset_type);
@@ -428,7 +428,7 @@
if (crypto_initialized())
crypto_eng_cleanup();
- if(!platform_is_sdxhedgehog())
+ if(!platform_is_sdx20())
{
rpm_smd_uninit();
}
@@ -471,7 +471,7 @@
/* Reset sequence for 9650 is different from 9x40, use the reset sequence
* from clock driver
*/
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
clock_reset_usb_phy(); // This is the reset function for USB3
else
usb30_qmp_phy_reset();
@@ -487,7 +487,7 @@
ASSERT(t_usb_iface);
t_usb_iface->mux_config = NULL;
- if (platform_is_sdxhedgehog()){
+ if (platform_is_sdx20()){
t_usb_iface->mux_config = target_mux_configure;
t_usb_iface->phy_init = NULL;
}
@@ -502,7 +502,7 @@
uint32_t target_override_pll()
{
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
return 0;
else
return 1;
@@ -609,7 +609,7 @@
struct qmp_reg *target_get_qmp_settings()
{
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
return qmp_settings;
else
return NULL;
@@ -617,7 +617,7 @@
int target_get_qmp_regsize()
{
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
return ARRAY_SIZE(qmp_settings);
else
return 0;
diff --git a/target/mdm9640/keypad.c b/target/mdm9640/keypad.c
index a95375d..625c07c 100644
--- a/target/mdm9640/keypad.c
+++ b/target/mdm9640/keypad.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2014, 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, 2016, 2017 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -45,7 +45,7 @@
{
int ret;
- if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ if (platform_is_mdm9650() || platform_is_sdx20())
ret = pm8x41_resin_status();
else
{