Merge "platform: Add clock related functions to clock header file"
diff --git a/arch/arm/include/arch/arm.h b/arch/arm/include/arch/arm.h
index a14bf9c..e056628 100644
--- a/arch/arm/include/arch/arm.h
+++ b/arch/arm/include/arch/arm.h
@@ -87,6 +87,8 @@
void arm_write_dacr(uint32_t val);
void arm_invalidate_tlb(void);
+void dump_fault_frame(struct arm_fault_frame *frame);
+
#if defined(__cplusplus)
}
#endif
diff --git a/dev/fbcon/fbcon.c b/dev/fbcon/fbcon.c
index 395e338..bc6a328 100644
--- a/dev/fbcon/fbcon.c
+++ b/dev/fbcon/fbcon.c
@@ -244,9 +244,9 @@
unsigned total_y;
unsigned bytes_per_bpp;
unsigned image_base;
- unsigned width, pitch, height;
- unsigned char *logo_base;
- struct logo_img_header *header;
+ unsigned width = 0, pitch = 0, height = 0;
+ unsigned char *logo_base = NULL;
+ struct logo_img_header *header = NULL;
if (!config) {
@@ -268,7 +268,7 @@
#if DISPLAY_TYPE_MIPI
if (bytes_per_bpp == 3)
{
- if(flag) {
+ if(flag && header) {
if (header->width == config->width && header->height == config->height)
return;
else {
diff --git a/dev/gcdb/display/include/panel_hx8379c_fwvga_video.h b/dev/gcdb/display/include/panel_hx8379c_fwvga_video.h
new file mode 100644
index 0000000..3f9c7b3
--- /dev/null
+++ b/dev/gcdb/display/include/panel_hx8379c_fwvga_video.h
@@ -0,0 +1,253 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are
+* met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* * Neither the name of The Linux Foundation nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PANEL_HX8379C_FWVGA_VIDEO_H_
+#define _PANEL_HX8379C_FWVGA_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+static struct panel_config hx8379c_fwvga_video_panel_data = {
+ "qcom,mdss_dsi_hx8379c_fwvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution hx8379c_fwvga_video_panel_res = {
+ 480, 854, 60, 60, 60, 0, 6, 6, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel color information */
+/*---------------------------------------------------------------------------*/
+static struct color_info hx8379c_fwvga_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel on/off command information */
+/*---------------------------------------------------------------------------*/
+static char hx8379c_fwvga_video_on_cmd0[] = {
+ 0x04, 0x00, 0x39, 0xC0,
+ 0xB9, 0xFF, 0x83, 0x79,
+};
+
+static char hx8379c_fwvga_video_on_cmd1[] = {
+ 0x15, 0x00, 0x39, 0xC0,
+ 0xB1, 0x44, 0x1C, 0x1C,
+ 0x31, 0x31, 0x50, 0xD0,
+ 0xEE, 0x54, 0x80, 0x38,
+ 0x38, 0xF8, 0x32, 0x22,
+ 0x22, 0x00, 0x80, 0x30,
+ 0x00, 0xFF, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd2[] = {
+ 0x0A, 0x00, 0x39, 0xC0,
+ 0xB2, 0x80, 0xFE, 0x0B,
+ 0x04, 0x00, 0x50, 0x11,
+ 0x42, 0x1D, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd3[] = {
+ 0x0B, 0x00, 0x39, 0xC0,
+ 0xB4, 0x69, 0x6A, 0x69,
+ 0x6A, 0x69, 0x6A, 0x22,
+ 0x70, 0x23, 0x70, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd4[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCC, 0x02, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd5[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xD2, 0x77, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd6[] = {
+ 0x1E, 0x00, 0x39, 0xC0,
+ 0xD3, 0x00, 0x07, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x32, 0x10, 0x03, 0x00,
+ 0x03, 0x03, 0x60, 0x03,
+ 0x60, 0x00, 0x08, 0x00,
+ 0x08, 0x45, 0x44, 0x08,
+ 0x08, 0x37, 0x08, 0x08,
+ 0x37, 0x09, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd7[] = {
+ 0x21, 0x00, 0x39, 0xC0,
+ 0xD5, 0x18, 0x18, 0x19,
+ 0x19, 0x18, 0x18, 0x20,
+ 0x21, 0x24, 0x25, 0x18,
+ 0x18, 0x18, 0x18, 0x00,
+ 0x01, 0x04, 0x05, 0x02,
+ 0x03, 0x06, 0x07, 0x18,
+ 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0xFF, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd8[] = {
+ 0x21, 0x00, 0x39, 0xC0,
+ 0xD6, 0x18, 0x18, 0x18,
+ 0x18, 0x19, 0x19, 0x25,
+ 0x24, 0x21, 0x20, 0x18,
+ 0x18, 0x18, 0x18, 0x05,
+ 0x04, 0x01, 0x00, 0x03,
+ 0x02, 0x07, 0x06, 0x18,
+ 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0xFF, 0xFF, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd9[] = {
+ 0x2B, 0x00, 0x39, 0xC0,
+ 0xE0, 0x00, 0x10, 0x16,
+ 0x35, 0x39, 0x3F, 0x27,
+ 0x47, 0x07, 0x0B, 0x0C,
+ 0x17, 0x0E, 0x13, 0x16,
+ 0x14, 0x15, 0x07, 0x11,
+ 0x13, 0x18, 0x00, 0x10,
+ 0x17, 0x35, 0x3A, 0x3F,
+ 0x26, 0x47, 0x06, 0x0B,
+ 0x0C, 0x17, 0x0F, 0x14,
+ 0x16, 0x14, 0x15, 0x07,
+ 0x11, 0x13, 0x16, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd10[] = {
+ 0x03, 0x00, 0x39, 0xC0,
+ 0xB6, 0x4B, 0x4B, 0xFF,
+};
+
+static char hx8379c_fwvga_video_on_cmd11[] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+
+static char hx8379c_fwvga_video_on_cmd12[] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd hx8379c_fwvga_video_on_command[] = {
+ {0x8, hx8379c_fwvga_video_on_cmd0, 0x00},
+ {0x1c, hx8379c_fwvga_video_on_cmd1, 0x00},
+ {0x10, hx8379c_fwvga_video_on_cmd2, 0x00},
+ {0x10, hx8379c_fwvga_video_on_cmd3, 0x00},
+ {0x8, hx8379c_fwvga_video_on_cmd4, 0x00},
+ {0x8, hx8379c_fwvga_video_on_cmd5, 0x00},
+ {0x24, hx8379c_fwvga_video_on_cmd6, 0x00},
+ {0x28, hx8379c_fwvga_video_on_cmd7, 0x00},
+ {0x28, hx8379c_fwvga_video_on_cmd8, 0x00},
+ {0x30, hx8379c_fwvga_video_on_cmd9, 0x00},
+ {0x8, hx8379c_fwvga_video_on_cmd10, 0x00},
+ {0x4, hx8379c_fwvga_video_on_cmd11, 0x96},
+ {0x4, hx8379c_fwvga_video_on_cmd12, 0x78}
+};
+
+#define HX8379C_FWVGA_VIDEO_ON_COMMAND 13
+
+
+static char hx8379c_fwvga_videooff_cmd0[] = {
+ 0x28, 0x00, 0x05, 0x80
+};
+
+static char hx8379c_fwvga_videooff_cmd1[] = {
+ 0x10, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd hx8379c_fwvga_video_off_command[] = {
+ {0x4, hx8379c_fwvga_videooff_cmd0, 0x32},
+ {0x4, hx8379c_fwvga_videooff_cmd1, 0x78}
+};
+
+#define HX8379C_FWVGA_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state hx8379c_fwvga_video_state = {
+ 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct commandpanel_info hx8379c_fwvga_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct videopanel_info hx8379c_fwvga_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane configuration */
+/*---------------------------------------------------------------------------*/
+static struct lane_configuration hx8379c_fwvga_video_lane_config = {
+ 2, 0, 1, 1, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel timing */
+/*---------------------------------------------------------------------------*/
+static const uint32_t hx8379c_fwvga_video_timings[] = {
+ 0x73, 0x21, 0x1A, 0x00, 0x31, 0x2D, 0x1E, 0x23, 0x2B, 0x03, 0x04, 0x00
+};
+
+static struct panel_timing hx8379c_fwvga_video_timing_info = {
+ 0, 4, 0x20, 0x2c
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel reset sequence */
+/*---------------------------------------------------------------------------*/
+static struct panel_reset_sequence hx8379c_fwvga_video_reset_seq = {
+ {1, 0, 1, }, {20, 20, 20, }, 2
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight setting */
+/*---------------------------------------------------------------------------*/
+static struct backlight hx8379c_fwvga_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+#define HX8379C_FWVGA_VIDEO_SIGNATURE 0xFFFF
+
+#endif /*_PANEL_HX8379A_FWVGA_SKUA_VIDEO_H_*/
diff --git a/dev/qpnp_wled/qpnp_wled.c b/dev/qpnp_wled/qpnp_wled.c
index bc4cc0e..b96150c 100644
--- a/dev/qpnp_wled/qpnp_wled.c
+++ b/dev/qpnp_wled/qpnp_wled.c
@@ -27,8 +27,12 @@
*/
#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
#include <err.h>
#include <qpnp_wled.h>
+#include <pm8x41_wled.h>
+#include <qtimer.h>
static int fls(uint16_t n)
{
@@ -42,7 +46,6 @@
static int qpnp_wled_sec_access(struct qpnp_wled *wled, uint16_t base_addr)
{
- int rc;
uint8_t reg = QPNP_WLED_SEC_UNLOCK;
pm8x41_wled_reg_write(QPNP_WLED_SEC_ACCESS_REG(base_addr), reg);
@@ -53,7 +56,7 @@
/* set wled to a level of brightness */
static int qpnp_wled_set_level(struct qpnp_wled *wled, int level)
{
- int i, rc;
+ int i;
uint8_t reg;
/* set brightness registers */
@@ -85,8 +88,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_MODULE_EN_REG(base_addr));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_MODULE_EN_MASK;
reg |= (state << QPNP_WLED_MODULE_EN_SHIFT);
pm8x41_wled_reg_write(QPNP_WLED_MODULE_EN_REG(base_addr), reg);
@@ -112,8 +113,6 @@
return rc;
} else {
reg = pm8x41_wled_reg_read(QPNP_WLED_LAB_IBB_RDY_REG(gwled->lab_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_MODULE_EN_MASK;
reg |= (state << QPNP_WLED_MODULE_EN_SHIFT);
@@ -128,11 +127,11 @@
/* enable / disable wled brightness */
void qpnp_wled_enable_backlight(int enable)
{
- int level, rc;
+ int rc;
if (!gwled) {
dprintf(CRITICAL, "%s: wled is not initialized yet\n", __func__);
- return ERROR;
+ return;
}
if (enable) {
@@ -154,13 +153,10 @@
static int qpnp_wled_set_display_type(struct qpnp_wled *wled, uint16_t base_addr)
{
- int rc;
uint8_t reg = 0;
/* display type */
reg = pm8x41_wled_reg_read(QPNP_WLED_DISP_SEL_REG(base_addr));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_DISP_SEL_MASK;
reg |= (wled->disp_type_amoled << QPNP_WLED_DISP_SEL_SHIFT);
@@ -171,13 +167,10 @@
static int qpnp_wled_module_ready(struct qpnp_wled *wled, uint16_t base_addr, bool state)
{
- int rc;
uint8_t reg;
reg = pm8x41_wled_reg_read(
QPNP_WLED_MODULE_RDY_REG(base_addr));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_MODULE_RDY_MASK;
reg |= (state << QPNP_WLED_MODULE_RDY_SHIFT);
pm8x41_wled_reg_write(QPNP_WLED_MODULE_RDY_REG(base_addr), reg);
@@ -199,8 +192,6 @@
/* Configure the FEEDBACK OUTPUT register */
reg = pm8x41_wled_reg_read(
QPNP_WLED_FDBK_OP_REG(wled->ctrl_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_FDBK_OP_MASK;
reg |= wled->fdbk_op;
pm8x41_wled_reg_write(QPNP_WLED_FDBK_OP_REG(wled->ctrl_base), reg);
@@ -213,8 +204,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_VREF_REG(wled->ctrl_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_VREF_MASK;
temp = wled->vref_mv - QPNP_WLED_VREF_MIN_MV;
reg |= (temp / QPNP_WLED_VREF_STEP_MV);
@@ -228,8 +217,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_ILIM_REG(wled->ctrl_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_ILIM_MASK;
reg |= (wled->ilim_ma / QPNP_WLED_ILIM_STEP_MA);
pm8x41_wled_reg_write(QPNP_WLED_ILIM_REG(wled->ctrl_base), reg);
@@ -242,8 +229,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_BOOST_DUTY_REG(wled->ctrl_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_BOOST_DUTY_MASK;
reg |= (wled->boost_duty_ns / QPNP_WLED_BOOST_DUTY_STEP_NS);
pm8x41_wled_reg_write(QPNP_WLED_BOOST_DUTY_REG(wled->ctrl_base), reg);
@@ -256,8 +241,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_SWITCH_FREQ_REG(wled->ctrl_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_SWITCH_FREQ_MASK;
reg |= temp;
pm8x41_wled_reg_write(QPNP_WLED_SWITCH_FREQ_REG(wled->ctrl_base), reg);
@@ -279,8 +262,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_OVP_REG(wled->ctrl_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_OVP_MASK;
reg |= temp;
pm8x41_wled_reg_write(QPNP_WLED_OVP_REG(wled->ctrl_base), reg);
@@ -300,8 +281,6 @@
temp = 0;
}
reg = pm8x41_wled_reg_read(QPNP_WLED_MOD_REG(wled->sink_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_MOD_FREQ_MASK;
reg |= (temp << QPNP_WLED_MOD_FREQ_SHIFT);
@@ -332,8 +311,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_HYB_THRES_REG(wled->sink_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_HYB_THRES_MASK;
temp = fls(wled->hyb_thres / QPNP_WLED_HYB_THRES_MIN) - 1;
@@ -350,24 +327,18 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_MOD_EN_REG(wled->sink_base,
wled->strings[i]));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_MOD_EN_MASK;
reg |= (QPNP_WLED_MOD_EN << QPNP_WLED_MOD_EN_SHFT);
pm8x41_wled_reg_write(QPNP_WLED_MOD_EN_REG(wled->sink_base,
wled->strings[i]), reg);
/* SYNC DELAY */
- if (wled->sync_dly_us < QPNP_WLED_SYNC_DLY_MIN_US)
- wled->sync_dly_us = QPNP_WLED_SYNC_DLY_MIN_US;
- else if (wled->sync_dly_us > QPNP_WLED_SYNC_DLY_MAX_US)
+ if (wled->sync_dly_us > QPNP_WLED_SYNC_DLY_MAX_US)
wled->sync_dly_us = QPNP_WLED_SYNC_DLY_MAX_US;
reg = pm8x41_wled_reg_read(
QPNP_WLED_SYNC_DLY_REG(wled->sink_base,
wled->strings[i]));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_SYNC_DLY_MASK;
temp = wled->sync_dly_us / QPNP_WLED_SYNC_DLY_STEP_US;
reg |= temp;
@@ -375,16 +346,12 @@
wled->strings[i]), reg);
/* FULL SCALE CURRENT */
- if (wled->fs_curr_ua < QPNP_WLED_FS_CURR_MIN_UA)
- wled->fs_curr_ua = QPNP_WLED_FS_CURR_MIN_UA;
- else if (wled->fs_curr_ua > QPNP_WLED_FS_CURR_MAX_UA)
+ if (wled->fs_curr_ua > QPNP_WLED_FS_CURR_MAX_UA)
wled->fs_curr_ua = QPNP_WLED_FS_CURR_MAX_UA;
reg = pm8x41_wled_reg_read(
QPNP_WLED_FS_CURR_REG(wled->sink_base,
wled->strings[i]));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_FS_CURR_MASK;
temp = wled->fs_curr_ua / QPNP_WLED_FS_CURR_STEP_UA;
reg |= temp;
@@ -395,8 +362,6 @@
reg = pm8x41_wled_reg_read(
QPNP_WLED_CABC_REG(wled->sink_base,
wled->strings[i]));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_CABC_MASK;
reg |= (wled->en_cabc << QPNP_WLED_CABC_SHIFT);
pm8x41_wled_reg_write(QPNP_WLED_CABC_REG(wled->sink_base,
@@ -405,8 +370,6 @@
/* Enable CURRENT SINK */
reg = pm8x41_wled_reg_read(
QPNP_WLED_CURR_SINK_REG(wled->sink_base));
- if (reg < 0)
- return reg;
temp = wled->strings[i] + QPNP_WLED_CURR_SINK_SHIFT;
reg |= (1 << temp);
pm8x41_wled_reg_write(QPNP_WLED_CURR_SINK_REG(wled->sink_base), reg);
@@ -415,8 +378,6 @@
/* LAB fast precharge */
reg = pm8x41_wled_reg_read(
QPNP_WLED_LAB_FAST_PC_REG(wled->lab_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_LAB_FAST_PC_MASK;
reg |= (wled->lab_fast_precharge << QPNP_WLED_LAB_FAST_PC_SHIFT);
pm8x41_wled_reg_write(QPNP_WLED_LAB_FAST_PC_REG(wled->lab_base), reg);
@@ -432,20 +393,14 @@
return rc;
/* IBB active bias */
- if (wled->ibb_pwrup_dly_ms < QPNP_WLED_IBB_PWRUP_DLY_MIN_MS)
- wled->ibb_pwrup_dly_ms = QPNP_WLED_IBB_PWRUP_DLY_MIN_MS;
- else if (wled->ibb_pwrup_dly_ms > QPNP_WLED_IBB_PWRUP_DLY_MAX_MS)
+ if (wled->ibb_pwrup_dly_ms > QPNP_WLED_IBB_PWRUP_DLY_MAX_MS)
wled->ibb_pwrup_dly_ms = QPNP_WLED_IBB_PWRUP_DLY_MAX_MS;
- if (wled->ibb_pwrdn_dly_ms < QPNP_WLED_IBB_PWRDN_DLY_MIN_MS)
- wled->ibb_pwrdn_dly_ms = QPNP_WLED_IBB_PWRDN_DLY_MIN_MS;
- else if (wled->ibb_pwrdn_dly_ms > QPNP_WLED_IBB_PWRDN_DLY_MAX_MS)
+ if (wled->ibb_pwrdn_dly_ms > QPNP_WLED_IBB_PWRDN_DLY_MAX_MS)
wled->ibb_pwrdn_dly_ms = QPNP_WLED_IBB_PWRDN_DLY_MAX_MS;
reg = pm8x41_wled_reg_read(
QPNP_WLED_IBB_BIAS_REG(wled->ibb_base));
- if (reg < 0)
- return reg;
reg &= QPNP_WLED_IBB_BIAS_MASK;
reg |= (!wled->ibb_bias_active << QPNP_WLED_IBB_BIAS_SHIFT);
@@ -482,7 +437,7 @@
/* Setup wled default parameters */
static int qpnp_wled_setup(struct qpnp_wled *wled, struct qpnp_wled_config_data *config)
{
- int rc, i;
+ int i;
wled->sink_base = QPNP_WLED_SINK_BASE;
wled->ctrl_base = QPNP_WLED_CTRL_BASE;
@@ -530,7 +485,7 @@
int qpnp_wled_init(struct qpnp_wled_config_data *config)
{
- int rc, i;
+ int rc;
struct qpnp_wled *wled;
wled = malloc(sizeof(struct qpnp_wled));
@@ -558,7 +513,8 @@
static int qpnp_labibb_regulator_set_voltage(struct qpnp_wled *wled)
{
- int rc=-1, new_uV;
+ int rc = -1;
+ uint32_t new_uV;
uint8_t val, mask=0;
if (wled->lab_min_volt < wled->lab_init_volt) {
diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 269073c..974108e 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -467,9 +467,9 @@
fdtend = fdtstart + fdt_totalsize(fdt);
FDT_CHECK_HEADER(fdt);
- if ((fdt_num_mem_rsv(fdt)+1) > (UINT_MAX / sizeof(struct fdt_reserve_entry))) {
+ if ((fdt_num_mem_rsv(fdt) + 1) >
+ (int) (UINT_MAX / sizeof(struct fdt_reserve_entry)))
return err;
- }
mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
* sizeof(struct fdt_reserve_entry);
@@ -504,7 +504,7 @@
/* Need to reorder */
newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
+ struct_size + fdt_size_dt_strings(fdt);
- if (bufsize < newsize)
+ if (bufsize < (int) newsize)
return -FDT_ERR_NOSPACE;
/* First attempt to build converted tree at beginning of buffer */
diff --git a/platform/init.c b/platform/init.c
index 4783eba..aeb4f20 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -135,3 +135,8 @@
{
return ((val & 0x3E) >> 1);
}
+
+__WEAK uint32_t platform_detect_panel()
+{
+ return 0;
+}
diff --git a/platform/msm8909/include/platform/iomap.h b/platform/msm8909/include/platform/iomap.h
index e199906..2523f49 100644
--- a/platform/msm8909/include/platform/iomap.h
+++ b/platform/msm8909/include/platform/iomap.h
@@ -246,6 +246,7 @@
#define BOOT_CONFIG_OFFSET 0x0000602C
#define BOOT_CONFIG_REG (SEC_CTRL_CORE_BASE + BOOT_CONFIG_OFFSET)
+#define SECURITY_CONTROL_CORE_FEATURE_CONFIG0 0x0005E004
/* EBI2 */
#define TLMM_EBI2_EMMC_GPIO_CFG (TLMM_BASE_ADDR + 0x00111000)
#endif
diff --git a/platform/msm8909/platform.c b/platform/msm8909/platform.c
index 6479681..83f9060 100644
--- a/platform/msm8909/platform.c
+++ b/platform/msm8909/platform.c
@@ -208,3 +208,22 @@
{
return ((val & 0x0E) >> 1);
}
+
+uint32_t platform_detect_panel()
+{
+ uint32_t panel;
+
+ /* Bits 28:29 of this register are read to know
+ the panel config, and pick up DT accordingly.
+
+ 00 -no limit, suport HD
+ 01 - limit to 720P
+ 10- limit to qHD
+ 11- limit to fWVGA
+
+ */
+ panel = readl(SECURITY_CONTROL_CORE_FEATURE_CONFIG0);
+ panel = (panel & 0x30000000) >> 28;
+
+ return panel;
+}
diff --git a/platform/msm_shared/board.c b/platform/msm_shared/board.c
index 3b2493d..39072aa 100644
--- a/platform/msm_shared/board.c
+++ b/platform/msm_shared/board.c
@@ -42,6 +42,7 @@
LINUX_MACHTYPE_UNKNOWN,
BASEBAND_MSM,
{{PMIC_IS_INVALID, 0}, {PMIC_IS_INVALID, 0}, {PMIC_IS_INVALID, 0}},
+ 0,
};
static void platform_detect()
@@ -236,11 +237,11 @@
}
/* HLOS subtype
- * bit no |31 20 | 19 16| 15 8 | 7 0|
- * board.platform_hlos_subtype = |reserved | Boot device | DDR detection | subtype|
- * | bits | | bits |
+ * bit no |31 20 | 19 16|15 13 |12 11 | 10 8 | 7 0|
+ * board.platform_hlos_subtype = |reserved | Boot device |Reserved | Panel | DDR detection | subtype|
+ * | bits | | bits | Detection |
*/
- board.platform_hlos_subtype = (board_get_ddr_subtype() << 8) | (platform_get_boot_dev() << 16);
+ board.platform_hlos_subtype = (board_get_ddr_subtype() << 8) | (platform_get_boot_dev() << 16) | (platform_detect_panel() << 11);
}
else
{
diff --git a/platform/msm_shared/boot_stats.c b/platform/msm_shared/boot_stats.c
index 551000e..20635f2 100644
--- a/platform/msm_shared/boot_stats.c
+++ b/platform/msm_shared/boot_stats.c
@@ -30,6 +30,7 @@
#include <debug.h>
#include <reg.h>
#include <platform/iomap.h>
+#include <platform.h>
static uint32_t kernel_load_start;
void bs_set_timestamp(enum bs_entry bs_id)
diff --git a/platform/msm_shared/clock_lib2.c b/platform/msm_shared/clock_lib2.c
index f5e321a..cc87c92 100644
--- a/platform/msm_shared/clock_lib2.c
+++ b/platform/msm_shared/clock_lib2.c
@@ -270,5 +270,5 @@
if (!bclk)
return 0;
- return __clock_lib2_branch_clk_reset(bclk->bcr_reg, action);
+ return __clock_lib2_branch_clk_reset((uint32_t)bclk->bcr_reg, action);
}
diff --git a/platform/msm_shared/crypto_hash.c b/platform/msm_shared/crypto_hash.c
index 0d3cce8..9a2cdc9 100644
--- a/platform/msm_shared/crypto_hash.c
+++ b/platform/msm_shared/crypto_hash.c
@@ -27,6 +27,7 @@
*/
#include <string.h>
+#include <sha.h>
#include <debug.h>
#include <sys/types.h>
#include "crypto_hash.h"
diff --git a/platform/msm_shared/dev_tree.c b/platform/msm_shared/dev_tree.c
index 36b2a3a..32071b5 100644
--- a/platform/msm_shared/dev_tree.c
+++ b/platform/msm_shared/dev_tree.c
@@ -37,6 +37,7 @@
#include <board.h>
#include <list.h>
#include <kernel/thread.h>
+#include <target.h>
struct dt_entry_v1
{
@@ -455,7 +456,7 @@
break;
dtb_size = fdt_totalsize(&dtb_hdr);
- if (check_aboot_addr_range_overlap(tags, dtb_size)) {
+ if (check_aboot_addr_range_overlap((uint32_t)tags, dtb_size)) {
dprintf(CRITICAL, "Tags addresses overlap with aboot addresses.\n");
return NULL;
}
diff --git a/platform/msm_shared/hsusb.c b/platform/msm_shared/hsusb.c
index 49da56c..839f301 100644
--- a/platform/msm_shared/hsusb.c
+++ b/platform/msm_shared/hsusb.c
@@ -41,6 +41,7 @@
#include <kernel/thread.h>
#include <reg.h>
#include <dev/udc.h>
+#include <target.h>
#include "hsusb.h"
#define MAX_TD_XFER_SIZE (16 * 1024)
@@ -307,21 +308,19 @@
item = memalign(CACHE_LINE,
ROUNDUP(sizeof(struct ept_queue_item), CACHE_LINE));
if (!item) {
- dprintf(ALWAYS, "allocate USB item fail ept%d"
- "%s queue\n",
- "td count = %d\n",
+ dprintf(ALWAYS, "allocate USB item fail ept%d\n %s queue\ntd count = %d\n",
ept->num,
ept->in ? "in" : "out",
count);
return -1;
} else {
count ++;
- curr_item->next = PA(item);
+ curr_item->next = PA((addr_t)item);
item->next = TERMINATE;
}
} else
/* Since next TD in chain already exists */
- item = VA(curr_item->next);
+ item = (struct ept_queue_item *)VA(curr_item->next);
/* Update TD with transfer information */
item->info = INFO_BYTES(xfer) | INFO_ACTIVE;
@@ -340,7 +339,7 @@
curr_item->next = TERMINATE;
curr_item->info |= INFO_IOC;
enter_critical_section();
- ept->head->next = PA(req->item);
+ ept->head->next = PA((addr_t)req->item);
ept->head->info = 0;
ept->req = req;
arch_clean_invalidate_cache_range((addr_t) ept,
@@ -349,7 +348,7 @@
sizeof(struct ept_queue_head));
arch_clean_invalidate_cache_range((addr_t) ept->req,
sizeof(struct usb_request));
- arch_clean_invalidate_cache_range((addr_t) VA(req->req.buf),
+ arch_clean_invalidate_cache_range((addr_t) VA((addr_t)req->req.buf),
req->req.length);
item = req->item;
@@ -359,7 +358,7 @@
if (curr_item->next == TERMINATE)
item = NULL;
else
- item = curr_item->next;
+ item = (struct ept_queue_item *)curr_item->next;
arch_clean_invalidate_cache_range((addr_t) curr_item,
sizeof(struct ept_queue_item));
}
@@ -374,9 +373,8 @@
{
struct ept_queue_item *item;
unsigned actual, total_len;
- int status, len;
+ int status;
struct usb_request *req=NULL;
- void *buf;
DBG("ept%d %s complete req=%p\n",
ept->num, ept->in ? "in" : "out", ept->req);
@@ -386,13 +384,13 @@
if(ept->req)
{
- req = VA(ept->req);
+ req = (struct usb_request *)VA((addr_t)ept->req);
arch_invalidate_cache_range((addr_t) ept->req,
sizeof(struct usb_request));
}
if (req) {
- item = VA(req->item);
+ item = (struct ept_queue_item *)VA((addr_t)req->item);
/* total transfer length for transacation */
total_len = req->req.length;
ept->req = 0;
@@ -426,7 +424,7 @@
/*
* Record the data transferred for the last TD
*/
- actual += total_len - (item->info >> 16)
+ actual += (total_len - (item->info >> 16))
& 0x7FFF;
total_len = 0;
break;
@@ -437,10 +435,10 @@
* TD woulb the max possible TD transfer size
* (16K)
*/
- actual += MAX_TD_XFER_SIZE - (item->info >> 16) & 0x7FFF;
- total_len -= MAX_TD_XFER_SIZE - (item->info >> 16) & 0x7FFF;
+ actual += (MAX_TD_XFER_SIZE - (item->info >> 16)) & 0x7FFF;
+ total_len -= (MAX_TD_XFER_SIZE - (item->info >> 16)) & 0x7FFF;
/*Move to next item in chain*/
- item = VA(item->next);
+ item = (struct ept_queue_item *)VA(item->next);
}
}
status = 0;
@@ -526,7 +524,7 @@
{
DBG("setup_tx %p %d\n", buf, len);
memcpy(ep0req->buf, buf, len);
- ep0req->buf = PA((addr_t)ep0req->buf);
+ ep0req->buf = (void *)PA((addr_t)ep0req->buf);
ep0req->complete = ep0in_complete;
ep0req->length = len;
udc_request_queue(ep0in, ep0req);
diff --git a/platform/msm_shared/i2c_qup.c b/platform/msm_shared/i2c_qup.c
index 916d865..dc8481d 100644
--- a/platform/msm_shared/i2c_qup.c
+++ b/platform/msm_shared/i2c_qup.c
@@ -702,6 +702,7 @@
mask_interrupt(dev->qup_irq);
}
+#if DEFINE_GSBI_I2C
struct qup_i2c_dev *qup_i2c_init(uint8_t gsbi_id, unsigned clk_freq,
unsigned src_clk_freq)
{
@@ -739,6 +740,7 @@
return dev;
}
+#endif
struct qup_i2c_dev *qup_blsp_i2c_init(uint8_t blsp_id, uint8_t qup_id,
uint32_t clk_freq, uint32_t src_clk_freq)
diff --git a/platform/msm_shared/image_verify.c b/platform/msm_shared/image_verify.c
index bc2017d..1f68b9d 100644
--- a/platform/msm_shared/image_verify.c
+++ b/platform/msm_shared/image_verify.c
@@ -25,11 +25,14 @@
* SUCH DAMAGE.
*/
#include <x509.h>
+#include <err.h>
#include <certificate.h>
#include <crypto_hash.h>
+#include <string.h>
#include "image_verify.h"
#include "scm.h"
+
/*
* Returns -1 if decryption failed otherwise size of plain_text in bytes
*/
@@ -62,7 +65,7 @@
*/
int ret = -1;
X509 *x509_certificate = NULL;
- unsigned char *cert_ptr = certBuffer;
+ const unsigned char *cert_ptr = (const unsigned char *)certBuffer;
unsigned int cert_size = sizeof(certBuffer);
EVP_PKEY *pub_key = NULL;
RSA *rsa_key = NULL;
@@ -133,7 +136,7 @@
int auth = 0;
unsigned char *plain_text = NULL;
unsigned int digest[8];
- unsigned int hash_size;
+ int hash_size;
plain_text = (unsigned char *)calloc(sizeof(char), SIGNATURE_SIZE);
if (plain_text == NULL) {
diff --git a/platform/msm_shared/include/crypto4_eng.h b/platform/msm_shared/include/crypto4_eng.h
index dde7794..4a8b037 100644
--- a/platform/msm_shared/include/crypto4_eng.h
+++ b/platform/msm_shared/include/crypto4_eng.h
@@ -73,4 +73,5 @@
#define GOPROC_GO 1
+void crypto_eng_cleanup(void);
#endif
diff --git a/platform/msm_shared/include/crypto5_wrapper.h b/platform/msm_shared/include/crypto5_wrapper.h
index 9c9af9b..0ae4ff0 100644
--- a/platform/msm_shared/include/crypto5_wrapper.h
+++ b/platform/msm_shared/include/crypto5_wrapper.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012,2014 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -33,5 +33,6 @@
void crypto_init_params(struct crypto_init_params * params);
uint32_t crypto_get_max_auth_blk_size();
+void crypto_eng_cleanup(void);
#endif
diff --git a/platform/msm_shared/include/crypto_hash.h b/platform/msm_shared/include/crypto_hash.h
index bdcf7e0..44e227a 100644
--- a/platform/msm_shared/include/crypto_hash.h
+++ b/platform/msm_shared/include/crypto_hash.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -132,4 +132,9 @@
unsigned char *digest_ptr);
bool crypto_initialized(void);
+void
+hash_find(unsigned char *addr, unsigned int size, unsigned char *digest,
+ unsigned char auth_alg);
+
+crypto_engine_type board_ce_type(void);
#endif
diff --git a/platform/msm_shared/include/image_verify.h b/platform/msm_shared/include/image_verify.h
index 0819421..fe20c9f 100644
--- a/platform/msm_shared/include/image_verify.h
+++ b/platform/msm_shared/include/image_verify.h
@@ -47,4 +47,5 @@
/* Find hash of image */
void image_find_digest(unsigned char *image_ptr, unsigned int image_size,
unsigned hash_type, unsigned char *digest);
+void save_kernel_hash_cmd(void *digest);
#endif
diff --git a/platform/msm_shared/include/mmc_sdhci.h b/platform/msm_shared/include/mmc_sdhci.h
index d54cc45..1612e61 100644
--- a/platform/msm_shared/include/mmc_sdhci.h
+++ b/platform/msm_shared/include/mmc_sdhci.h
@@ -204,7 +204,7 @@
({ \
uint32_t indx = (start) / (size_of); \
uint32_t offset = (start) % (size_of); \
- uint32_t mask = (((len)<(size_of))? 1<<(len):0) - 1; \
+ uint32_t mask = (((len)<(size_of))? 1ULL<<(len):0) - 1; \
uint32_t unpck = array[indx] >> offset; \
uint32_t indx2 = ((start) + (len) - 1) / (size_of); \
if(indx2 > indx) \
diff --git a/platform/msm_shared/include/qgic.h b/platform/msm_shared/include/qgic.h
index cb4c573..9bc66ff 100644
--- a/platform/msm_shared/include/qgic.h
+++ b/platform/msm_shared/include/qgic.h
@@ -31,6 +31,9 @@
#define __PLATFORM_MSM_SHARED_QGIC_H
#include "qgic_common.h"
+#include <platform/iomap.h>
+#include <platform/interrupts.h>
+#include <arch/arm.h>
#define GIC_CPU_REG(off) (MSM_GIC_CPU_BASE + (off))
@@ -50,4 +53,9 @@
uint32_t qgic_read_iar(void);
void qgic_write_eoi(uint32_t);
+enum handler_return gic_platform_irq(struct arm_iframe *frame);
+void gic_platform_fiq(struct arm_iframe *frame);
+status_t gic_mask_interrupt(unsigned int vector);
+status_t gic_unmask_interrupt(unsigned int vector);
+void gic_register_int_handler(unsigned int vector, int_handler func, void *arg);
#endif
diff --git a/platform/msm_shared/include/qtimer.h b/platform/msm_shared/include/qtimer.h
index fd680a0..d914a88 100644
--- a/platform/msm_shared/include/qtimer.h
+++ b/platform/msm_shared/include/qtimer.h
@@ -44,3 +44,5 @@
void qtimer_uninit();
void qtimer_init();
uint32_t qtimer_tick_rate();
+void udelay(unsigned usecs);
+void mdelay(unsigned msecs);
diff --git a/platform/msm_shared/include/scm.h b/platform/msm_shared/include/scm.h
index de046a4..2c5e14b 100644
--- a/platform/msm_shared/include/scm.h
+++ b/platform/msm_shared/include/scm.h
@@ -308,6 +308,7 @@
int scm_halt_pmic_arbiter();
int scm_call_atomic2(uint32_t svc, uint32_t cmd, uint32_t arg1, uint32_t arg2);
+int restore_secure_cfg(uint32_t id);
void scm_elexec_call(paddr_t kernel_entry, paddr_t dtb_offset);
void *get_canary();
diff --git a/platform/msm_shared/include/sdhci_msm.h b/platform/msm_shared/include/sdhci_msm.h
index fe68140..0cdfe2f 100644
--- a/platform/msm_shared/include/sdhci_msm.h
+++ b/platform/msm_shared/include/sdhci_msm.h
@@ -30,6 +30,7 @@
#define __SDHCI_MSM_H__
#include <kernel/event.h>
+#include <mmc_sdhci.h>
#define SDHCI_HC_START_BIT 0x0
#define SDHCI_HC_WIDTH 0x1
@@ -140,4 +141,5 @@
void sdhci_mode_disable(struct sdhci_host *host);
/* API: Toggle the bit for clock-data recovery */
void sdhci_msm_toggle_cdr(struct sdhci_host *host, bool enable);
+void sdhci_msm_set_mci_clk(struct sdhci_host *host);
#endif
diff --git a/platform/msm_shared/include/smd.h b/platform/msm_shared/include/smd.h
index b8f645f..00cd4ec 100644
--- a/platform/msm_shared/include/smd.h
+++ b/platform/msm_shared/include/smd.h
@@ -121,7 +121,7 @@
void smd_read(smd_channel_info_t *ch, uint32_t *len, int ch_type, uint32_t *response);
int smd_write(smd_channel_info_t *ch, void *data, uint32_t len, int type);
int smd_get_channel_info(smd_channel_info_t *ch, uint32_t ch_type);
-void smd_get_channel_entry(smd_channel_info_t *ch, uint32_t ch_type);
+int smd_get_channel_entry(smd_channel_info_t *ch, uint32_t ch_type);
void smd_notify_rpm();
enum handler_return smd_irq_handler(void* data);
void smd_set_state(smd_channel_info_t *ch, uint32_t state, uint32_t flag);
diff --git a/platform/msm_shared/interrupts.c b/platform/msm_shared/interrupts.c
index 9d84bb2..2fdaf35 100644
--- a/platform/msm_shared/interrupts.c
+++ b/platform/msm_shared/interrupts.c
@@ -31,6 +31,7 @@
#include <platform/irqs.h>
#include <platform/interrupts.h>
#include <debug.h>
+#include <qgic.h>
extern int target_supports_qgic();
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 5788bb7..2632961 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -36,6 +36,7 @@
#include <partition_parser.h>
#include <platform/iomap.h>
#include <platform/timer.h>
+#include <platform.h>
extern void clock_init_mmc(uint32_t);
extern void clock_config_mmc(uint32_t, uint32_t);
@@ -1136,7 +1137,6 @@
static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
{
uint32_t mmc_return = 0;
- uint32_t raw_csd[4];
/* Ask card to send its unique card identification (CID) number (CMD2) */
mmc_return = mmc_all_send_cid(host, card);
@@ -1228,7 +1228,6 @@
uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
{
uint8_t i;
- uint32_t mmc_ret;
struct mmc_command cmd;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
@@ -1473,7 +1472,6 @@
static uint32_t mmc_card_init(struct mmc_device *dev)
{
uint32_t mmc_return = 0;
- uint32_t status;
uint8_t bus_width = 0;
struct sdhci_host *host;
@@ -2108,7 +2106,6 @@
uint32_t blk_end;
uint32_t num_erase_grps;
uint64_t erase_timeout = 0;
- uint32_t *out;
struct mmc_card *card;
diff --git a/platform/msm_shared/mmc_wrapper.c b/platform/msm_shared/mmc_wrapper.c
index 0a7d5b4..bcec0ad 100755
--- a/platform/msm_shared/mmc_wrapper.c
+++ b/platform/msm_shared/mmc_wrapper.c
@@ -35,6 +35,7 @@
#include <target.h>
#include <string.h>
#include <partition_parser.h>
+#include <boot_device.h>
#include <dme.h>
/*
* Weak function for UFS.
@@ -134,7 +135,7 @@
val = mmc_sdhci_write((struct mmc_device *)dev, (void *)sptr, (data_addr / block_size), (write_size / block_size));
if (val)
{
- dprintf(CRITICAL, "Failed Writing block @ %x\n", (data_addr / block_size));
+ dprintf(CRITICAL, "Failed Writing block @ %x\n",(unsigned int)(data_addr / block_size));
return val;
}
sptr += write_size;
@@ -146,7 +147,7 @@
val = mmc_sdhci_write((struct mmc_device *)dev, (void *)sptr, (data_addr / block_size), (data_len / block_size));
if (val)
- dprintf(CRITICAL, "Failed Writing block @ %x\n", (data_addr / block_size));
+ dprintf(CRITICAL, "Failed Writing block @ %x\n",(unsigned int)(data_addr / block_size));
}
else
{
@@ -196,7 +197,7 @@
ret = mmc_sdhci_read((struct mmc_device *)dev, (void *)sptr, (data_addr / block_size), (read_size / block_size));
if (ret)
{
- dprintf(CRITICAL, "Failed Reading block @ %x\n", (data_addr / block_size));
+ dprintf(CRITICAL, "Failed Reading block @ %x\n",(unsigned int) (data_addr / block_size));
return ret;
}
sptr += read_size;
@@ -208,7 +209,7 @@
ret = mmc_sdhci_read((struct mmc_device *)dev, (void *)sptr, (data_addr / block_size), (data_len / block_size));
if (ret)
- dprintf(CRITICAL, "Failed Reading block @ %x\n", (data_addr / block_size));
+ dprintf(CRITICAL, "Failed Reading block @ %x\n",(unsigned int) (data_addr / block_size));
}
else
{
@@ -289,7 +290,7 @@
}
else
{
- dprintf(CRITICAL, "Erase Fail: Erase size: %u is bigger than scratch region:%u\n", scratch_size);
+ dprintf(CRITICAL, "Erase Fail: Erase size: %u is bigger than scratch region\n", scratch_size);
return 1;
}
@@ -372,7 +373,7 @@
unaligned_blks = blk_count % erase_unit_sz;
blks_to_erase = blk_count - unaligned_blks;
- dprintf(SPEW, "Performing SDHCI erase: 0x%x:0x%x\n", blk_addr, blks_to_erase);
+ dprintf(SPEW, "Performing SDHCI erase: 0x%x:0x%x\n", blk_addr,(unsigned int)blks_to_erase);
if (mmc_sdhci_erase((struct mmc_device *)dev, blk_addr, blks_to_erase * block_size))
{
dprintf(CRITICAL, "MMC erase failed\n");
diff --git a/platform/msm_shared/partition_parser.c b/platform/msm_shared/partition_parser.c
index d40fb8a..38b2a80 100644
--- a/platform/msm_shared/partition_parser.c
+++ b/platform/msm_shared/partition_parser.c
@@ -605,12 +605,12 @@
array_size, (long long)(card_size_sec - 34));
/* Updating CRC of the Partition entry array in both headers */
- partition_entry_array_start = primary_gpt_header + block_size;
- crc_value = calculate_crc32(partition_entry_array_start,
+ partition_entry_array_start = (unsigned int)primary_gpt_header + block_size;
+ crc_value = calculate_crc32((unsigned char *)partition_entry_array_start,
max_part_count * part_entry_size);
PUT_LONG(primary_gpt_header + PARTITION_CRC_OFFSET, crc_value);
- crc_value = calculate_crc32(partition_entry_array_start + array_size,
+ crc_value = calculate_crc32((unsigned char *)partition_entry_array_start + array_size,
max_part_count * part_entry_size);
PUT_LONG(secondary_gpt_header + PARTITION_CRC_OFFSET, crc_value);
@@ -715,7 +715,7 @@
}
/* Writing the partition entries array for the primary header */
- partition_entry_array_start = primary_gpt_header + block_size;
+ partition_entry_array_start = (unsigned int)primary_gpt_header + block_size;
ret = write_gpt_partition_array(primary_gpt_header,
partition_entry_array_start,
partition_entry_array_size, block_size);
@@ -726,7 +726,7 @@
}
/*Writing the partition entries array for the backup header */
- partition_entry_array_start = primary_gpt_header + block_size +
+ partition_entry_array_start = (unsigned int)primary_gpt_header + block_size +
partition_entry_array_size;
ret = write_gpt_partition_array(secondary_gpt_header,
partition_entry_array_start,
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index b972cce..efe4188 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -903,10 +903,9 @@
struct cmd_element *cmd_list_read_ptr = ce_read_array;
struct cmd_element *cmd_list_ptr_start = ce_array;
struct cmd_element *cmd_list_read_ptr_start = ce_read_array;
- uint32_t status;
+ uint32_t status, nand_ret;
int num_desc = 0;
uint32_t blk_addr = page / flash.num_pages_per_blk;
- int nand_ret;
/* Erase only if the block is not bad */
if (qpic_nand_block_isbad(page))
@@ -1277,7 +1276,6 @@
qpic_nand_init(struct qpic_nand_init_config *config)
{
uint32_t i;
- int nand_ret;
nand_base = config->nand_base;
@@ -1383,7 +1381,6 @@
uint8_t flags = 0;
uint32_t *cmd_list_temp = NULL;
- uint32_t temp_status = 0;
/* UD bytes in last CW is 512 - cws_per_page *4.
* Since each of the CW read earlier reads 4 spare bytes.
*/
@@ -1498,7 +1495,7 @@
bam_add_cmd_element(cmd_list_ptr, NAND_FLASH_STATUS, (uint32_t)PA((addr_t)&(flash_sts[i])), CE_READ_TYPE);
- cmd_list_temp = cmd_list_ptr;
+ cmd_list_temp = (uint32_t *)cmd_list_ptr;
cmd_list_ptr++;
diff --git a/platform/msm_shared/scm.c b/platform/msm_shared/scm.c
index c7ff1b8..6dc8a00 100644
--- a/platform/msm_shared/scm.c
+++ b/platform/msm_shared/scm.c
@@ -32,6 +32,8 @@
#include <asm.h>
#include <bits.h>
#include <arch/ops.h>
+#include <rand.h>
+#include <image_verify.h>
#include "scm.h"
#pragma GCC optimize ("O0")
@@ -170,7 +172,7 @@
{
uint32_t context_id;
register uint32_t r0 __asm__("r0") = SCM_ATOMIC(svc, cmd, 1);
- register uint32_t r1 __asm__("r1") = &context_id;
+ register uint32_t r1 __asm__("r1") = (uint32_t)&context_id;
register uint32_t r2 __asm__("r2") = arg1;
__asm__ volatile(
@@ -199,7 +201,7 @@
{
int context_id;
register uint32_t r0 __asm__("r0") = SCM_ATOMIC(svc, cmd, 2);
- register uint32_t r1 __asm__("r1") = &context_id;
+ register uint32_t r1 __asm__("r1") = (uint32_t)&context_id;
register uint32_t r2 __asm__("r2") = arg1;
register uint32_t r3 __asm__("r3") = arg2;
@@ -906,7 +908,7 @@
void * get_canary()
{
void * canary;
- if(scm_random(&canary, sizeof(canary))) {
+ if(scm_random((uint32_t *)&canary, sizeof(canary))) {
dprintf(CRITICAL,"scm_call for random failed !!!");
/*
* fall back to use lib rand API if scm call failed.
diff --git a/platform/msm_shared/sdhci_msm.c b/platform/msm_shared/sdhci_msm.c
index d721110..ba63845 100644
--- a/platform/msm_shared/sdhci_msm.c
+++ b/platform/msm_shared/sdhci_msm.c
@@ -191,7 +191,7 @@
/*
* Register the interrupt handler for pwr irq
*/
- register_int_handler(config->pwr_irq, sdhci_int_handler, (void *)config);
+ register_int_handler(config->pwr_irq, (int_handler)sdhci_int_handler, (void *)config);
unmask_interrupt(config->pwr_irq);
@@ -418,7 +418,7 @@
uint32_t total_phases)
{
int sub_phases[MAX_PHASES][MAX_PHASES]={{0}};
- int phases_per_row[MAX_PHASES] = {0};
+ uint32_t phases_per_row[MAX_PHASES] = {0};
uint32_t i,j;
int selected_phase = 0;
uint32_t row_index = 0;
@@ -660,14 +660,14 @@
{
uint32_t *tuning_block;
uint32_t *tuning_data;
- uint32_t tuned_phases[MAX_PHASES] = {{0}};
+ uint32_t tuned_phases[MAX_PHASES] = {0};
uint32_t size;
uint32_t phase = 0;
uint32_t tuned_phase_cnt = 0;
uint8_t drv_type = 0;
bool drv_type_changed = false;
int ret = 0;
- int i;
+ uint32_t i;
struct sdhci_msm_data *msm_host;
msm_host = host->msm_host;
@@ -686,12 +686,12 @@
if (bus_width == DATA_BUS_WIDTH_8BIT)
{
- tuning_block = tuning_block_128;
+ tuning_block = (uint32_t *)tuning_block_128;
size = sizeof(tuning_block_128);
}
else
{
- tuning_block = tuning_block_64;
+ tuning_block = (uint32_t *)tuning_block_64;
size = sizeof(tuning_block_64);
}
diff --git a/platform/msm_shared/shutdown_detect.c b/platform/msm_shared/shutdown_detect.c
index a51c9ae..633dbac 100644
--- a/platform/msm_shared/shutdown_detect.c
+++ b/platform/msm_shared/shutdown_detect.c
@@ -34,6 +34,8 @@
#include <kernel/timer.h>
#include <platform/timer.h>
#include <shutdown_detect.h>
+#include <platform.h>
+#include <target.h>
/* sleep clock is 32.768 khz, 0x8000 count per second */
#define MPM_SLEEP_TIMETICK_COUNT 0x8000
@@ -102,7 +104,7 @@
* for software to be safely detect if there is a key release action.
*/
timer_set_oneshot(p_timer, PWRKEY_DETECT_FREQUENCY,
- long_press_pwrkey_timer_func, NULL);
+ (timer_callback)long_press_pwrkey_timer_func, NULL);
} else {
shutdown_device();
}
@@ -146,7 +148,7 @@
*/
if (is_pwrkey_pon_reason() && is_pwrkey_time_expired()) {
timer_initialize(&pon_timer);
- timer_set_oneshot(&pon_timer, 0, long_press_pwrkey_timer_func, NULL);
+ timer_set_oneshot(&pon_timer, 0,(timer_callback)long_press_pwrkey_timer_func, NULL);
/*
* Wait until long press power key timeout
diff --git a/platform/msm_shared/smd.c b/platform/msm_shared/smd.c
index a076f65..54a0b5b 100644
--- a/platform/msm_shared/smd.c
+++ b/platform/msm_shared/smd.c
@@ -38,6 +38,8 @@
#include <malloc.h>
#include <bits.h>
+#define SMD_CHANNEL_ACCESS_RETRY 1000000
+
smd_channel_alloc_entry_t *smd_channel_alloc_entry;
static event_t smd_closed;
@@ -64,7 +66,7 @@
ch->port_info->ch0.state_updated = flag;
}
-void smd_get_channel_entry(smd_channel_info_t *ch, uint32_t ch_type)
+int smd_get_channel_entry(smd_channel_info_t *ch, uint32_t ch_type)
{
int i = 0;
@@ -77,12 +79,14 @@
}
}
- /* Channel not found */
+ /* Channel not found, retry again */
if(i == SMEM_NUM_SMD_STREAM_CHANNELS)
{
- dprintf(CRITICAL, "smd channel type %x not found\n", ch_type);
- ASSERT(0);
+ dprintf(SPEW, "Channel not found, wait and retry for the update\n");
+ return -1;
}
+
+ return 0;
}
int smd_get_channel_info(smd_channel_info_t *ch, uint32_t ch_type)
@@ -92,8 +96,10 @@
uint32_t fifo_buf_size = 0;
uint32_t size = 0;
- smd_get_channel_entry(ch, ch_type);
+ ret = smd_get_channel_entry(ch, ch_type);
+ if (ret)
+ return ret;
ch->port_info = smem_get_alloc_entry(SMEM_SMD_BASE_ID + ch->alloc_entry.cid,
&size);
@@ -112,20 +118,35 @@
int smd_init(smd_channel_info_t *ch, uint32_t ch_type)
{
unsigned ret = 0;
+ int chnl_found = 0;
+ uint64_t timeout = SMD_CHANNEL_ACCESS_RETRY;
smd_channel_alloc_entry = (smd_channel_alloc_entry_t*)memalign(CACHE_LINE, SMD_CHANNEL_ALLOC_MAX);
ASSERT(smd_channel_alloc_entry);
- ret = smem_read_alloc_entry(SMEM_CHANNEL_ALLOC_TBL,
- (void*)smd_channel_alloc_entry,
- SMD_CHANNEL_ALLOC_MAX);
- if(ret)
- {
- dprintf(CRITICAL,"ERROR reading smem channel alloc tbl\n");
- return -1;
- }
+ dprintf(INFO, "Waiting for the RPM to populate smd channel table\n");
- smd_get_channel_info(ch, ch_type);
+ do
+ {
+ ret = smem_read_alloc_entry(SMEM_CHANNEL_ALLOC_TBL,
+ (void*)smd_channel_alloc_entry,
+ SMD_CHANNEL_ALLOC_MAX);
+ if(ret)
+ {
+ dprintf(CRITICAL,"ERROR reading smem channel alloc tbl\n");
+ return -1;
+ }
+
+ chnl_found = smd_get_channel_info(ch, ch_type);
+ timeout--;
+ udelay(10);
+ } while(timeout && chnl_found);
+
+ if (!timeout)
+ {
+ dprintf(CRITICAL, "Apps timed out waiting for RPM-->APPS channel entry\n");
+ ASSERT(0);
+ }
register_int_handler(SMD_IRQ, smd_irq_handler, ch);
diff --git a/platform/msm_shared/smem.c b/platform/msm_shared/smem.c
index 25628d3..0dc3c24 100644
--- a/platform/msm_shared/smem.c
+++ b/platform/msm_shared/smem.c
@@ -104,7 +104,7 @@
uint32_t smem_addr = 0;
uint32_t base_ext = 0;
uint32_t offset = 0;
- void *ret = 0;
+ void *ret = NULL;
#if DYNAMIC_SMEM
smem_addr = smem_get_base_addr();
@@ -114,11 +114,11 @@
smem = (struct smem *)smem_addr;
if (type < SMEM_FIRST_VALID_TYPE || type > SMEM_LAST_VALID_TYPE)
- return 1;
+ return ret;
ainfo = &smem->alloc_info[type];
if (readl(&ainfo->allocated) == 0)
- return 1;
+ return ret;
*size = readl(&ainfo->size);
base_ext = readl(&ainfo->base_ext);
@@ -126,7 +126,7 @@
if(base_ext)
{
- ret = base_ext + offset;
+ ret = (void*)base_ext + offset;
}
else
{
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index b9cb855..9c9cf61 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -32,6 +32,7 @@
#define __PLATFORM_MSM_SHARED_SMEM_H
#include <sys/types.h>
+#include <platform.h>
#define SMEM_V7_SMEM_MAX_PMIC_DEVICES 1
#define SMEM_V8_SMEM_MAX_PMIC_DEVICES 3
diff --git a/platform/msm_shared/smem_ptable.c b/platform/msm_shared/smem_ptable.c
index 6ec563a..fd27e10 100644
--- a/platform/msm_shared/smem_ptable.c
+++ b/platform/msm_shared/smem_ptable.c
@@ -61,7 +61,7 @@
{
unsigned i;
unsigned ret;
- unsigned len;
+ unsigned len = 0;
/* Read only the header portion of ptable */
ret = smem_read_alloc_entry_offset(SMEM_AARM_PARTITION_TABLE,
@@ -220,7 +220,7 @@
uint32_t i;
uint32_t ret;
uint32_t version;
- uint32_t smem_ram_ptable_size;
+ uint32_t smem_ram_ptable_size = 0;
struct smem_ram_ptable_hdr *ram_ptable_hdr;
/* Check smem ram partition table version and decide on length of ram_ptable */
diff --git a/platform/msm_shared/spmi.c b/platform/msm_shared/spmi.c
index 6d486b7..d82fbb9 100644
--- a/platform/msm_shared/spmi.c
+++ b/platform/msm_shared/spmi.c
@@ -33,6 +33,7 @@
#include <platform/iomap.h>
#include <platform/irqs.h>
#include <platform/interrupts.h>
+#include <malloc.h>
#define PMIC_ARB_V2 0x20010000
#define CHNL_IDX(sid, pid) ((sid << 8) | pid)
@@ -47,8 +48,8 @@
static void spmi_lookup_chnl_number()
{
int i;
- uint8_t slave_id;
- uint8_t ppid_address;
+ uint8_t slave_id = 0;
+ uint8_t ppid_address = 0;
/* We need a max of sid (4 bits) + pid (8bits) of uint8_t's */
uint32_t chnl_tbl_sz = BIT(12) * sizeof(uint8_t);
@@ -95,7 +96,6 @@
{
uint32_t shift_value[] = {0, 8, 16, 24};
int i;
- int j;
uint32_t val = 0;
/* Write to WDATA */
@@ -154,12 +154,12 @@
*/
/* Write first 4 bytes to WDATA0 */
- write_wdata_from_array(param->buffer, 0, param->size, &bytes_written);
+ write_wdata_from_array(param->buffer, 0, param->size,(uint8_t *)&bytes_written);
if (bytes_written < param->size)
{
/* Write next 4 bytes to WDATA1 */
- write_wdata_from_array(param->buffer, 1, param->size, &bytes_written);
+ write_wdata_from_array(param->buffer, 1, param->size, (uint8_t *)&bytes_written);
}
/* Fill in the byte count for the command
@@ -241,7 +241,6 @@
{
uint32_t val = 0;
uint32_t error;
- uint32_t addr;
uint8_t bytes_read = 0;
/* Look up for pmic channel only for V2 hardware
@@ -382,7 +381,7 @@
{
pmic_irq_perph_id = periph_id;
- register_int_handler(EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ , spmi_irq, 0);
+ register_int_handler(EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ ,(int_handler)spmi_irq, 0);
unmask_interrupt(EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ);
}
diff --git a/platform/msm_shared/uart_dm.c b/platform/msm_shared/uart_dm.c
index 0a2eca0..2d74aa6 100644
--- a/platform/msm_shared/uart_dm.c
+++ b/platform/msm_shared/uart_dm.c
@@ -119,11 +119,11 @@
*/
static unsigned int
msm_boot_uart_calculate_num_chars_to_write(char *data_in,
- uint32_t *num_of_chars)
+ uint32_t *num_of_chars)
{
- int i = 0, j = 0;
+ uint32_t i = 0, j = 0;
- if ((data_in == NULL) || (*num_of_chars < 0)) {
+ if ((data_in == NULL)) {
return MSM_BOOT_UART_DM_E_INVAL;
}
@@ -357,7 +357,7 @@
for (i = 0; i < (int)tx_word_count; i++) {
tx_char = (tx_char_left < 4) ? tx_char_left : 4;
- num_chars_written = pack_chars_into_words(tx_data, tx_char, &tx_word);
+ num_chars_written = pack_chars_into_words((uint8_t *)tx_data, tx_char, &tx_word);
/* Wait till TX FIFO has space */
while (!(readl(MSM_BOOT_UART_DM_SR(base)) & MSM_BOOT_UART_DM_SR_TXRDY)) {
diff --git a/target/msm8909/init.c b/target/msm8909/init.c
index 32e4813..56c25c2 100644
--- a/target/msm8909/init.c
+++ b/target/msm8909/init.c
@@ -480,6 +480,10 @@
board->baseband = BASEBAND_MDM;
break;
+ case APQ8009:
+ board->baseband = BASEBAND_APQ;
+ break;
+
default:
dprintf(CRITICAL, "Platform type: %u is not supported\n", platform);
ASSERT(0);
diff --git a/target/msm8909/oem_panel.c b/target/msm8909/oem_panel.c
index 014a012..440f08c 100644
--- a/target/msm8909/oem_panel.c
+++ b/target/msm8909/oem_panel.c
@@ -41,6 +41,7 @@
#include "include/panel_hx8379a_fwvga_skua_video.h"
#include "include/panel_sharp_qhd_video.h"
#include "include/panel_ili9806e_fwvga_video.h"
+#include "include/panel_hx8379c_fwvga_video.h"
#define DISPLAY_MAX_PANEL_DETECTION 0
@@ -60,6 +61,7 @@
HX8379A_FWVGA_SKUA_VIDEO_PANEL,
SHARP_QHD_VIDEO_PANEL,
ILI9806E_FWVGA_VIDEO_PANEL,
+ HX8379C_FWVGA_VIDEO_PANEL,
UNKNOWN_PANEL
};
@@ -72,6 +74,7 @@
{"hx8379a_fwvga_skua_video", HX8379A_FWVGA_SKUA_VIDEO_PANEL},
{"sharp_qhd_video", SHARP_QHD_VIDEO_PANEL},
{"ili9806e_fwvga_video",ILI9806E_FWVGA_VIDEO_PANEL},
+ {"hx8379c_fwvga_video",HX8379C_FWVGA_VIDEO_PANEL},
};
static uint32_t panel_id;
@@ -204,6 +207,31 @@
ili9806e_fwvga_video_timings, TIMING_SIZE);
pinfo->mipi.signature = ILI9806E_FWVGA_VIDEO_SIGNATURE;
break;
+ case HX8379C_FWVGA_VIDEO_PANEL:
+ panelstruct->paneldata = &hx8379c_fwvga_video_panel_data;
+ panelstruct->panelres = &hx8379c_fwvga_video_panel_res;
+ panelstruct->color = &hx8379c_fwvga_video_color;
+ panelstruct->videopanel = &hx8379c_fwvga_video_video_panel;
+ panelstruct->commandpanel = &hx8379c_fwvga_video_command_panel;
+ panelstruct->state = &hx8379c_fwvga_video_state;
+ panelstruct->laneconfig = &hx8379c_fwvga_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &hx8379c_fwvga_video_timing_info;
+ panelstruct->panelresetseq
+ = &hx8379c_fwvga_video_reset_seq;
+ panelstruct->backlightinfo = &hx8379c_fwvga_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = hx8379c_fwvga_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = HX8379C_FWVGA_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = hx8379c_fwvga_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = HX8379C_FWVGA_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ hx8379c_fwvga_video_timings, TIMING_SIZE);
+ pinfo->mipi.signature = HX8379C_FWVGA_VIDEO_SIGNATURE;
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
@@ -264,6 +292,8 @@
panel_id = ILI9806E_FWVGA_VIDEO_PANEL;
break;
case QRD_SKUE:
+ panel_id = HX8379C_FWVGA_VIDEO_PANEL;
+ break;
default:
dprintf(CRITICAL, "QRD Display not enabled for %d type\n",
platform_subtype);