Merge "msm8930: Pmic changes to support splash screen on msm8930"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 86cbadc..e1a4274 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -73,6 +73,7 @@
extern void dsb();
extern void isb();
extern void platform_uninit(void);
+extern void target_uninit(void);
void write_device_info_mmc(device_info *dev);
void write_device_info_flash(device_info *dev);
@@ -101,6 +102,7 @@
static const char *loglevel = " quiet";
static const char *battchg_pause = " androidboot.mode=charger";
static const char *auth_kernel = " androidboot.authorized_kernel=true";
+static const char *secondary_gpt_enable = " gpt";
static const char *baseband_apq = " androidboot.baseband=apq";
static const char *baseband_msm = " androidboot.baseband=msm";
@@ -199,6 +201,7 @@
int have_cmdline = 0;
unsigned char *cmdline_final = NULL;
int pause_at_bootup = 0;
+ bool gpt_exists = partition_gpt_exists();
if (cmdline && cmdline[0]) {
cmdline_len = strlen(cmdline);
@@ -211,6 +214,9 @@
cmdline_len += strlen(usb_sn_cmdline);
cmdline_len += strlen(sn_buf);
+ if (boot_into_recovery && gpt_exists)
+ cmdline_len += strlen(secondary_gpt_enable);
+
if (boot_into_ffbm) {
cmdline_len += strlen(androidboot_mode);
cmdline_len += strlen(ffbm_mode_string);
@@ -292,6 +298,12 @@
have_cmdline = 1;
while ((*dst++ = *src++));
+ if (boot_into_recovery && gpt_exists) {
+ src = secondary_gpt_enable;
+ if (have_cmdline) --dst;
+ while ((*dst++ = *src++));
+ }
+
if (boot_into_ffbm) {
src = androidboot_mode;
if (have_cmdline) --dst;
@@ -491,6 +503,9 @@
generate_atags(tags, final_cmdline, ramdisk, ramdisk_size);
#endif
+ /* Perform target specific cleanup */
+ target_uninit();
+
dprintf(INFO, "booting linux @ %p, ramdisk @ %p (%d), tags/device tree @ %p\n",
entry, ramdisk, ramdisk_size, tags_phys);
@@ -761,7 +776,8 @@
*/
void *dtb;
dtb = dev_tree_appended((void*) hdr->kernel_addr,
- (void *)hdr->tags_addr, hdr->kernel_size);
+ hdr->kernel_size,
+ (void *)hdr->tags_addr);
if (!dtb) {
dprintf(CRITICAL, "ERROR: Appended Device Tree Blob not found\n");
return -1;
@@ -852,7 +868,8 @@
*/
void *dtb;
dtb = dev_tree_appended((void*) hdr->kernel_addr,
- (void *)hdr->tags_addr, hdr->kernel_size);
+ kernel_actual,
+ (void *)hdr->tags_addr);
if (!dtb) {
dprintf(CRITICAL, "ERROR: Appended Device Tree Blob not found\n");
return -1;
@@ -1417,7 +1434,8 @@
*/
if (!dtb_copied) {
void *dtb;
- dtb = dev_tree_appended((void *)hdr->kernel_addr, (void *)hdr->tags_addr, hdr->kernel_size);
+ dtb = dev_tree_appended((void *)hdr->kernel_addr, hdr->kernel_size,
+ (void *)hdr->tags_addr);
if (!dtb) {
fastboot_fail("dtb not found");
return;
@@ -2053,7 +2071,14 @@
fastboot_publish("product", TARGET(BOARD));
fastboot_publish("kernel", "lk");
fastboot_publish("serialno", sn_buf);
- publish_getvar_partition_info(part_info, ARRAY_SIZE(part_info));
+ /*
+ * fastboot publish is supported only for emmc partitions
+ * Calling this for NAND prints some error messages which
+ * is harmless but misleading. Avoid calling this for NAND
+ * devices.
+ */
+ if (target_is_emmc_boot())
+ publish_getvar_partition_info(part_info, ARRAY_SIZE(part_info));
/* Max download size supported */
snprintf(max_download_size, MAX_RSP_SIZE, "\t0x%x", sz);
fastboot_publish("max-download-size", (const char *) max_download_size);
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
new file mode 100755
index 0000000..5cbe292
--- /dev/null
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -0,0 +1,185 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+
+#include "gcdb_autopll.h"
+
+static struct mdss_dsi_pll_config pll_data;
+
+static uint32_t calculate_bitclock(struct msm_panel_info *pinfo)
+{
+ uint32_t ret = NO_ERROR;
+ uint32_t h_period = 0, v_period = 0;
+
+ h_period = pinfo->xres + pinfo->lcdc.h_back_porch +
+ pinfo->lcdc.h_front_porch + pinfo->lcdc.h_pulse_width +
+ pinfo->lcdc.xres_pad;
+
+ v_period = pinfo->yres + pinfo->lcdc.v_back_porch +
+ pinfo->lcdc.v_front_porch + pinfo->lcdc.v_pulse_width +
+ pinfo->lcdc.yres_pad;
+
+ /* Pixel clock rate */
+ pll_data.pixel_clock = h_period * v_period * pinfo->mipi.frame_rate;
+
+ /* Store all bit clock form data */
+ if (pinfo->mipi.bitclock == 0)
+ pll_data.bit_clock = (pll_data.pixel_clock * pinfo->bpp) /
+ pinfo->mipi.num_of_lanes;
+ else
+ pll_data.bit_clock = pinfo->mipi.bitclock;
+
+ pll_data.byte_clock = pll_data.bit_clock >> 3;
+
+ pll_data.halfbit_clock = pll_data.bit_clock >> 1;
+
+ return ret;
+}
+
+static uint32_t calculate_div1()
+{
+ uint32_t ret = NO_ERROR;
+
+ /* div1 - there is divide by 2 logic present */
+ if (pll_data.halfbit_clock > HALFBIT_CLOCK1) {
+ pll_data.posdiv1 = 0x0; /*div 1 */
+ pll_data.vco_clock = pll_data.halfbit_clock << 1;
+ } else if (pll_data.halfbit_clock > HALFBIT_CLOCK2) {
+ pll_data.posdiv1 = 0x1; /*div 2 */
+ pll_data.vco_clock = pll_data.halfbit_clock << 2;
+ } else if (pll_data.halfbit_clock > HALFBIT_CLOCK3) {
+ pll_data.posdiv1 = 0x3; /*div 4 */
+ pll_data.vco_clock = pll_data.halfbit_clock << 3;
+ } else if (pll_data.halfbit_clock > HALFBIT_CLOCK4) {
+ pll_data.posdiv1 = 0x4; /*div 5 */
+ pll_data.vco_clock = pll_data.halfbit_clock * 10;
+ } else {
+ dprintf(CRITICAL, "Not able to calculate posdiv1\n");
+ }
+
+ return ret;
+}
+
+static uint32_t calculate_div3(uint8_t bpp, uint8_t num_of_lanes)
+{
+ uint32_t ret = NO_ERROR;
+ pll_data.pclk_m = 0x1; /* M = 1, N= 1 */
+ pll_data.pclk_n = 0xFF; /* ~ (N-M) = 0xff */
+ pll_data.pclk_d = 0xFF; /* ~N = 0xFF */
+
+ /* formula is ( vco_clock / pdiv_digital) / mnd = pixel_clock */
+
+ /* div3 */
+ switch (bpp) {
+ case BITS_18:
+ if (num_of_lanes == 3) {
+ pll_data.posdiv3 = pll_data.vco_clock /
+ pll_data.pixel_clock;
+ } else {
+ pll_data.posdiv3 = (pll_data.pixel_clock * 2 / 9) /
+ pll_data.vco_clock;
+ pll_data.pclk_m = 0x2; /* M = 2,N = 9 */
+ pll_data.pclk_n = 0xF8;
+ pll_data.pclk_d = 0xF6;
+ }
+ break;
+ case BITS_16:
+ if (num_of_lanes == 3) {
+ pll_data.posdiv3 = (pll_data.pixel_clock * 3 / 8) /
+ pll_data.vco_clock;
+ pll_data.pclk_m = 0x3; /* M = 3, N = 9 */
+ pll_data.pclk_n = 0xFA;
+ pll_data.pclk_d = 0xF7;
+ } else {
+ pll_data.posdiv3 = pll_data.vco_clock /
+ pll_data.pixel_clock;
+ }
+ break;
+ case BITS_24:
+ default:
+ pll_data.posdiv3 = pll_data.vco_clock /
+ pll_data.pixel_clock;
+ break;
+ }
+
+ pll_data.posdiv3--; /* Register needs one value less */
+}
+
+static uint32_t calculate_vco(uint8_t bpp, uint8_t num_of_lanes)
+{
+ uint32_t ret = NO_ERROR;
+ uint8_t counter = 0;
+ uint32_t temprate = 0;
+
+ /* If half bitclock is more than VCO min value */
+ if (pll_data.halfbit_clock > VCO_MIN_CLOCK) {
+
+ /* Direct Mode */
+
+ /* support vco clock to max value only */
+ if (pll_data.halfbit_clock > VCO_MAX_CLOCK)
+ pll_data.vco_clock = VCO_MAX_CLOCK;
+ else
+ pll_data.vco_clock = pll_data.halfbit_clock;
+ pll_data.directpath = 0x0;
+ pll_data.posdiv1 = 0x0; /*DSI spec says 0 - div 1 */
+ /*1 - div 2 */
+ /*F - div 16 */
+ } else {
+ /* Indirect Mode */
+
+ pll_data.directpath = 0x02; /* set bit 1 to enable for
+ indirect path */
+
+ calculate_div1();
+ }
+
+ /* calculate mnd and div3 for direct and indirect path */
+ calculate_div3(bpp, num_of_lanes);
+
+ return ret;
+}
+
+uint32_t calculate_clock_config(struct msm_panel_info *pinfo)
+{
+ uint32_t ret = NO_ERROR;
+
+ calculate_bitclock(pinfo);
+
+ calculate_vco(pinfo->bpp, pinfo->mipi.num_of_lanes);
+
+ pinfo->mipi.dsi_pll_config = &pll_data;
+
+ return ret;
+}
diff --git a/dev/gcdb/display/gcdb_autopll.h b/dev/gcdb/display/gcdb_autopll.h
new file mode 100755
index 0000000..259abd6
--- /dev/null
+++ b/dev/gcdb/display/gcdb_autopll.h
@@ -0,0 +1,56 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _GCDB_AUTOPLL_H_
+#define _GCDB_AUTOPLL_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+
+#define VCO_MIN_CLOCK 350000000
+#define VCO_MAX_CLOCK 750000000
+
+#define HALFBIT_CLOCK1 175000000 /* VCO min clock div by 2 */
+#define HALFBIT_CLOCK2 88000000 /* VCO min clock div by 4 */
+#define HALFBIT_CLOCK3 44000000 /* VCO min clock div by 8 */
+#define HALFBIT_CLOCK4 40000000 /* VCO min clock div by 9 */
+
+#define BITS_24 24
+#define BITS_18 18
+#define BITS_16 16
+
+/*---------------------------------------------------------------------------*/
+/* Structure definition */
+/*---------------------------------------------------------------------------*/
+
+uint32_t calculate_clock_config(struct msm_panel_info *pinfo);
+
+#endif /*_GCDB_AUTOPLL_H_ */
diff --git a/dev/gcdb/display/gcdb_display.c b/dev/gcdb/display/gcdb_display.c
new file mode 100755
index 0000000..e117ba2
--- /dev/null
+++ b/dev/gcdb/display/gcdb_display.c
@@ -0,0 +1,200 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <board.h>
+#include <mdp5.h>
+#include <platform/gpio.h>
+#include <mipi_dsi.h>
+
+#include "include/display_resource.h"
+#include "include/panel.h"
+#include "panel_display.h"
+#include "gcdb_display.h"
+#include "target/display.h"
+#include "gcdb_autopll.h"
+
+/*---------------------------------------------------------------------------*/
+/* static */
+/*---------------------------------------------------------------------------*/
+static struct msm_fb_panel_data panel;
+struct panel_struct panelstruct;
+static uint8_t display_enable;
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db;
+
+
+/*---------------------------------------------------------------------------*/
+/* Extern */
+/*---------------------------------------------------------------------------*/
+extern int msm_display_init(struct msm_fb_panel_data *pdata);
+extern int msm_display_off();
+
+static uint32_t panel_backlight_ctrl(uint8_t enable)
+{
+ uint32_t ret = NO_ERROR;
+
+ ret = target_backlight_ctrl(enable);
+
+ return ret;
+}
+
+static uint32_t mdss_dsi_panel_reset(uint8_t enable)
+{
+ uint32_t ret = NO_ERROR;
+
+ ret = target_panel_reset(enable, &reset_gpio,
+ &enable_gpio, &reset_sequence);
+
+ return ret;
+}
+
+static uint32_t mdss_dsi_panel_clock(uint8_t enable,
+ struct msm_panel_info *pinfo)
+{
+ uint32_t ret = NO_ERROR;
+
+ ret = calculate_clock_config(pinfo);
+ if (ret) {
+ dprintf(CRITICAL, "Clock calculation failed \n");
+ /* should it stop here ? check with display team */
+ }
+
+ ret = target_panel_clock(enable, pinfo);
+
+ return ret;
+}
+
+static int mdss_dsi_panel_power(uint8_t enable)
+{
+ int ret = NO_ERROR;
+
+ if (enable) {
+
+ /* Enable backlight */
+ ret = panel_backlight_ctrl(enable);
+ if (ret) {
+ dprintf(CRITICAL, "Backlight enable failed \n");
+ return ret;
+ }
+ ret = target_ldo_ctrl(enable, ldo_entry_array,
+ TOTAL_LDO_DEFINED);
+ if (ret) {
+ dprintf(CRITICAL, "LDO control enable failed \n");
+ return ret;
+ }
+
+ /* Panel Reset */
+ ret = mdss_dsi_panel_reset(enable);
+ if (ret) {
+ dprintf(CRITICAL, "panel reset failed \n");
+ return ret;
+ }
+ dprintf(SPEW, "Panel power on done\n");
+ } else {
+ /* Disable panel, backlight and ldo */
+ ret = mdss_dsi_panel_reset(enable);
+ if (ret) {
+ dprintf(CRITICAL, "panel reset disable failed \n");
+ return ret;
+ }
+
+ ret = panel_backlight_ctrl(enable);
+ if (ret) {
+ dprintf(CRITICAL, "Backlight disable failed \n");
+ return ret;
+ }
+
+ ret = target_ldo_ctrl(enable, ldo_entry_array,
+ TOTAL_LDO_DEFINED);
+ if (ret) {
+ dprintf(CRITICAL, "ldo control disable failed \n");
+ return ret;
+ }
+ dprintf(SPEW, "Panel power off done\n");
+ }
+
+ return ret;
+}
+
+static void init_platform_data()
+{
+ memcpy(dsi_video_mode_phy_db.regulator, panel_regulator_settings,
+ REGULATOR_SIZE);
+ memcpy(dsi_video_mode_phy_db.ctrl, panel_physical_ctrl,
+ PHYSICAL_SIZE);
+ memcpy(dsi_video_mode_phy_db.strength, panel_strength_ctrl,
+ STRENGTH_SIZE);
+ memcpy(dsi_video_mode_phy_db.bistCtrl, panel_bist_ctrl, BIST_SIZE);
+ memcpy(dsi_video_mode_phy_db.laneCfg, panel_lane_config, LANE_SIZE);
+}
+
+void gcdb_display_init(uint32_t rev, void *base)
+{
+
+ if (!oem_panel_select(&panelstruct, &(panel.panel_info),
+ &dsi_video_mode_phy_db)) {
+ dprintf(CRITICAL, "Target panel init not found!\n");
+ return;
+ }
+
+ init_platform_data();
+
+ if (dsi_panel_init(&(panel.panel_info), &panelstruct)) {
+ dprintf(CRITICAL, "DSI panel init failed!\n");
+ return;
+ }
+
+ panel.panel_info.mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+
+ panel.pll_clk_func = mdss_dsi_panel_clock;
+ panel.power_func = mdss_dsi_panel_power;
+ panel.fb.base = base;
+ panel.fb.width = panel.panel_info.xres;
+ panel.fb.height = panel.panel_info.yres;
+ panel.fb.stride = panel.panel_info.xres;
+ panel.fb.bpp = panel.panel_info.bpp;
+ panel.fb.format = panel.panel_info.mipi.dst_format;
+ panel.mdp_rev = rev;
+
+ if (msm_display_init(&panel)) {
+ dprintf(CRITICAL, "Display init failed!\n");
+ return;
+ }
+
+ display_enable = 1;
+}
+
+void gcdb_display_shutdown(void)
+{
+ if (display_enable)
+ msm_display_off();
+}
diff --git a/dev/gcdb/display/gcdb_display.h b/dev/gcdb/display/gcdb_display.h
new file mode 100755
index 0000000..dd6a6a8
--- /dev/null
+++ b/dev/gcdb/display/gcdb_display.h
@@ -0,0 +1,62 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _GCDB_DISPLAY_H_
+#define _GCDB_DISPLAY_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+#include "include/display_resource.h"
+
+#define TIMING_SIZE 48
+#define REGULATOR_SIZE 28
+#define PHYSICAL_SIZE 16
+#define STRENGTH_SIZE 8
+#define BIST_SIZE 6
+#define LANE_SIZE 45
+
+/*---------------------------------------------------------------------------*/
+/* API */
+/*---------------------------------------------------------------------------*/
+
+int target_backlight_ctrl(uint8_t enable);
+int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo);
+int target_panel_reset(uint8_t enable,
+ struct gpio_pin *resetgpio,
+ struct gpio_pin *enablegpio,
+ struct panel_reset_sequence *resetseq);
+int target_ldo_ctrl(uint8_t enable, struct ldo_entry ldo_entry_array[],
+ uint8_t totalldo);
+
+void gcdb_display_init(unsigned int rev, void *base);
+void gcdb_display_shutdown();
+
+#endif /*_GCDB_DISPLAY_H_ */
diff --git a/dev/gcdb/display/include/display_resource.h b/dev/gcdb/display/include/display_resource.h
new file mode 100755
index 0000000..24a375d
--- /dev/null
+++ b/dev/gcdb/display/include/display_resource.h
@@ -0,0 +1,80 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _DISPLAY_RESOURCE_H_
+#define _DISPLAY_RESOURCE_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+#include <smem.h>
+#include <board.h>
+
+#define TOTAL_RESET_GPIO_CTRL 5
+
+#define TOTAL_LDO_CTRL 5
+
+/*---------------------------------------------------------------------------*/
+/* Structure definition */
+/*---------------------------------------------------------------------------*/
+
+/*GPIO pin structure to define reset pin, enable pin, te pin, etc. */
+typedef struct gpio_pin{
+
+ char *pin_source;
+ uint32_t pin_id;
+ uint32_t pin_strength;
+ uint32_t pin_direction;
+ uint32_t pin_pull;
+ uint32_t pin_state;
+};
+
+typedef struct panel_reset_sequence {
+
+ uint8_t pin_state[TOTAL_RESET_GPIO_CTRL];
+ uint32_t sleep[TOTAL_RESET_GPIO_CTRL];
+ uint8_t pin_direction;
+};
+
+/*LDO entry structure for different LDO entries. */
+typedef struct ldo_entry{
+ char *ldo_name;
+ uint32_t ldo_id;
+ uint32_t ldo_type;
+ uint32_t ldo_voltage;
+ uint32_t ldo_enable_load;
+ uint32_t ldo_disable_load;
+ uint32_t ldo_preon_sleep;
+ uint32_t ldo_poston_sleep;
+ uint32_t ldo_preoff_sleep;
+ uint32_t ldo_postoff_sleep;
+};
+
+#endif /*_DISPLAY_RESOURCE_H_ */
diff --git a/dev/gcdb/display/include/panel.h b/dev/gcdb/display/include/panel.h
new file mode 100755
index 0000000..726af88
--- /dev/null
+++ b/dev/gcdb/display/include/panel.h
@@ -0,0 +1,155 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_H_
+#define _PANEL_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+#include <smem.h>
+
+/*---------------------------------------------------------------------------*/
+/* Structure definition */
+/*---------------------------------------------------------------------------*/
+
+/*Panel Configuration */
+typedef struct panel_config{
+
+ char *panel_name;
+ char *panel_controller;
+ char *panel_compatible;
+ uint16_t panel_interface;
+ uint16_t panel_type;
+ char *panel_destination;
+ uint32_t panel_orientation;
+ uint32_t panel_clockrate;
+ uint16_t panel_framerate;
+ uint16_t panel_channelid;
+ uint16_t dsi_virtualchannel_id;
+ uint16_t panel_broadcast_mode;
+ uint16_t dsi_lp11_atinit;
+ uint16_t dsi_initmaster_time;
+ uint16_t dsi_stream;
+ uint8_t interleave_mode;
+ uint32_t panel_bitclock_freq;
+ uint32_t panel_operating_mode;
+ uint32_t panel_with_enable_gpio;
+};
+
+typedef struct panel_resolution{
+
+ uint16_t panel_width;
+ uint16_t panel_height;
+ uint16_t hfront_porch;
+ uint16_t hback_porch;
+ uint16_t hpulse_width;
+ uint16_t hsync_skew;
+ uint16_t vfront_porch;
+ uint16_t vback_porch;
+ uint16_t vpulse_width;
+ uint16_t hleft_border;
+ uint16_t hright_border;
+ uint16_t vtop_border;
+ uint16_t vbottom_border;
+ uint16_t hactive_res;
+ uint16_t vactive_res;
+ uint16_t invert_data_polarity;
+ uint16_t invert_vsync_polarity;
+ uint16_t invert_hsync_polarity;
+};
+
+typedef struct color_info{
+ uint8_t color_format;
+ uint8_t color_order;
+ uint8_t underflow_color;
+ uint8_t border_color;
+ uint8_t pixel_packing;
+ uint8_t pixel_alignment;
+};
+
+typedef struct command_state {
+ uint8_t oncommand_state;
+ uint8_t offcommand_state;
+};
+
+typedef struct videopanel_info {
+ uint8_t hsync_pulse;
+ uint8_t hfp_power_mode;
+ uint8_t hbp_power_mode;
+ uint8_t hsa_power_mode;
+ uint8_t bllp_eof_power_mode;
+ uint8_t bllp_power_mode;
+ uint8_t traffic_mode;
+ uint8_t dma_delayafter_vsync;
+ uint32_t bllp_eof_power;
+};
+
+typedef struct commandpanel_info {
+ uint8_t techeck_enable;
+ uint8_t tepin_select;
+ uint8_t teusing_tepin;
+ uint8_t autorefresh_enable;
+ uint32_t autorefresh_framenumdiv;
+ uint32_t tevsync_rdptr_irqline;
+ uint32_t tevsync_continue_lines;
+ uint32_t tevsync_startline_divisor;
+ uint32_t tepercent_variance;
+ uint8_t tedcs_command;
+ uint8_t disable_eotafter_hsxfer;
+ uint32_t cmdmode_idletime;
+};
+
+typedef struct lane_configuration {
+ uint8_t dsi_lanes;
+ uint8_t dsi_lanemap;
+ uint8_t lane0_state;
+ uint8_t lane1_state;
+ uint8_t lane2_state;
+ uint8_t lane3_state;
+};
+
+typedef struct panel_timing {
+ uint8_t dsi_mdp_trigger;
+ uint8_t dsi_dma_trigger;
+ uint8_t tclk_post;
+ uint8_t tclk_pre;
+};
+
+typedef struct backlight {
+ uint16_t bl_interface_type;
+ uint16_t bl_min_level;
+ uint16_t bl_max_level;
+ uint16_t bl_step;
+ uint16_t bl_pmic_controltype;
+ char *bl_pmic_model;
+};
+
+#endif /*_PANEL_H_ */
diff --git a/dev/gcdb/display/include/panel_hx8394a_720p_video.h b/dev/gcdb/display/include/panel_hx8394a_720p_video.h
new file mode 100644
index 0000000..fd62f1e
--- /dev/null
+++ b/dev/gcdb/display/include/panel_hx8394a_720p_video.h
@@ -0,0 +1,277 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_HX8394A_720P_VIDEO_H_
+
+#define _PANEL_HX8394A_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config hx8394a_720p_video_panel_data = {
+ "hx8394a 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution hx8394a_720p_video_panel_res = {
+ 720, 1280, 79, 59, 60, 0, 7, 10, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info hx8394a_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char hx8394a_720p_video_on_cmd0[] = {
+0x04, 0x00, 0x39, 0xC0,
+0xb9, 0xff, 0x83, 0x94,
+ };
+
+
+static char hx8394a_720p_video_on_cmd1[] = {
+0x05, 0x00, 0x39, 0xC0,
+0xc7, 0x00, 0x10, 0x00,
+0x10, 0xFF, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd2[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xbc, 0x07, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd3[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xba, 0x13, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd4[] = {
+0x10, 0x00, 0x39, 0xC0,
+0xb1, 0x01, 0x00, 0x07,
+0x83, 0x01, 0x12, 0x0f,
+0x32, 0x38, 0x29, 0x29,
+0x50, 0x02, 0x00, 0x00,
+ };
+
+
+static char hx8394a_720p_video_on_cmd5[] = {
+0x07, 0x00, 0x39, 0xC0,
+0xb2, 0x00, 0xc8, 0x09,
+0x05, 0x00, 0x71, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd6[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xcc, 0x05, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd7[] = {
+0x00, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_video_on_cmd8[] = {
+0x35, 0x00, 0x39, 0xC0,
+0xd5, 0x00, 0x00, 0x00,
+0x00, 0x0a, 0x00, 0x01,
+0x00, 0x00, 0x00, 0x33,
+0x00, 0x23, 0x45, 0x67,
+0x01, 0x01, 0x23, 0x88,
+0x88, 0x88, 0x88, 0x88,
+0x88, 0x88, 0x99, 0x99,
+0x99, 0x88, 0x88, 0x99,
+0x88, 0x54, 0x32, 0x10,
+0x76, 0x32, 0x10, 0x88,
+0x88, 0x88, 0x88, 0x88,
+0x88, 0x88, 0x99, 0x99,
+0x99, 0x88, 0x88, 0x88,
+0x99, 0xFF, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd9[] = {
+0x17, 0x00, 0x39, 0xC0,
+0xb4, 0x80, 0x08, 0x32,
+0x10, 0x00, 0x32, 0x15,
+0x08, 0x32, 0x12, 0x20,
+0x33, 0x05, 0x4c, 0x05,
+0x37, 0x05, 0x3f, 0x1e,
+0x5f, 0x5f, 0x06, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd10[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xb6, 0x00, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd11[] = {
+0x23, 0x00, 0x39, 0xC0,
+0xe0, 0x01, 0x05, 0x07,
+0x25, 0x35, 0x3f, 0x0b,
+0x32, 0x04, 0x09, 0x0e,
+0x10, 0x13, 0x10, 0x14,
+0x16, 0x1b, 0x01, 0x05,
+0x07, 0x25, 0x35, 0x3f,
+0x0b, 0x32, 0x04, 0x09,
+0x0e, 0x10, 0x13, 0x10,
+0x14, 0x16, 0x1b, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd12[] = {
+0x00, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_video_on_cmd13[] = {
+0x04, 0x00, 0x39, 0xC0,
+0xbf, 0x06, 0x00, 0x10,
+ };
+
+
+static char hx8394a_720p_video_on_cmd14[] = {
+0x11, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_video_on_cmd15[] = {
+0x29, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd hx8394a_720p_video_on_command[] = {
+{ 0x8 , hx8394a_720p_video_on_cmd0},
+{ 0xc , hx8394a_720p_video_on_cmd1},
+{ 0x8 , hx8394a_720p_video_on_cmd2},
+{ 0x8 , hx8394a_720p_video_on_cmd3},
+{ 0x14 , hx8394a_720p_video_on_cmd4},
+{ 0xc , hx8394a_720p_video_on_cmd5},
+{ 0x8 , hx8394a_720p_video_on_cmd6},
+{ 0x4 , hx8394a_720p_video_on_cmd7},
+{ 0x3c , hx8394a_720p_video_on_cmd8},
+{ 0x1c , hx8394a_720p_video_on_cmd9},
+{ 0x8 , hx8394a_720p_video_on_cmd10},
+{ 0x28 , hx8394a_720p_video_on_cmd11},
+{ 0x4 , hx8394a_720p_video_on_cmd12},
+{ 0x8 , hx8394a_720p_video_on_cmd13},
+{ 0x4 , hx8394a_720p_video_on_cmd14},
+{ 0x4 , hx8394a_720p_video_on_cmd15}
+};
+#define HX8394A_720P_VIDEO_ON_COMMAND 16
+
+
+static char hx8394a_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd hx8394a_720p_video_off_command[] = {
+{ 0x4 , hx8394a_720p_videooff_cmd0},
+{ 0x4 , hx8394a_720p_videooff_cmd1}
+};
+#define HX8394A_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state hx8394a_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info hx8394a_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info hx8394a_720p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration hx8394a_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t hx8394a_720p_video_timings[] = {
+ 0x8d, 0x24, 0x19, 0x00, 0x34, 0x34, 0x1d, 0x26, 0x2a, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd hx8394a_720p_video_rotation[] = {
+
+};
+#define HX8394A_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing hx8394a_720p_video_timing_info = {
+ 0, 4, 0x1f, 0x2d
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight hx8394a_720p_video_backlight = {
+ 1, 1, 4095, 100, 1, "bl_ctrl_wled"
+};
+
+
+#endif /*_HX8394A_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35521_720p_video.h b/dev/gcdb/display/include/panel_nt35521_720p_video.h
new file mode 100644
index 0000000..e9e4104
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35521_720p_video.h
@@ -0,0 +1,1474 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35521_720P_VIDEO_H_
+
+#define _PANEL_NT35521_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35521_720p_video_panel_data = {
+ "nt35521 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35521_720p_video_panel_res = {
+ 720, 1280, 44, 55, 11, 0, 14, 15, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35521_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35521_720p_video_on_cmd0[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd1[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x68, 0x21, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd2[] = {
+0xB5, 0xC8, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd4[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xB8, 0x00, 0x00, 0x0A,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd5[] = {
+0xB9, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd6[] = {
+0xBA, 0x02, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd7[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBB, 0x63, 0x63, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd8[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBC, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd9[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBD, 0x02, 0x7F, 0x0D,
+0x0B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd10[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xCC, 0x41, 0x36, 0x87,
+0x54, 0x46, 0x65, 0x10,
+0x12, 0x14, 0x10, 0x12,
+0x14, 0x40, 0x08, 0x15,
+0x05, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd11[] = {
+0xD0, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd12[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xD1, 0x00, 0x04, 0x08,
+0x0C, 0x10, 0x14, 0x18,
+0x1C, 0x20, 0x24, 0x28,
+0x2C, 0x30, 0x34, 0x38,
+0x3C, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd13[] = {
+0xD3, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd14[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD6, 0x44, 0x44, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd15[] = {
+0x0D, 0x00, 0x29, 0xC0,
+0xD7, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd16[] = {
+0x0E, 0x00, 0x29, 0xC0,
+0xD8, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd17[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD9, 0x00, 0x28, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd18[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd19[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xE6, 0xF3, 0xEC, 0xE7,
+0xDF, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd20[] = {
+0x0B, 0x00, 0x29, 0xC0,
+0xE7, 0xF3, 0xD9, 0xCC,
+0xCD, 0xB3, 0xA6, 0x99,
+0x99, 0x99, 0x95, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd21[] = {
+0x0B, 0x00, 0x29, 0xC0,
+0xE8, 0xF3, 0xD9, 0xCC,
+0xCD, 0xB3, 0xA6, 0x99,
+0x99, 0x99, 0x95, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd22[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE9, 0x00, 0x04, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd23[] = {
+0xEA, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd24[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xEE, 0x87, 0x78, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd25[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xEF, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd26[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd27[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x0D, 0x0D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd28[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x0D, 0x0D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd29[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB3, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd30[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB4, 0x19, 0x19, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd31[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB5, 0x06, 0x06, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd32[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB6, 0x05, 0x05, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd33[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB7, 0x05, 0x05, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd34[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB8, 0x05, 0x05, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd35[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB9, 0x44, 0x44, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd36[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBA, 0x36, 0x36, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd37[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBC, 0x50, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd38[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBD, 0x50, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd39[] = {
+0xBE, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd40[] = {
+0xBF, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd41[] = {
+0xC0, 0x0C, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd42[] = {
+0xC1, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd43[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC2, 0x19, 0x19, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd44[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC3, 0x0A, 0x0A, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd45[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC4, 0x23, 0x23, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd46[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xC7, 0x00, 0x80, 0x00,
+ };
+
+
+static char nt35521_720p_video_on_cmd47[] = {
+0x07, 0x00, 0x29, 0xC0,
+0xC9, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd48[] = {
+0xCA, 0x01, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd49[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCB, 0x0B, 0x53, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd50[] = {
+0xCC, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd51[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCD, 0x0B, 0x52, 0x53,
+ };
+
+
+static char nt35521_720p_video_on_cmd52[] = {
+0xCE, 0x44, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd53[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCF, 0x00, 0x50, 0x50,
+ };
+
+
+static char nt35521_720p_video_on_cmd54[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD0, 0x50, 0x50, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd55[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD1, 0x50, 0x50, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd56[] = {
+0xD2, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd57[] = {
+0xD3, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd58[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd59[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB0, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd60[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB1, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd61[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB2, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd62[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xB3, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd63[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB4, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd64[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB5, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd65[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB6, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd66[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xB7, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd67[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB8, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd68[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB9, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd69[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBA, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd70[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xBB, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd71[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBC, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd72[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBD, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd73[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBE, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd74[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xBF, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd75[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC0, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd76[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd77[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC2, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd78[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC3, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd79[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC4, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd80[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd81[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC6, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd82[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC7, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd83[] = {
+0xEE, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd84[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd85[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd86[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd87[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB2, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd88[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB3, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd89[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB4, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd90[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB5, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd91[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB6, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd92[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB7, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd93[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB8, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd94[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB9, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd95[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBA, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd96[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBB, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd97[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBC, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd98[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBD, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd99[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC0, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd100[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd101[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC2, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd102[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC3, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd103[] = {
+0xC4, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd104[] = {
+0xC5, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd105[] = {
+0xC6, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd106[] = {
+0xC7, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd107[] = {
+0xEF, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd108[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd109[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd110[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd111[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB2, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd112[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB3, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd113[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB4, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd114[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB5, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd115[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB6, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd116[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB7, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd117[] = {
+0xB8, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd118[] = {
+0xB9, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd119[] = {
+0xBA, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd120[] = {
+0xBB, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd121[] = {
+0xBC, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd122[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBD, 0x03, 0x03, 0x03,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd123[] = {
+0xC0, 0x03, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd124[] = {
+0xC1, 0x05, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd125[] = {
+0xC2, 0x03, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd126[] = {
+0xC3, 0x05, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd127[] = {
+0xC4, 0x80, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd128[] = {
+0xC5, 0xA2, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd129[] = {
+0xC6, 0x80, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd130[] = {
+0xC7, 0xA2, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd131[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC8, 0x01, 0x20, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd132[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC9, 0x00, 0x20, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd133[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCA, 0x01, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd134[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCB, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd135[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCC, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd136[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCD, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd137[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCE, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd138[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCF, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd139[] = {
+0xD0, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd140[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD1, 0x03, 0x00, 0x00,
+0x07, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd141[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD2, 0x13, 0x00, 0x00,
+0x07, 0x11, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd142[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD3, 0x23, 0x00, 0x00,
+0x07, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd143[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD4, 0x33, 0x00, 0x00,
+0x07, 0x11, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd144[] = {
+0xE5, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd145[] = {
+0xE6, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd146[] = {
+0xE7, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd147[] = {
+0xE8, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd148[] = {
+0xE9, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd149[] = {
+0xEA, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd150[] = {
+0xEB, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd151[] = {
+0xEC, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd152[] = {
+0xED, 0x31, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd153[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd154[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x10, 0x11, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd155[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x12, 0x13, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd156[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB2, 0x08, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd157[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB3, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd158[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB4, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd159[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB5, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd160[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB6, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd161[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB7, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd162[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB8, 0x02, 0x0A, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd163[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0x08, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd164[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBA, 0x09, 0x01, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd165[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBB, 0x0B, 0x03, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd166[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBC, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd167[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBD, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd168[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBE, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd169[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBF, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd170[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC0, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd171[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0x09, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd172[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC2, 0x19, 0x18, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd173[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC3, 0x17, 0x16, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd174[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC4, 0x19, 0x18, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd175[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC5, 0x17, 0x16, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd176[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC6, 0x01, 0x09, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd177[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC7, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd178[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC8, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd179[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC9, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd180[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCA, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd181[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCB, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd182[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCC, 0x0B, 0x03, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd183[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCD, 0x09, 0x01, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd184[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCE, 0x00, 0x08, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd185[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0x0A, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd186[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD0, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd187[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD1, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd188[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD2, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd189[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD3, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd190[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD4, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd191[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD5, 0x08, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd192[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD6, 0x10, 0x11, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd193[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD7, 0x12, 0x13, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd194[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD8, 0x55, 0x55, 0x55,
+0x55, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd195[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD9, 0x55, 0x55, 0x55,
+0x55, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd196[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE5, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd197[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE6, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd198[] = {
+0xE7, 0x05, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd199[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd200[] = {
+0x11, 0x00, 0x05, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd201[] = {
+0x29, 0x00, 0x05, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd202[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd203[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x2C, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35521_720p_video_on_command[] = {
+{ 0xc , nt35521_720p_video_on_cmd0},
+{ 0x8 , nt35521_720p_video_on_cmd1},
+{ 0x4 , nt35521_720p_video_on_cmd2},
+{ 0x8 , nt35521_720p_video_on_cmd3},
+{ 0xc , nt35521_720p_video_on_cmd4},
+{ 0x4 , nt35521_720p_video_on_cmd5},
+{ 0x4 , nt35521_720p_video_on_cmd6},
+{ 0x8 , nt35521_720p_video_on_cmd7},
+{ 0x8 , nt35521_720p_video_on_cmd8},
+{ 0xc , nt35521_720p_video_on_cmd9},
+{ 0x18 , nt35521_720p_video_on_cmd10},
+{ 0x4 , nt35521_720p_video_on_cmd11},
+{ 0x18 , nt35521_720p_video_on_cmd12},
+{ 0x4 , nt35521_720p_video_on_cmd13},
+{ 0x8 , nt35521_720p_video_on_cmd14},
+{ 0x14 , nt35521_720p_video_on_cmd15},
+{ 0x14 , nt35521_720p_video_on_cmd16},
+{ 0x8 , nt35521_720p_video_on_cmd17},
+{ 0x8 , nt35521_720p_video_on_cmd18},
+{ 0xc , nt35521_720p_video_on_cmd19},
+{ 0x10 , nt35521_720p_video_on_cmd20},
+{ 0x10 , nt35521_720p_video_on_cmd21},
+{ 0x8 , nt35521_720p_video_on_cmd22},
+{ 0x4 , nt35521_720p_video_on_cmd23},
+{ 0xc , nt35521_720p_video_on_cmd24},
+{ 0x8 , nt35521_720p_video_on_cmd25},
+{ 0xc , nt35521_720p_video_on_cmd26},
+{ 0x8 , nt35521_720p_video_on_cmd27},
+{ 0x8 , nt35521_720p_video_on_cmd28},
+{ 0x8 , nt35521_720p_video_on_cmd29},
+{ 0x8 , nt35521_720p_video_on_cmd30},
+{ 0x8 , nt35521_720p_video_on_cmd31},
+{ 0x8 , nt35521_720p_video_on_cmd32},
+{ 0x8 , nt35521_720p_video_on_cmd33},
+{ 0x8 , nt35521_720p_video_on_cmd34},
+{ 0x8 , nt35521_720p_video_on_cmd35},
+{ 0x8 , nt35521_720p_video_on_cmd36},
+{ 0x8 , nt35521_720p_video_on_cmd37},
+{ 0x8 , nt35521_720p_video_on_cmd38},
+{ 0x4 , nt35521_720p_video_on_cmd39},
+{ 0x4 , nt35521_720p_video_on_cmd40},
+{ 0x4 , nt35521_720p_video_on_cmd41},
+{ 0x4 , nt35521_720p_video_on_cmd42},
+{ 0x8 , nt35521_720p_video_on_cmd43},
+{ 0x8 , nt35521_720p_video_on_cmd44},
+{ 0x8 , nt35521_720p_video_on_cmd45},
+{ 0x8 , nt35521_720p_video_on_cmd46},
+{ 0xc , nt35521_720p_video_on_cmd47},
+{ 0x4 , nt35521_720p_video_on_cmd48},
+{ 0x8 , nt35521_720p_video_on_cmd49},
+{ 0x4 , nt35521_720p_video_on_cmd50},
+{ 0x8 , nt35521_720p_video_on_cmd51},
+{ 0x4 , nt35521_720p_video_on_cmd52},
+{ 0x8 , nt35521_720p_video_on_cmd53},
+{ 0x8 , nt35521_720p_video_on_cmd54},
+{ 0x8 , nt35521_720p_video_on_cmd55},
+{ 0x4 , nt35521_720p_video_on_cmd56},
+{ 0x4 , nt35521_720p_video_on_cmd57},
+{ 0xc , nt35521_720p_video_on_cmd58},
+{ 0x18 , nt35521_720p_video_on_cmd59},
+{ 0x18 , nt35521_720p_video_on_cmd60},
+{ 0x18 , nt35521_720p_video_on_cmd61},
+{ 0xc , nt35521_720p_video_on_cmd62},
+{ 0x18 , nt35521_720p_video_on_cmd63},
+{ 0x18 , nt35521_720p_video_on_cmd64},
+{ 0x18 , nt35521_720p_video_on_cmd65},
+{ 0xc , nt35521_720p_video_on_cmd66},
+{ 0x18 , nt35521_720p_video_on_cmd67},
+{ 0x18 , nt35521_720p_video_on_cmd68},
+{ 0x18 , nt35521_720p_video_on_cmd69},
+{ 0xc , nt35521_720p_video_on_cmd70},
+{ 0x18 , nt35521_720p_video_on_cmd71},
+{ 0x18 , nt35521_720p_video_on_cmd72},
+{ 0x18 , nt35521_720p_video_on_cmd73},
+{ 0xc , nt35521_720p_video_on_cmd74},
+{ 0x18 , nt35521_720p_video_on_cmd75},
+{ 0x18 , nt35521_720p_video_on_cmd76},
+{ 0x18 , nt35521_720p_video_on_cmd77},
+{ 0xc , nt35521_720p_video_on_cmd78},
+{ 0x18 , nt35521_720p_video_on_cmd79},
+{ 0x18 , nt35521_720p_video_on_cmd80},
+{ 0x18 , nt35521_720p_video_on_cmd81},
+{ 0xc , nt35521_720p_video_on_cmd82},
+{ 0x4 , nt35521_720p_video_on_cmd83},
+{ 0xc , nt35521_720p_video_on_cmd84},
+{ 0x8 , nt35521_720p_video_on_cmd85},
+{ 0x8 , nt35521_720p_video_on_cmd86},
+{ 0xc , nt35521_720p_video_on_cmd87},
+{ 0xc , nt35521_720p_video_on_cmd88},
+{ 0xc , nt35521_720p_video_on_cmd89},
+{ 0xc , nt35521_720p_video_on_cmd90},
+{ 0xc , nt35521_720p_video_on_cmd91},
+{ 0xc , nt35521_720p_video_on_cmd92},
+{ 0xc , nt35521_720p_video_on_cmd93},
+{ 0xc , nt35521_720p_video_on_cmd94},
+{ 0xc , nt35521_720p_video_on_cmd95},
+{ 0xc , nt35521_720p_video_on_cmd96},
+{ 0xc , nt35521_720p_video_on_cmd97},
+{ 0xc , nt35521_720p_video_on_cmd98},
+{ 0xc , nt35521_720p_video_on_cmd99},
+{ 0xc , nt35521_720p_video_on_cmd100},
+{ 0xc , nt35521_720p_video_on_cmd101},
+{ 0xc , nt35521_720p_video_on_cmd102},
+{ 0x4 , nt35521_720p_video_on_cmd103},
+{ 0x4 , nt35521_720p_video_on_cmd104},
+{ 0x4 , nt35521_720p_video_on_cmd105},
+{ 0x4 , nt35521_720p_video_on_cmd106},
+{ 0x4 , nt35521_720p_video_on_cmd107},
+{ 0xc , nt35521_720p_video_on_cmd108},
+{ 0x8 , nt35521_720p_video_on_cmd109},
+{ 0x8 , nt35521_720p_video_on_cmd110},
+{ 0x8 , nt35521_720p_video_on_cmd111},
+{ 0x8 , nt35521_720p_video_on_cmd112},
+{ 0x8 , nt35521_720p_video_on_cmd113},
+{ 0x8 , nt35521_720p_video_on_cmd114},
+{ 0x8 , nt35521_720p_video_on_cmd115},
+{ 0x8 , nt35521_720p_video_on_cmd116},
+{ 0x4 , nt35521_720p_video_on_cmd117},
+{ 0x4 , nt35521_720p_video_on_cmd118},
+{ 0x4 , nt35521_720p_video_on_cmd119},
+{ 0x4 , nt35521_720p_video_on_cmd120},
+{ 0x4 , nt35521_720p_video_on_cmd121},
+{ 0xc , nt35521_720p_video_on_cmd122},
+{ 0x4 , nt35521_720p_video_on_cmd123},
+{ 0x4 , nt35521_720p_video_on_cmd124},
+{ 0x4 , nt35521_720p_video_on_cmd125},
+{ 0x4 , nt35521_720p_video_on_cmd126},
+{ 0x4 , nt35521_720p_video_on_cmd127},
+{ 0x4 , nt35521_720p_video_on_cmd128},
+{ 0x4 , nt35521_720p_video_on_cmd129},
+{ 0x4 , nt35521_720p_video_on_cmd130},
+{ 0x8 , nt35521_720p_video_on_cmd131},
+{ 0x8 , nt35521_720p_video_on_cmd132},
+{ 0x8 , nt35521_720p_video_on_cmd133},
+{ 0x8 , nt35521_720p_video_on_cmd134},
+{ 0x8 , nt35521_720p_video_on_cmd135},
+{ 0x8 , nt35521_720p_video_on_cmd136},
+{ 0x8 , nt35521_720p_video_on_cmd137},
+{ 0x8 , nt35521_720p_video_on_cmd138},
+{ 0x4 , nt35521_720p_video_on_cmd139},
+{ 0xc , nt35521_720p_video_on_cmd140},
+{ 0xc , nt35521_720p_video_on_cmd141},
+{ 0xc , nt35521_720p_video_on_cmd142},
+{ 0xc , nt35521_720p_video_on_cmd143},
+{ 0x4 , nt35521_720p_video_on_cmd144},
+{ 0x4 , nt35521_720p_video_on_cmd145},
+{ 0x4 , nt35521_720p_video_on_cmd146},
+{ 0x4 , nt35521_720p_video_on_cmd147},
+{ 0x4 , nt35521_720p_video_on_cmd148},
+{ 0x4 , nt35521_720p_video_on_cmd149},
+{ 0x4 , nt35521_720p_video_on_cmd150},
+{ 0x4 , nt35521_720p_video_on_cmd151},
+{ 0x4 , nt35521_720p_video_on_cmd152},
+{ 0xc , nt35521_720p_video_on_cmd153},
+{ 0x8 , nt35521_720p_video_on_cmd154},
+{ 0x8 , nt35521_720p_video_on_cmd155},
+{ 0x8 , nt35521_720p_video_on_cmd156},
+{ 0x8 , nt35521_720p_video_on_cmd157},
+{ 0x8 , nt35521_720p_video_on_cmd158},
+{ 0x8 , nt35521_720p_video_on_cmd159},
+{ 0x8 , nt35521_720p_video_on_cmd160},
+{ 0x8 , nt35521_720p_video_on_cmd161},
+{ 0x8 , nt35521_720p_video_on_cmd162},
+{ 0x8 , nt35521_720p_video_on_cmd163},
+{ 0x8 , nt35521_720p_video_on_cmd164},
+{ 0x8 , nt35521_720p_video_on_cmd165},
+{ 0x8 , nt35521_720p_video_on_cmd166},
+{ 0x8 , nt35521_720p_video_on_cmd167},
+{ 0x8 , nt35521_720p_video_on_cmd168},
+{ 0x8 , nt35521_720p_video_on_cmd169},
+{ 0x8 , nt35521_720p_video_on_cmd170},
+{ 0x8 , nt35521_720p_video_on_cmd171},
+{ 0x8 , nt35521_720p_video_on_cmd172},
+{ 0x8 , nt35521_720p_video_on_cmd173},
+{ 0x8 , nt35521_720p_video_on_cmd174},
+{ 0x8 , nt35521_720p_video_on_cmd175},
+{ 0x8 , nt35521_720p_video_on_cmd176},
+{ 0x8 , nt35521_720p_video_on_cmd177},
+{ 0x8 , nt35521_720p_video_on_cmd178},
+{ 0x8 , nt35521_720p_video_on_cmd179},
+{ 0x8 , nt35521_720p_video_on_cmd180},
+{ 0x8 , nt35521_720p_video_on_cmd181},
+{ 0x8 , nt35521_720p_video_on_cmd182},
+{ 0x8 , nt35521_720p_video_on_cmd183},
+{ 0x8 , nt35521_720p_video_on_cmd184},
+{ 0x8 , nt35521_720p_video_on_cmd185},
+{ 0x8 , nt35521_720p_video_on_cmd186},
+{ 0x8 , nt35521_720p_video_on_cmd187},
+{ 0x8 , nt35521_720p_video_on_cmd188},
+{ 0x8 , nt35521_720p_video_on_cmd189},
+{ 0x8 , nt35521_720p_video_on_cmd190},
+{ 0x8 , nt35521_720p_video_on_cmd191},
+{ 0x8 , nt35521_720p_video_on_cmd192},
+{ 0x8 , nt35521_720p_video_on_cmd193},
+{ 0xc , nt35521_720p_video_on_cmd194},
+{ 0xc , nt35521_720p_video_on_cmd195},
+{ 0x8 , nt35521_720p_video_on_cmd196},
+{ 0x8 , nt35521_720p_video_on_cmd197},
+{ 0x4 , nt35521_720p_video_on_cmd198},
+{ 0xc , nt35521_720p_video_on_cmd199},
+{ 0x4 , nt35521_720p_video_on_cmd200},
+{ 0x4 , nt35521_720p_video_on_cmd201},
+{ 0xc , nt35521_720p_video_on_cmd202},
+{ 0xc , nt35521_720p_video_on_cmd203},
+{ 0x8 , nt35521_720p_video_on_cmd204}
+};
+#define NT35521_720P_VIDEO_ON_COMMAND 205
+
+
+static char nt35521_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35521_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35521_720p_video_off_command[] = {
+{ 0x4 , nt35521_720p_videooff_cmd0},
+{ 0x4 , nt35521_720p_videooff_cmd1}
+};
+#define NT35521_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state nt35521_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35521_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35521_720p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35521_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35521_720p_video_timings[] = {
+ 0x93, 0x1F, 0x17, 0x00, 0x2F, 0x2E, 0x1C, 0x21, 0x26, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd nt35521_720p_video_rotation[] = {
+
+};
+#define NT35521_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing nt35521_720p_video_timing_info = {
+ 0, 4, 0x20, 0x2D
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35521_720p_video_backlight = {
+ 1, 1, 255, 100, 2, "PMIC_8941"
+};
+
+
+#endif /*_NT35521_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35590_720p_cmd.h b/dev/gcdb/display/include/panel_nt35590_720p_cmd.h
new file mode 100755
index 0000000..59fe531
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35590_720p_cmd.h
@@ -0,0 +1,2935 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35590_720P_CMD_H_
+
+#define _PANEL_NT35590_720P_CMD_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35590_720p_cmd_panel_data = {
+ "nt25590 720p command mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 1, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35590_720p_cmd_panel_res = {
+ 720, 1280, 140, 164, 8, 0, 6, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35590_720p_cmd_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35590_720p_cmd_on_cmd0[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd1[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd2[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd4[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd5[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd6[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd7[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd8[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd9[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd10[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd11[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd12[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd13[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd14[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x22, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd15[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd16[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd17[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x73, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd18[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd19[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd20[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd21[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x24, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd22[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd23[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd24[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x2C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd25[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd26[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd27[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd28[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd29[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd30[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x8B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd31[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd32[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd33[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd34[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd35[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd36[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd37[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd38[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd39[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd40[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd41[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd42[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd43[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd44[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd45[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd46[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd47[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd48[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd49[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x7F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd50[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd51[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd52[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd53[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd54[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd55[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd56[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd57[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd58[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd59[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x4D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd60[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd61[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd62[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd63[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd64[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x58, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd65[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x6A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd66[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd67[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd68[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd69[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd70[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd71[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd72[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd73[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd74[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd75[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd76[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd77[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd78[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd79[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd80[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd81[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd82[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd83[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd84[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd85[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd86[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd87[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd88[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd89[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd90[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd91[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd92[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd93[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd94[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd95[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd96[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd97[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd98[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd99[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd100[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd101[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd102[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd103[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd104[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd105[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd106[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd107[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd108[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd109[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd110[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd111[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd112[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd113[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd114[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd115[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd116[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd117[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd118[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd119[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd120[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd121[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd122[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd123[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd124[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd125[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd126[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd127[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd128[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd129[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd130[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd131[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd132[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd133[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd134[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd135[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd136[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd137[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd138[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd139[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd140[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd141[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd142[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd143[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd144[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd145[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd146[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd147[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd148[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd149[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd150[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd151[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd152[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd153[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd154[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd155[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd156[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd157[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd158[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd159[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd160[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd161[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd162[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd163[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd164[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd165[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd166[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd167[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd168[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd169[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd170[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd171[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd172[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd173[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd174[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd175[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd176[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd177[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd178[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd179[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd180[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd181[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd182[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd183[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd184[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd185[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd186[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd187[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd188[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd189[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd190[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd191[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd192[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd193[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd194[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd195[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd196[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd197[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd198[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd199[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd200[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd201[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd202[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd203[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd206[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xED, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd207[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd208[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd209[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF0, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd210[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd211[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF2, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd212[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd213[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF4, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd214[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd215[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF6, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd216[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd217[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF8, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd218[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd219[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFA, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd220[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd221[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd222[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd223[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd224[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd225[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd226[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd227[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd228[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd229[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd230[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd231[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd232[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd233[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd234[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd235[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd236[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd237[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd238[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd239[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd240[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd241[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd242[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd243[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd244[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd245[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd246[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd247[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd248[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd249[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd250[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd251[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd252[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd253[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd254[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd255[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd256[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd257[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd258[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd259[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd260[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd261[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd262[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd263[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd264[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd265[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd266[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd267[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd268[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x30, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd269[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x31, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd270[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd271[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd272[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x34, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd273[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd274[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd275[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd276[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd277[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd278[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd279[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3B, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd280[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd281[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3F, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd282[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x40, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd283[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x41, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd284[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x42, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd285[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd286[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x44, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd287[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x45, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd288[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x46, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd289[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x47, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd290[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x48, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd291[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x49, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd292[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd293[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd294[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd295[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd296[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd297[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd298[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd299[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd300[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd301[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd302[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd303[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd304[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x56, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd305[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd306[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd307[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd308[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd309[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd310[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd311[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd312[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd313[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd314[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd315[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd316[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd317[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd318[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd319[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd320[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd321[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd322[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd323[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd324[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd325[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd326[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd327[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6E, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd328[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd329[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x70, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd330[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd331[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd332[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x73, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd333[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x74, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd334[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd335[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd336[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd337[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd338[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd339[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd340[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd341[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd342[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd343[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd344[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd345[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd346[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd347[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd348[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd349[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd350[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd351[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd352[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd353[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd354[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd355[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd356[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd357[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd358[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd359[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd360[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd361[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd362[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd363[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd364[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd365[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd366[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd367[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd368[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd369[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd370[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd371[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd372[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd373[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd374[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd375[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd376[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd377[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd378[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd379[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd380[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd381[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd382[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd383[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd384[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd385[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd386[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd387[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd388[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd389[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd390[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd391[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd392[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd393[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd394[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd395[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd396[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd397[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd398[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd399[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd400[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd401[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd402[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd403[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd404[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd405[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd406[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd407[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd408[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd409[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd410[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd411[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd412[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd413[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd414[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd415[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd416[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd417[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd418[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd419[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd420[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd421[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd422[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd423[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd424[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd425[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd426[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd427[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd428[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd429[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd430[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd431[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd432[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd433[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd434[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd435[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd436[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd437[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd438[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd439[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd440[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd441[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd442[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd443[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd444[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd445[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd446[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd447[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd448[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd449[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd450[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd451[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd452[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd453[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd454[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd455[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd456[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd457[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd458[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd459[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd460[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd461[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd462[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd463[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x00, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_cmd_on_command[] = {
+{ 0x8 , nt35590_720p_cmd_on_cmd0},
+{ 0x8 , nt35590_720p_cmd_on_cmd1},
+{ 0x8 , nt35590_720p_cmd_on_cmd2},
+{ 0x8 , nt35590_720p_cmd_on_cmd3},
+{ 0x8 , nt35590_720p_cmd_on_cmd4},
+{ 0x8 , nt35590_720p_cmd_on_cmd5},
+{ 0x8 , nt35590_720p_cmd_on_cmd6},
+{ 0x8 , nt35590_720p_cmd_on_cmd7},
+{ 0x8 , nt35590_720p_cmd_on_cmd8},
+{ 0x8 , nt35590_720p_cmd_on_cmd9},
+{ 0x8 , nt35590_720p_cmd_on_cmd10},
+{ 0x8 , nt35590_720p_cmd_on_cmd11},
+{ 0x8 , nt35590_720p_cmd_on_cmd12},
+{ 0x8 , nt35590_720p_cmd_on_cmd13},
+{ 0x8 , nt35590_720p_cmd_on_cmd14},
+{ 0x8 , nt35590_720p_cmd_on_cmd15},
+{ 0x8 , nt35590_720p_cmd_on_cmd16},
+{ 0x8 , nt35590_720p_cmd_on_cmd17},
+{ 0x8 , nt35590_720p_cmd_on_cmd18},
+{ 0x8 , nt35590_720p_cmd_on_cmd19},
+{ 0x8 , nt35590_720p_cmd_on_cmd20},
+{ 0x8 , nt35590_720p_cmd_on_cmd21},
+{ 0x8 , nt35590_720p_cmd_on_cmd22},
+{ 0x8 , nt35590_720p_cmd_on_cmd23},
+{ 0x8 , nt35590_720p_cmd_on_cmd24},
+{ 0x8 , nt35590_720p_cmd_on_cmd25},
+{ 0x8 , nt35590_720p_cmd_on_cmd26},
+{ 0x8 , nt35590_720p_cmd_on_cmd27},
+{ 0x8 , nt35590_720p_cmd_on_cmd28},
+{ 0x8 , nt35590_720p_cmd_on_cmd29},
+{ 0x8 , nt35590_720p_cmd_on_cmd30},
+{ 0x8 , nt35590_720p_cmd_on_cmd31},
+{ 0x8 , nt35590_720p_cmd_on_cmd32},
+{ 0x8 , nt35590_720p_cmd_on_cmd33},
+{ 0x8 , nt35590_720p_cmd_on_cmd34},
+{ 0x8 , nt35590_720p_cmd_on_cmd35},
+{ 0x8 , nt35590_720p_cmd_on_cmd36},
+{ 0x8 , nt35590_720p_cmd_on_cmd37},
+{ 0x8 , nt35590_720p_cmd_on_cmd38},
+{ 0x8 , nt35590_720p_cmd_on_cmd39},
+{ 0x8 , nt35590_720p_cmd_on_cmd40},
+{ 0x8 , nt35590_720p_cmd_on_cmd41},
+{ 0x8 , nt35590_720p_cmd_on_cmd42},
+{ 0x8 , nt35590_720p_cmd_on_cmd43},
+{ 0x8 , nt35590_720p_cmd_on_cmd44},
+{ 0x8 , nt35590_720p_cmd_on_cmd45},
+{ 0x8 , nt35590_720p_cmd_on_cmd46},
+{ 0x8 , nt35590_720p_cmd_on_cmd47},
+{ 0x8 , nt35590_720p_cmd_on_cmd48},
+{ 0x8 , nt35590_720p_cmd_on_cmd49},
+{ 0x8 , nt35590_720p_cmd_on_cmd50},
+{ 0x8 , nt35590_720p_cmd_on_cmd51},
+{ 0x8 , nt35590_720p_cmd_on_cmd52},
+{ 0x8 , nt35590_720p_cmd_on_cmd53},
+{ 0x8 , nt35590_720p_cmd_on_cmd54},
+{ 0x8 , nt35590_720p_cmd_on_cmd55},
+{ 0x8 , nt35590_720p_cmd_on_cmd56},
+{ 0x8 , nt35590_720p_cmd_on_cmd57},
+{ 0x8 , nt35590_720p_cmd_on_cmd58},
+{ 0x8 , nt35590_720p_cmd_on_cmd59},
+{ 0x8 , nt35590_720p_cmd_on_cmd60},
+{ 0x8 , nt35590_720p_cmd_on_cmd61},
+{ 0x8 , nt35590_720p_cmd_on_cmd62},
+{ 0x8 , nt35590_720p_cmd_on_cmd63},
+{ 0x8 , nt35590_720p_cmd_on_cmd64},
+{ 0x8 , nt35590_720p_cmd_on_cmd65},
+{ 0x8 , nt35590_720p_cmd_on_cmd66},
+{ 0x8 , nt35590_720p_cmd_on_cmd67},
+{ 0x8 , nt35590_720p_cmd_on_cmd68},
+{ 0x8 , nt35590_720p_cmd_on_cmd69},
+{ 0x8 , nt35590_720p_cmd_on_cmd70},
+{ 0x8 , nt35590_720p_cmd_on_cmd71},
+{ 0x8 , nt35590_720p_cmd_on_cmd72},
+{ 0x8 , nt35590_720p_cmd_on_cmd73},
+{ 0x8 , nt35590_720p_cmd_on_cmd74},
+{ 0x8 , nt35590_720p_cmd_on_cmd75},
+{ 0x8 , nt35590_720p_cmd_on_cmd76},
+{ 0x8 , nt35590_720p_cmd_on_cmd77},
+{ 0x8 , nt35590_720p_cmd_on_cmd78},
+{ 0x8 , nt35590_720p_cmd_on_cmd79},
+{ 0x8 , nt35590_720p_cmd_on_cmd80},
+{ 0x8 , nt35590_720p_cmd_on_cmd81},
+{ 0x8 , nt35590_720p_cmd_on_cmd82},
+{ 0x8 , nt35590_720p_cmd_on_cmd83},
+{ 0x8 , nt35590_720p_cmd_on_cmd84},
+{ 0x8 , nt35590_720p_cmd_on_cmd85},
+{ 0x8 , nt35590_720p_cmd_on_cmd86},
+{ 0x8 , nt35590_720p_cmd_on_cmd87},
+{ 0x8 , nt35590_720p_cmd_on_cmd88},
+{ 0x8 , nt35590_720p_cmd_on_cmd89},
+{ 0x8 , nt35590_720p_cmd_on_cmd90},
+{ 0x8 , nt35590_720p_cmd_on_cmd91},
+{ 0x8 , nt35590_720p_cmd_on_cmd92},
+{ 0x8 , nt35590_720p_cmd_on_cmd93},
+{ 0x8 , nt35590_720p_cmd_on_cmd94},
+{ 0x8 , nt35590_720p_cmd_on_cmd95},
+{ 0x8 , nt35590_720p_cmd_on_cmd96},
+{ 0x8 , nt35590_720p_cmd_on_cmd97},
+{ 0x8 , nt35590_720p_cmd_on_cmd98},
+{ 0x8 , nt35590_720p_cmd_on_cmd99},
+{ 0x8 , nt35590_720p_cmd_on_cmd100},
+{ 0x8 , nt35590_720p_cmd_on_cmd101},
+{ 0x8 , nt35590_720p_cmd_on_cmd102},
+{ 0x8 , nt35590_720p_cmd_on_cmd103},
+{ 0x8 , nt35590_720p_cmd_on_cmd104},
+{ 0x8 , nt35590_720p_cmd_on_cmd105},
+{ 0x8 , nt35590_720p_cmd_on_cmd106},
+{ 0x8 , nt35590_720p_cmd_on_cmd107},
+{ 0x8 , nt35590_720p_cmd_on_cmd108},
+{ 0x8 , nt35590_720p_cmd_on_cmd109},
+{ 0x8 , nt35590_720p_cmd_on_cmd110},
+{ 0x8 , nt35590_720p_cmd_on_cmd111},
+{ 0x8 , nt35590_720p_cmd_on_cmd112},
+{ 0x8 , nt35590_720p_cmd_on_cmd113},
+{ 0x8 , nt35590_720p_cmd_on_cmd114},
+{ 0x8 , nt35590_720p_cmd_on_cmd115},
+{ 0x8 , nt35590_720p_cmd_on_cmd116},
+{ 0x8 , nt35590_720p_cmd_on_cmd117},
+{ 0x8 , nt35590_720p_cmd_on_cmd118},
+{ 0x8 , nt35590_720p_cmd_on_cmd119},
+{ 0x8 , nt35590_720p_cmd_on_cmd120},
+{ 0x8 , nt35590_720p_cmd_on_cmd121},
+{ 0x8 , nt35590_720p_cmd_on_cmd122},
+{ 0x8 , nt35590_720p_cmd_on_cmd123},
+{ 0x8 , nt35590_720p_cmd_on_cmd124},
+{ 0x8 , nt35590_720p_cmd_on_cmd125},
+{ 0x8 , nt35590_720p_cmd_on_cmd126},
+{ 0x8 , nt35590_720p_cmd_on_cmd127},
+{ 0x8 , nt35590_720p_cmd_on_cmd128},
+{ 0x8 , nt35590_720p_cmd_on_cmd129},
+{ 0x8 , nt35590_720p_cmd_on_cmd130},
+{ 0x8 , nt35590_720p_cmd_on_cmd131},
+{ 0x8 , nt35590_720p_cmd_on_cmd132},
+{ 0x8 , nt35590_720p_cmd_on_cmd133},
+{ 0x8 , nt35590_720p_cmd_on_cmd134},
+{ 0x8 , nt35590_720p_cmd_on_cmd135},
+{ 0x8 , nt35590_720p_cmd_on_cmd136},
+{ 0x8 , nt35590_720p_cmd_on_cmd137},
+{ 0x8 , nt35590_720p_cmd_on_cmd138},
+{ 0x8 , nt35590_720p_cmd_on_cmd139},
+{ 0x8 , nt35590_720p_cmd_on_cmd140},
+{ 0x8 , nt35590_720p_cmd_on_cmd141},
+{ 0x8 , nt35590_720p_cmd_on_cmd142},
+{ 0x8 , nt35590_720p_cmd_on_cmd143},
+{ 0x8 , nt35590_720p_cmd_on_cmd144},
+{ 0x8 , nt35590_720p_cmd_on_cmd145},
+{ 0x8 , nt35590_720p_cmd_on_cmd146},
+{ 0x8 , nt35590_720p_cmd_on_cmd147},
+{ 0x8 , nt35590_720p_cmd_on_cmd148},
+{ 0x8 , nt35590_720p_cmd_on_cmd149},
+{ 0x8 , nt35590_720p_cmd_on_cmd150},
+{ 0x8 , nt35590_720p_cmd_on_cmd151},
+{ 0x8 , nt35590_720p_cmd_on_cmd152},
+{ 0x8 , nt35590_720p_cmd_on_cmd153},
+{ 0x8 , nt35590_720p_cmd_on_cmd154},
+{ 0x8 , nt35590_720p_cmd_on_cmd155},
+{ 0x8 , nt35590_720p_cmd_on_cmd156},
+{ 0x8 , nt35590_720p_cmd_on_cmd157},
+{ 0x8 , nt35590_720p_cmd_on_cmd158},
+{ 0x8 , nt35590_720p_cmd_on_cmd159},
+{ 0x8 , nt35590_720p_cmd_on_cmd160},
+{ 0x8 , nt35590_720p_cmd_on_cmd161},
+{ 0x8 , nt35590_720p_cmd_on_cmd162},
+{ 0x8 , nt35590_720p_cmd_on_cmd163},
+{ 0x8 , nt35590_720p_cmd_on_cmd164},
+{ 0x8 , nt35590_720p_cmd_on_cmd165},
+{ 0x8 , nt35590_720p_cmd_on_cmd166},
+{ 0x8 , nt35590_720p_cmd_on_cmd167},
+{ 0x8 , nt35590_720p_cmd_on_cmd168},
+{ 0x8 , nt35590_720p_cmd_on_cmd169},
+{ 0x8 , nt35590_720p_cmd_on_cmd170},
+{ 0x8 , nt35590_720p_cmd_on_cmd171},
+{ 0x8 , nt35590_720p_cmd_on_cmd172},
+{ 0x8 , nt35590_720p_cmd_on_cmd173},
+{ 0x8 , nt35590_720p_cmd_on_cmd174},
+{ 0x8 , nt35590_720p_cmd_on_cmd175},
+{ 0x8 , nt35590_720p_cmd_on_cmd176},
+{ 0x8 , nt35590_720p_cmd_on_cmd177},
+{ 0x8 , nt35590_720p_cmd_on_cmd178},
+{ 0x8 , nt35590_720p_cmd_on_cmd179},
+{ 0x8 , nt35590_720p_cmd_on_cmd180},
+{ 0x8 , nt35590_720p_cmd_on_cmd181},
+{ 0x8 , nt35590_720p_cmd_on_cmd182},
+{ 0x8 , nt35590_720p_cmd_on_cmd183},
+{ 0x8 , nt35590_720p_cmd_on_cmd184},
+{ 0x8 , nt35590_720p_cmd_on_cmd185},
+{ 0x8 , nt35590_720p_cmd_on_cmd186},
+{ 0x8 , nt35590_720p_cmd_on_cmd187},
+{ 0x8 , nt35590_720p_cmd_on_cmd188},
+{ 0x8 , nt35590_720p_cmd_on_cmd189},
+{ 0x8 , nt35590_720p_cmd_on_cmd190},
+{ 0x8 , nt35590_720p_cmd_on_cmd191},
+{ 0x8 , nt35590_720p_cmd_on_cmd192},
+{ 0x8 , nt35590_720p_cmd_on_cmd193},
+{ 0x8 , nt35590_720p_cmd_on_cmd194},
+{ 0x8 , nt35590_720p_cmd_on_cmd195},
+{ 0x8 , nt35590_720p_cmd_on_cmd196},
+{ 0x8 , nt35590_720p_cmd_on_cmd197},
+{ 0x8 , nt35590_720p_cmd_on_cmd198},
+{ 0x8 , nt35590_720p_cmd_on_cmd199},
+{ 0x8 , nt35590_720p_cmd_on_cmd200},
+{ 0x8 , nt35590_720p_cmd_on_cmd201},
+{ 0x8 , nt35590_720p_cmd_on_cmd202},
+{ 0x8 , nt35590_720p_cmd_on_cmd203},
+{ 0x8 , nt35590_720p_cmd_on_cmd204},
+{ 0x8 , nt35590_720p_cmd_on_cmd205},
+{ 0x8 , nt35590_720p_cmd_on_cmd206},
+{ 0x8 , nt35590_720p_cmd_on_cmd207},
+{ 0x8 , nt35590_720p_cmd_on_cmd208},
+{ 0x8 , nt35590_720p_cmd_on_cmd209},
+{ 0x8 , nt35590_720p_cmd_on_cmd210},
+{ 0x8 , nt35590_720p_cmd_on_cmd211},
+{ 0x8 , nt35590_720p_cmd_on_cmd212},
+{ 0x8 , nt35590_720p_cmd_on_cmd213},
+{ 0x8 , nt35590_720p_cmd_on_cmd214},
+{ 0x8 , nt35590_720p_cmd_on_cmd215},
+{ 0x8 , nt35590_720p_cmd_on_cmd216},
+{ 0x8 , nt35590_720p_cmd_on_cmd217},
+{ 0x8 , nt35590_720p_cmd_on_cmd218},
+{ 0x8 , nt35590_720p_cmd_on_cmd219},
+{ 0x8 , nt35590_720p_cmd_on_cmd220},
+{ 0x8 , nt35590_720p_cmd_on_cmd221},
+{ 0x8 , nt35590_720p_cmd_on_cmd222},
+{ 0x8 , nt35590_720p_cmd_on_cmd223},
+{ 0x8 , nt35590_720p_cmd_on_cmd224},
+{ 0x8 , nt35590_720p_cmd_on_cmd225},
+{ 0x8 , nt35590_720p_cmd_on_cmd226},
+{ 0x8 , nt35590_720p_cmd_on_cmd227},
+{ 0x8 , nt35590_720p_cmd_on_cmd228},
+{ 0x8 , nt35590_720p_cmd_on_cmd229},
+{ 0x8 , nt35590_720p_cmd_on_cmd230},
+{ 0x8 , nt35590_720p_cmd_on_cmd231},
+{ 0x8 , nt35590_720p_cmd_on_cmd232},
+{ 0x8 , nt35590_720p_cmd_on_cmd233},
+{ 0x8 , nt35590_720p_cmd_on_cmd234},
+{ 0x8 , nt35590_720p_cmd_on_cmd235},
+{ 0x8 , nt35590_720p_cmd_on_cmd236},
+{ 0x8 , nt35590_720p_cmd_on_cmd237},
+{ 0x8 , nt35590_720p_cmd_on_cmd238},
+{ 0x8 , nt35590_720p_cmd_on_cmd239},
+{ 0x8 , nt35590_720p_cmd_on_cmd240},
+{ 0x8 , nt35590_720p_cmd_on_cmd241},
+{ 0x8 , nt35590_720p_cmd_on_cmd242},
+{ 0x8 , nt35590_720p_cmd_on_cmd243},
+{ 0x8 , nt35590_720p_cmd_on_cmd244},
+{ 0x8 , nt35590_720p_cmd_on_cmd245},
+{ 0x8 , nt35590_720p_cmd_on_cmd246},
+{ 0x8 , nt35590_720p_cmd_on_cmd247},
+{ 0x8 , nt35590_720p_cmd_on_cmd248},
+{ 0x8 , nt35590_720p_cmd_on_cmd249},
+{ 0x8 , nt35590_720p_cmd_on_cmd250},
+{ 0x8 , nt35590_720p_cmd_on_cmd251},
+{ 0x8 , nt35590_720p_cmd_on_cmd252},
+{ 0x8 , nt35590_720p_cmd_on_cmd253},
+{ 0x8 , nt35590_720p_cmd_on_cmd254},
+{ 0x8 , nt35590_720p_cmd_on_cmd255},
+{ 0x8 , nt35590_720p_cmd_on_cmd256},
+{ 0x8 , nt35590_720p_cmd_on_cmd257},
+{ 0x8 , nt35590_720p_cmd_on_cmd258},
+{ 0x8 , nt35590_720p_cmd_on_cmd259},
+{ 0x8 , nt35590_720p_cmd_on_cmd260},
+{ 0x8 , nt35590_720p_cmd_on_cmd261},
+{ 0x8 , nt35590_720p_cmd_on_cmd262},
+{ 0x8 , nt35590_720p_cmd_on_cmd263},
+{ 0x8 , nt35590_720p_cmd_on_cmd264},
+{ 0x8 , nt35590_720p_cmd_on_cmd265},
+{ 0x8 , nt35590_720p_cmd_on_cmd266},
+{ 0x8 , nt35590_720p_cmd_on_cmd267},
+{ 0x8 , nt35590_720p_cmd_on_cmd268},
+{ 0x8 , nt35590_720p_cmd_on_cmd269},
+{ 0x8 , nt35590_720p_cmd_on_cmd270},
+{ 0x8 , nt35590_720p_cmd_on_cmd271},
+{ 0x8 , nt35590_720p_cmd_on_cmd272},
+{ 0x8 , nt35590_720p_cmd_on_cmd273},
+{ 0x8 , nt35590_720p_cmd_on_cmd274},
+{ 0x8 , nt35590_720p_cmd_on_cmd275},
+{ 0x8 , nt35590_720p_cmd_on_cmd276},
+{ 0x8 , nt35590_720p_cmd_on_cmd277},
+{ 0x8 , nt35590_720p_cmd_on_cmd278},
+{ 0x8 , nt35590_720p_cmd_on_cmd279},
+{ 0x8 , nt35590_720p_cmd_on_cmd280},
+{ 0x8 , nt35590_720p_cmd_on_cmd281},
+{ 0x8 , nt35590_720p_cmd_on_cmd282},
+{ 0x8 , nt35590_720p_cmd_on_cmd283},
+{ 0x8 , nt35590_720p_cmd_on_cmd284},
+{ 0x8 , nt35590_720p_cmd_on_cmd285},
+{ 0x8 , nt35590_720p_cmd_on_cmd286},
+{ 0x8 , nt35590_720p_cmd_on_cmd287},
+{ 0x8 , nt35590_720p_cmd_on_cmd288},
+{ 0x8 , nt35590_720p_cmd_on_cmd289},
+{ 0x8 , nt35590_720p_cmd_on_cmd290},
+{ 0x8 , nt35590_720p_cmd_on_cmd291},
+{ 0x8 , nt35590_720p_cmd_on_cmd292},
+{ 0x8 , nt35590_720p_cmd_on_cmd293},
+{ 0x8 , nt35590_720p_cmd_on_cmd294},
+{ 0x8 , nt35590_720p_cmd_on_cmd295},
+{ 0x8 , nt35590_720p_cmd_on_cmd296},
+{ 0x8 , nt35590_720p_cmd_on_cmd297},
+{ 0x8 , nt35590_720p_cmd_on_cmd298},
+{ 0x8 , nt35590_720p_cmd_on_cmd299},
+{ 0x8 , nt35590_720p_cmd_on_cmd300},
+{ 0x8 , nt35590_720p_cmd_on_cmd301},
+{ 0x8 , nt35590_720p_cmd_on_cmd302},
+{ 0x8 , nt35590_720p_cmd_on_cmd303},
+{ 0x8 , nt35590_720p_cmd_on_cmd304},
+{ 0x8 , nt35590_720p_cmd_on_cmd305},
+{ 0x8 , nt35590_720p_cmd_on_cmd306},
+{ 0x8 , nt35590_720p_cmd_on_cmd307},
+{ 0x8 , nt35590_720p_cmd_on_cmd308},
+{ 0x8 , nt35590_720p_cmd_on_cmd309},
+{ 0x8 , nt35590_720p_cmd_on_cmd310},
+{ 0x8 , nt35590_720p_cmd_on_cmd311},
+{ 0x8 , nt35590_720p_cmd_on_cmd312},
+{ 0x8 , nt35590_720p_cmd_on_cmd313},
+{ 0x8 , nt35590_720p_cmd_on_cmd314},
+{ 0x8 , nt35590_720p_cmd_on_cmd315},
+{ 0x8 , nt35590_720p_cmd_on_cmd316},
+{ 0x8 , nt35590_720p_cmd_on_cmd317},
+{ 0x8 , nt35590_720p_cmd_on_cmd318},
+{ 0x8 , nt35590_720p_cmd_on_cmd319},
+{ 0x8 , nt35590_720p_cmd_on_cmd320},
+{ 0x8 , nt35590_720p_cmd_on_cmd321},
+{ 0x8 , nt35590_720p_cmd_on_cmd322},
+{ 0x8 , nt35590_720p_cmd_on_cmd323},
+{ 0x8 , nt35590_720p_cmd_on_cmd324},
+{ 0x8 , nt35590_720p_cmd_on_cmd325},
+{ 0x8 , nt35590_720p_cmd_on_cmd326},
+{ 0x8 , nt35590_720p_cmd_on_cmd327},
+{ 0x8 , nt35590_720p_cmd_on_cmd328},
+{ 0x8 , nt35590_720p_cmd_on_cmd329},
+{ 0x8 , nt35590_720p_cmd_on_cmd330},
+{ 0x8 , nt35590_720p_cmd_on_cmd331},
+{ 0x8 , nt35590_720p_cmd_on_cmd332},
+{ 0x8 , nt35590_720p_cmd_on_cmd333},
+{ 0x8 , nt35590_720p_cmd_on_cmd334},
+{ 0x8 , nt35590_720p_cmd_on_cmd335},
+{ 0x8 , nt35590_720p_cmd_on_cmd336},
+{ 0x8 , nt35590_720p_cmd_on_cmd337},
+{ 0x8 , nt35590_720p_cmd_on_cmd338},
+{ 0x8 , nt35590_720p_cmd_on_cmd339},
+{ 0x8 , nt35590_720p_cmd_on_cmd340},
+{ 0x8 , nt35590_720p_cmd_on_cmd341},
+{ 0x8 , nt35590_720p_cmd_on_cmd342},
+{ 0x8 , nt35590_720p_cmd_on_cmd343},
+{ 0x8 , nt35590_720p_cmd_on_cmd344},
+{ 0x8 , nt35590_720p_cmd_on_cmd345},
+{ 0x8 , nt35590_720p_cmd_on_cmd346},
+{ 0x8 , nt35590_720p_cmd_on_cmd347},
+{ 0x8 , nt35590_720p_cmd_on_cmd348},
+{ 0x8 , nt35590_720p_cmd_on_cmd349},
+{ 0x8 , nt35590_720p_cmd_on_cmd350},
+{ 0x8 , nt35590_720p_cmd_on_cmd351},
+{ 0x8 , nt35590_720p_cmd_on_cmd352},
+{ 0x8 , nt35590_720p_cmd_on_cmd353},
+{ 0x8 , nt35590_720p_cmd_on_cmd354},
+{ 0x8 , nt35590_720p_cmd_on_cmd355},
+{ 0x8 , nt35590_720p_cmd_on_cmd356},
+{ 0x8 , nt35590_720p_cmd_on_cmd357},
+{ 0x8 , nt35590_720p_cmd_on_cmd358},
+{ 0x8 , nt35590_720p_cmd_on_cmd359},
+{ 0x8 , nt35590_720p_cmd_on_cmd360},
+{ 0x8 , nt35590_720p_cmd_on_cmd361},
+{ 0x8 , nt35590_720p_cmd_on_cmd362},
+{ 0x8 , nt35590_720p_cmd_on_cmd363},
+{ 0x8 , nt35590_720p_cmd_on_cmd364},
+{ 0x8 , nt35590_720p_cmd_on_cmd365},
+{ 0x8 , nt35590_720p_cmd_on_cmd366},
+{ 0x8 , nt35590_720p_cmd_on_cmd367},
+{ 0x8 , nt35590_720p_cmd_on_cmd368},
+{ 0x8 , nt35590_720p_cmd_on_cmd369},
+{ 0x8 , nt35590_720p_cmd_on_cmd370},
+{ 0x8 , nt35590_720p_cmd_on_cmd371},
+{ 0x8 , nt35590_720p_cmd_on_cmd372},
+{ 0x8 , nt35590_720p_cmd_on_cmd373},
+{ 0x8 , nt35590_720p_cmd_on_cmd374},
+{ 0x8 , nt35590_720p_cmd_on_cmd375},
+{ 0x8 , nt35590_720p_cmd_on_cmd376},
+{ 0x8 , nt35590_720p_cmd_on_cmd377},
+{ 0x8 , nt35590_720p_cmd_on_cmd378},
+{ 0x8 , nt35590_720p_cmd_on_cmd379},
+{ 0x8 , nt35590_720p_cmd_on_cmd380},
+{ 0x8 , nt35590_720p_cmd_on_cmd381},
+{ 0x8 , nt35590_720p_cmd_on_cmd382},
+{ 0x8 , nt35590_720p_cmd_on_cmd383},
+{ 0x8 , nt35590_720p_cmd_on_cmd384},
+{ 0x8 , nt35590_720p_cmd_on_cmd385},
+{ 0x8 , nt35590_720p_cmd_on_cmd386},
+{ 0x8 , nt35590_720p_cmd_on_cmd387},
+{ 0x8 , nt35590_720p_cmd_on_cmd388},
+{ 0x8 , nt35590_720p_cmd_on_cmd389},
+{ 0x8 , nt35590_720p_cmd_on_cmd390},
+{ 0x8 , nt35590_720p_cmd_on_cmd391},
+{ 0x8 , nt35590_720p_cmd_on_cmd392},
+{ 0x8 , nt35590_720p_cmd_on_cmd393},
+{ 0x8 , nt35590_720p_cmd_on_cmd394},
+{ 0x8 , nt35590_720p_cmd_on_cmd395},
+{ 0x8 , nt35590_720p_cmd_on_cmd396},
+{ 0x8 , nt35590_720p_cmd_on_cmd397},
+{ 0x8 , nt35590_720p_cmd_on_cmd398},
+{ 0x8 , nt35590_720p_cmd_on_cmd399},
+{ 0x8 , nt35590_720p_cmd_on_cmd400},
+{ 0x8 , nt35590_720p_cmd_on_cmd401},
+{ 0x8 , nt35590_720p_cmd_on_cmd402},
+{ 0x8 , nt35590_720p_cmd_on_cmd403},
+{ 0x8 , nt35590_720p_cmd_on_cmd404},
+{ 0x8 , nt35590_720p_cmd_on_cmd405},
+{ 0x8 , nt35590_720p_cmd_on_cmd406},
+{ 0x8 , nt35590_720p_cmd_on_cmd407},
+{ 0x8 , nt35590_720p_cmd_on_cmd408},
+{ 0x8 , nt35590_720p_cmd_on_cmd409},
+{ 0x8 , nt35590_720p_cmd_on_cmd410},
+{ 0x8 , nt35590_720p_cmd_on_cmd411},
+{ 0x8 , nt35590_720p_cmd_on_cmd412},
+{ 0x8 , nt35590_720p_cmd_on_cmd413},
+{ 0x8 , nt35590_720p_cmd_on_cmd414},
+{ 0x8 , nt35590_720p_cmd_on_cmd415},
+{ 0x8 , nt35590_720p_cmd_on_cmd416},
+{ 0x8 , nt35590_720p_cmd_on_cmd417},
+{ 0x8 , nt35590_720p_cmd_on_cmd418},
+{ 0x8 , nt35590_720p_cmd_on_cmd419},
+{ 0x8 , nt35590_720p_cmd_on_cmd420},
+{ 0x8 , nt35590_720p_cmd_on_cmd421},
+{ 0x8 , nt35590_720p_cmd_on_cmd422},
+{ 0x8 , nt35590_720p_cmd_on_cmd423},
+{ 0x8 , nt35590_720p_cmd_on_cmd424},
+{ 0x8 , nt35590_720p_cmd_on_cmd425},
+{ 0x8 , nt35590_720p_cmd_on_cmd426},
+{ 0x8 , nt35590_720p_cmd_on_cmd427},
+{ 0x8 , nt35590_720p_cmd_on_cmd428},
+{ 0x8 , nt35590_720p_cmd_on_cmd429},
+{ 0x8 , nt35590_720p_cmd_on_cmd430},
+{ 0x8 , nt35590_720p_cmd_on_cmd431},
+{ 0x8 , nt35590_720p_cmd_on_cmd432},
+{ 0x8 , nt35590_720p_cmd_on_cmd433},
+{ 0x8 , nt35590_720p_cmd_on_cmd434},
+{ 0x8 , nt35590_720p_cmd_on_cmd435},
+{ 0x8 , nt35590_720p_cmd_on_cmd436},
+{ 0x8 , nt35590_720p_cmd_on_cmd437},
+{ 0x8 , nt35590_720p_cmd_on_cmd438},
+{ 0x8 , nt35590_720p_cmd_on_cmd439},
+{ 0x8 , nt35590_720p_cmd_on_cmd440},
+{ 0x8 , nt35590_720p_cmd_on_cmd441},
+{ 0x8 , nt35590_720p_cmd_on_cmd442},
+{ 0x8 , nt35590_720p_cmd_on_cmd443},
+{ 0x8 , nt35590_720p_cmd_on_cmd444},
+{ 0x8 , nt35590_720p_cmd_on_cmd445},
+{ 0x8 , nt35590_720p_cmd_on_cmd446},
+{ 0x8 , nt35590_720p_cmd_on_cmd447},
+{ 0x8 , nt35590_720p_cmd_on_cmd448},
+{ 0x8 , nt35590_720p_cmd_on_cmd449},
+{ 0x8 , nt35590_720p_cmd_on_cmd450},
+{ 0x8 , nt35590_720p_cmd_on_cmd451},
+{ 0x8 , nt35590_720p_cmd_on_cmd452},
+{ 0x8 , nt35590_720p_cmd_on_cmd453},
+{ 0x8 , nt35590_720p_cmd_on_cmd454},
+{ 0x8 , nt35590_720p_cmd_on_cmd455},
+{ 0x8 , nt35590_720p_cmd_on_cmd456},
+{ 0x8 , nt35590_720p_cmd_on_cmd457},
+{ 0x8 , nt35590_720p_cmd_on_cmd458},
+{ 0x8 , nt35590_720p_cmd_on_cmd459},
+{ 0x8 , nt35590_720p_cmd_on_cmd460},
+{ 0x8 , nt35590_720p_cmd_on_cmd461},
+{ 0x8 , nt35590_720p_cmd_on_cmd462},
+{ 0x8 , nt35590_720p_cmd_on_cmd463}
+};
+#define NT35590_720P_CMD_ON_COMMAND 464
+
+
+static char nt35590_720p_cmdoff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35590_720p_cmdoff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_cmd_off_command[] = {
+{ 0x4 , nt35590_720p_cmdoff_cmd0},
+{ 0x4 , nt35590_720p_cmdoff_cmd1}
+};
+#define NT35590_720P_CMD_OFF_COMMAND 2
+
+
+static struct command_state nt35590_720p_cmd_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35590_720p_cmd_command_panel = {
+ 1, 1, 1, 0, 0, 0x2c, 0, 0, 0, 1, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35590_720p_cmd_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35590_720p_cmd_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35590_720p_cmd_timings[] = {
+ 0x7d, 0x25, 0x1d, 0x00, 0x37, 0x33, 0x22, 0x27, 0x1e, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_cmd_rotation[] = {
+
+};
+#define NT35590_720P_CMD_ROTATION 0
+
+
+static struct panel_timing nt35590_720p_cmd_timing_info = {
+ 0, 4, 0x20, 0x2c
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35590_720p_cmd_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_NT35590_720P_CMD_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35590_720p_video.h b/dev/gcdb/display/include/panel_nt35590_720p_video.h
new file mode 100755
index 0000000..c144f14
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35590_720p_video.h
@@ -0,0 +1,2935 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35590_720P_VIDEO_H_
+
+#define _PANEL_NT35590_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35590_720p_video_panel_data = {
+ "nt25590 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35590_720p_video_panel_res = {
+ 720, 1280, 140, 164, 8, 0, 6, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35590_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35590_720p_video_on_cmd0[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd1[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd2[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd4[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd5[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd6[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd7[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd8[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd9[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd10[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd11[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd12[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd13[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd14[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x22, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd15[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd16[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd17[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x73, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd18[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd19[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd20[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd21[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x24, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd22[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd23[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd24[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x2C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd25[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd26[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd27[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd28[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd29[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd30[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x8B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd31[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd32[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd33[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd34[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd35[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd36[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd37[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd38[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd39[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd40[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd41[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd42[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd43[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd44[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd45[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd46[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd47[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd48[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd49[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x7F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd50[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd51[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd52[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd53[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd54[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd55[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd56[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd57[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd58[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd59[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x4D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd60[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd61[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd62[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd63[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd64[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x58, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd65[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x6A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd66[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd67[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd68[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd69[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd70[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd71[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd72[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd73[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd74[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd75[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd76[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd77[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd78[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd79[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd80[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd81[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd82[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd83[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd84[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd85[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd86[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd87[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd88[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd89[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd90[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd91[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd92[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd93[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd94[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd95[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd96[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd97[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd98[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd99[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd100[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd101[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd102[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd103[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd104[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd105[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd106[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd107[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd108[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd109[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd110[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd111[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd112[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd113[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd114[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd115[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd116[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd117[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd118[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd119[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd120[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd121[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd122[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd123[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd124[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd125[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd126[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd127[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd128[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd129[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd130[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd131[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd132[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd133[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd134[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd135[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd136[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd137[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd138[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd139[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd140[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd141[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd142[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd143[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd144[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd145[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd146[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd147[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd148[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd149[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd150[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd151[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd152[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd153[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd154[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd155[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd156[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd157[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd158[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd159[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd160[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd161[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd162[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd163[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd164[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd165[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd166[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd167[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd168[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd169[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd170[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd171[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd172[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd173[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd174[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd175[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd176[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd177[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd178[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd179[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd180[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd181[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd182[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd183[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd184[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd185[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd186[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd187[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd188[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd189[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd190[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd191[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd192[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd193[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd194[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd195[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd196[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd197[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd198[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd199[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd200[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd201[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd202[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd203[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd206[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xED, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd207[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd208[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd209[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF0, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd210[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd211[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF2, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd212[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd213[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF4, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd214[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd215[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF6, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd216[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd217[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF8, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd218[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd219[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFA, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd220[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd221[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd222[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd223[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd224[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd225[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd226[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd227[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd228[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd229[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd230[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd231[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd232[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd233[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd234[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd235[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd236[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd237[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd238[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd239[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd240[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd241[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd242[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd243[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd244[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd245[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd246[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd247[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd248[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd249[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd250[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd251[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd252[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd253[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd254[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd255[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd256[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd257[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd258[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd259[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd260[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd261[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd262[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd263[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd264[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd265[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd266[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd267[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd268[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x30, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd269[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x31, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd270[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd271[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd272[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x34, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd273[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd274[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd275[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd276[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd277[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd278[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd279[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3B, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd280[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd281[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3F, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd282[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x40, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd283[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x41, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd284[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x42, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd285[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd286[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x44, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd287[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x45, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd288[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x46, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd289[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x47, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd290[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x48, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd291[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x49, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd292[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd293[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd294[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd295[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd296[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd297[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd298[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd299[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd300[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd301[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd302[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd303[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd304[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x56, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd305[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd306[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd307[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd308[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd309[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd310[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd311[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd312[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd313[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd314[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd315[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd316[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd317[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd318[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd319[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd320[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd321[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd322[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd323[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd324[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd325[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd326[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd327[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6E, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd328[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd329[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x70, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd330[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd331[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd332[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x73, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd333[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x74, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd334[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd335[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd336[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd337[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd338[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd339[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd340[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd341[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd342[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd343[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd344[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd345[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd346[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd347[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd348[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd349[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd350[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd351[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd352[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd353[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd354[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd355[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd356[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd357[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd358[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd359[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd360[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd361[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd362[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd363[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd364[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd365[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd366[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd367[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd368[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd369[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd370[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd371[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd372[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd373[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd374[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd375[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd376[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd377[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd378[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd379[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd380[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd381[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd382[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd383[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd384[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd385[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd386[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd387[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd388[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd389[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd390[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd391[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd392[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd393[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd394[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd395[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd396[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd397[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd398[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd399[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd400[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd401[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd402[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd403[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd404[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd405[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd406[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd407[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd408[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd409[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd410[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd411[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd412[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd413[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd414[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd415[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd416[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd417[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd418[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd419[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd420[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd421[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd422[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd423[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd424[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd425[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd426[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd427[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd428[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd429[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd430[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd431[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd432[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd433[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd434[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd435[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd436[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd437[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd438[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd439[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd440[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd441[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd442[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd443[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd444[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd445[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd446[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd447[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd448[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd449[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd450[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd451[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd452[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd453[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd454[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd455[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd456[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd457[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd458[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd459[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd460[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd461[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd462[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd463[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x00, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_video_on_command[] = {
+{ 0x8 , nt35590_720p_video_on_cmd0},
+{ 0x8 , nt35590_720p_video_on_cmd1},
+{ 0x8 , nt35590_720p_video_on_cmd2},
+{ 0x8 , nt35590_720p_video_on_cmd3},
+{ 0x8 , nt35590_720p_video_on_cmd4},
+{ 0x8 , nt35590_720p_video_on_cmd5},
+{ 0x8 , nt35590_720p_video_on_cmd6},
+{ 0x8 , nt35590_720p_video_on_cmd7},
+{ 0x8 , nt35590_720p_video_on_cmd8},
+{ 0x8 , nt35590_720p_video_on_cmd9},
+{ 0x8 , nt35590_720p_video_on_cmd10},
+{ 0x8 , nt35590_720p_video_on_cmd11},
+{ 0x8 , nt35590_720p_video_on_cmd12},
+{ 0x8 , nt35590_720p_video_on_cmd13},
+{ 0x8 , nt35590_720p_video_on_cmd14},
+{ 0x8 , nt35590_720p_video_on_cmd15},
+{ 0x8 , nt35590_720p_video_on_cmd16},
+{ 0x8 , nt35590_720p_video_on_cmd17},
+{ 0x8 , nt35590_720p_video_on_cmd18},
+{ 0x8 , nt35590_720p_video_on_cmd19},
+{ 0x8 , nt35590_720p_video_on_cmd20},
+{ 0x8 , nt35590_720p_video_on_cmd21},
+{ 0x8 , nt35590_720p_video_on_cmd22},
+{ 0x8 , nt35590_720p_video_on_cmd23},
+{ 0x8 , nt35590_720p_video_on_cmd24},
+{ 0x8 , nt35590_720p_video_on_cmd25},
+{ 0x8 , nt35590_720p_video_on_cmd26},
+{ 0x8 , nt35590_720p_video_on_cmd27},
+{ 0x8 , nt35590_720p_video_on_cmd28},
+{ 0x8 , nt35590_720p_video_on_cmd29},
+{ 0x8 , nt35590_720p_video_on_cmd30},
+{ 0x8 , nt35590_720p_video_on_cmd31},
+{ 0x8 , nt35590_720p_video_on_cmd32},
+{ 0x8 , nt35590_720p_video_on_cmd33},
+{ 0x8 , nt35590_720p_video_on_cmd34},
+{ 0x8 , nt35590_720p_video_on_cmd35},
+{ 0x8 , nt35590_720p_video_on_cmd36},
+{ 0x8 , nt35590_720p_video_on_cmd37},
+{ 0x8 , nt35590_720p_video_on_cmd38},
+{ 0x8 , nt35590_720p_video_on_cmd39},
+{ 0x8 , nt35590_720p_video_on_cmd40},
+{ 0x8 , nt35590_720p_video_on_cmd41},
+{ 0x8 , nt35590_720p_video_on_cmd42},
+{ 0x8 , nt35590_720p_video_on_cmd43},
+{ 0x8 , nt35590_720p_video_on_cmd44},
+{ 0x8 , nt35590_720p_video_on_cmd45},
+{ 0x8 , nt35590_720p_video_on_cmd46},
+{ 0x8 , nt35590_720p_video_on_cmd47},
+{ 0x8 , nt35590_720p_video_on_cmd48},
+{ 0x8 , nt35590_720p_video_on_cmd49},
+{ 0x8 , nt35590_720p_video_on_cmd50},
+{ 0x8 , nt35590_720p_video_on_cmd51},
+{ 0x8 , nt35590_720p_video_on_cmd52},
+{ 0x8 , nt35590_720p_video_on_cmd53},
+{ 0x8 , nt35590_720p_video_on_cmd54},
+{ 0x8 , nt35590_720p_video_on_cmd55},
+{ 0x8 , nt35590_720p_video_on_cmd56},
+{ 0x8 , nt35590_720p_video_on_cmd57},
+{ 0x8 , nt35590_720p_video_on_cmd58},
+{ 0x8 , nt35590_720p_video_on_cmd59},
+{ 0x8 , nt35590_720p_video_on_cmd60},
+{ 0x8 , nt35590_720p_video_on_cmd61},
+{ 0x8 , nt35590_720p_video_on_cmd62},
+{ 0x8 , nt35590_720p_video_on_cmd63},
+{ 0x8 , nt35590_720p_video_on_cmd64},
+{ 0x8 , nt35590_720p_video_on_cmd65},
+{ 0x8 , nt35590_720p_video_on_cmd66},
+{ 0x8 , nt35590_720p_video_on_cmd67},
+{ 0x8 , nt35590_720p_video_on_cmd68},
+{ 0x8 , nt35590_720p_video_on_cmd69},
+{ 0x8 , nt35590_720p_video_on_cmd70},
+{ 0x8 , nt35590_720p_video_on_cmd71},
+{ 0x8 , nt35590_720p_video_on_cmd72},
+{ 0x8 , nt35590_720p_video_on_cmd73},
+{ 0x8 , nt35590_720p_video_on_cmd74},
+{ 0x8 , nt35590_720p_video_on_cmd75},
+{ 0x8 , nt35590_720p_video_on_cmd76},
+{ 0x8 , nt35590_720p_video_on_cmd77},
+{ 0x8 , nt35590_720p_video_on_cmd78},
+{ 0x8 , nt35590_720p_video_on_cmd79},
+{ 0x8 , nt35590_720p_video_on_cmd80},
+{ 0x8 , nt35590_720p_video_on_cmd81},
+{ 0x8 , nt35590_720p_video_on_cmd82},
+{ 0x8 , nt35590_720p_video_on_cmd83},
+{ 0x8 , nt35590_720p_video_on_cmd84},
+{ 0x8 , nt35590_720p_video_on_cmd85},
+{ 0x8 , nt35590_720p_video_on_cmd86},
+{ 0x8 , nt35590_720p_video_on_cmd87},
+{ 0x8 , nt35590_720p_video_on_cmd88},
+{ 0x8 , nt35590_720p_video_on_cmd89},
+{ 0x8 , nt35590_720p_video_on_cmd90},
+{ 0x8 , nt35590_720p_video_on_cmd91},
+{ 0x8 , nt35590_720p_video_on_cmd92},
+{ 0x8 , nt35590_720p_video_on_cmd93},
+{ 0x8 , nt35590_720p_video_on_cmd94},
+{ 0x8 , nt35590_720p_video_on_cmd95},
+{ 0x8 , nt35590_720p_video_on_cmd96},
+{ 0x8 , nt35590_720p_video_on_cmd97},
+{ 0x8 , nt35590_720p_video_on_cmd98},
+{ 0x8 , nt35590_720p_video_on_cmd99},
+{ 0x8 , nt35590_720p_video_on_cmd100},
+{ 0x8 , nt35590_720p_video_on_cmd101},
+{ 0x8 , nt35590_720p_video_on_cmd102},
+{ 0x8 , nt35590_720p_video_on_cmd103},
+{ 0x8 , nt35590_720p_video_on_cmd104},
+{ 0x8 , nt35590_720p_video_on_cmd105},
+{ 0x8 , nt35590_720p_video_on_cmd106},
+{ 0x8 , nt35590_720p_video_on_cmd107},
+{ 0x8 , nt35590_720p_video_on_cmd108},
+{ 0x8 , nt35590_720p_video_on_cmd109},
+{ 0x8 , nt35590_720p_video_on_cmd110},
+{ 0x8 , nt35590_720p_video_on_cmd111},
+{ 0x8 , nt35590_720p_video_on_cmd112},
+{ 0x8 , nt35590_720p_video_on_cmd113},
+{ 0x8 , nt35590_720p_video_on_cmd114},
+{ 0x8 , nt35590_720p_video_on_cmd115},
+{ 0x8 , nt35590_720p_video_on_cmd116},
+{ 0x8 , nt35590_720p_video_on_cmd117},
+{ 0x8 , nt35590_720p_video_on_cmd118},
+{ 0x8 , nt35590_720p_video_on_cmd119},
+{ 0x8 , nt35590_720p_video_on_cmd120},
+{ 0x8 , nt35590_720p_video_on_cmd121},
+{ 0x8 , nt35590_720p_video_on_cmd122},
+{ 0x8 , nt35590_720p_video_on_cmd123},
+{ 0x8 , nt35590_720p_video_on_cmd124},
+{ 0x8 , nt35590_720p_video_on_cmd125},
+{ 0x8 , nt35590_720p_video_on_cmd126},
+{ 0x8 , nt35590_720p_video_on_cmd127},
+{ 0x8 , nt35590_720p_video_on_cmd128},
+{ 0x8 , nt35590_720p_video_on_cmd129},
+{ 0x8 , nt35590_720p_video_on_cmd130},
+{ 0x8 , nt35590_720p_video_on_cmd131},
+{ 0x8 , nt35590_720p_video_on_cmd132},
+{ 0x8 , nt35590_720p_video_on_cmd133},
+{ 0x8 , nt35590_720p_video_on_cmd134},
+{ 0x8 , nt35590_720p_video_on_cmd135},
+{ 0x8 , nt35590_720p_video_on_cmd136},
+{ 0x8 , nt35590_720p_video_on_cmd137},
+{ 0x8 , nt35590_720p_video_on_cmd138},
+{ 0x8 , nt35590_720p_video_on_cmd139},
+{ 0x8 , nt35590_720p_video_on_cmd140},
+{ 0x8 , nt35590_720p_video_on_cmd141},
+{ 0x8 , nt35590_720p_video_on_cmd142},
+{ 0x8 , nt35590_720p_video_on_cmd143},
+{ 0x8 , nt35590_720p_video_on_cmd144},
+{ 0x8 , nt35590_720p_video_on_cmd145},
+{ 0x8 , nt35590_720p_video_on_cmd146},
+{ 0x8 , nt35590_720p_video_on_cmd147},
+{ 0x8 , nt35590_720p_video_on_cmd148},
+{ 0x8 , nt35590_720p_video_on_cmd149},
+{ 0x8 , nt35590_720p_video_on_cmd150},
+{ 0x8 , nt35590_720p_video_on_cmd151},
+{ 0x8 , nt35590_720p_video_on_cmd152},
+{ 0x8 , nt35590_720p_video_on_cmd153},
+{ 0x8 , nt35590_720p_video_on_cmd154},
+{ 0x8 , nt35590_720p_video_on_cmd155},
+{ 0x8 , nt35590_720p_video_on_cmd156},
+{ 0x8 , nt35590_720p_video_on_cmd157},
+{ 0x8 , nt35590_720p_video_on_cmd158},
+{ 0x8 , nt35590_720p_video_on_cmd159},
+{ 0x8 , nt35590_720p_video_on_cmd160},
+{ 0x8 , nt35590_720p_video_on_cmd161},
+{ 0x8 , nt35590_720p_video_on_cmd162},
+{ 0x8 , nt35590_720p_video_on_cmd163},
+{ 0x8 , nt35590_720p_video_on_cmd164},
+{ 0x8 , nt35590_720p_video_on_cmd165},
+{ 0x8 , nt35590_720p_video_on_cmd166},
+{ 0x8 , nt35590_720p_video_on_cmd167},
+{ 0x8 , nt35590_720p_video_on_cmd168},
+{ 0x8 , nt35590_720p_video_on_cmd169},
+{ 0x8 , nt35590_720p_video_on_cmd170},
+{ 0x8 , nt35590_720p_video_on_cmd171},
+{ 0x8 , nt35590_720p_video_on_cmd172},
+{ 0x8 , nt35590_720p_video_on_cmd173},
+{ 0x8 , nt35590_720p_video_on_cmd174},
+{ 0x8 , nt35590_720p_video_on_cmd175},
+{ 0x8 , nt35590_720p_video_on_cmd176},
+{ 0x8 , nt35590_720p_video_on_cmd177},
+{ 0x8 , nt35590_720p_video_on_cmd178},
+{ 0x8 , nt35590_720p_video_on_cmd179},
+{ 0x8 , nt35590_720p_video_on_cmd180},
+{ 0x8 , nt35590_720p_video_on_cmd181},
+{ 0x8 , nt35590_720p_video_on_cmd182},
+{ 0x8 , nt35590_720p_video_on_cmd183},
+{ 0x8 , nt35590_720p_video_on_cmd184},
+{ 0x8 , nt35590_720p_video_on_cmd185},
+{ 0x8 , nt35590_720p_video_on_cmd186},
+{ 0x8 , nt35590_720p_video_on_cmd187},
+{ 0x8 , nt35590_720p_video_on_cmd188},
+{ 0x8 , nt35590_720p_video_on_cmd189},
+{ 0x8 , nt35590_720p_video_on_cmd190},
+{ 0x8 , nt35590_720p_video_on_cmd191},
+{ 0x8 , nt35590_720p_video_on_cmd192},
+{ 0x8 , nt35590_720p_video_on_cmd193},
+{ 0x8 , nt35590_720p_video_on_cmd194},
+{ 0x8 , nt35590_720p_video_on_cmd195},
+{ 0x8 , nt35590_720p_video_on_cmd196},
+{ 0x8 , nt35590_720p_video_on_cmd197},
+{ 0x8 , nt35590_720p_video_on_cmd198},
+{ 0x8 , nt35590_720p_video_on_cmd199},
+{ 0x8 , nt35590_720p_video_on_cmd200},
+{ 0x8 , nt35590_720p_video_on_cmd201},
+{ 0x8 , nt35590_720p_video_on_cmd202},
+{ 0x8 , nt35590_720p_video_on_cmd203},
+{ 0x8 , nt35590_720p_video_on_cmd204},
+{ 0x8 , nt35590_720p_video_on_cmd205},
+{ 0x8 , nt35590_720p_video_on_cmd206},
+{ 0x8 , nt35590_720p_video_on_cmd207},
+{ 0x8 , nt35590_720p_video_on_cmd208},
+{ 0x8 , nt35590_720p_video_on_cmd209},
+{ 0x8 , nt35590_720p_video_on_cmd210},
+{ 0x8 , nt35590_720p_video_on_cmd211},
+{ 0x8 , nt35590_720p_video_on_cmd212},
+{ 0x8 , nt35590_720p_video_on_cmd213},
+{ 0x8 , nt35590_720p_video_on_cmd214},
+{ 0x8 , nt35590_720p_video_on_cmd215},
+{ 0x8 , nt35590_720p_video_on_cmd216},
+{ 0x8 , nt35590_720p_video_on_cmd217},
+{ 0x8 , nt35590_720p_video_on_cmd218},
+{ 0x8 , nt35590_720p_video_on_cmd219},
+{ 0x8 , nt35590_720p_video_on_cmd220},
+{ 0x8 , nt35590_720p_video_on_cmd221},
+{ 0x8 , nt35590_720p_video_on_cmd222},
+{ 0x8 , nt35590_720p_video_on_cmd223},
+{ 0x8 , nt35590_720p_video_on_cmd224},
+{ 0x8 , nt35590_720p_video_on_cmd225},
+{ 0x8 , nt35590_720p_video_on_cmd226},
+{ 0x8 , nt35590_720p_video_on_cmd227},
+{ 0x8 , nt35590_720p_video_on_cmd228},
+{ 0x8 , nt35590_720p_video_on_cmd229},
+{ 0x8 , nt35590_720p_video_on_cmd230},
+{ 0x8 , nt35590_720p_video_on_cmd231},
+{ 0x8 , nt35590_720p_video_on_cmd232},
+{ 0x8 , nt35590_720p_video_on_cmd233},
+{ 0x8 , nt35590_720p_video_on_cmd234},
+{ 0x8 , nt35590_720p_video_on_cmd235},
+{ 0x8 , nt35590_720p_video_on_cmd236},
+{ 0x8 , nt35590_720p_video_on_cmd237},
+{ 0x8 , nt35590_720p_video_on_cmd238},
+{ 0x8 , nt35590_720p_video_on_cmd239},
+{ 0x8 , nt35590_720p_video_on_cmd240},
+{ 0x8 , nt35590_720p_video_on_cmd241},
+{ 0x8 , nt35590_720p_video_on_cmd242},
+{ 0x8 , nt35590_720p_video_on_cmd243},
+{ 0x8 , nt35590_720p_video_on_cmd244},
+{ 0x8 , nt35590_720p_video_on_cmd245},
+{ 0x8 , nt35590_720p_video_on_cmd246},
+{ 0x8 , nt35590_720p_video_on_cmd247},
+{ 0x8 , nt35590_720p_video_on_cmd248},
+{ 0x8 , nt35590_720p_video_on_cmd249},
+{ 0x8 , nt35590_720p_video_on_cmd250},
+{ 0x8 , nt35590_720p_video_on_cmd251},
+{ 0x8 , nt35590_720p_video_on_cmd252},
+{ 0x8 , nt35590_720p_video_on_cmd253},
+{ 0x8 , nt35590_720p_video_on_cmd254},
+{ 0x8 , nt35590_720p_video_on_cmd255},
+{ 0x8 , nt35590_720p_video_on_cmd256},
+{ 0x8 , nt35590_720p_video_on_cmd257},
+{ 0x8 , nt35590_720p_video_on_cmd258},
+{ 0x8 , nt35590_720p_video_on_cmd259},
+{ 0x8 , nt35590_720p_video_on_cmd260},
+{ 0x8 , nt35590_720p_video_on_cmd261},
+{ 0x8 , nt35590_720p_video_on_cmd262},
+{ 0x8 , nt35590_720p_video_on_cmd263},
+{ 0x8 , nt35590_720p_video_on_cmd264},
+{ 0x8 , nt35590_720p_video_on_cmd265},
+{ 0x8 , nt35590_720p_video_on_cmd266},
+{ 0x8 , nt35590_720p_video_on_cmd267},
+{ 0x8 , nt35590_720p_video_on_cmd268},
+{ 0x8 , nt35590_720p_video_on_cmd269},
+{ 0x8 , nt35590_720p_video_on_cmd270},
+{ 0x8 , nt35590_720p_video_on_cmd271},
+{ 0x8 , nt35590_720p_video_on_cmd272},
+{ 0x8 , nt35590_720p_video_on_cmd273},
+{ 0x8 , nt35590_720p_video_on_cmd274},
+{ 0x8 , nt35590_720p_video_on_cmd275},
+{ 0x8 , nt35590_720p_video_on_cmd276},
+{ 0x8 , nt35590_720p_video_on_cmd277},
+{ 0x8 , nt35590_720p_video_on_cmd278},
+{ 0x8 , nt35590_720p_video_on_cmd279},
+{ 0x8 , nt35590_720p_video_on_cmd280},
+{ 0x8 , nt35590_720p_video_on_cmd281},
+{ 0x8 , nt35590_720p_video_on_cmd282},
+{ 0x8 , nt35590_720p_video_on_cmd283},
+{ 0x8 , nt35590_720p_video_on_cmd284},
+{ 0x8 , nt35590_720p_video_on_cmd285},
+{ 0x8 , nt35590_720p_video_on_cmd286},
+{ 0x8 , nt35590_720p_video_on_cmd287},
+{ 0x8 , nt35590_720p_video_on_cmd288},
+{ 0x8 , nt35590_720p_video_on_cmd289},
+{ 0x8 , nt35590_720p_video_on_cmd290},
+{ 0x8 , nt35590_720p_video_on_cmd291},
+{ 0x8 , nt35590_720p_video_on_cmd292},
+{ 0x8 , nt35590_720p_video_on_cmd293},
+{ 0x8 , nt35590_720p_video_on_cmd294},
+{ 0x8 , nt35590_720p_video_on_cmd295},
+{ 0x8 , nt35590_720p_video_on_cmd296},
+{ 0x8 , nt35590_720p_video_on_cmd297},
+{ 0x8 , nt35590_720p_video_on_cmd298},
+{ 0x8 , nt35590_720p_video_on_cmd299},
+{ 0x8 , nt35590_720p_video_on_cmd300},
+{ 0x8 , nt35590_720p_video_on_cmd301},
+{ 0x8 , nt35590_720p_video_on_cmd302},
+{ 0x8 , nt35590_720p_video_on_cmd303},
+{ 0x8 , nt35590_720p_video_on_cmd304},
+{ 0x8 , nt35590_720p_video_on_cmd305},
+{ 0x8 , nt35590_720p_video_on_cmd306},
+{ 0x8 , nt35590_720p_video_on_cmd307},
+{ 0x8 , nt35590_720p_video_on_cmd308},
+{ 0x8 , nt35590_720p_video_on_cmd309},
+{ 0x8 , nt35590_720p_video_on_cmd310},
+{ 0x8 , nt35590_720p_video_on_cmd311},
+{ 0x8 , nt35590_720p_video_on_cmd312},
+{ 0x8 , nt35590_720p_video_on_cmd313},
+{ 0x8 , nt35590_720p_video_on_cmd314},
+{ 0x8 , nt35590_720p_video_on_cmd315},
+{ 0x8 , nt35590_720p_video_on_cmd316},
+{ 0x8 , nt35590_720p_video_on_cmd317},
+{ 0x8 , nt35590_720p_video_on_cmd318},
+{ 0x8 , nt35590_720p_video_on_cmd319},
+{ 0x8 , nt35590_720p_video_on_cmd320},
+{ 0x8 , nt35590_720p_video_on_cmd321},
+{ 0x8 , nt35590_720p_video_on_cmd322},
+{ 0x8 , nt35590_720p_video_on_cmd323},
+{ 0x8 , nt35590_720p_video_on_cmd324},
+{ 0x8 , nt35590_720p_video_on_cmd325},
+{ 0x8 , nt35590_720p_video_on_cmd326},
+{ 0x8 , nt35590_720p_video_on_cmd327},
+{ 0x8 , nt35590_720p_video_on_cmd328},
+{ 0x8 , nt35590_720p_video_on_cmd329},
+{ 0x8 , nt35590_720p_video_on_cmd330},
+{ 0x8 , nt35590_720p_video_on_cmd331},
+{ 0x8 , nt35590_720p_video_on_cmd332},
+{ 0x8 , nt35590_720p_video_on_cmd333},
+{ 0x8 , nt35590_720p_video_on_cmd334},
+{ 0x8 , nt35590_720p_video_on_cmd335},
+{ 0x8 , nt35590_720p_video_on_cmd336},
+{ 0x8 , nt35590_720p_video_on_cmd337},
+{ 0x8 , nt35590_720p_video_on_cmd338},
+{ 0x8 , nt35590_720p_video_on_cmd339},
+{ 0x8 , nt35590_720p_video_on_cmd340},
+{ 0x8 , nt35590_720p_video_on_cmd341},
+{ 0x8 , nt35590_720p_video_on_cmd342},
+{ 0x8 , nt35590_720p_video_on_cmd343},
+{ 0x8 , nt35590_720p_video_on_cmd344},
+{ 0x8 , nt35590_720p_video_on_cmd345},
+{ 0x8 , nt35590_720p_video_on_cmd346},
+{ 0x8 , nt35590_720p_video_on_cmd347},
+{ 0x8 , nt35590_720p_video_on_cmd348},
+{ 0x8 , nt35590_720p_video_on_cmd349},
+{ 0x8 , nt35590_720p_video_on_cmd350},
+{ 0x8 , nt35590_720p_video_on_cmd351},
+{ 0x8 , nt35590_720p_video_on_cmd352},
+{ 0x8 , nt35590_720p_video_on_cmd353},
+{ 0x8 , nt35590_720p_video_on_cmd354},
+{ 0x8 , nt35590_720p_video_on_cmd355},
+{ 0x8 , nt35590_720p_video_on_cmd356},
+{ 0x8 , nt35590_720p_video_on_cmd357},
+{ 0x8 , nt35590_720p_video_on_cmd358},
+{ 0x8 , nt35590_720p_video_on_cmd359},
+{ 0x8 , nt35590_720p_video_on_cmd360},
+{ 0x8 , nt35590_720p_video_on_cmd361},
+{ 0x8 , nt35590_720p_video_on_cmd362},
+{ 0x8 , nt35590_720p_video_on_cmd363},
+{ 0x8 , nt35590_720p_video_on_cmd364},
+{ 0x8 , nt35590_720p_video_on_cmd365},
+{ 0x8 , nt35590_720p_video_on_cmd366},
+{ 0x8 , nt35590_720p_video_on_cmd367},
+{ 0x8 , nt35590_720p_video_on_cmd368},
+{ 0x8 , nt35590_720p_video_on_cmd369},
+{ 0x8 , nt35590_720p_video_on_cmd370},
+{ 0x8 , nt35590_720p_video_on_cmd371},
+{ 0x8 , nt35590_720p_video_on_cmd372},
+{ 0x8 , nt35590_720p_video_on_cmd373},
+{ 0x8 , nt35590_720p_video_on_cmd374},
+{ 0x8 , nt35590_720p_video_on_cmd375},
+{ 0x8 , nt35590_720p_video_on_cmd376},
+{ 0x8 , nt35590_720p_video_on_cmd377},
+{ 0x8 , nt35590_720p_video_on_cmd378},
+{ 0x8 , nt35590_720p_video_on_cmd379},
+{ 0x8 , nt35590_720p_video_on_cmd380},
+{ 0x8 , nt35590_720p_video_on_cmd381},
+{ 0x8 , nt35590_720p_video_on_cmd382},
+{ 0x8 , nt35590_720p_video_on_cmd383},
+{ 0x8 , nt35590_720p_video_on_cmd384},
+{ 0x8 , nt35590_720p_video_on_cmd385},
+{ 0x8 , nt35590_720p_video_on_cmd386},
+{ 0x8 , nt35590_720p_video_on_cmd387},
+{ 0x8 , nt35590_720p_video_on_cmd388},
+{ 0x8 , nt35590_720p_video_on_cmd389},
+{ 0x8 , nt35590_720p_video_on_cmd390},
+{ 0x8 , nt35590_720p_video_on_cmd391},
+{ 0x8 , nt35590_720p_video_on_cmd392},
+{ 0x8 , nt35590_720p_video_on_cmd393},
+{ 0x8 , nt35590_720p_video_on_cmd394},
+{ 0x8 , nt35590_720p_video_on_cmd395},
+{ 0x8 , nt35590_720p_video_on_cmd396},
+{ 0x8 , nt35590_720p_video_on_cmd397},
+{ 0x8 , nt35590_720p_video_on_cmd398},
+{ 0x8 , nt35590_720p_video_on_cmd399},
+{ 0x8 , nt35590_720p_video_on_cmd400},
+{ 0x8 , nt35590_720p_video_on_cmd401},
+{ 0x8 , nt35590_720p_video_on_cmd402},
+{ 0x8 , nt35590_720p_video_on_cmd403},
+{ 0x8 , nt35590_720p_video_on_cmd404},
+{ 0x8 , nt35590_720p_video_on_cmd405},
+{ 0x8 , nt35590_720p_video_on_cmd406},
+{ 0x8 , nt35590_720p_video_on_cmd407},
+{ 0x8 , nt35590_720p_video_on_cmd408},
+{ 0x8 , nt35590_720p_video_on_cmd409},
+{ 0x8 , nt35590_720p_video_on_cmd410},
+{ 0x8 , nt35590_720p_video_on_cmd411},
+{ 0x8 , nt35590_720p_video_on_cmd412},
+{ 0x8 , nt35590_720p_video_on_cmd413},
+{ 0x8 , nt35590_720p_video_on_cmd414},
+{ 0x8 , nt35590_720p_video_on_cmd415},
+{ 0x8 , nt35590_720p_video_on_cmd416},
+{ 0x8 , nt35590_720p_video_on_cmd417},
+{ 0x8 , nt35590_720p_video_on_cmd418},
+{ 0x8 , nt35590_720p_video_on_cmd419},
+{ 0x8 , nt35590_720p_video_on_cmd420},
+{ 0x8 , nt35590_720p_video_on_cmd421},
+{ 0x8 , nt35590_720p_video_on_cmd422},
+{ 0x8 , nt35590_720p_video_on_cmd423},
+{ 0x8 , nt35590_720p_video_on_cmd424},
+{ 0x8 , nt35590_720p_video_on_cmd425},
+{ 0x8 , nt35590_720p_video_on_cmd426},
+{ 0x8 , nt35590_720p_video_on_cmd427},
+{ 0x8 , nt35590_720p_video_on_cmd428},
+{ 0x8 , nt35590_720p_video_on_cmd429},
+{ 0x8 , nt35590_720p_video_on_cmd430},
+{ 0x8 , nt35590_720p_video_on_cmd431},
+{ 0x8 , nt35590_720p_video_on_cmd432},
+{ 0x8 , nt35590_720p_video_on_cmd433},
+{ 0x8 , nt35590_720p_video_on_cmd434},
+{ 0x8 , nt35590_720p_video_on_cmd435},
+{ 0x8 , nt35590_720p_video_on_cmd436},
+{ 0x8 , nt35590_720p_video_on_cmd437},
+{ 0x8 , nt35590_720p_video_on_cmd438},
+{ 0x8 , nt35590_720p_video_on_cmd439},
+{ 0x8 , nt35590_720p_video_on_cmd440},
+{ 0x8 , nt35590_720p_video_on_cmd441},
+{ 0x8 , nt35590_720p_video_on_cmd442},
+{ 0x8 , nt35590_720p_video_on_cmd443},
+{ 0x8 , nt35590_720p_video_on_cmd444},
+{ 0x8 , nt35590_720p_video_on_cmd445},
+{ 0x8 , nt35590_720p_video_on_cmd446},
+{ 0x8 , nt35590_720p_video_on_cmd447},
+{ 0x8 , nt35590_720p_video_on_cmd448},
+{ 0x8 , nt35590_720p_video_on_cmd449},
+{ 0x8 , nt35590_720p_video_on_cmd450},
+{ 0x8 , nt35590_720p_video_on_cmd451},
+{ 0x8 , nt35590_720p_video_on_cmd452},
+{ 0x8 , nt35590_720p_video_on_cmd453},
+{ 0x8 , nt35590_720p_video_on_cmd454},
+{ 0x8 , nt35590_720p_video_on_cmd455},
+{ 0x8 , nt35590_720p_video_on_cmd456},
+{ 0x8 , nt35590_720p_video_on_cmd457},
+{ 0x8 , nt35590_720p_video_on_cmd458},
+{ 0x8 , nt35590_720p_video_on_cmd459},
+{ 0x8 , nt35590_720p_video_on_cmd460},
+{ 0x8 , nt35590_720p_video_on_cmd461},
+{ 0x8 , nt35590_720p_video_on_cmd462},
+{ 0x8 , nt35590_720p_video_on_cmd463}
+};
+#define NT35590_720P_VIDEO_ON_COMMAND 464
+
+
+static char nt35590_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35590_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_video_off_command[] = {
+{ 0x4 , nt35590_720p_videooff_cmd0},
+{ 0x4 , nt35590_720p_videooff_cmd1}
+};
+#define NT35590_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state nt35590_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35590_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35590_720p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35590_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35590_720p_video_timings[] = {
+ 0x7d, 0x25, 0x1d, 0x00, 0x37, 0x33, 0x22, 0x27, 0x1e, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_video_rotation[] = {
+
+};
+#define NT35590_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing nt35590_720p_video_timing_info = {
+ 0, 4, 0x20, 0x2c
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35590_720p_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_NT35590_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35596_1080p_video.h b/dev/gcdb/display/include/panel_nt35596_1080p_video.h
new file mode 100644
index 0000000..d90dff9
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35596_1080p_video.h
@@ -0,0 +1,3263 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35596_1080P_VIDEO_H_
+
+#define _PANEL_NT35596_1080P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35596_1080p_video_panel_data = {
+ "nt35596 1080p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35596_1080p_video_panel_res = {
+ 1080, 1920, 32, 32, 8, 0, 2, 18, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35596_1080p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35596_1080p_video_on_cmd0[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd1[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd2[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x45, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x4F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd4[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0xC8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd5[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x2C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd6[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0xBB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd7[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd8[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd9[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd10[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd11[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd12[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd13[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd14[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd15[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd16[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd17[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd18[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd19[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x1B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd20[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x24, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd21[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd22[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x87, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd23[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x87, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd24[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0xB0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd25[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xB3, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd26[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd27[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd28[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd29[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd30[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x18, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd31[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x18, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd32[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd33[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x77, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd34[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd35[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd36[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd37[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd38[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd39[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd40[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd41[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd42[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd43[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd44[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd45[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd46[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd47[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd48[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd49[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd50[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd51[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd52[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd53[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd54[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd55[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd56[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd57[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd58[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd59[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd60[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd61[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd62[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd63[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd64[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd65[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd66[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd67[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd68[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd69[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd70[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd71[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd72[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd73[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x15, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd74[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd75[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd76[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd77[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd78[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd79[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd80[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd81[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd82[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd83[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd84[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd85[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd86[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd87[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd88[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd89[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x15, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd90[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd91[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd92[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd93[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd94[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd95[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd96[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd97[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x58, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd98[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x12, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd99[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd100[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd101[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x11, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd102[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd103[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd104[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd105[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd106[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x61, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd107[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd108[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x63, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd109[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x77, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd110[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd111[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd112[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd113[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd114[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd115[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x15, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd116[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x75, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd117[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd118[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd119[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd120[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd121[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd122[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd123[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd124[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd125[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd126[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd127[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd128[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd129[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd130[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd131[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd132[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xD8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd133[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd134[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd135[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0x81, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd136[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd137[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd138[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd139[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd140[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd141[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd142[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd143[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd144[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd145[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd146[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x8E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd147[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd148[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd149[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd150[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0xB2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd151[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd152[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd153[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd154[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xD7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd155[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd156[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xE9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd157[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd158[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd159[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd160[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd161[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd162[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd163[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd164[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd165[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd166[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd167[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd168[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd169[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd170[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0xBC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd171[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd172[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd173[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd174[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x39, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd175[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd176[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd177[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd178[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd179[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd180[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xA2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd181[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd182[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd183[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd184[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd185[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd186[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd187[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd188[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x54, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd189[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd190[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd191[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd192[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd193[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd194[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x81, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd195[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd196[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd197[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd198[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0xF0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd199[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd200[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd201[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd202[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd203[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd206[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x8E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd207[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd208[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd209[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd210[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0xB2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd211[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd212[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd213[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd214[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xD7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd215[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd216[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xE9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd217[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd218[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd219[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd220[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd221[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd222[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd223[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd224[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd225[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd226[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd227[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd228[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd229[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd230[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0xBC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd231[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd232[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd233[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd234[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x39, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd235[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd236[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd237[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd238[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd239[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd240[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xA2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd241[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd242[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd243[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd244[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd245[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd246[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd247[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd248[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x54, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd249[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd250[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd251[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd252[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd253[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd254[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x81, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd255[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd256[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd257[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd258[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0xF0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd259[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd260[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd261[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd262[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd263[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xED, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd264[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEE, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd265[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd266[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF0, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd267[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd268[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF2, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd269[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd270[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF4, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd271[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd272[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF6, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd273[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd274[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF8, 0x71, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd275[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd276[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFA, 0x8C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd277[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd278[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd279[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd280[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd281[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd282[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0xB6, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd283[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd284[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0xC9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd285[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd286[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd287[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd288[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd289[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd290[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd291[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd292[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd293[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd294[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xEB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd295[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd296[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x25, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd297[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd298[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x27, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd299[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd300[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x5C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd301[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd302[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd303[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd304[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0xBA, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd305[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd306[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0xEC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd307[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd308[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd309[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd310[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x34, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd311[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd312[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x3F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd313[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd314[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd315[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd316[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x49, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd317[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd318[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd319[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd320[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x7E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd321[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd322[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd323[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd324[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd325[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x30, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd326[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x31, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd327[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd328[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd329[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x34, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd330[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd331[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd332[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd333[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd334[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd335[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd336[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3B, 0x71, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd337[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd338[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3F, 0x8C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd339[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x40, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd340[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x41, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd341[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x42, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd342[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0xB6, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd343[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x44, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd344[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x45, 0xC9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd345[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x46, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd346[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x47, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd347[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x48, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd348[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x49, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd349[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd350[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd351[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd352[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd353[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd354[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0xEB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd355[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd356[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x25, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd357[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd358[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x27, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd359[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd360[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0x5C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd361[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x56, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd362[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd363[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd364[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0xBA, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd365[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd366[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0xEC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd367[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd368[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd369[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd370[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x34, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd371[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd372[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x3F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd373[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd374[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd375[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd376[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x49, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd377[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd378[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd379[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd380[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x7E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd381[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd382[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd383[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd384[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6E, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd385[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd386[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x70, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd387[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd388[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd389[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x73, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd390[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x74, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd391[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd392[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd393[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd394[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd395[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd396[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd397[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd398[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd399[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd400[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd401[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd402[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd403[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd404[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0x38, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd405[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd406[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd407[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd408[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x72, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd409[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd410[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x9B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd411[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd412[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0xC3, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd413[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd414[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd415[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd416[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd417[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd418[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd419[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd420[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd421[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd422[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd423[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd424[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0xC8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd425[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd426[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd427[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd428[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd429[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd430[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd431[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd432[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x88, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd433[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd434[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd435[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd436[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd437[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd438[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd439[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd440[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd441[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd442[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd443[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd444[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd445[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd446[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd447[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd448[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd449[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd450[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd451[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd452[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd453[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd454[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd455[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd456[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd457[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd458[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd459[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd460[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd461[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd462[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd463[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd464[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0x38, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd465[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd466[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd467[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd468[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x72, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd469[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd470[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x9B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd471[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd472[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0xC3, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd473[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd474[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd475[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd476[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd477[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd478[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd479[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd480[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd481[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd482[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd483[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd484[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0xC8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd485[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd486[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd487[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd488[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd489[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd490[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd491[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd492[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x88, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd493[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd494[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd495[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd496[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd497[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd498[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd499[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd500[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd501[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd502[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd503[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd504[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd505[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd506[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd507[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd508[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd509[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd510[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd511[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd512[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd513[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd514[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x14, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd515[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x14, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd516[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd517[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd518[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd519[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x00, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35596_1080p_video_on_command[] = {
+{ 0x8 , nt35596_1080p_video_on_cmd0},
+{ 0x8 , nt35596_1080p_video_on_cmd1},
+{ 0x8 , nt35596_1080p_video_on_cmd2},
+{ 0x8 , nt35596_1080p_video_on_cmd3},
+{ 0x8 , nt35596_1080p_video_on_cmd4},
+{ 0x8 , nt35596_1080p_video_on_cmd5},
+{ 0x8 , nt35596_1080p_video_on_cmd6},
+{ 0x8 , nt35596_1080p_video_on_cmd7},
+{ 0x8 , nt35596_1080p_video_on_cmd8},
+{ 0x8 , nt35596_1080p_video_on_cmd9},
+{ 0x8 , nt35596_1080p_video_on_cmd10},
+{ 0x8 , nt35596_1080p_video_on_cmd11},
+{ 0x8 , nt35596_1080p_video_on_cmd12},
+{ 0x8 , nt35596_1080p_video_on_cmd13},
+{ 0x8 , nt35596_1080p_video_on_cmd14},
+{ 0x8 , nt35596_1080p_video_on_cmd15},
+{ 0x8 , nt35596_1080p_video_on_cmd16},
+{ 0x8 , nt35596_1080p_video_on_cmd17},
+{ 0x8 , nt35596_1080p_video_on_cmd18},
+{ 0x8 , nt35596_1080p_video_on_cmd19},
+{ 0x8 , nt35596_1080p_video_on_cmd20},
+{ 0x8 , nt35596_1080p_video_on_cmd21},
+{ 0x8 , nt35596_1080p_video_on_cmd22},
+{ 0x8 , nt35596_1080p_video_on_cmd23},
+{ 0x8 , nt35596_1080p_video_on_cmd24},
+{ 0x8 , nt35596_1080p_video_on_cmd25},
+{ 0x8 , nt35596_1080p_video_on_cmd26},
+{ 0x8 , nt35596_1080p_video_on_cmd27},
+{ 0x8 , nt35596_1080p_video_on_cmd28},
+{ 0x8 , nt35596_1080p_video_on_cmd29},
+{ 0x8 , nt35596_1080p_video_on_cmd30},
+{ 0x8 , nt35596_1080p_video_on_cmd31},
+{ 0x8 , nt35596_1080p_video_on_cmd32},
+{ 0x8 , nt35596_1080p_video_on_cmd33},
+{ 0x8 , nt35596_1080p_video_on_cmd34},
+{ 0x8 , nt35596_1080p_video_on_cmd35},
+{ 0x8 , nt35596_1080p_video_on_cmd36},
+{ 0x8 , nt35596_1080p_video_on_cmd37},
+{ 0x8 , nt35596_1080p_video_on_cmd38},
+{ 0x8 , nt35596_1080p_video_on_cmd39},
+{ 0x8 , nt35596_1080p_video_on_cmd40},
+{ 0x8 , nt35596_1080p_video_on_cmd41},
+{ 0x8 , nt35596_1080p_video_on_cmd42},
+{ 0x8 , nt35596_1080p_video_on_cmd43},
+{ 0x8 , nt35596_1080p_video_on_cmd44},
+{ 0x8 , nt35596_1080p_video_on_cmd45},
+{ 0x8 , nt35596_1080p_video_on_cmd46},
+{ 0x8 , nt35596_1080p_video_on_cmd47},
+{ 0x8 , nt35596_1080p_video_on_cmd48},
+{ 0x8 , nt35596_1080p_video_on_cmd49},
+{ 0x8 , nt35596_1080p_video_on_cmd50},
+{ 0x8 , nt35596_1080p_video_on_cmd51},
+{ 0x8 , nt35596_1080p_video_on_cmd52},
+{ 0x8 , nt35596_1080p_video_on_cmd53},
+{ 0x8 , nt35596_1080p_video_on_cmd54},
+{ 0x8 , nt35596_1080p_video_on_cmd55},
+{ 0x8 , nt35596_1080p_video_on_cmd56},
+{ 0x8 , nt35596_1080p_video_on_cmd57},
+{ 0x8 , nt35596_1080p_video_on_cmd58},
+{ 0x8 , nt35596_1080p_video_on_cmd59},
+{ 0x8 , nt35596_1080p_video_on_cmd60},
+{ 0x8 , nt35596_1080p_video_on_cmd61},
+{ 0x8 , nt35596_1080p_video_on_cmd62},
+{ 0x8 , nt35596_1080p_video_on_cmd63},
+{ 0x8 , nt35596_1080p_video_on_cmd64},
+{ 0x8 , nt35596_1080p_video_on_cmd65},
+{ 0x8 , nt35596_1080p_video_on_cmd66},
+{ 0x8 , nt35596_1080p_video_on_cmd67},
+{ 0x8 , nt35596_1080p_video_on_cmd68},
+{ 0x8 , nt35596_1080p_video_on_cmd69},
+{ 0x8 , nt35596_1080p_video_on_cmd70},
+{ 0x8 , nt35596_1080p_video_on_cmd71},
+{ 0x8 , nt35596_1080p_video_on_cmd72},
+{ 0x8 , nt35596_1080p_video_on_cmd73},
+{ 0x8 , nt35596_1080p_video_on_cmd74},
+{ 0x8 , nt35596_1080p_video_on_cmd75},
+{ 0x8 , nt35596_1080p_video_on_cmd76},
+{ 0x8 , nt35596_1080p_video_on_cmd77},
+{ 0x8 , nt35596_1080p_video_on_cmd78},
+{ 0x8 , nt35596_1080p_video_on_cmd79},
+{ 0x8 , nt35596_1080p_video_on_cmd80},
+{ 0x8 , nt35596_1080p_video_on_cmd81},
+{ 0x8 , nt35596_1080p_video_on_cmd82},
+{ 0x8 , nt35596_1080p_video_on_cmd83},
+{ 0x8 , nt35596_1080p_video_on_cmd84},
+{ 0x8 , nt35596_1080p_video_on_cmd85},
+{ 0x8 , nt35596_1080p_video_on_cmd86},
+{ 0x8 , nt35596_1080p_video_on_cmd87},
+{ 0x8 , nt35596_1080p_video_on_cmd88},
+{ 0x8 , nt35596_1080p_video_on_cmd89},
+{ 0x8 , nt35596_1080p_video_on_cmd90},
+{ 0x8 , nt35596_1080p_video_on_cmd91},
+{ 0x8 , nt35596_1080p_video_on_cmd92},
+{ 0x8 , nt35596_1080p_video_on_cmd93},
+{ 0x8 , nt35596_1080p_video_on_cmd94},
+{ 0x8 , nt35596_1080p_video_on_cmd95},
+{ 0x8 , nt35596_1080p_video_on_cmd96},
+{ 0x8 , nt35596_1080p_video_on_cmd97},
+{ 0x8 , nt35596_1080p_video_on_cmd98},
+{ 0x8 , nt35596_1080p_video_on_cmd99},
+{ 0x8 , nt35596_1080p_video_on_cmd100},
+{ 0x8 , nt35596_1080p_video_on_cmd101},
+{ 0x8 , nt35596_1080p_video_on_cmd102},
+{ 0x8 , nt35596_1080p_video_on_cmd103},
+{ 0x8 , nt35596_1080p_video_on_cmd104},
+{ 0x8 , nt35596_1080p_video_on_cmd105},
+{ 0x8 , nt35596_1080p_video_on_cmd106},
+{ 0x8 , nt35596_1080p_video_on_cmd107},
+{ 0x8 , nt35596_1080p_video_on_cmd108},
+{ 0x8 , nt35596_1080p_video_on_cmd109},
+{ 0x8 , nt35596_1080p_video_on_cmd110},
+{ 0x8 , nt35596_1080p_video_on_cmd111},
+{ 0x8 , nt35596_1080p_video_on_cmd112},
+{ 0x8 , nt35596_1080p_video_on_cmd113},
+{ 0x8 , nt35596_1080p_video_on_cmd114},
+{ 0x8 , nt35596_1080p_video_on_cmd115},
+{ 0x8 , nt35596_1080p_video_on_cmd116},
+{ 0x8 , nt35596_1080p_video_on_cmd117},
+{ 0x8 , nt35596_1080p_video_on_cmd118},
+{ 0x8 , nt35596_1080p_video_on_cmd119},
+{ 0x8 , nt35596_1080p_video_on_cmd120},
+{ 0x8 , nt35596_1080p_video_on_cmd121},
+{ 0x8 , nt35596_1080p_video_on_cmd122},
+{ 0x8 , nt35596_1080p_video_on_cmd123},
+{ 0x8 , nt35596_1080p_video_on_cmd124},
+{ 0x8 , nt35596_1080p_video_on_cmd125},
+{ 0x8 , nt35596_1080p_video_on_cmd126},
+{ 0x8 , nt35596_1080p_video_on_cmd127},
+{ 0x8 , nt35596_1080p_video_on_cmd128},
+{ 0x8 , nt35596_1080p_video_on_cmd129},
+{ 0x8 , nt35596_1080p_video_on_cmd130},
+{ 0x8 , nt35596_1080p_video_on_cmd131},
+{ 0x8 , nt35596_1080p_video_on_cmd132},
+{ 0x8 , nt35596_1080p_video_on_cmd133},
+{ 0x8 , nt35596_1080p_video_on_cmd134},
+{ 0x8 , nt35596_1080p_video_on_cmd135},
+{ 0x8 , nt35596_1080p_video_on_cmd136},
+{ 0x8 , nt35596_1080p_video_on_cmd137},
+{ 0x8 , nt35596_1080p_video_on_cmd138},
+{ 0x8 , nt35596_1080p_video_on_cmd139},
+{ 0x8 , nt35596_1080p_video_on_cmd140},
+{ 0x8 , nt35596_1080p_video_on_cmd141},
+{ 0x8 , nt35596_1080p_video_on_cmd142},
+{ 0x8 , nt35596_1080p_video_on_cmd143},
+{ 0x8 , nt35596_1080p_video_on_cmd144},
+{ 0x8 , nt35596_1080p_video_on_cmd145},
+{ 0x8 , nt35596_1080p_video_on_cmd146},
+{ 0x8 , nt35596_1080p_video_on_cmd147},
+{ 0x8 , nt35596_1080p_video_on_cmd148},
+{ 0x8 , nt35596_1080p_video_on_cmd149},
+{ 0x8 , nt35596_1080p_video_on_cmd150},
+{ 0x8 , nt35596_1080p_video_on_cmd151},
+{ 0x8 , nt35596_1080p_video_on_cmd152},
+{ 0x8 , nt35596_1080p_video_on_cmd153},
+{ 0x8 , nt35596_1080p_video_on_cmd154},
+{ 0x8 , nt35596_1080p_video_on_cmd155},
+{ 0x8 , nt35596_1080p_video_on_cmd156},
+{ 0x8 , nt35596_1080p_video_on_cmd157},
+{ 0x8 , nt35596_1080p_video_on_cmd158},
+{ 0x8 , nt35596_1080p_video_on_cmd159},
+{ 0x8 , nt35596_1080p_video_on_cmd160},
+{ 0x8 , nt35596_1080p_video_on_cmd161},
+{ 0x8 , nt35596_1080p_video_on_cmd162},
+{ 0x8 , nt35596_1080p_video_on_cmd163},
+{ 0x8 , nt35596_1080p_video_on_cmd164},
+{ 0x8 , nt35596_1080p_video_on_cmd165},
+{ 0x8 , nt35596_1080p_video_on_cmd166},
+{ 0x8 , nt35596_1080p_video_on_cmd167},
+{ 0x8 , nt35596_1080p_video_on_cmd168},
+{ 0x8 , nt35596_1080p_video_on_cmd169},
+{ 0x8 , nt35596_1080p_video_on_cmd170},
+{ 0x8 , nt35596_1080p_video_on_cmd171},
+{ 0x8 , nt35596_1080p_video_on_cmd172},
+{ 0x8 , nt35596_1080p_video_on_cmd173},
+{ 0x8 , nt35596_1080p_video_on_cmd174},
+{ 0x8 , nt35596_1080p_video_on_cmd175},
+{ 0x8 , nt35596_1080p_video_on_cmd176},
+{ 0x8 , nt35596_1080p_video_on_cmd177},
+{ 0x8 , nt35596_1080p_video_on_cmd178},
+{ 0x8 , nt35596_1080p_video_on_cmd179},
+{ 0x8 , nt35596_1080p_video_on_cmd180},
+{ 0x8 , nt35596_1080p_video_on_cmd181},
+{ 0x8 , nt35596_1080p_video_on_cmd182},
+{ 0x8 , nt35596_1080p_video_on_cmd183},
+{ 0x8 , nt35596_1080p_video_on_cmd184},
+{ 0x8 , nt35596_1080p_video_on_cmd185},
+{ 0x8 , nt35596_1080p_video_on_cmd186},
+{ 0x8 , nt35596_1080p_video_on_cmd187},
+{ 0x8 , nt35596_1080p_video_on_cmd188},
+{ 0x8 , nt35596_1080p_video_on_cmd189},
+{ 0x8 , nt35596_1080p_video_on_cmd190},
+{ 0x8 , nt35596_1080p_video_on_cmd191},
+{ 0x8 , nt35596_1080p_video_on_cmd192},
+{ 0x8 , nt35596_1080p_video_on_cmd193},
+{ 0x8 , nt35596_1080p_video_on_cmd194},
+{ 0x8 , nt35596_1080p_video_on_cmd195},
+{ 0x8 , nt35596_1080p_video_on_cmd196},
+{ 0x8 , nt35596_1080p_video_on_cmd197},
+{ 0x8 , nt35596_1080p_video_on_cmd198},
+{ 0x8 , nt35596_1080p_video_on_cmd199},
+{ 0x8 , nt35596_1080p_video_on_cmd200},
+{ 0x8 , nt35596_1080p_video_on_cmd201},
+{ 0x8 , nt35596_1080p_video_on_cmd202},
+{ 0x8 , nt35596_1080p_video_on_cmd203},
+{ 0x8 , nt35596_1080p_video_on_cmd204},
+{ 0x8 , nt35596_1080p_video_on_cmd205},
+{ 0x8 , nt35596_1080p_video_on_cmd206},
+{ 0x8 , nt35596_1080p_video_on_cmd207},
+{ 0x8 , nt35596_1080p_video_on_cmd208},
+{ 0x8 , nt35596_1080p_video_on_cmd209},
+{ 0x8 , nt35596_1080p_video_on_cmd210},
+{ 0x8 , nt35596_1080p_video_on_cmd211},
+{ 0x8 , nt35596_1080p_video_on_cmd212},
+{ 0x8 , nt35596_1080p_video_on_cmd213},
+{ 0x8 , nt35596_1080p_video_on_cmd214},
+{ 0x8 , nt35596_1080p_video_on_cmd215},
+{ 0x8 , nt35596_1080p_video_on_cmd216},
+{ 0x8 , nt35596_1080p_video_on_cmd217},
+{ 0x8 , nt35596_1080p_video_on_cmd218},
+{ 0x8 , nt35596_1080p_video_on_cmd219},
+{ 0x8 , nt35596_1080p_video_on_cmd220},
+{ 0x8 , nt35596_1080p_video_on_cmd221},
+{ 0x8 , nt35596_1080p_video_on_cmd222},
+{ 0x8 , nt35596_1080p_video_on_cmd223},
+{ 0x8 , nt35596_1080p_video_on_cmd224},
+{ 0x8 , nt35596_1080p_video_on_cmd225},
+{ 0x8 , nt35596_1080p_video_on_cmd226},
+{ 0x8 , nt35596_1080p_video_on_cmd227},
+{ 0x8 , nt35596_1080p_video_on_cmd228},
+{ 0x8 , nt35596_1080p_video_on_cmd229},
+{ 0x8 , nt35596_1080p_video_on_cmd230},
+{ 0x8 , nt35596_1080p_video_on_cmd231},
+{ 0x8 , nt35596_1080p_video_on_cmd232},
+{ 0x8 , nt35596_1080p_video_on_cmd233},
+{ 0x8 , nt35596_1080p_video_on_cmd234},
+{ 0x8 , nt35596_1080p_video_on_cmd235},
+{ 0x8 , nt35596_1080p_video_on_cmd236},
+{ 0x8 , nt35596_1080p_video_on_cmd237},
+{ 0x8 , nt35596_1080p_video_on_cmd238},
+{ 0x8 , nt35596_1080p_video_on_cmd239},
+{ 0x8 , nt35596_1080p_video_on_cmd240},
+{ 0x8 , nt35596_1080p_video_on_cmd241},
+{ 0x8 , nt35596_1080p_video_on_cmd242},
+{ 0x8 , nt35596_1080p_video_on_cmd243},
+{ 0x8 , nt35596_1080p_video_on_cmd244},
+{ 0x8 , nt35596_1080p_video_on_cmd245},
+{ 0x8 , nt35596_1080p_video_on_cmd246},
+{ 0x8 , nt35596_1080p_video_on_cmd247},
+{ 0x8 , nt35596_1080p_video_on_cmd248},
+{ 0x8 , nt35596_1080p_video_on_cmd249},
+{ 0x8 , nt35596_1080p_video_on_cmd250},
+{ 0x8 , nt35596_1080p_video_on_cmd251},
+{ 0x8 , nt35596_1080p_video_on_cmd252},
+{ 0x8 , nt35596_1080p_video_on_cmd253},
+{ 0x8 , nt35596_1080p_video_on_cmd254},
+{ 0x8 , nt35596_1080p_video_on_cmd255},
+{ 0x8 , nt35596_1080p_video_on_cmd256},
+{ 0x8 , nt35596_1080p_video_on_cmd257},
+{ 0x8 , nt35596_1080p_video_on_cmd258},
+{ 0x8 , nt35596_1080p_video_on_cmd259},
+{ 0x8 , nt35596_1080p_video_on_cmd260},
+{ 0x8 , nt35596_1080p_video_on_cmd261},
+{ 0x8 , nt35596_1080p_video_on_cmd262},
+{ 0x8 , nt35596_1080p_video_on_cmd263},
+{ 0x8 , nt35596_1080p_video_on_cmd264},
+{ 0x8 , nt35596_1080p_video_on_cmd265},
+{ 0x8 , nt35596_1080p_video_on_cmd266},
+{ 0x8 , nt35596_1080p_video_on_cmd267},
+{ 0x8 , nt35596_1080p_video_on_cmd268},
+{ 0x8 , nt35596_1080p_video_on_cmd269},
+{ 0x8 , nt35596_1080p_video_on_cmd270},
+{ 0x8 , nt35596_1080p_video_on_cmd271},
+{ 0x8 , nt35596_1080p_video_on_cmd272},
+{ 0x8 , nt35596_1080p_video_on_cmd273},
+{ 0x8 , nt35596_1080p_video_on_cmd274},
+{ 0x8 , nt35596_1080p_video_on_cmd275},
+{ 0x8 , nt35596_1080p_video_on_cmd276},
+{ 0x8 , nt35596_1080p_video_on_cmd277},
+{ 0x8 , nt35596_1080p_video_on_cmd278},
+{ 0x8 , nt35596_1080p_video_on_cmd279},
+{ 0x8 , nt35596_1080p_video_on_cmd280},
+{ 0x8 , nt35596_1080p_video_on_cmd281},
+{ 0x8 , nt35596_1080p_video_on_cmd282},
+{ 0x8 , nt35596_1080p_video_on_cmd283},
+{ 0x8 , nt35596_1080p_video_on_cmd284},
+{ 0x8 , nt35596_1080p_video_on_cmd285},
+{ 0x8 , nt35596_1080p_video_on_cmd286},
+{ 0x8 , nt35596_1080p_video_on_cmd287},
+{ 0x8 , nt35596_1080p_video_on_cmd288},
+{ 0x8 , nt35596_1080p_video_on_cmd289},
+{ 0x8 , nt35596_1080p_video_on_cmd290},
+{ 0x8 , nt35596_1080p_video_on_cmd291},
+{ 0x8 , nt35596_1080p_video_on_cmd292},
+{ 0x8 , nt35596_1080p_video_on_cmd293},
+{ 0x8 , nt35596_1080p_video_on_cmd294},
+{ 0x8 , nt35596_1080p_video_on_cmd295},
+{ 0x8 , nt35596_1080p_video_on_cmd296},
+{ 0x8 , nt35596_1080p_video_on_cmd297},
+{ 0x8 , nt35596_1080p_video_on_cmd298},
+{ 0x8 , nt35596_1080p_video_on_cmd299},
+{ 0x8 , nt35596_1080p_video_on_cmd300},
+{ 0x8 , nt35596_1080p_video_on_cmd301},
+{ 0x8 , nt35596_1080p_video_on_cmd302},
+{ 0x8 , nt35596_1080p_video_on_cmd303},
+{ 0x8 , nt35596_1080p_video_on_cmd304},
+{ 0x8 , nt35596_1080p_video_on_cmd305},
+{ 0x8 , nt35596_1080p_video_on_cmd306},
+{ 0x8 , nt35596_1080p_video_on_cmd307},
+{ 0x8 , nt35596_1080p_video_on_cmd308},
+{ 0x8 , nt35596_1080p_video_on_cmd309},
+{ 0x8 , nt35596_1080p_video_on_cmd310},
+{ 0x8 , nt35596_1080p_video_on_cmd311},
+{ 0x8 , nt35596_1080p_video_on_cmd312},
+{ 0x8 , nt35596_1080p_video_on_cmd313},
+{ 0x8 , nt35596_1080p_video_on_cmd314},
+{ 0x8 , nt35596_1080p_video_on_cmd315},
+{ 0x8 , nt35596_1080p_video_on_cmd316},
+{ 0x8 , nt35596_1080p_video_on_cmd317},
+{ 0x8 , nt35596_1080p_video_on_cmd318},
+{ 0x8 , nt35596_1080p_video_on_cmd319},
+{ 0x8 , nt35596_1080p_video_on_cmd320},
+{ 0x8 , nt35596_1080p_video_on_cmd321},
+{ 0x8 , nt35596_1080p_video_on_cmd322},
+{ 0x8 , nt35596_1080p_video_on_cmd323},
+{ 0x8 , nt35596_1080p_video_on_cmd324},
+{ 0x8 , nt35596_1080p_video_on_cmd325},
+{ 0x8 , nt35596_1080p_video_on_cmd326},
+{ 0x8 , nt35596_1080p_video_on_cmd327},
+{ 0x8 , nt35596_1080p_video_on_cmd328},
+{ 0x8 , nt35596_1080p_video_on_cmd329},
+{ 0x8 , nt35596_1080p_video_on_cmd330},
+{ 0x8 , nt35596_1080p_video_on_cmd331},
+{ 0x8 , nt35596_1080p_video_on_cmd332},
+{ 0x8 , nt35596_1080p_video_on_cmd333},
+{ 0x8 , nt35596_1080p_video_on_cmd334},
+{ 0x8 , nt35596_1080p_video_on_cmd335},
+{ 0x8 , nt35596_1080p_video_on_cmd336},
+{ 0x8 , nt35596_1080p_video_on_cmd337},
+{ 0x8 , nt35596_1080p_video_on_cmd338},
+{ 0x8 , nt35596_1080p_video_on_cmd339},
+{ 0x8 , nt35596_1080p_video_on_cmd340},
+{ 0x8 , nt35596_1080p_video_on_cmd341},
+{ 0x8 , nt35596_1080p_video_on_cmd342},
+{ 0x8 , nt35596_1080p_video_on_cmd343},
+{ 0x8 , nt35596_1080p_video_on_cmd344},
+{ 0x8 , nt35596_1080p_video_on_cmd345},
+{ 0x8 , nt35596_1080p_video_on_cmd346},
+{ 0x8 , nt35596_1080p_video_on_cmd347},
+{ 0x8 , nt35596_1080p_video_on_cmd348},
+{ 0x8 , nt35596_1080p_video_on_cmd349},
+{ 0x8 , nt35596_1080p_video_on_cmd350},
+{ 0x8 , nt35596_1080p_video_on_cmd351},
+{ 0x8 , nt35596_1080p_video_on_cmd352},
+{ 0x8 , nt35596_1080p_video_on_cmd353},
+{ 0x8 , nt35596_1080p_video_on_cmd354},
+{ 0x8 , nt35596_1080p_video_on_cmd355},
+{ 0x8 , nt35596_1080p_video_on_cmd356},
+{ 0x8 , nt35596_1080p_video_on_cmd357},
+{ 0x8 , nt35596_1080p_video_on_cmd358},
+{ 0x8 , nt35596_1080p_video_on_cmd359},
+{ 0x8 , nt35596_1080p_video_on_cmd360},
+{ 0x8 , nt35596_1080p_video_on_cmd361},
+{ 0x8 , nt35596_1080p_video_on_cmd362},
+{ 0x8 , nt35596_1080p_video_on_cmd363},
+{ 0x8 , nt35596_1080p_video_on_cmd364},
+{ 0x8 , nt35596_1080p_video_on_cmd365},
+{ 0x8 , nt35596_1080p_video_on_cmd366},
+{ 0x8 , nt35596_1080p_video_on_cmd367},
+{ 0x8 , nt35596_1080p_video_on_cmd368},
+{ 0x8 , nt35596_1080p_video_on_cmd369},
+{ 0x8 , nt35596_1080p_video_on_cmd370},
+{ 0x8 , nt35596_1080p_video_on_cmd371},
+{ 0x8 , nt35596_1080p_video_on_cmd372},
+{ 0x8 , nt35596_1080p_video_on_cmd373},
+{ 0x8 , nt35596_1080p_video_on_cmd374},
+{ 0x8 , nt35596_1080p_video_on_cmd375},
+{ 0x8 , nt35596_1080p_video_on_cmd376},
+{ 0x8 , nt35596_1080p_video_on_cmd377},
+{ 0x8 , nt35596_1080p_video_on_cmd378},
+{ 0x8 , nt35596_1080p_video_on_cmd379},
+{ 0x8 , nt35596_1080p_video_on_cmd380},
+{ 0x8 , nt35596_1080p_video_on_cmd381},
+{ 0x8 , nt35596_1080p_video_on_cmd382},
+{ 0x8 , nt35596_1080p_video_on_cmd383},
+{ 0x8 , nt35596_1080p_video_on_cmd384},
+{ 0x8 , nt35596_1080p_video_on_cmd385},
+{ 0x8 , nt35596_1080p_video_on_cmd386},
+{ 0x8 , nt35596_1080p_video_on_cmd387},
+{ 0x8 , nt35596_1080p_video_on_cmd388},
+{ 0x8 , nt35596_1080p_video_on_cmd389},
+{ 0x8 , nt35596_1080p_video_on_cmd390},
+{ 0x8 , nt35596_1080p_video_on_cmd391},
+{ 0x8 , nt35596_1080p_video_on_cmd392},
+{ 0x8 , nt35596_1080p_video_on_cmd393},
+{ 0x8 , nt35596_1080p_video_on_cmd394},
+{ 0x8 , nt35596_1080p_video_on_cmd395},
+{ 0x8 , nt35596_1080p_video_on_cmd396},
+{ 0x8 , nt35596_1080p_video_on_cmd397},
+{ 0x8 , nt35596_1080p_video_on_cmd398},
+{ 0x8 , nt35596_1080p_video_on_cmd399},
+{ 0x8 , nt35596_1080p_video_on_cmd400},
+{ 0x8 , nt35596_1080p_video_on_cmd401},
+{ 0x8 , nt35596_1080p_video_on_cmd402},
+{ 0x8 , nt35596_1080p_video_on_cmd403},
+{ 0x8 , nt35596_1080p_video_on_cmd404},
+{ 0x8 , nt35596_1080p_video_on_cmd405},
+{ 0x8 , nt35596_1080p_video_on_cmd406},
+{ 0x8 , nt35596_1080p_video_on_cmd407},
+{ 0x8 , nt35596_1080p_video_on_cmd408},
+{ 0x8 , nt35596_1080p_video_on_cmd409},
+{ 0x8 , nt35596_1080p_video_on_cmd410},
+{ 0x8 , nt35596_1080p_video_on_cmd411},
+{ 0x8 , nt35596_1080p_video_on_cmd412},
+{ 0x8 , nt35596_1080p_video_on_cmd413},
+{ 0x8 , nt35596_1080p_video_on_cmd414},
+{ 0x8 , nt35596_1080p_video_on_cmd415},
+{ 0x8 , nt35596_1080p_video_on_cmd416},
+{ 0x8 , nt35596_1080p_video_on_cmd417},
+{ 0x8 , nt35596_1080p_video_on_cmd418},
+{ 0x8 , nt35596_1080p_video_on_cmd419},
+{ 0x8 , nt35596_1080p_video_on_cmd420},
+{ 0x8 , nt35596_1080p_video_on_cmd421},
+{ 0x8 , nt35596_1080p_video_on_cmd422},
+{ 0x8 , nt35596_1080p_video_on_cmd423},
+{ 0x8 , nt35596_1080p_video_on_cmd424},
+{ 0x8 , nt35596_1080p_video_on_cmd425},
+{ 0x8 , nt35596_1080p_video_on_cmd426},
+{ 0x8 , nt35596_1080p_video_on_cmd427},
+{ 0x8 , nt35596_1080p_video_on_cmd428},
+{ 0x8 , nt35596_1080p_video_on_cmd429},
+{ 0x8 , nt35596_1080p_video_on_cmd430},
+{ 0x8 , nt35596_1080p_video_on_cmd431},
+{ 0x8 , nt35596_1080p_video_on_cmd432},
+{ 0x8 , nt35596_1080p_video_on_cmd433},
+{ 0x8 , nt35596_1080p_video_on_cmd434},
+{ 0x8 , nt35596_1080p_video_on_cmd435},
+{ 0x8 , nt35596_1080p_video_on_cmd436},
+{ 0x8 , nt35596_1080p_video_on_cmd437},
+{ 0x8 , nt35596_1080p_video_on_cmd438},
+{ 0x8 , nt35596_1080p_video_on_cmd439},
+{ 0x8 , nt35596_1080p_video_on_cmd440},
+{ 0x8 , nt35596_1080p_video_on_cmd441},
+{ 0x8 , nt35596_1080p_video_on_cmd442},
+{ 0x8 , nt35596_1080p_video_on_cmd443},
+{ 0x8 , nt35596_1080p_video_on_cmd444},
+{ 0x8 , nt35596_1080p_video_on_cmd445},
+{ 0x8 , nt35596_1080p_video_on_cmd446},
+{ 0x8 , nt35596_1080p_video_on_cmd447},
+{ 0x8 , nt35596_1080p_video_on_cmd448},
+{ 0x8 , nt35596_1080p_video_on_cmd449},
+{ 0x8 , nt35596_1080p_video_on_cmd450},
+{ 0x8 , nt35596_1080p_video_on_cmd451},
+{ 0x8 , nt35596_1080p_video_on_cmd452},
+{ 0x8 , nt35596_1080p_video_on_cmd453},
+{ 0x8 , nt35596_1080p_video_on_cmd454},
+{ 0x8 , nt35596_1080p_video_on_cmd455},
+{ 0x8 , nt35596_1080p_video_on_cmd456},
+{ 0x8 , nt35596_1080p_video_on_cmd457},
+{ 0x8 , nt35596_1080p_video_on_cmd458},
+{ 0x8 , nt35596_1080p_video_on_cmd459},
+{ 0x8 , nt35596_1080p_video_on_cmd460},
+{ 0x8 , nt35596_1080p_video_on_cmd461},
+{ 0x8 , nt35596_1080p_video_on_cmd462},
+{ 0x8 , nt35596_1080p_video_on_cmd463},
+{ 0x8 , nt35596_1080p_video_on_cmd464},
+{ 0x8 , nt35596_1080p_video_on_cmd465},
+{ 0x8 , nt35596_1080p_video_on_cmd466},
+{ 0x8 , nt35596_1080p_video_on_cmd467},
+{ 0x8 , nt35596_1080p_video_on_cmd468},
+{ 0x8 , nt35596_1080p_video_on_cmd469},
+{ 0x8 , nt35596_1080p_video_on_cmd470},
+{ 0x8 , nt35596_1080p_video_on_cmd471},
+{ 0x8 , nt35596_1080p_video_on_cmd472},
+{ 0x8 , nt35596_1080p_video_on_cmd473},
+{ 0x8 , nt35596_1080p_video_on_cmd474},
+{ 0x8 , nt35596_1080p_video_on_cmd475},
+{ 0x8 , nt35596_1080p_video_on_cmd476},
+{ 0x8 , nt35596_1080p_video_on_cmd477},
+{ 0x8 , nt35596_1080p_video_on_cmd478},
+{ 0x8 , nt35596_1080p_video_on_cmd479},
+{ 0x8 , nt35596_1080p_video_on_cmd480},
+{ 0x8 , nt35596_1080p_video_on_cmd481},
+{ 0x8 , nt35596_1080p_video_on_cmd482},
+{ 0x8 , nt35596_1080p_video_on_cmd483},
+{ 0x8 , nt35596_1080p_video_on_cmd484},
+{ 0x8 , nt35596_1080p_video_on_cmd485},
+{ 0x8 , nt35596_1080p_video_on_cmd486},
+{ 0x8 , nt35596_1080p_video_on_cmd487},
+{ 0x8 , nt35596_1080p_video_on_cmd488},
+{ 0x8 , nt35596_1080p_video_on_cmd489},
+{ 0x8 , nt35596_1080p_video_on_cmd490},
+{ 0x8 , nt35596_1080p_video_on_cmd491},
+{ 0x8 , nt35596_1080p_video_on_cmd492},
+{ 0x8 , nt35596_1080p_video_on_cmd493},
+{ 0x8 , nt35596_1080p_video_on_cmd494},
+{ 0x8 , nt35596_1080p_video_on_cmd495},
+{ 0x8 , nt35596_1080p_video_on_cmd496},
+{ 0x8 , nt35596_1080p_video_on_cmd497},
+{ 0x8 , nt35596_1080p_video_on_cmd498},
+{ 0x8 , nt35596_1080p_video_on_cmd499},
+{ 0x8 , nt35596_1080p_video_on_cmd500},
+{ 0x8 , nt35596_1080p_video_on_cmd501},
+{ 0x8 , nt35596_1080p_video_on_cmd502},
+{ 0x8 , nt35596_1080p_video_on_cmd503},
+{ 0x8 , nt35596_1080p_video_on_cmd504},
+{ 0x8 , nt35596_1080p_video_on_cmd505},
+{ 0x8 , nt35596_1080p_video_on_cmd506},
+{ 0x8 , nt35596_1080p_video_on_cmd507},
+{ 0x8 , nt35596_1080p_video_on_cmd508},
+{ 0x8 , nt35596_1080p_video_on_cmd509},
+{ 0x8 , nt35596_1080p_video_on_cmd510},
+{ 0x8 , nt35596_1080p_video_on_cmd511},
+{ 0x8 , nt35596_1080p_video_on_cmd512},
+{ 0x8 , nt35596_1080p_video_on_cmd513},
+{ 0x8 , nt35596_1080p_video_on_cmd514},
+{ 0x8 , nt35596_1080p_video_on_cmd515},
+{ 0x8 , nt35596_1080p_video_on_cmd516},
+{ 0x8 , nt35596_1080p_video_on_cmd517},
+{ 0x8 , nt35596_1080p_video_on_cmd518},
+{ 0x8 , nt35596_1080p_video_on_cmd519}
+};
+#define NT35596_1080P_VIDEO_ON_COMMAND 520
+
+
+static char nt35596_1080p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35596_1080p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35596_1080p_video_off_command[] = {
+{ 0x4 , nt35596_1080p_videooff_cmd0},
+{ 0x4 , nt35596_1080p_videooff_cmd1}
+};
+#define NT35596_1080P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state nt35596_1080p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35596_1080p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35596_1080p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35596_1080p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35596_1080p_video_timings[] = {
+ 0xf9, 0x3d, 0x34, 0x00, 0x58, 0x4d, 0x36, 0x3f, 0x53, 0x03, 0x04, 0x00
+};
+
+static struct panel_timing nt35596_1080p_video_timing_info = {
+ 0, 4, 0x1e, 0x38
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35596_1080p_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_NT35596_1080P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_toshiba_720p_video.h b/dev/gcdb/display/include/panel_toshiba_720p_video.h
new file mode 100755
index 0000000..8f3cd68
--- /dev/null
+++ b/dev/gcdb/display/include/panel_toshiba_720p_video.h
@@ -0,0 +1,344 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_TOSHIBA_720P_VIDEO_H_
+
+#define _PANEL_TOSHIBA_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config toshiba_720p_video_panel_data = {
+ "toshiba 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution toshiba_720p_video_panel_res = {
+ 720, 1280, 144, 32, 12, 0, 9, 3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info toshiba_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char toshiba_720p_video_on_cmd0[] = {
+0xb0, 0x00, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd1[] = {
+0xb2, 0x00, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd2[] = {
+0xb3, 0x0c, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd3[] = {
+0xb4, 0x02, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd4[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xc0, 0x40, 0x02, 0x7f,
+0xc8, 0x08, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd5[] = {
+0x10, 0x00, 0x29, 0xC0,
+0xc1, 0x00, 0xa8, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x9d, 0x08, 0x27, 0x00,
+0x00, 0x00, 0x00, 0x00,
+ };
+
+
+static char toshiba_720p_video_on_cmd6[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xc2, 0x00, 0x00, 0x09,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd7[] = {
+0xc3, 0x04, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd8[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xc4, 0x4d, 0x83, 0x00,
+ };
+
+
+static char toshiba_720p_video_on_cmd9[] = {
+0x0b, 0x00, 0x29, 0xC0,
+0xc6, 0x12, 0x00, 0x08,
+0x71, 0x00, 0x00, 0x00,
+0x80, 0x00, 0x04, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd10[] = {
+0xc7, 0x22, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd11[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xc8, 0x4c, 0x0c, 0x0c,
+0x0c, 0xFF, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd12[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xc9, 0x00, 0x40, 0x00,
+0x16, 0x32, 0x2e, 0x3a,
+0x43, 0x3e, 0x3c, 0x45,
+0x79, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd13[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xca, 0x00, 0x46, 0x1a,
+0x23, 0x21, 0x1c, 0x25,
+0x31, 0x2d, 0x49, 0x5f,
+0x7f, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd14[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xcb, 0x00, 0x4c, 0x20,
+0x3a, 0x42, 0x40, 0x47,
+0x4b, 0x42, 0x3e, 0x46,
+0x7e, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd15[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xcc, 0x00, 0x41, 0x19,
+0x21, 0x1d, 0x14, 0x18,
+0x1f, 0x1d, 0x25, 0x3f,
+0x73, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd16[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xcd, 0x23, 0x79, 0x5a,
+0x5f, 0x57, 0x4c, 0x51,
+0x51, 0x45, 0x3f, 0x4b,
+0x7f, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd17[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xce, 0x00, 0x40, 0x14,
+0x20, 0x1a, 0x0e, 0x0e,
+0x13, 0x08, 0x00, 0x05,
+0x46, 0x1c, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd18[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xd0, 0x6a, 0x64, 0x01,
+ };
+
+
+static char toshiba_720p_video_on_cmd19[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xd1, 0x77, 0xd4, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd20[] = {
+0xd3, 0x33, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd21[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xd5, 0x0f, 0x0f, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd22[] = {
+0x07, 0x00, 0x29, 0xC0,
+0xd8, 0x34, 0x64, 0x23,
+0x25, 0x62, 0x32, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd23[] = {
+0x0c, 0x00, 0x29, 0xC0,
+0xde, 0x10, 0x7b, 0x11,
+0x0a, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+ };
+
+
+static char toshiba_720p_video_on_cmd24[] = {
+0x09, 0x00, 0x29, 0xC0,
+0xfd, 0x04, 0x55, 0x53,
+0x00, 0x70, 0xff, 0x10,
+0x73, 0xFF, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd25[] = {
+0xe2, 0x00, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd26[] = {
+0x11, 0x00, 0x05, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd27[] = {
+0x29, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd toshiba_720p_video_on_command[] = {
+{ 0x4 , toshiba_720p_video_on_cmd0},
+{ 0x4 , toshiba_720p_video_on_cmd1},
+{ 0x4 , toshiba_720p_video_on_cmd2},
+{ 0x4 , toshiba_720p_video_on_cmd3},
+{ 0xc , toshiba_720p_video_on_cmd4},
+{ 0x14 , toshiba_720p_video_on_cmd5},
+{ 0xc , toshiba_720p_video_on_cmd6},
+{ 0x4 , toshiba_720p_video_on_cmd7},
+{ 0x8 , toshiba_720p_video_on_cmd8},
+{ 0x10 , toshiba_720p_video_on_cmd9},
+{ 0x4 , toshiba_720p_video_on_cmd10},
+{ 0xc , toshiba_720p_video_on_cmd11},
+{ 0x14 , toshiba_720p_video_on_cmd12},
+{ 0x14 , toshiba_720p_video_on_cmd13},
+{ 0x14 , toshiba_720p_video_on_cmd14},
+{ 0x14 , toshiba_720p_video_on_cmd15},
+{ 0x14 , toshiba_720p_video_on_cmd16},
+{ 0x14 , toshiba_720p_video_on_cmd17},
+{ 0x8 , toshiba_720p_video_on_cmd18},
+{ 0x8 , toshiba_720p_video_on_cmd19},
+{ 0x4 , toshiba_720p_video_on_cmd20},
+{ 0x8 , toshiba_720p_video_on_cmd21},
+{ 0xc , toshiba_720p_video_on_cmd22},
+{ 0x10 , toshiba_720p_video_on_cmd23},
+{ 0x10 , toshiba_720p_video_on_cmd24},
+{ 0x4 , toshiba_720p_video_on_cmd25},
+{ 0x4 , toshiba_720p_video_on_cmd26},
+{ 0x4 , toshiba_720p_video_on_cmd27}
+};
+#define TOSHIBA_720P_VIDEO_ON_COMMAND 28
+
+
+static char toshiba_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char toshiba_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd toshiba_720p_video_off_command[] = {
+{ 0x4 , toshiba_720p_videooff_cmd0},
+{ 0x4 , toshiba_720p_videooff_cmd1}
+};
+#define TOSHIBA_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state toshiba_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info toshiba_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info toshiba_720p_video_video_panel = {
+ 0, 0, 0, 0, 1, 1, 1, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration toshiba_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t toshiba_720p_video_timings[] = {
+ 0xb0, 0x23, 0x1b, 0x00, 0x94, 0x93, 0x1e, 0x25, 0x15, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd toshiba_720p_video_rotation[] = {
+
+};
+#define TOSHIBA_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing toshiba_720p_video_timing_info = {
+ 0x0, 0x04, 0x04, 0x1b
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight toshiba_720p_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_TOSHIBA_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/oem_panel.c b/dev/gcdb/display/oem_panel.c
new file mode 100755
index 0000000..b1e19e9
--- /dev/null
+++ b/dev/gcdb/display/oem_panel.c
@@ -0,0 +1,281 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <board.h>
+#include <mipi_dsi.h>
+
+#include "include/panel.h"
+#include "panel_display.h"
+
+/*---------------------------------------------------------------------------*/
+/* GCDB Panel Database */
+/*---------------------------------------------------------------------------*/
+#include "include/panel_toshiba_720p_video.h"
+#include "include/panel_nt35590_720p_video.h"
+#include "include/panel_nt35590_720p_cmd.h"
+#include "include/panel_hx8394a_720p_video.h"
+#include "include/panel_nt35596_1080p_video.h"
+#include "include/panel_nt35521_720p_video.h"
+
+/*---------------------------------------------------------------------------*/
+/* static panel selection variable */
+/*---------------------------------------------------------------------------*/
+enum {
+TOSHIBA_720P_VIDEO_PANEL,
+NT35590_720P_CMD_PANEL,
+NT35590_720P_VIDEO_PANEL,
+NT35596_1080P_VIDEO_PANEL,
+HX8394A_720P_VIDEO_PANEL,
+NT35521_720P_VIDEO_PANEL
+};
+
+static uint32_t panel_id;
+
+int oem_panel_rotation()
+{
+ int ret = NO_ERROR;
+ switch (panel_id) {
+ case TOSHIBA_720P_VIDEO_PANEL:
+ ret = mipi_dsi_cmds_tx(toshiba_720p_video_rotation,
+ TOSHIBA_720P_VIDEO_ROTATION);
+ break;
+ case NT35590_720P_CMD_PANEL:
+ ret = mipi_dsi_cmds_tx(nt35590_720p_cmd_rotation,
+ NT35590_720P_CMD_ROTATION);
+ break;
+ case NT35590_720P_VIDEO_PANEL:
+ ret = mipi_dsi_cmds_tx(nt35590_720p_video_rotation,
+ NT35590_720P_VIDEO_ROTATION);
+ break;
+ }
+
+ return ret;
+}
+
+
+int oem_panel_on()
+{
+ /* OEM can keep there panel spefic on instructions in this
+ function */
+ return NO_ERROR;
+}
+
+int oem_panel_off()
+{
+ /* OEM can keep there panel spefic off instructions in this
+ function */
+ return NO_ERROR;
+}
+
+static void init_panel_data(struct panel_struct *panelstruct,
+ struct msm_panel_info *pinfo,
+ struct mdss_dsi_phy_ctrl *phy_db)
+{
+ switch (panel_id) {
+ case TOSHIBA_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &toshiba_720p_video_panel_data;
+ panelstruct->panelres = &toshiba_720p_video_panel_res;
+ panelstruct->color = &toshiba_720p_video_color;
+ panelstruct->videopanel = &toshiba_720p_video_video_panel;
+ panelstruct->commandpanel = &toshiba_720p_video_command_panel;
+ panelstruct->state = &toshiba_720p_video_state;
+ panelstruct->laneconfig = &toshiba_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &toshiba_720p_video_timing_info;
+ panelstruct->backlightinfo = &toshiba_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = toshiba_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = TOSHIBA_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ toshiba_720p_video_timings, TIMING_SIZE);
+ break;
+ case NT35590_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35590_720p_video_panel_data;
+ panelstruct->panelres = &nt35590_720p_video_panel_res;
+ panelstruct->color = &nt35590_720p_video_color;
+ panelstruct->videopanel = &nt35590_720p_video_video_panel;
+ panelstruct->commandpanel = &nt35590_720p_video_command_panel;
+ panelstruct->state = &nt35590_720p_video_state;
+ panelstruct->laneconfig = &nt35590_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35590_720p_video_timing_info;
+ panelstruct->backlightinfo = &nt35590_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35590_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35590_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35590_720p_video_timings, TIMING_SIZE);
+ break;
+ case NT35521_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35521_720p_video_panel_data;
+ panelstruct->panelres = &nt35521_720p_video_panel_res;
+ panelstruct->color = &nt35521_720p_video_color;
+ panelstruct->videopanel = &nt35521_720p_video_video_panel;
+ panelstruct->commandpanel = &nt35521_720p_video_command_panel;
+ panelstruct->state = &nt35521_720p_video_state;
+ panelstruct->laneconfig = &nt35521_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35521_720p_video_timing_info;
+ panelstruct->backlightinfo = &nt35521_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35521_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35521_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35521_720p_video_timings, TIMING_SIZE);
+ break;
+ case HX8394A_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &hx8394a_720p_video_panel_data;
+ panelstruct->panelres = &hx8394a_720p_video_panel_res;
+ panelstruct->color = &hx8394a_720p_video_color;
+ panelstruct->videopanel = &hx8394a_720p_video_video_panel;
+ panelstruct->commandpanel = &hx8394a_720p_video_command_panel;
+ panelstruct->state = &hx8394a_720p_video_state;
+ panelstruct->laneconfig = &hx8394a_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &hx8394a_720p_video_timing_info;
+ panelstruct->backlightinfo = &hx8394a_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = hx8394a_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = HX8394A_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ hx8394a_720p_video_timings, TIMING_SIZE);
+ break;
+
+ case NT35590_720P_CMD_PANEL:
+ panelstruct->paneldata = &nt35590_720p_cmd_panel_data;
+ panelstruct->panelres = &nt35590_720p_cmd_panel_res;
+ panelstruct->color = &nt35590_720p_cmd_color;
+ panelstruct->videopanel = &nt35590_720p_cmd_video_panel;
+ panelstruct->commandpanel = &nt35590_720p_cmd_command_panel;
+ panelstruct->state = &nt35590_720p_cmd_state;
+ panelstruct->laneconfig = &nt35590_720p_cmd_lane_config;
+ panelstruct->paneltiminginfo = &nt35590_720p_cmd_timing_info;
+ panelstruct->backlightinfo = &nt35590_720p_cmd_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35590_720p_cmd_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35590_720P_CMD_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35590_720p_cmd_timings, TIMING_SIZE);
+ break;
+ case NT35596_1080P_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35596_1080p_video_panel_data;
+ panelstruct->panelres = &nt35596_1080p_video_panel_res;
+ panelstruct->color = &nt35596_1080p_video_color;
+ panelstruct->videopanel = &nt35596_1080p_video_video_panel;
+ panelstruct->commandpanel = &nt35596_1080p_video_command_panel;
+ panelstruct->state = &nt35596_1080p_video_state;
+ panelstruct->laneconfig = &nt35596_1080p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35596_1080p_video_timing_info;
+ panelstruct->backlightinfo
+ = &nt35596_1080p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35596_1080p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35596_1080P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35596_1080p_video_timings, TIMING_SIZE);
+ break;
+ }
+}
+
+bool oem_panel_select(struct panel_struct *panelstruct,
+ struct msm_panel_info *pinfo,
+ struct mdss_dsi_phy_ctrl *phy_db)
+{
+ uint32_t hw_id = board_hardware_id();
+ uint32_t platformid = board_platform_id();
+ uint32_t target_id = board_target_id();
+
+ switch (platformid) {
+ case MSM8974:
+ switch (hw_id) {
+ case HW_PLATFORM_FLUID:
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ panel_id = TOSHIBA_720P_VIDEO_PANEL;
+ break;
+ default:
+ dprintf(CRITICAL, "Display not enabled for %d HW type\n"
+ , hw_id);
+ return false;
+ }
+ break;
+ case MSM8826:
+ case MSM8626:
+ case MSM8226:
+ case MSM8926:
+ case MSM8126:
+ case MSM8326:
+ case APQ8026:
+ switch (hw_id) {
+ case HW_PLATFORM_QRD:
+ if (board_hardware_subtype() == 2) {
+ panel_id = NT35521_720P_VIDEO_PANEL;
+ } else {
+ if (((target_id >> 16) & 0xFF) == 0x1) //EVT
+ panel_id = NT35590_720P_VIDEO_PANEL;
+ else if (((target_id >> 16) & 0xFF) == 0x2) //DVT
+ panel_id = HX8394A_720P_VIDEO_PANEL;
+ else {
+ dprintf(CRITICAL, "Not supported device, target_id=%x\n"
+ , target_id);
+ return false;
+ }
+ }
+ break;
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ panel_id = NT35590_720P_VIDEO_PANEL;
+ break;
+ default:
+ dprintf(CRITICAL, "Display not enabled for %d HW type\n"
+ , hw_id);
+ return false;
+ }
+ break;
+ default:
+ dprintf(CRITICAL, "GCDB:Display: Platform id:%d not supported\n"
+ , platformid);
+ return false;
+ }
+
+ init_panel_data(panelstruct, pinfo, phy_db);
+
+ return true;
+}
diff --git a/dev/gcdb/display/panel_display.c b/dev/gcdb/display/panel_display.c
new file mode 100644
index 0000000..da69f20
--- /dev/null
+++ b/dev/gcdb/display/panel_display.c
@@ -0,0 +1,285 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <platform/iomap.h>
+#include <err.h>
+#include <reg.h>
+#include <mdp5.h>
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Header */
+/*---------------------------------------------------------------------------*/
+#include "panel_display.h"
+#include "include/panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel Init */
+/*---------------------------------------------------------------------------*/
+int dsi_panel_init(struct msm_panel_info *pinfo,
+ struct panel_struct *pstruct)
+{
+ /* Resolution setting*/
+ pinfo->xres = pstruct->panelres->panel_width;
+ pinfo->yres = pstruct->panelres->panel_height;
+ pinfo->lcdc.h_back_porch = pstruct->panelres->hback_porch;
+ pinfo->lcdc.h_front_porch = pstruct->panelres->hfront_porch;
+ pinfo->lcdc.h_pulse_width = pstruct->panelres->hpulse_width;
+ pinfo->lcdc.v_back_porch = pstruct->panelres->vback_porch;
+ pinfo->lcdc.v_front_porch = pstruct->panelres->vfront_porch;
+ pinfo->lcdc.v_pulse_width = pstruct->panelres->vpulse_width;
+ pinfo->lcdc.hsync_skew = pstruct->panelres->hsync_skew;
+ pinfo->lcdc.xres_pad = pstruct->panelres->hleft_border +
+ pstruct->panelres->hright_border;
+ pinfo->lcdc.yres_pad = pstruct->panelres->vtop_border +
+ pstruct->panelres->vbottom_border;
+
+ pinfo->lcdc.dual_pipe = (pstruct->paneldata->panel_operating_mode
+ & 0x2);
+ pinfo->lcdc.pipe_swap = (pstruct->paneldata->panel_operating_mode
+ & 0x4);
+
+ /* Color setting*/
+ pinfo->lcdc.border_clr = pstruct->color->border_color;
+ pinfo->lcdc.underflow_clr = pstruct->color->underflow_color;
+ pinfo->mipi.rgb_swap = pstruct->color->color_order;
+ switch (pinfo->bpp) {
+ case BPP_16:
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB565;
+ break;
+ case BPP_18:
+ if (pstruct->color->pixel_packing)
+ pinfo->mipi.dst_format
+ = DSI_VIDEO_DST_FORMAT_RGB666_LOOSE;
+ else
+ pinfo->mipi.dst_format
+ = DSI_VIDEO_DST_FORMAT_RGB666;
+ break;
+ case BPP_24:
+ default:
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ break;
+ }
+
+ /* Panel generic info */
+ pinfo->mipi.mode = pstruct->paneldata->panel_type;
+ if (pinfo->mipi.mode) {
+ pinfo->type = MIPI_CMD_PANEL;
+ } else {
+ pinfo->type = MIPI_VIDEO_PANEL;
+ }
+ pinfo->bpp = pstruct->color->color_format;
+ pinfo->clk_rate = pstruct->paneldata->panel_clockrate;
+ pinfo->rotation = pstruct->paneldata->panel_orientation;
+ pinfo->mipi.interleave_mode = pstruct->paneldata->interleave_mode;
+ pinfo->broadcastmode = pstruct->paneldata->panel_broadcast_mode;
+ pinfo->lowpowerstop = pstruct->paneldata->dsi_lp11_atinit;
+ pinfo->mipi.vc = pstruct->paneldata->dsi_virtualchannel_id;
+ pinfo->mipi.frame_rate = pstruct->paneldata->panel_framerate;
+ pinfo->mipi.stream = pstruct->paneldata->dsi_stream;
+ pinfo->mipi.dual_dsi = (pstruct->paneldata->panel_operating_mode
+ & 0x1);
+ pinfo->mipi.bitclock = pstruct->paneldata->panel_bitclock_freq;
+
+ /* Video Panel configuration */
+ pinfo->mipi.pulse_mode_hsa_he = pstruct->videopanel->hsync_pulse;
+ pinfo->mipi.hfp_power_stop = pstruct->videopanel->hfp_power_mode;
+ pinfo->mipi.hbp_power_stop = pstruct->videopanel->hbp_power_mode;
+ pinfo->mipi.hsa_power_stop = pstruct->videopanel->hsa_power_mode;
+ pinfo->mipi.eof_bllp_power_stop
+ = pstruct->videopanel->bllp_eof_power_mode;
+ pinfo->mipi.bllp_power_stop = pstruct->videopanel->bllp_power_mode;
+ pinfo->mipi.traffic_mode = pstruct->videopanel->traffic_mode;
+ pinfo->mipi.eof_bllp_power = pstruct->videopanel->bllp_eof_power;
+
+ /* Command Panel configuratoin */
+ pinfo->mipi.insert_dcs_cmd = pstruct->commandpanel->tedcs_command;
+ pinfo->mipi.wr_mem_continue
+ = pstruct->commandpanel->tevsync_continue_lines;
+ pinfo->mipi.wr_mem_start
+ = pstruct->commandpanel->tevsync_rdptr_irqline;
+ pinfo->mipi.te_sel = pstruct->commandpanel->tepin_select;
+
+ /* Data lane configuraiton */
+ pinfo->mipi.num_of_lanes = pstruct->laneconfig->dsi_lanes;
+ pinfo->mipi.data_lane0 = pstruct->laneconfig->lane0_state;
+ pinfo->mipi.data_lane1 = pstruct->laneconfig->lane1_state;
+ pinfo->mipi.data_lane2 = pstruct->laneconfig->lane2_state;
+ pinfo->mipi.data_lane3 = pstruct->laneconfig->lane3_state;
+ pinfo->mipi.lane_swap = pstruct->laneconfig->dsi_lanemap;
+
+ pinfo->mipi.t_clk_post = pstruct->paneltiminginfo->tclk_post;
+ pinfo->mipi.t_clk_pre = pstruct->paneltiminginfo->tclk_pre;
+ pinfo->mipi.mdp_trigger = pstruct->paneltiminginfo->dsi_mdp_trigger;
+ pinfo->mipi.dma_trigger = pstruct->paneltiminginfo->dsi_dma_trigger;
+
+ pinfo->on = dsi_panel_on;
+ pinfo->off = dsi_panel_off;
+ pinfo->rotate = dsi_panel_rotation;
+ pinfo->config = dsi_panel_config;
+
+ return NO_ERROR;
+}
+
+/*---------------------------------------------------------------------------*/
+/* Panel Callbacks */
+/*---------------------------------------------------------------------------*/
+
+int dsi_panel_on()
+{
+ return oem_panel_on();
+}
+
+int dsi_panel_off()
+{
+ return oem_panel_off();
+}
+
+int dsi_panel_rotation()
+{
+ return oem_panel_rotation();
+}
+
+int dsi_video_panel_config(struct msm_panel_info *pinfo,
+ struct lcdc_panel_info *plcdc
+ )
+{
+ int ret = NO_ERROR;
+ uint8_t lane_enable = 0;
+ uint32_t panel_width = pinfo->xres;
+
+ if (pinfo->mipi.dual_dsi)
+ panel_width = panel_width / 2;
+
+ if (pinfo->mipi.data_lane0)
+ lane_enable |= (1 << 0);
+ if (pinfo->mipi.data_lane1)
+ lane_enable |= (1 << 1);
+ if (pinfo->mipi.data_lane2)
+ lane_enable |= (1 << 2);
+ if (pinfo->mipi.data_lane3)
+ lane_enable |= (1 << 3);
+
+ ret = mdss_dsi_video_mode_config((panel_width + plcdc->xres_pad),
+ (pinfo->yres + plcdc->yres_pad),
+ (panel_width),
+ (pinfo->yres),
+ (plcdc->h_front_porch),
+ (plcdc->h_back_porch + plcdc->h_pulse_width),
+ (plcdc->v_front_porch),
+ (plcdc->v_back_porch + plcdc->v_pulse_width),
+ (plcdc->h_pulse_width),
+ (plcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_enable,
+ pinfo->lowpowerstop,
+ pinfo->mipi.eof_bllp_power,
+ pinfo->mipi.interleave_mode,
+ MIPI_DSI0_BASE);
+
+ if (pinfo->mipi.dual_dsi)
+ ret = mdss_dsi_video_mode_config(
+ (panel_width + plcdc->xres_pad),
+ (pinfo->yres + plcdc->yres_pad),
+ (panel_width),
+ (pinfo->yres),
+ (plcdc->h_front_porch),
+ (plcdc->h_back_porch + plcdc->h_pulse_width),
+ (plcdc->v_front_porch),
+ (plcdc->v_back_porch + plcdc->v_pulse_width),
+ (plcdc->h_pulse_width),
+ (plcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_enable,
+ pinfo->lowpowerstop,
+ pinfo->mipi.eof_bllp_power,
+ pinfo->mipi.interleave_mode,
+ MIPI_DSI1_BASE);
+
+ return ret;
+}
+
+int dsi_cmd_panel_config (struct msm_panel_info *pinfo,
+ struct lcdc_panel_info *plcdc)
+{
+ int ret = NO_ERROR;
+ uint8_t lane_en = 0;
+ uint8_t ystride = pinfo->bpp / 8;
+
+ if (pinfo->mipi.data_lane0)
+ lane_en |= (1 << 0);
+ if (pinfo->mipi.data_lane1)
+ lane_en |= (1 << 1);
+ if (pinfo->mipi.data_lane2)
+ lane_en |= (1 << 2);
+ if (pinfo->mipi.data_lane3)
+ lane_en |= (1 << 3);
+
+ ret = mdss_dsi_cmd_mode_config((pinfo->xres + plcdc->xres_pad),
+ (pinfo->yres + plcdc->yres_pad),
+ (pinfo->xres), (pinfo->yres),
+ pinfo->mipi.dst_format,
+ ystride, lane_en,
+ pinfo->mipi.interleave_mode);
+
+ return ret;
+}
+
+
+int dsi_panel_config(void *pdata)
+{
+ int ret = NO_ERROR;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *)pdata;
+ struct lcdc_panel_info *plcdc = NULL;
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ plcdc = &(pinfo->lcdc);
+ if (plcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+
+ if (pinfo->mipi.mode == DSI_VIDEO_MODE) {
+ ret = dsi_video_panel_config(pinfo, plcdc);
+ } else {
+ ret = dsi_cmd_panel_config(pinfo, plcdc);
+ }
+
+ return ret;
+}
diff --git a/dev/gcdb/display/panel_display.h b/dev/gcdb/display/panel_display.h
new file mode 100755
index 0000000..195a82c
--- /dev/null
+++ b/dev/gcdb/display/panel_display.h
@@ -0,0 +1,74 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_DISPLAY_H_
+#define _PANEL_DISPLAY_H_
+
+/*---------------------------------------------------------------------------*/
+/* MACRO definition */
+/*---------------------------------------------------------------------------*/
+
+#define BPP_16 16
+#define BPP_18 18
+#define BPP_24 24
+
+#define TIMING_SIZE 48
+/*---------------------------------------------------------------------------*/
+/* struct definition */
+/*---------------------------------------------------------------------------*/
+typedef struct panel_struct{
+ struct panel_config *paneldata;
+ struct panel_resolution *panelres;
+ struct color_info *color;
+ struct videopanel_info *videopanel;
+ struct commandpanel_info *commandpanel;
+ struct command_state *state;
+ struct lane_configuration *laneconfig;
+ struct panel_timing *paneltiminginfo;
+ struct backlight *backlightinfo;
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* API */
+/*---------------------------------------------------------------------------*/
+int dsi_panel_init(struct msm_panel_info *pinfo,
+ struct panel_struct *pstruct);
+
+int dsi_panel_on();
+int dsi_panel_off();
+int dsi_panel_rotation();
+int dsi_panel_config(void *);
+
+/* This should be implemented by oem */
+int oem_panel_rotation();
+int oem_panel_on();
+int oem_panel_off();
+
+#endif /*_PLATFORM_DISPLAY_H_ */
diff --git a/dev/gcdb/display/rules.mk b/dev/gcdb/display/rules.mk
new file mode 100755
index 0000000..438c6c7
--- /dev/null
+++ b/dev/gcdb/display/rules.mk
@@ -0,0 +1,9 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include
+
+OBJS += \
+ $(LOCAL_DIR)/gcdb_display.o \
+ $(LOCAL_DIR)/panel_display.o \
+ $(LOCAL_DIR)/oem_panel.o \
+ $(LOCAL_DIR)/gcdb_autopll.o
diff --git a/dev/panel/msm/edp_auo_1080p.c b/dev/panel/msm/edp_auo_1080p.c
new file mode 100644
index 0000000..42aa021
--- /dev/null
+++ b/dev/panel/msm/edp_auo_1080p.c
@@ -0,0 +1,87 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <edp.h>
+#include <msm_panel.h>
+
+static void edp_auo_1080p_init_edid_data(struct edp_edid *edid)
+{
+ edid->id_name[0] = 'A';
+ edid->id_name[0] = 'U';
+ edid->id_name[0] = 'O';
+ edid->id_name[0] = 0;
+ edid->id_product = 0x305D;
+ edid->version = 1;
+ edid->revision = 4;
+ edid->ext_block_cnt = 0;
+ edid->video_digital = 0x5;
+ edid->color_depth = 6;
+ edid->dpm = 0;
+ edid->color_format = 0;
+ edid->timing[0].pclk = 138500000;
+ edid->timing[0].h_addressable = 1920;
+ edid->timing[0].h_blank = 160;
+ edid->timing[0].v_addressable = 1080;
+ edid->timing[0].v_blank = 30;
+ edid->timing[0].h_fporch = 48;
+ edid->timing[0].h_sync_pulse = 32;
+ edid->timing[0].v_sync_pulse = 14;
+ edid->timing[0].v_fporch = 8;
+ edid->timing[0].width_mm = 256;
+ edid->timing[0].height_mm = 144;
+ edid->timing[0].h_border = 0;
+ edid->timing[0].v_border = 0;
+ edid->timing[0].interlaced = 0;
+ edid->timing[0].stereo = 0;
+ edid->timing[0].sync_type = 1;
+ edid->timing[0].sync_separate = 1;
+ edid->timing[0].vsync_pol = 0;
+ edid->timing[0].hsync_pol = 0;
+
+}
+
+static void edp_auo_1080p_init_dpcd_data(struct dpcd_cap *cap)
+{
+ cap->max_lane_count = 2;
+ cap->max_link_clk = 270;
+}
+
+void edp_auo_1080p_init(struct edp_panel_data *edp_panel)
+{
+ if (!edp_panel->panel_data) {
+ dprintf(CRITICAL, "%s(), panel_data is null", __func__);
+ return;
+ }
+
+ edp_auo_1080p_init_edid_data(&(edp_panel->edid));
+ edp_auo_1080p_init_dpcd_data(&(edp_panel->dpcd));
+ edp_edid2pinfo(edp_panel);
+
+ edp_panel->panel_data->panel_info.on = edp_on;
+ edp_panel->panel_data->panel_info.off = edp_off;
+}
diff --git a/dev/panel/msm/mipi_nt35590_cmd_720p.c b/dev/panel/msm/mipi_nt35590_cmd_720p.c
new file mode 100644
index 0000000..6629aa6
--- /dev/null
+++ b/dev/panel/msm/mipi_nt35590_cmd_720p.c
@@ -0,0 +1,2482 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <mdp5.h>
+#include <debug.h>
+
+static char disp_on0[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on1[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x26, 0x08, 0xFF, 0xFF,
+};
+static char disp_on2[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x26, 0x00, 0xFF, 0xFF,
+};
+static char disp_on3[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x00, 0xFF, 0xFF,
+};
+static char lane[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBA, 0x03, 0xFF, 0xFF,
+};
+static char command_mode[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0x08, 0xFF, 0xFF,
+};
+static char video_mode[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0x03, 0xFF, 0xFF,
+};
+static char disp_on6[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x01, 0xFF, 0xFF,
+};
+static char disp_on7[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on8[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x00, 0x4A, 0xFF, 0xFF,
+};
+static char disp_on9[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x01, 0x33, 0xFF, 0xFF,
+};
+static char disp_on10[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x02, 0x53, 0xFF, 0xFF,
+};
+static char disp_on11[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x03, 0x55, 0xFF, 0xFF,
+};
+static char disp_on12[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x04, 0x55, 0xFF, 0xFF,
+};
+static char disp_on13[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x05, 0x33, 0xFF, 0xFF,
+};
+static char disp_on14[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x06, 0x22, 0xFF, 0xFF,
+};
+static char disp_on15[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x08, 0x56, 0xFF, 0xFF,
+};
+static char disp_on16[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x09, 0x8F, 0xFF, 0xFF,
+};
+static char disp_on17[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x36, 0x73, 0xFF, 0xFF,
+};
+static char disp_on18[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0B, 0x9F, 0xFF, 0xFF,
+};
+static char disp_on19[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0C, 0x9F, 0xFF, 0xFF,
+};
+static char disp_on20[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0D, 0x2F, 0xFF, 0xFF,
+};
+static char disp_on21[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0E, 0x24, 0xFF, 0xFF,
+};
+static char disp_on22[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x83, 0xFF, 0xFF,
+};
+static char disp_on23[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x03, 0xFF, 0xFF,
+};
+static char disp_on24[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x71, 0x2C, 0xFF, 0xFF,
+};
+static char disp_on25[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on26[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0F, 0x0A, 0xFF, 0xFF,
+};
+static char disp_on27[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x05, 0xFF, 0xFF,
+};
+static char disp_on28[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on29[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x01, 0x00, 0xFF, 0xFF,
+};
+static char disp_on30[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x02, 0x8B, 0xFF, 0xFF,
+};
+static char disp_on31[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x03, 0x82, 0xFF, 0xFF,
+};
+static char disp_on32[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x04, 0x82, 0xFF, 0xFF,
+};
+static char disp_on33[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x05, 0x30, 0xFF, 0xFF,
+};
+static char disp_on34[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x06, 0x33, 0xFF, 0xFF,
+};
+static char disp_on35[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x07, 0x01, 0xFF, 0xFF,
+};
+static char disp_on36[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x08, 0x00, 0xFF, 0xFF,
+};
+static char disp_on37[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x09, 0x46, 0xFF, 0xFF,
+};
+static char disp_on38[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0A, 0x46, 0xFF, 0xFF,
+};
+static char disp_on39[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0D, 0x0B, 0xFF, 0xFF,
+};
+static char disp_on40[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0E, 0x1D, 0xFF, 0xFF,
+};
+static char disp_on41[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0F, 0x08, 0xFF, 0xFF,
+};
+static char disp_on42[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x10, 0x53, 0xFF, 0xFF,
+};
+static char disp_on43[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x00, 0xFF, 0xFF,
+};
+static char disp_on44[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x00, 0xFF, 0xFF,
+};
+static char disp_on45[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x14, 0x01, 0xFF, 0xFF,
+};
+static char disp_on46[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x15, 0x00, 0xFF, 0xFF,
+};
+static char disp_on47[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x16, 0x05, 0xFF, 0xFF,
+};
+static char disp_on48[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x17, 0x00, 0xFF, 0xFF,
+};
+static char disp_on49[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x19, 0x7F, 0xFF, 0xFF,
+};
+static char disp_on50[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1A, 0xFF, 0xFF, 0xFF,
+};
+static char disp_on51[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1B, 0x0F, 0xFF, 0xFF,
+};
+static char disp_on52[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1C, 0x00, 0xFF, 0xFF,
+};
+static char disp_on53[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on54[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1E, 0x00, 0xFF, 0xFF,
+};
+static char disp_on55[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1F, 0x07, 0xFF, 0xFF,
+};
+static char disp_on56[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x20, 0x00, 0xFF, 0xFF,
+};
+static char disp_on57[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x21, 0x06, 0xFF, 0xFF,
+};
+static char disp_on58[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x22, 0x55, 0xFF, 0xFF,
+};
+static char disp_on59[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x23, 0x4D, 0xFF, 0xFF,
+};
+static char disp_on60[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2D, 0x02, 0xFF, 0xFF,
+};
+static char disp_on61[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x28, 0x01, 0xFF, 0xFF,
+};
+static char disp_on62[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2F, 0x02, 0xFF, 0xFF,
+};
+static char disp_on63[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x83, 0x01, 0xFF, 0xFF,
+};
+static char disp_on64[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9E, 0x58, 0xFF, 0xFF,
+};
+static char disp_on65[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9F, 0x6A, 0xFF, 0xFF,
+};
+static char disp_on66[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA0, 0x01, 0xFF, 0xFF,
+};
+static char disp_on67[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA2, 0x10, 0xFF, 0xFF,
+};
+static char disp_on68[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBB, 0x0A, 0xFF, 0xFF,
+};
+static char disp_on69[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBC, 0x0A, 0xFF, 0xFF,
+};
+static char disp_on70[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x32, 0x08, 0xFF, 0xFF,
+};
+static char disp_on71[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x33, 0xB8, 0xFF, 0xFF,
+};
+static char disp_on72[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x36, 0x01, 0xFF, 0xFF,
+};
+static char disp_on73[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x37, 0x00, 0xFF, 0xFF,
+};
+static char disp_on74[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x43, 0x00, 0xFF, 0xFF,
+};
+static char disp_on75[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4B, 0x21, 0xFF, 0xFF,
+};
+static char disp_on76[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4C, 0x03, 0xFF, 0xFF,
+};
+static char disp_on77[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x50, 0x21, 0xFF, 0xFF,
+};
+static char disp_on78[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x51, 0x03, 0xFF, 0xFF,
+};
+static char disp_on79[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x58, 0x21, 0xFF, 0xFF,
+};
+static char disp_on80[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x59, 0x03, 0xFF, 0xFF,
+};
+static char disp_on81[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5D, 0x21, 0xFF, 0xFF,
+};
+static char disp_on82[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5E, 0x03, 0xFF, 0xFF,
+};
+static char disp_on83[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6C, 0x00, 0xFF, 0xFF,
+};
+static char disp_on84[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on85[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on86[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x01, 0xFF, 0xFF,
+};
+static char disp_on87[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on88[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x75, 0x00, 0xFF, 0xFF,
+};
+static char disp_on89[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x76, 0x7D, 0xFF, 0xFF,
+};
+static char disp_on90[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x77, 0x00, 0xFF, 0xFF,
+};
+static char disp_on91[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x78, 0x8A, 0xFF, 0xFF,
+};
+static char disp_on92[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x79, 0x00, 0xFF, 0xFF,
+};
+static char disp_on93[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7A, 0x9C, 0xFF, 0xFF,
+};
+static char disp_on94[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7B, 0x00, 0xFF, 0xFF,
+};
+static char disp_on95[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7C, 0xB1, 0xFF, 0xFF,
+};
+static char disp_on96[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on97[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7E, 0xBF, 0xFF, 0xFF,
+};
+static char disp_on98[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7F, 0x00, 0xFF, 0xFF,
+};
+static char disp_on99[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x80, 0xCF, 0xFF, 0xFF,
+};
+static char disp_on100[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x81, 0x00, 0xFF, 0xFF,
+};
+static char disp_on101[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x82, 0xDD, 0xFF, 0xFF,
+};
+static char disp_on102[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x83, 0x00, 0xFF, 0xFF,
+};
+static char disp_on103[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x84, 0xE8, 0xFF, 0xFF,
+};
+static char disp_on104[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x85, 0x00, 0xFF, 0xFF,
+};
+static char disp_on105[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x86, 0xF2, 0xFF, 0xFF,
+};
+static char disp_on106[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x87, 0x01, 0xFF, 0xFF,
+};
+static char disp_on107[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x88, 0x1F, 0xFF, 0xFF,
+};
+static char disp_on108[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x89, 0x01, 0xFF, 0xFF,
+};
+static char disp_on109[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8A, 0x41, 0xFF, 0xFF,
+};
+static char disp_on110[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8B, 0x01, 0xFF, 0xFF,
+};
+static char disp_on111[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8C, 0x78, 0xFF, 0xFF,
+};
+static char disp_on112[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8D, 0x01, 0xFF, 0xFF,
+};
+static char disp_on113[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8E, 0xA5, 0xFF, 0xFF,
+};
+static char disp_on114[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8F, 0x01, 0xFF, 0xFF,
+};
+static char disp_on115[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x90, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on116[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x91, 0x02, 0xFF, 0xFF,
+};
+static char disp_on117[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x92, 0x29, 0xFF, 0xFF,
+};
+static char disp_on118[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x93, 0x02, 0xFF, 0xFF,
+};
+static char disp_on119[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x94, 0x2A, 0xFF, 0xFF,
+};
+static char disp_on120[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x95, 0x02, 0xFF, 0xFF,
+};
+static char disp_on121[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x96, 0x5D, 0xFF, 0xFF,
+};
+static char disp_on122[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x97, 0x02, 0xFF, 0xFF,
+};
+static char disp_on123[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x98, 0x93, 0xFF, 0xFF,
+};
+static char disp_on124[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x99, 0x02, 0xFF, 0xFF,
+};
+static char disp_on125[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9A, 0xB8, 0xFF, 0xFF,
+};
+static char disp_on126[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9B, 0x02, 0xFF, 0xFF,
+};
+static char disp_on127[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9C, 0xE7, 0xFF, 0xFF,
+};
+static char disp_on128[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on129[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9E, 0x07, 0xFF, 0xFF,
+};
+static char disp_on130[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on131[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA0, 0x37, 0xFF, 0xFF,
+};
+static char disp_on132[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA2, 0x03, 0xFF, 0xFF,
+};
+static char disp_on133[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA3, 0x46, 0xFF, 0xFF,
+};
+static char disp_on134[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA4, 0x03, 0xFF, 0xFF,
+};
+static char disp_on135[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA5, 0x56, 0xFF, 0xFF,
+};
+static char disp_on136[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA6, 0x03, 0xFF, 0xFF,
+};
+static char disp_on137[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA7, 0x66, 0xFF, 0xFF,
+};
+static char disp_on138[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on139[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAA, 0x7A, 0xFF, 0xFF,
+};
+static char disp_on140[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on141[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAC, 0x93, 0xFF, 0xFF,
+};
+static char disp_on142[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on143[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAE, 0xA3, 0xFF, 0xFF,
+};
+static char disp_on144[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAF, 0x03, 0xFF, 0xFF,
+};
+static char disp_on145[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB0, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on146[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB1, 0x03, 0xFF, 0xFF,
+};
+static char disp_on147[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB2, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on148[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on149[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB4, 0x7D, 0xFF, 0xFF,
+};
+static char disp_on150[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB5, 0x00, 0xFF, 0xFF,
+};
+static char disp_on151[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB6, 0x8A, 0xFF, 0xFF,
+};
+static char disp_on152[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB7, 0x00, 0xFF, 0xFF,
+};
+static char disp_on153[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB8, 0x9C, 0xFF, 0xFF,
+};
+static char disp_on154[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB9, 0x00, 0xFF, 0xFF,
+};
+static char disp_on155[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBA, 0xB1, 0xFF, 0xFF,
+};
+static char disp_on156[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBB, 0x00, 0xFF, 0xFF,
+};
+static char disp_on157[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBC, 0xBF, 0xFF, 0xFF,
+};
+static char disp_on158[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBD, 0x00, 0xFF, 0xFF,
+};
+static char disp_on159[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBE, 0xCF, 0xFF, 0xFF,
+};
+static char disp_on160[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on161[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC0, 0xDD, 0xFF, 0xFF,
+};
+static char disp_on162[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on163[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0xE8, 0xFF, 0xFF,
+};
+static char disp_on164[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on165[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC4, 0xF2, 0xFF, 0xFF,
+};
+static char disp_on166[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC5, 0x01, 0xFF, 0xFF,
+};
+static char disp_on167[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC6, 0x1F, 0xFF, 0xFF,
+};
+static char disp_on168[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC7, 0x01, 0xFF, 0xFF,
+};
+static char disp_on169[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC8, 0x41, 0xFF, 0xFF,
+};
+static char disp_on170[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC9, 0x01, 0xFF, 0xFF,
+};
+static char disp_on171[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCA, 0x78, 0xFF, 0xFF,
+};
+static char disp_on172[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on173[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCC, 0xA5, 0xFF, 0xFF,
+};
+static char disp_on174[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCD, 0x01, 0xFF, 0xFF,
+};
+static char disp_on175[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCE, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on176[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on177[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD0, 0x29, 0xFF, 0xFF,
+};
+static char disp_on178[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD1, 0x02, 0xFF, 0xFF,
+};
+static char disp_on179[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD2, 0x2A, 0xFF, 0xFF,
+};
+static char disp_on180[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD3, 0x02, 0xFF, 0xFF,
+};
+static char disp_on181[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD4, 0x5D, 0xFF, 0xFF,
+};
+static char disp_on182[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD5, 0x02, 0xFF, 0xFF,
+};
+static char disp_on183[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD6, 0x93, 0xFF, 0xFF,
+};
+static char disp_on184[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD7, 0x02, 0xFF, 0xFF,
+};
+static char disp_on185[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD8, 0xB8, 0xFF, 0xFF,
+};
+static char disp_on186[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD9, 0x02, 0xFF, 0xFF,
+};
+static char disp_on187[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDA, 0xE7, 0xFF, 0xFF,
+};
+static char disp_on188[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on189[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDC, 0x07, 0xFF, 0xFF,
+};
+static char disp_on190[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on191[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDE, 0x37, 0xFF, 0xFF,
+};
+static char disp_on192[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDF, 0x03, 0xFF, 0xFF,
+};
+static char disp_on193[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE0, 0x46, 0xFF, 0xFF,
+};
+static char disp_on194[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE1, 0x03, 0xFF, 0xFF,
+};
+static char disp_on195[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE2, 0x56, 0xFF, 0xFF,
+};
+static char disp_on196[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE3, 0x03, 0xFF, 0xFF,
+};
+static char disp_on197[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE4, 0x66, 0xFF, 0xFF,
+};
+static char disp_on198[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE5, 0x03, 0xFF, 0xFF,
+};
+static char disp_on199[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE6, 0x7A, 0xFF, 0xFF,
+};
+static char disp_on200[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE7, 0x03, 0xFF, 0xFF,
+};
+static char disp_on201[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE8, 0x93, 0xFF, 0xFF,
+};
+static char disp_on202[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on203[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEA, 0xA3, 0xFF, 0xFF,
+};
+static char disp_on204[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on205[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEC, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on206[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xED, 0x03, 0xFF, 0xFF,
+};
+static char disp_on207[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEE, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on208[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on209[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF0, 0xED, 0xFF, 0xFF,
+};
+static char disp_on210[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on211[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF2, 0xF3, 0xFF, 0xFF,
+};
+static char disp_on212[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on213[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF4, 0xFE, 0xFF, 0xFF,
+};
+static char disp_on214[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF5, 0x01, 0xFF, 0xFF,
+};
+static char disp_on215[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF6, 0x09, 0xFF, 0xFF,
+};
+static char disp_on216[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF7, 0x01, 0xFF, 0xFF,
+};
+static char disp_on217[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF8, 0x13, 0xFF, 0xFF,
+};
+static char disp_on218[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF9, 0x01, 0xFF, 0xFF,
+};
+static char disp_on219[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFA, 0x1D, 0xFF, 0xFF,
+};
+static char disp_on220[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on221[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on222[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x00, 0x01, 0xFF, 0xFF,
+};
+static char disp_on223[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x01, 0x26, 0xFF, 0xFF,
+};
+static char disp_on224[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x02, 0x01, 0xFF, 0xFF,
+};
+static char disp_on225[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x03, 0x2F, 0xFF, 0xFF,
+};
+static char disp_on226[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x04, 0x01, 0xFF, 0xFF,
+};
+static char disp_on227[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x05, 0x37, 0xFF, 0xFF,
+};
+static char disp_on228[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x06, 0x01, 0xFF, 0xFF,
+};
+static char disp_on229[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x07, 0x56, 0xFF, 0xFF,
+};
+static char disp_on230[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x08, 0x01, 0xFF, 0xFF,
+};
+static char disp_on231[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x09, 0x70, 0xFF, 0xFF,
+};
+static char disp_on232[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on233[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0B, 0x9D, 0xFF, 0xFF,
+};
+static char disp_on234[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0C, 0x01, 0xFF, 0xFF,
+};
+static char disp_on235[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0D, 0xC2, 0xFF, 0xFF,
+};
+static char disp_on236[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0E, 0x01, 0xFF, 0xFF,
+};
+static char disp_on237[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0F, 0xFF, 0xFF, 0xFF,
+};
+static char disp_on238[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x10, 0x02, 0xFF, 0xFF,
+};
+static char disp_on239[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x31, 0xFF, 0xFF,
+};
+static char disp_on240[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x02, 0xFF, 0xFF,
+};
+static char disp_on241[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x13, 0x32, 0xFF, 0xFF,
+};
+static char disp_on242[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x14, 0x02, 0xFF, 0xFF,
+};
+static char disp_on243[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x15, 0x60, 0xFF, 0xFF,
+};
+static char disp_on244[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x16, 0x02, 0xFF, 0xFF,
+};
+static char disp_on245[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x17, 0x94, 0xFF, 0xFF,
+};
+static char disp_on246[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x18, 0x02, 0xFF, 0xFF,
+};
+static char disp_on247[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x19, 0xB5, 0xFF, 0xFF,
+};
+static char disp_on248[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1A, 0x02, 0xFF, 0xFF,
+};
+static char disp_on249[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1B, 0xE3, 0xFF, 0xFF,
+};
+static char disp_on250[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1C, 0x03, 0xFF, 0xFF,
+};
+static char disp_on251[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on252[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1E, 0x03, 0xFF, 0xFF,
+};
+static char disp_on253[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1F, 0x2D, 0xFF, 0xFF,
+};
+static char disp_on254[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x20, 0x03, 0xFF, 0xFF,
+};
+static char disp_on255[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x21, 0x3A, 0xFF, 0xFF,
+};
+static char disp_on256[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x22, 0x03, 0xFF, 0xFF,
+};
+static char disp_on257[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x23, 0x48, 0xFF, 0xFF,
+};
+static char disp_on258[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x24, 0x03, 0xFF, 0xFF,
+};
+static char disp_on259[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x25, 0x57, 0xFF, 0xFF,
+};
+static char disp_on260[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x26, 0x03, 0xFF, 0xFF,
+};
+static char disp_on261[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x27, 0x68, 0xFF, 0xFF,
+};
+static char disp_on262[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x28, 0x03, 0xFF, 0xFF,
+};
+static char disp_on263[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x29, 0x7B, 0xFF, 0xFF,
+};
+static char disp_on264[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2A, 0x03, 0xFF, 0xFF,
+};
+static char disp_on265[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2B, 0x90, 0xFF, 0xFF,
+};
+static char disp_on266[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on267[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2F, 0xA0, 0xFF, 0xFF,
+};
+static char disp_on268[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x30, 0x03, 0xFF, 0xFF,
+};
+static char disp_on269[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x31, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on270[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x32, 0x00, 0xFF, 0xFF,
+};
+static char disp_on271[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x33, 0xED, 0xFF, 0xFF,
+};
+static char disp_on272[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x34, 0x00, 0xFF, 0xFF,
+};
+static char disp_on273[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x35, 0xF3, 0xFF, 0xFF,
+};
+static char disp_on274[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x36, 0x00, 0xFF, 0xFF,
+};
+static char disp_on275[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x37, 0xFE, 0xFF, 0xFF,
+};
+static char disp_on276[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x38, 0x01, 0xFF, 0xFF,
+};
+static char disp_on277[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x39, 0x09, 0xFF, 0xFF,
+};
+static char disp_on278[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on279[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3B, 0x13, 0xFF, 0xFF,
+};
+static char disp_on280[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3D, 0x01, 0xFF, 0xFF,
+};
+static char disp_on281[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3F, 0x1D, 0xFF, 0xFF,
+};
+static char disp_on282[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x40, 0x01, 0xFF, 0xFF,
+};
+static char disp_on283[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x41, 0x26, 0xFF, 0xFF,
+};
+static char disp_on284[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x42, 0x01, 0xFF, 0xFF,
+};
+static char disp_on285[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x43, 0x2F, 0xFF, 0xFF,
+};
+static char disp_on286[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x44, 0x01, 0xFF, 0xFF,
+};
+static char disp_on287[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x45, 0x37, 0xFF, 0xFF,
+};
+static char disp_on288[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x46, 0x01, 0xFF, 0xFF,
+};
+static char disp_on289[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x47, 0x56, 0xFF, 0xFF,
+};
+static char disp_on290[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x48, 0x01, 0xFF, 0xFF,
+};
+static char disp_on291[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x49, 0x70, 0xFF, 0xFF,
+};
+static char disp_on292[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on293[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4B, 0x9D, 0xFF, 0xFF,
+};
+static char disp_on294[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4C, 0x01, 0xFF, 0xFF,
+};
+static char disp_on295[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4D, 0xC2, 0xFF, 0xFF,
+};
+static char disp_on296[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4E, 0x01, 0xFF, 0xFF,
+};
+static char disp_on297[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4F, 0xFF, 0xFF, 0xFF,
+};
+static char disp_on298[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x50, 0x02, 0xFF, 0xFF,
+};
+static char disp_on299[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x51, 0x31, 0xFF, 0xFF,
+};
+static char disp_on300[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x52, 0x02, 0xFF, 0xFF,
+};
+static char disp_on301[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x53, 0x32, 0xFF, 0xFF,
+};
+static char disp_on302[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x54, 0x02, 0xFF, 0xFF,
+};
+static char disp_on303[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x55, 0x60, 0xFF, 0xFF,
+};
+static char disp_on304[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x56, 0x02, 0xFF, 0xFF,
+};
+static char disp_on305[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x58, 0x94, 0xFF, 0xFF,
+};
+static char disp_on306[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x59, 0x02, 0xFF, 0xFF,
+};
+static char disp_on307[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5A, 0xB5, 0xFF, 0xFF,
+};
+static char disp_on308[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5B, 0x02, 0xFF, 0xFF,
+};
+static char disp_on309[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5C, 0xE3, 0xFF, 0xFF,
+};
+static char disp_on310[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on311[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5E, 0x03, 0xFF, 0xFF,
+};
+static char disp_on312[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on313[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x60, 0x2D, 0xFF, 0xFF,
+};
+static char disp_on314[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x61, 0x03, 0xFF, 0xFF,
+};
+static char disp_on315[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x62, 0x3A, 0xFF, 0xFF,
+};
+static char disp_on316[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x63, 0x03, 0xFF, 0xFF,
+};
+static char disp_on317[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x64, 0x48, 0xFF, 0xFF,
+};
+static char disp_on318[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x65, 0x03, 0xFF, 0xFF,
+};
+static char disp_on319[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x66, 0x57, 0xFF, 0xFF,
+};
+static char disp_on320[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x67, 0x03, 0xFF, 0xFF,
+};
+static char disp_on321[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x68, 0x68, 0xFF, 0xFF,
+};
+static char disp_on322[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x69, 0x03, 0xFF, 0xFF,
+};
+static char disp_on323[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6A, 0x7B, 0xFF, 0xFF,
+};
+static char disp_on324[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6B, 0x03, 0xFF, 0xFF,
+};
+static char disp_on325[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6C, 0x90, 0xFF, 0xFF,
+};
+static char disp_on326[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on327[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6E, 0xA0, 0xFF, 0xFF,
+};
+static char disp_on328[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on329[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x70, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on330[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x71, 0x00, 0xFF, 0xFF,
+};
+static char disp_on331[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x72, 0x19, 0xFF, 0xFF,
+};
+static char disp_on332[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x73, 0x00, 0xFF, 0xFF,
+};
+static char disp_on333[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x74, 0x36, 0xFF, 0xFF,
+};
+static char disp_on334[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x75, 0x00, 0xFF, 0xFF,
+};
+static char disp_on335[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x76, 0x55, 0xFF, 0xFF,
+};
+static char disp_on336[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x77, 0x00, 0xFF, 0xFF,
+};
+static char disp_on337[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x78, 0x70, 0xFF, 0xFF,
+};
+static char disp_on338[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x79, 0x00, 0xFF, 0xFF,
+};
+static char disp_on339[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7A, 0x83, 0xFF, 0xFF,
+};
+static char disp_on340[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7B, 0x00, 0xFF, 0xFF,
+};
+static char disp_on341[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7C, 0x99, 0xFF, 0xFF,
+};
+static char disp_on342[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on343[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7E, 0xA8, 0xFF, 0xFF,
+};
+static char disp_on344[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7F, 0x00, 0xFF, 0xFF,
+};
+static char disp_on345[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x80, 0xB7, 0xFF, 0xFF,
+};
+static char disp_on346[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x81, 0x00, 0xFF, 0xFF,
+};
+static char disp_on347[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x82, 0xC5, 0xFF, 0xFF,
+};
+static char disp_on348[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x83, 0x00, 0xFF, 0xFF,
+};
+static char disp_on349[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x84, 0xF7, 0xFF, 0xFF,
+};
+static char disp_on350[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x85, 0x01, 0xFF, 0xFF,
+};
+static char disp_on351[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x86, 0x1E, 0xFF, 0xFF,
+};
+static char disp_on352[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x87, 0x01, 0xFF, 0xFF,
+};
+static char disp_on353[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x88, 0x60, 0xFF, 0xFF,
+};
+static char disp_on354[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x89, 0x01, 0xFF, 0xFF,
+};
+static char disp_on355[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8A, 0x95, 0xFF, 0xFF,
+};
+static char disp_on356[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8B, 0x01, 0xFF, 0xFF,
+};
+static char disp_on357[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8C, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on358[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8D, 0x02, 0xFF, 0xFF,
+};
+static char disp_on359[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8E, 0x20, 0xFF, 0xFF,
+};
+static char disp_on360[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8F, 0x02, 0xFF, 0xFF,
+};
+static char disp_on361[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x90, 0x23, 0xFF, 0xFF,
+};
+static char disp_on362[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x91, 0x02, 0xFF, 0xFF,
+};
+static char disp_on363[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x92, 0x59, 0xFF, 0xFF,
+};
+static char disp_on364[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x93, 0x02, 0xFF, 0xFF,
+};
+static char disp_on365[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x94, 0x94, 0xFF, 0xFF,
+};
+static char disp_on366[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x95, 0x02, 0xFF, 0xFF,
+};
+static char disp_on367[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x96, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on368[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x97, 0x02, 0xFF, 0xFF,
+};
+static char disp_on369[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x98, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on370[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x99, 0x03, 0xFF, 0xFF,
+};
+static char disp_on371[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on372[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9B, 0x03, 0xFF, 0xFF,
+};
+static char disp_on373[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9C, 0x28, 0xFF, 0xFF,
+};
+static char disp_on374[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on375[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9E, 0x30, 0xFF, 0xFF,
+};
+static char disp_on376[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on377[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA0, 0x37, 0xFF, 0xFF,
+};
+static char disp_on378[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA2, 0x03, 0xFF, 0xFF,
+};
+static char disp_on379[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA3, 0x3B, 0xFF, 0xFF,
+};
+static char disp_on380[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA4, 0x03, 0xFF, 0xFF,
+};
+static char disp_on381[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA5, 0x40, 0xFF, 0xFF,
+};
+static char disp_on382[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA6, 0x03, 0xFF, 0xFF,
+};
+static char disp_on383[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA7, 0x50, 0xFF, 0xFF,
+};
+static char disp_on384[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on385[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAA, 0x6D, 0xFF, 0xFF,
+};
+static char disp_on386[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on387[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAC, 0x80, 0xFF, 0xFF,
+};
+static char disp_on388[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on389[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAE, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on390[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on391[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB0, 0x19, 0xFF, 0xFF,
+};
+static char disp_on392[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on393[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB2, 0x36, 0xFF, 0xFF,
+};
+static char disp_on394[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on395[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB4, 0x55, 0xFF, 0xFF,
+};
+static char disp_on396[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB5, 0x00, 0xFF, 0xFF,
+};
+static char disp_on397[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB6, 0x70, 0xFF, 0xFF,
+};
+static char disp_on398[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB7, 0x00, 0xFF, 0xFF,
+};
+static char disp_on399[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB8, 0x83, 0xFF, 0xFF,
+};
+static char disp_on400[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB9, 0x00, 0xFF, 0xFF,
+};
+static char disp_on401[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBA, 0x99, 0xFF, 0xFF,
+};
+static char disp_on402[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBB, 0x00, 0xFF, 0xFF,
+};
+static char disp_on403[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBC, 0xA8, 0xFF, 0xFF,
+};
+static char disp_on404[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBD, 0x00, 0xFF, 0xFF,
+};
+static char disp_on405[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBE, 0xB7, 0xFF, 0xFF,
+};
+static char disp_on406[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on407[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC0, 0xC5, 0xFF, 0xFF,
+};
+static char disp_on408[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on409[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0xF7, 0xFF, 0xFF,
+};
+static char disp_on410[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC3, 0x01, 0xFF, 0xFF,
+};
+static char disp_on411[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC4, 0x1E, 0xFF, 0xFF,
+};
+static char disp_on412[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC5, 0x01, 0xFF, 0xFF,
+};
+static char disp_on413[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC6, 0x60, 0xFF, 0xFF,
+};
+static char disp_on414[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC7, 0x01, 0xFF, 0xFF,
+};
+static char disp_on415[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC8, 0x95, 0xFF, 0xFF,
+};
+static char disp_on416[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC9, 0x01, 0xFF, 0xFF,
+};
+static char disp_on417[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCA, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on418[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCB, 0x02, 0xFF, 0xFF,
+};
+static char disp_on419[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCC, 0x20, 0xFF, 0xFF,
+};
+static char disp_on420[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCD, 0x02, 0xFF, 0xFF,
+};
+static char disp_on421[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCE, 0x23, 0xFF, 0xFF,
+};
+static char disp_on422[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on423[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD0, 0x59, 0xFF, 0xFF,
+};
+static char disp_on424[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD1, 0x02, 0xFF, 0xFF,
+};
+static char disp_on425[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD2, 0x94, 0xFF, 0xFF,
+};
+static char disp_on426[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD3, 0x02, 0xFF, 0xFF,
+};
+static char disp_on427[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD4, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on428[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD5, 0x02, 0xFF, 0xFF,
+};
+static char disp_on429[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD6, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on430[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD7, 0x03, 0xFF, 0xFF,
+};
+static char disp_on431[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD8, 0x01, 0xFF, 0xFF,
+};
+static char disp_on432[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on433[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDA, 0x28, 0xFF, 0xFF,
+};
+static char disp_on434[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on435[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDC, 0x30, 0xFF, 0xFF,
+};
+static char disp_on436[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on437[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDE, 0x37, 0xFF, 0xFF,
+};
+static char disp_on438[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDF, 0x03, 0xFF, 0xFF,
+};
+static char disp_on439[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE0, 0x3B, 0xFF, 0xFF,
+};
+static char disp_on440[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE1, 0x03, 0xFF, 0xFF,
+};
+static char disp_on441[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE2, 0x40, 0xFF, 0xFF,
+};
+static char disp_on442[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE3, 0x03, 0xFF, 0xFF,
+};
+static char disp_on443[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE4, 0x50, 0xFF, 0xFF,
+};
+static char disp_on444[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE5, 0x03, 0xFF, 0xFF,
+};
+static char disp_on445[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE6, 0x6D, 0xFF, 0xFF,
+};
+static char disp_on446[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE7, 0x03, 0xFF, 0xFF,
+};
+static char disp_on447[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE8, 0x80, 0xFF, 0xFF,
+};
+static char disp_on448[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on449[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEA, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on450[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x01, 0xFF, 0xFF,
+};
+static char disp_on451[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on452[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on453[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on454[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x04, 0xFF, 0xFF,
+};
+static char disp_on455[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on456[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on457[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x00, 0xFF, 0xFF,
+};
+static char disp_on458[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on459[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x50, 0xFF, 0xFF,
+};
+static char disp_on460[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x13, 0x02, 0xFF, 0xFF,
+};
+static char disp_on461[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6A, 0x60, 0xFF, 0xFF,
+};
+static char disp_on462[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on463[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x29, 0x00, 0xFF, 0xFF,
+};
+
+static struct mipi_dsi_cmd nt35590_panel_cmd_mode_cmds[] = {
+ {sizeof(disp_on0), (char *)disp_on0},
+ {sizeof(disp_on1), (char *)disp_on1},
+ {sizeof(disp_on2), (char *)disp_on2},
+ {sizeof(disp_on3), (char *)disp_on3},
+ {sizeof(lane), (char *)lane},
+ {sizeof(command_mode), (char *)command_mode},
+ {sizeof(disp_on6), (char *)disp_on6},
+ {sizeof(disp_on7), (char *)disp_on7},
+ {sizeof(disp_on8), (char *)disp_on8},
+ {sizeof(disp_on9), (char *)disp_on9},
+ {sizeof(disp_on10), (char *)disp_on10},
+ {sizeof(disp_on11), (char *)disp_on11},
+ {sizeof(disp_on12), (char *)disp_on12},
+ {sizeof(disp_on13), (char *)disp_on13},
+ {sizeof(disp_on14), (char *)disp_on14},
+ {sizeof(disp_on15), (char *)disp_on15},
+ {sizeof(disp_on16), (char *)disp_on16},
+ {sizeof(disp_on17), (char *)disp_on17},
+ {sizeof(disp_on18), (char *)disp_on18},
+ {sizeof(disp_on19), (char *)disp_on19},
+ {sizeof(disp_on20), (char *)disp_on20},
+ {sizeof(disp_on21), (char *)disp_on21},
+ {sizeof(disp_on22), (char *)disp_on22},
+ {sizeof(disp_on23), (char *)disp_on23},
+ {sizeof(disp_on24), (char *)disp_on24},
+ {sizeof(disp_on25), (char *)disp_on25},
+ {sizeof(disp_on26), (char *)disp_on26},
+ {sizeof(disp_on27), (char *)disp_on27},
+ {sizeof(disp_on28), (char *)disp_on28},
+ {sizeof(disp_on29), (char *)disp_on29},
+ {sizeof(disp_on30), (char *)disp_on30},
+ {sizeof(disp_on31), (char *)disp_on31},
+ {sizeof(disp_on32), (char *)disp_on32},
+ {sizeof(disp_on33), (char *)disp_on33},
+ {sizeof(disp_on34), (char *)disp_on34},
+ {sizeof(disp_on35), (char *)disp_on35},
+ {sizeof(disp_on36), (char *)disp_on36},
+ {sizeof(disp_on37), (char *)disp_on37},
+ {sizeof(disp_on38), (char *)disp_on38},
+ {sizeof(disp_on39), (char *)disp_on39},
+ {sizeof(disp_on40), (char *)disp_on40},
+ {sizeof(disp_on41), (char *)disp_on41},
+ {sizeof(disp_on42), (char *)disp_on42},
+ {sizeof(disp_on43), (char *)disp_on43},
+ {sizeof(disp_on44), (char *)disp_on44},
+ {sizeof(disp_on45), (char *)disp_on45},
+ {sizeof(disp_on46), (char *)disp_on46},
+ {sizeof(disp_on47), (char *)disp_on47},
+ {sizeof(disp_on48), (char *)disp_on48},
+ {sizeof(disp_on49), (char *)disp_on49},
+ {sizeof(disp_on50), (char *)disp_on50},
+ {sizeof(disp_on51), (char *)disp_on51},
+ {sizeof(disp_on52), (char *)disp_on52},
+ {sizeof(disp_on53), (char *)disp_on53},
+ {sizeof(disp_on54), (char *)disp_on54},
+ {sizeof(disp_on55), (char *)disp_on55},
+ {sizeof(disp_on56), (char *)disp_on56},
+ {sizeof(disp_on57), (char *)disp_on57},
+ {sizeof(disp_on58), (char *)disp_on58},
+ {sizeof(disp_on59), (char *)disp_on59},
+ {sizeof(disp_on60), (char *)disp_on60},
+ {sizeof(disp_on61), (char *)disp_on61},
+ {sizeof(disp_on62), (char *)disp_on62},
+ {sizeof(disp_on63), (char *)disp_on63},
+ {sizeof(disp_on64), (char *)disp_on64},
+ {sizeof(disp_on65), (char *)disp_on65},
+ {sizeof(disp_on66), (char *)disp_on66},
+ {sizeof(disp_on67), (char *)disp_on67},
+ {sizeof(disp_on68), (char *)disp_on68},
+ {sizeof(disp_on69), (char *)disp_on69},
+ {sizeof(disp_on70), (char *)disp_on70},
+ {sizeof(disp_on71), (char *)disp_on71},
+ {sizeof(disp_on72), (char *)disp_on72},
+ {sizeof(disp_on73), (char *)disp_on73},
+ {sizeof(disp_on74), (char *)disp_on74},
+ {sizeof(disp_on75), (char *)disp_on75},
+ {sizeof(disp_on76), (char *)disp_on76},
+ {sizeof(disp_on77), (char *)disp_on77},
+ {sizeof(disp_on78), (char *)disp_on78},
+ {sizeof(disp_on79), (char *)disp_on79},
+ {sizeof(disp_on80), (char *)disp_on80},
+ {sizeof(disp_on81), (char *)disp_on81},
+ {sizeof(disp_on82), (char *)disp_on82},
+ {sizeof(disp_on83), (char *)disp_on83},
+ {sizeof(disp_on84), (char *)disp_on84},
+ {sizeof(disp_on85), (char *)disp_on85},
+ {sizeof(disp_on86), (char *)disp_on86},
+ {sizeof(disp_on87), (char *)disp_on87},
+ {sizeof(disp_on88), (char *)disp_on88},
+ {sizeof(disp_on89), (char *)disp_on89},
+ {sizeof(disp_on90), (char *)disp_on90},
+ {sizeof(disp_on91), (char *)disp_on91},
+ {sizeof(disp_on92), (char *)disp_on92},
+ {sizeof(disp_on93), (char *)disp_on93},
+ {sizeof(disp_on94), (char *)disp_on94},
+ {sizeof(disp_on95), (char *)disp_on95},
+ {sizeof(disp_on96), (char *)disp_on96},
+ {sizeof(disp_on97), (char *)disp_on97},
+ {sizeof(disp_on98), (char *)disp_on98},
+ {sizeof(disp_on99), (char *)disp_on99},
+ {sizeof(disp_on100), (char *)disp_on100},
+ {sizeof(disp_on101), (char *)disp_on101},
+ {sizeof(disp_on102), (char *)disp_on102},
+ {sizeof(disp_on103), (char *)disp_on103},
+ {sizeof(disp_on104), (char *)disp_on104},
+ {sizeof(disp_on105), (char *)disp_on105},
+ {sizeof(disp_on106), (char *)disp_on106},
+ {sizeof(disp_on107), (char *)disp_on107},
+ {sizeof(disp_on108), (char *)disp_on108},
+ {sizeof(disp_on109), (char *)disp_on109},
+ {sizeof(disp_on110), (char *)disp_on110},
+ {sizeof(disp_on111), (char *)disp_on111},
+ {sizeof(disp_on112), (char *)disp_on112},
+ {sizeof(disp_on113), (char *)disp_on113},
+ {sizeof(disp_on114), (char *)disp_on114},
+ {sizeof(disp_on115), (char *)disp_on115},
+ {sizeof(disp_on116), (char *)disp_on116},
+ {sizeof(disp_on117), (char *)disp_on117},
+ {sizeof(disp_on118), (char *)disp_on118},
+ {sizeof(disp_on119), (char *)disp_on119},
+ {sizeof(disp_on120), (char *)disp_on120},
+ {sizeof(disp_on121), (char *)disp_on121},
+ {sizeof(disp_on122), (char *)disp_on122},
+ {sizeof(disp_on123), (char *)disp_on123},
+ {sizeof(disp_on124), (char *)disp_on124},
+ {sizeof(disp_on125), (char *)disp_on125},
+ {sizeof(disp_on126), (char *)disp_on126},
+ {sizeof(disp_on127), (char *)disp_on127},
+ {sizeof(disp_on128), (char *)disp_on128},
+ {sizeof(disp_on129), (char *)disp_on129},
+ {sizeof(disp_on130), (char *)disp_on130},
+ {sizeof(disp_on131), (char *)disp_on131},
+ {sizeof(disp_on132), (char *)disp_on132},
+ {sizeof(disp_on133), (char *)disp_on133},
+ {sizeof(disp_on134), (char *)disp_on134},
+ {sizeof(disp_on135), (char *)disp_on135},
+ {sizeof(disp_on136), (char *)disp_on136},
+ {sizeof(disp_on137), (char *)disp_on137},
+ {sizeof(disp_on138), (char *)disp_on138},
+ {sizeof(disp_on139), (char *)disp_on139},
+ {sizeof(disp_on140), (char *)disp_on140},
+ {sizeof(disp_on141), (char *)disp_on141},
+ {sizeof(disp_on142), (char *)disp_on142},
+ {sizeof(disp_on143), (char *)disp_on143},
+ {sizeof(disp_on144), (char *)disp_on144},
+ {sizeof(disp_on145), (char *)disp_on145},
+ {sizeof(disp_on146), (char *)disp_on146},
+ {sizeof(disp_on147), (char *)disp_on147},
+ {sizeof(disp_on148), (char *)disp_on148},
+ {sizeof(disp_on149), (char *)disp_on149},
+ {sizeof(disp_on150), (char *)disp_on150},
+ {sizeof(disp_on151), (char *)disp_on151},
+ {sizeof(disp_on152), (char *)disp_on152},
+ {sizeof(disp_on153), (char *)disp_on153},
+ {sizeof(disp_on154), (char *)disp_on154},
+ {sizeof(disp_on155), (char *)disp_on155},
+ {sizeof(disp_on156), (char *)disp_on156},
+ {sizeof(disp_on157), (char *)disp_on157},
+ {sizeof(disp_on158), (char *)disp_on158},
+ {sizeof(disp_on159), (char *)disp_on159},
+ {sizeof(disp_on160), (char *)disp_on150},
+ {sizeof(disp_on161), (char *)disp_on161},
+ {sizeof(disp_on162), (char *)disp_on162},
+ {sizeof(disp_on163), (char *)disp_on163},
+ {sizeof(disp_on164), (char *)disp_on164},
+ {sizeof(disp_on165), (char *)disp_on165},
+ {sizeof(disp_on166), (char *)disp_on166},
+ {sizeof(disp_on167), (char *)disp_on167},
+ {sizeof(disp_on168), (char *)disp_on168},
+ {sizeof(disp_on169), (char *)disp_on169},
+ {sizeof(disp_on170), (char *)disp_on170},
+ {sizeof(disp_on171), (char *)disp_on171},
+ {sizeof(disp_on172), (char *)disp_on172},
+ {sizeof(disp_on173), (char *)disp_on173},
+ {sizeof(disp_on174), (char *)disp_on174},
+ {sizeof(disp_on175), (char *)disp_on175},
+ {sizeof(disp_on176), (char *)disp_on176},
+ {sizeof(disp_on177), (char *)disp_on177},
+ {sizeof(disp_on178), (char *)disp_on178},
+ {sizeof(disp_on179), (char *)disp_on179},
+ {sizeof(disp_on180), (char *)disp_on180},
+ {sizeof(disp_on181), (char *)disp_on181},
+ {sizeof(disp_on182), (char *)disp_on182},
+ {sizeof(disp_on183), (char *)disp_on183},
+ {sizeof(disp_on184), (char *)disp_on184},
+ {sizeof(disp_on185), (char *)disp_on185},
+ {sizeof(disp_on186), (char *)disp_on186},
+ {sizeof(disp_on187), (char *)disp_on187},
+ {sizeof(disp_on188), (char *)disp_on188},
+ {sizeof(disp_on189), (char *)disp_on189},
+ {sizeof(disp_on190), (char *)disp_on190},
+ {sizeof(disp_on191), (char *)disp_on191},
+ {sizeof(disp_on192), (char *)disp_on192},
+ {sizeof(disp_on193), (char *)disp_on193},
+ {sizeof(disp_on194), (char *)disp_on194},
+ {sizeof(disp_on195), (char *)disp_on195},
+ {sizeof(disp_on196), (char *)disp_on196},
+ {sizeof(disp_on197), (char *)disp_on197},
+ {sizeof(disp_on198), (char *)disp_on198},
+ {sizeof(disp_on199), (char *)disp_on199},
+ {sizeof(disp_on200), (char *)disp_on200},
+ {sizeof(disp_on201), (char *)disp_on201},
+ {sizeof(disp_on202), (char *)disp_on202},
+ {sizeof(disp_on203), (char *)disp_on203},
+ {sizeof(disp_on204), (char *)disp_on204},
+ {sizeof(disp_on205), (char *)disp_on205},
+ {sizeof(disp_on206), (char *)disp_on206},
+ {sizeof(disp_on207), (char *)disp_on207},
+ {sizeof(disp_on208), (char *)disp_on208},
+ {sizeof(disp_on209), (char *)disp_on209},
+ {sizeof(disp_on210), (char *)disp_on210},
+ {sizeof(disp_on211), (char *)disp_on211},
+ {sizeof(disp_on212), (char *)disp_on212},
+ {sizeof(disp_on213), (char *)disp_on213},
+ {sizeof(disp_on214), (char *)disp_on214},
+ {sizeof(disp_on215), (char *)disp_on215},
+ {sizeof(disp_on216), (char *)disp_on216},
+ {sizeof(disp_on217), (char *)disp_on217},
+ {sizeof(disp_on218), (char *)disp_on218},
+ {sizeof(disp_on219), (char *)disp_on219},
+ {sizeof(disp_on220), (char *)disp_on220},
+ {sizeof(disp_on221), (char *)disp_on221},
+ {sizeof(disp_on222), (char *)disp_on222},
+ {sizeof(disp_on223), (char *)disp_on223},
+ {sizeof(disp_on224), (char *)disp_on224},
+ {sizeof(disp_on225), (char *)disp_on225},
+ {sizeof(disp_on226), (char *)disp_on226},
+ {sizeof(disp_on227), (char *)disp_on227},
+ {sizeof(disp_on228), (char *)disp_on228},
+ {sizeof(disp_on229), (char *)disp_on229},
+ {sizeof(disp_on230), (char *)disp_on230},
+ {sizeof(disp_on231), (char *)disp_on231},
+ {sizeof(disp_on232), (char *)disp_on232},
+ {sizeof(disp_on233), (char *)disp_on233},
+ {sizeof(disp_on234), (char *)disp_on234},
+ {sizeof(disp_on235), (char *)disp_on235},
+ {sizeof(disp_on236), (char *)disp_on236},
+ {sizeof(disp_on237), (char *)disp_on237},
+ {sizeof(disp_on238), (char *)disp_on238},
+ {sizeof(disp_on239), (char *)disp_on239},
+ {sizeof(disp_on240), (char *)disp_on240},
+ {sizeof(disp_on241), (char *)disp_on241},
+ {sizeof(disp_on242), (char *)disp_on242},
+ {sizeof(disp_on243), (char *)disp_on243},
+ {sizeof(disp_on244), (char *)disp_on244},
+ {sizeof(disp_on245), (char *)disp_on245},
+ {sizeof(disp_on246), (char *)disp_on246},
+ {sizeof(disp_on247), (char *)disp_on247},
+ {sizeof(disp_on248), (char *)disp_on248},
+ {sizeof(disp_on249), (char *)disp_on249},
+ {sizeof(disp_on250), (char *)disp_on250},
+ {sizeof(disp_on251), (char *)disp_on251},
+ {sizeof(disp_on252), (char *)disp_on252},
+ {sizeof(disp_on253), (char *)disp_on253},
+ {sizeof(disp_on254), (char *)disp_on254},
+ {sizeof(disp_on255), (char *)disp_on255},
+ {sizeof(disp_on256), (char *)disp_on256},
+ {sizeof(disp_on257), (char *)disp_on257},
+ {sizeof(disp_on258), (char *)disp_on258},
+ {sizeof(disp_on259), (char *)disp_on259},
+ {sizeof(disp_on260), (char *)disp_on260},
+ {sizeof(disp_on261), (char *)disp_on261},
+ {sizeof(disp_on262), (char *)disp_on262},
+ {sizeof(disp_on263), (char *)disp_on263},
+ {sizeof(disp_on264), (char *)disp_on264},
+ {sizeof(disp_on265), (char *)disp_on265},
+ {sizeof(disp_on266), (char *)disp_on266},
+ {sizeof(disp_on267), (char *)disp_on267},
+ {sizeof(disp_on268), (char *)disp_on268},
+ {sizeof(disp_on269), (char *)disp_on269},
+ {sizeof(disp_on270), (char *)disp_on270},
+ {sizeof(disp_on271), (char *)disp_on271},
+ {sizeof(disp_on272), (char *)disp_on272},
+ {sizeof(disp_on273), (char *)disp_on273},
+ {sizeof(disp_on274), (char *)disp_on274},
+ {sizeof(disp_on275), (char *)disp_on275},
+ {sizeof(disp_on276), (char *)disp_on276},
+ {sizeof(disp_on277), (char *)disp_on277},
+ {sizeof(disp_on278), (char *)disp_on278},
+ {sizeof(disp_on279), (char *)disp_on279},
+ {sizeof(disp_on280), (char *)disp_on280},
+ {sizeof(disp_on281), (char *)disp_on281},
+ {sizeof(disp_on282), (char *)disp_on282},
+ {sizeof(disp_on283), (char *)disp_on283},
+ {sizeof(disp_on284), (char *)disp_on284},
+ {sizeof(disp_on285), (char *)disp_on285},
+ {sizeof(disp_on286), (char *)disp_on286},
+ {sizeof(disp_on287), (char *)disp_on287},
+ {sizeof(disp_on288), (char *)disp_on288},
+ {sizeof(disp_on289), (char *)disp_on289},
+ {sizeof(disp_on290), (char *)disp_on290},
+ {sizeof(disp_on291), (char *)disp_on291},
+ {sizeof(disp_on292), (char *)disp_on292},
+ {sizeof(disp_on293), (char *)disp_on293},
+ {sizeof(disp_on294), (char *)disp_on294},
+ {sizeof(disp_on295), (char *)disp_on295},
+ {sizeof(disp_on296), (char *)disp_on296},
+ {sizeof(disp_on297), (char *)disp_on297},
+ {sizeof(disp_on298), (char *)disp_on298},
+ {sizeof(disp_on299), (char *)disp_on299},
+ {sizeof(disp_on300), (char *)disp_on300},
+ {sizeof(disp_on301), (char *)disp_on301},
+ {sizeof(disp_on302), (char *)disp_on302},
+ {sizeof(disp_on303), (char *)disp_on303},
+ {sizeof(disp_on304), (char *)disp_on304},
+ {sizeof(disp_on305), (char *)disp_on305},
+ {sizeof(disp_on306), (char *)disp_on306},
+ {sizeof(disp_on307), (char *)disp_on307},
+ {sizeof(disp_on308), (char *)disp_on308},
+ {sizeof(disp_on309), (char *)disp_on309},
+ {sizeof(disp_on310), (char *)disp_on310},
+ {sizeof(disp_on311), (char *)disp_on311},
+ {sizeof(disp_on312), (char *)disp_on312},
+ {sizeof(disp_on313), (char *)disp_on313},
+ {sizeof(disp_on314), (char *)disp_on314},
+ {sizeof(disp_on315), (char *)disp_on315},
+ {sizeof(disp_on316), (char *)disp_on316},
+ {sizeof(disp_on317), (char *)disp_on317},
+ {sizeof(disp_on318), (char *)disp_on318},
+ {sizeof(disp_on319), (char *)disp_on319},
+ {sizeof(disp_on320), (char *)disp_on320},
+ {sizeof(disp_on321), (char *)disp_on321},
+ {sizeof(disp_on322), (char *)disp_on322},
+ {sizeof(disp_on323), (char *)disp_on323},
+ {sizeof(disp_on324), (char *)disp_on324},
+ {sizeof(disp_on325), (char *)disp_on325},
+ {sizeof(disp_on326), (char *)disp_on326},
+ {sizeof(disp_on327), (char *)disp_on327},
+ {sizeof(disp_on328), (char *)disp_on328},
+ {sizeof(disp_on329), (char *)disp_on329},
+ {sizeof(disp_on330), (char *)disp_on330},
+ {sizeof(disp_on331), (char *)disp_on331},
+ {sizeof(disp_on332), (char *)disp_on332},
+ {sizeof(disp_on333), (char *)disp_on333},
+ {sizeof(disp_on334), (char *)disp_on334},
+ {sizeof(disp_on335), (char *)disp_on335},
+ {sizeof(disp_on336), (char *)disp_on336},
+ {sizeof(disp_on337), (char *)disp_on337},
+ {sizeof(disp_on338), (char *)disp_on338},
+ {sizeof(disp_on339), (char *)disp_on339},
+ {sizeof(disp_on340), (char *)disp_on340},
+ {sizeof(disp_on341), (char *)disp_on341},
+ {sizeof(disp_on342), (char *)disp_on342},
+ {sizeof(disp_on343), (char *)disp_on343},
+ {sizeof(disp_on344), (char *)disp_on344},
+ {sizeof(disp_on345), (char *)disp_on345},
+ {sizeof(disp_on346), (char *)disp_on346},
+ {sizeof(disp_on347), (char *)disp_on347},
+ {sizeof(disp_on348), (char *)disp_on348},
+ {sizeof(disp_on349), (char *)disp_on349},
+ {sizeof(disp_on350), (char *)disp_on350},
+ {sizeof(disp_on351), (char *)disp_on351},
+ {sizeof(disp_on352), (char *)disp_on352},
+ {sizeof(disp_on353), (char *)disp_on353},
+ {sizeof(disp_on354), (char *)disp_on354},
+ {sizeof(disp_on355), (char *)disp_on355},
+ {sizeof(disp_on356), (char *)disp_on356},
+ {sizeof(disp_on357), (char *)disp_on357},
+ {sizeof(disp_on358), (char *)disp_on358},
+ {sizeof(disp_on359), (char *)disp_on359},
+ {sizeof(disp_on360), (char *)disp_on360},
+ {sizeof(disp_on361), (char *)disp_on361},
+ {sizeof(disp_on362), (char *)disp_on362},
+ {sizeof(disp_on363), (char *)disp_on363},
+ {sizeof(disp_on364), (char *)disp_on364},
+ {sizeof(disp_on365), (char *)disp_on365},
+ {sizeof(disp_on366), (char *)disp_on366},
+ {sizeof(disp_on367), (char *)disp_on367},
+ {sizeof(disp_on368), (char *)disp_on368},
+ {sizeof(disp_on369), (char *)disp_on369},
+ {sizeof(disp_on370), (char *)disp_on370},
+ {sizeof(disp_on371), (char *)disp_on371},
+ {sizeof(disp_on372), (char *)disp_on372},
+ {sizeof(disp_on373), (char *)disp_on373},
+ {sizeof(disp_on374), (char *)disp_on374},
+ {sizeof(disp_on375), (char *)disp_on375},
+ {sizeof(disp_on376), (char *)disp_on376},
+ {sizeof(disp_on377), (char *)disp_on377},
+ {sizeof(disp_on378), (char *)disp_on378},
+ {sizeof(disp_on379), (char *)disp_on379},
+ {sizeof(disp_on380), (char *)disp_on380},
+ {sizeof(disp_on381), (char *)disp_on381},
+ {sizeof(disp_on382), (char *)disp_on382},
+ {sizeof(disp_on383), (char *)disp_on383},
+ {sizeof(disp_on384), (char *)disp_on384},
+ {sizeof(disp_on385), (char *)disp_on385},
+ {sizeof(disp_on386), (char *)disp_on386},
+ {sizeof(disp_on387), (char *)disp_on387},
+ {sizeof(disp_on388), (char *)disp_on388},
+ {sizeof(disp_on389), (char *)disp_on389},
+ {sizeof(disp_on390), (char *)disp_on390},
+ {sizeof(disp_on391), (char *)disp_on391},
+ {sizeof(disp_on392), (char *)disp_on392},
+ {sizeof(disp_on393), (char *)disp_on393},
+ {sizeof(disp_on394), (char *)disp_on394},
+ {sizeof(disp_on395), (char *)disp_on395},
+ {sizeof(disp_on396), (char *)disp_on396},
+ {sizeof(disp_on397), (char *)disp_on397},
+ {sizeof(disp_on398), (char *)disp_on398},
+ {sizeof(disp_on399), (char *)disp_on399},
+ {sizeof(disp_on400), (char *)disp_on400},
+ {sizeof(disp_on401), (char *)disp_on401},
+ {sizeof(disp_on402), (char *)disp_on402},
+ {sizeof(disp_on403), (char *)disp_on403},
+ {sizeof(disp_on404), (char *)disp_on404},
+ {sizeof(disp_on405), (char *)disp_on405},
+ {sizeof(disp_on406), (char *)disp_on406},
+ {sizeof(disp_on407), (char *)disp_on407},
+ {sizeof(disp_on408), (char *)disp_on408},
+ {sizeof(disp_on409), (char *)disp_on409},
+ {sizeof(disp_on410), (char *)disp_on410},
+ {sizeof(disp_on411), (char *)disp_on411},
+ {sizeof(disp_on412), (char *)disp_on412},
+ {sizeof(disp_on413), (char *)disp_on413},
+ {sizeof(disp_on414), (char *)disp_on414},
+ {sizeof(disp_on415), (char *)disp_on415},
+ {sizeof(disp_on416), (char *)disp_on416},
+ {sizeof(disp_on417), (char *)disp_on417},
+ {sizeof(disp_on418), (char *)disp_on418},
+ {sizeof(disp_on419), (char *)disp_on419},
+ {sizeof(disp_on420), (char *)disp_on420},
+ {sizeof(disp_on421), (char *)disp_on421},
+ {sizeof(disp_on422), (char *)disp_on422},
+ {sizeof(disp_on423), (char *)disp_on423},
+ {sizeof(disp_on424), (char *)disp_on424},
+ {sizeof(disp_on425), (char *)disp_on425},
+ {sizeof(disp_on426), (char *)disp_on426},
+ {sizeof(disp_on427), (char *)disp_on427},
+ {sizeof(disp_on428), (char *)disp_on428},
+ {sizeof(disp_on429), (char *)disp_on429},
+ {sizeof(disp_on430), (char *)disp_on430},
+ {sizeof(disp_on431), (char *)disp_on431},
+ {sizeof(disp_on432), (char *)disp_on432},
+ {sizeof(disp_on433), (char *)disp_on433},
+ {sizeof(disp_on434), (char *)disp_on434},
+ {sizeof(disp_on435), (char *)disp_on435},
+ {sizeof(disp_on436), (char *)disp_on436},
+ {sizeof(disp_on437), (char *)disp_on437},
+ {sizeof(disp_on438), (char *)disp_on438},
+ {sizeof(disp_on439), (char *)disp_on439},
+ {sizeof(disp_on440), (char *)disp_on440},
+ {sizeof(disp_on441), (char *)disp_on441},
+ {sizeof(disp_on442), (char *)disp_on442},
+ {sizeof(disp_on443), (char *)disp_on443},
+ {sizeof(disp_on444), (char *)disp_on444},
+ {sizeof(disp_on445), (char *)disp_on445},
+ {sizeof(disp_on446), (char *)disp_on446},
+ {sizeof(disp_on447), (char *)disp_on447},
+ {sizeof(disp_on448), (char *)disp_on448},
+ {sizeof(disp_on449), (char *)disp_on449},
+ {sizeof(disp_on450), (char *)disp_on450},
+ {sizeof(disp_on451), (char *)disp_on451},
+ {sizeof(disp_on452), (char *)disp_on452},
+ {sizeof(disp_on453), (char *)disp_on453},
+ {sizeof(disp_on454), (char *)disp_on454},
+ {sizeof(disp_on455), (char *)disp_on455},
+ {sizeof(disp_on456), (char *)disp_on456},
+ {sizeof(disp_on457), (char *)disp_on457},
+ {sizeof(disp_on458), (char *)disp_on458},
+ {sizeof(disp_on459), (char *)disp_on459},
+ {sizeof(disp_on460), (char *)disp_on460},
+ {sizeof(disp_on461), (char *)disp_on461},
+ {sizeof(disp_on462), (char *)disp_on462},
+ {sizeof(disp_on463), (char *)disp_on463},
+};
+
+int mipi_nt35590_cmd_720p_config(void *pdata)
+{
+ int ret = NO_ERROR;
+
+ struct lcdc_panel_info *lcdc = NULL;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *)pdata;
+
+ dprintf(SPEW, "mipi_nt35590_cmd_720p_config\n");
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ lcdc = &(pinfo->lcdc);
+ if (lcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+ ret = mdss_dsi_cmd_mode_config((pinfo->xres + lcdc->xres_pad),
+ (pinfo->yres + lcdc->yres_pad),
+ (pinfo->xres),
+ (pinfo->yres),
+ pinfo->mipi.dst_format,
+ pinfo->bpp / 8,
+ 0xf,
+ pinfo->mipi.interleave_mode);
+
+ return ret;
+}
+
+int mipi_nt35590_cmd_720p_on()
+{
+ int ret = NO_ERROR;
+ dprintf(SPEW, "mipi_nt35590_cmd_720p_on\n");
+ return ret;
+}
+
+int mipi_nt35590_cmd_720p_off()
+{
+ int ret = NO_ERROR;
+ dprintf(SPEW, "mipi_nt35590_cmd_720p_off\n");
+ return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_cmd_mode_phy_db = {
+ /* 720x1280, RGB888, 4 Lane 60 fps cmd mode */
+ /* regulator */
+ {0x07, 0x09, 0x03, 0x00, 0x20, 0x00, 0x01},
+ /* timing */
+ {0x7d, 0x25, 0x1d, 0x00, 0x37, 0x33, 0x22, 0x27,
+ 0x1e, 0x03, 0x04, 0x00},
+ /* phy ctrl */
+ {0x5f, 0x00, 0x00, 0x10},
+ /* strength */
+ {0xff, 0x06},
+ /* bist control */
+ {0x00, 0x00, 0xb1, 0xff, 0x00, 0x00},
+ /* lanes config */
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb},
+};
+
+void mipi_nt35590_cmd_720p_init(struct msm_panel_info *pinfo)
+{
+ if (!pinfo)
+ return;
+
+ dprintf(SPEW, "mipi_nt35590_cmd_720p_init\n");
+
+ pinfo->xres = 720;
+ pinfo->yres = 1280;
+
+ pinfo->type = MIPI_CMD_PANEL;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = 24;
+ pinfo->lcdc.h_back_porch = 164;
+ pinfo->lcdc.h_front_porch = 140;
+ pinfo->lcdc.h_pulse_width = 8;
+ pinfo->lcdc.v_back_porch = 1;
+ pinfo->lcdc.v_front_porch = 6;
+ pinfo->lcdc.v_pulse_width = 1;
+ pinfo->lcdc.border_clr = 0; /* blk */
+ pinfo->lcdc.underflow_clr = 0xff; /* blue */
+ pinfo->lcdc.hsync_skew = 0;
+ pinfo->clk_rate = 424000000;
+
+ pinfo->mipi.mode = DSI_CMD_MODE;
+ pinfo->mipi.traffic_mode = DSI_BURST_MODE;
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo->mipi.vc = 0;
+ pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RGB;
+ pinfo->mipi.data_lane0 = TRUE;
+ pinfo->mipi.data_lane1 = TRUE;
+ pinfo->mipi.data_lane2 = TRUE;
+ pinfo->mipi.data_lane3 = TRUE;
+ pinfo->mipi.t_clk_post = 0x20;
+ pinfo->mipi.t_clk_pre = 0x2c;
+ pinfo->mipi.stream = 0; /* dma_p */
+ pinfo->mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
+ pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+ pinfo->mipi.frame_rate = 60;
+ pinfo->mipi.mdss_dsi_phy_db = &dsi_cmd_mode_phy_db;
+ pinfo->mipi.tx_eot_append = TRUE;
+
+ pinfo->mipi.num_of_lanes = 4;
+ pinfo->mipi.panel_cmds = nt35590_panel_cmd_mode_cmds;
+ pinfo->mipi.num_of_panel_cmds =
+ ARRAY_SIZE(nt35590_panel_cmd_mode_cmds);
+
+ pinfo->on = mipi_nt35590_cmd_720p_on;
+ pinfo->off = mipi_nt35590_cmd_720p_off;
+ pinfo->config = mipi_nt35590_cmd_720p_config;
+
+ return;
+}
diff --git a/dev/panel/msm/mipi_nt35590_video_720p.c b/dev/panel/msm/mipi_nt35590_video_720p.c
new file mode 100644
index 0000000..af74b43
--- /dev/null
+++ b/dev/panel/msm/mipi_nt35590_video_720p.c
@@ -0,0 +1,2504 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <mdp5.h>
+#include <debug.h>
+#include <platform/iomap.h>
+
+static char disp_on0[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on1[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x26, 0x08, 0xFF, 0xFF,
+};
+static char disp_on2[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x26, 0x00, 0xFF, 0xFF,
+};
+static char disp_on3[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x00, 0xFF, 0xFF,
+};
+static char lane[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBA, 0x03, 0xFF, 0xFF,
+};
+static char command_mode[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0x08, 0xFF, 0xFF,
+};
+static char video_mode[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0x03, 0xFF, 0xFF,
+};
+static char disp_on6[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x01, 0xFF, 0xFF,
+};
+static char disp_on7[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on8[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x00, 0x4A, 0xFF, 0xFF,
+};
+static char disp_on9[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x01, 0x33, 0xFF, 0xFF,
+};
+static char disp_on10[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x02, 0x53, 0xFF, 0xFF,
+};
+static char disp_on11[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x03, 0x55, 0xFF, 0xFF,
+};
+static char disp_on12[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x04, 0x55, 0xFF, 0xFF,
+};
+static char disp_on13[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x05, 0x33, 0xFF, 0xFF,
+};
+static char disp_on14[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x06, 0x22, 0xFF, 0xFF,
+};
+static char disp_on15[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x08, 0x56, 0xFF, 0xFF,
+};
+static char disp_on16[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x09, 0x8F, 0xFF, 0xFF,
+};
+static char disp_on17[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x36, 0x73, 0xFF, 0xFF,
+};
+static char disp_on18[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0B, 0x9F, 0xFF, 0xFF,
+};
+static char disp_on19[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0C, 0x9F, 0xFF, 0xFF,
+};
+static char disp_on20[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0D, 0x2F, 0xFF, 0xFF,
+};
+static char disp_on21[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0E, 0x24, 0xFF, 0xFF,
+};
+static char disp_on22[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x83, 0xFF, 0xFF,
+};
+static char disp_on23[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x03, 0xFF, 0xFF,
+};
+static char disp_on24[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x71, 0x2C, 0xFF, 0xFF,
+};
+static char disp_on25[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on26[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0F, 0x0A, 0xFF, 0xFF,
+};
+static char disp_on27[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x05, 0xFF, 0xFF,
+};
+static char disp_on28[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on29[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x01, 0x00, 0xFF, 0xFF,
+};
+static char disp_on30[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x02, 0x8B, 0xFF, 0xFF,
+};
+static char disp_on31[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x03, 0x82, 0xFF, 0xFF,
+};
+static char disp_on32[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x04, 0x82, 0xFF, 0xFF,
+};
+static char disp_on33[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x05, 0x30, 0xFF, 0xFF,
+};
+static char disp_on34[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x06, 0x33, 0xFF, 0xFF,
+};
+static char disp_on35[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x07, 0x01, 0xFF, 0xFF,
+};
+static char disp_on36[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x08, 0x00, 0xFF, 0xFF,
+};
+static char disp_on37[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x09, 0x46, 0xFF, 0xFF,
+};
+static char disp_on38[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0A, 0x46, 0xFF, 0xFF,
+};
+static char disp_on39[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0D, 0x0B, 0xFF, 0xFF,
+};
+static char disp_on40[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0E, 0x1D, 0xFF, 0xFF,
+};
+static char disp_on41[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0F, 0x08, 0xFF, 0xFF,
+};
+static char disp_on42[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x10, 0x53, 0xFF, 0xFF,
+};
+static char disp_on43[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x00, 0xFF, 0xFF,
+};
+static char disp_on44[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x00, 0xFF, 0xFF,
+};
+static char disp_on45[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x14, 0x01, 0xFF, 0xFF,
+};
+static char disp_on46[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x15, 0x00, 0xFF, 0xFF,
+};
+static char disp_on47[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x16, 0x05, 0xFF, 0xFF,
+};
+static char disp_on48[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x17, 0x00, 0xFF, 0xFF,
+};
+static char disp_on49[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x19, 0x7F, 0xFF, 0xFF,
+};
+static char disp_on50[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1A, 0xFF, 0xFF, 0xFF,
+};
+static char disp_on51[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1B, 0x0F, 0xFF, 0xFF,
+};
+static char disp_on52[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1C, 0x00, 0xFF, 0xFF,
+};
+static char disp_on53[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on54[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1E, 0x00, 0xFF, 0xFF,
+};
+static char disp_on55[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1F, 0x07, 0xFF, 0xFF,
+};
+static char disp_on56[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x20, 0x00, 0xFF, 0xFF,
+};
+static char disp_on57[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x21, 0x06, 0xFF, 0xFF,
+};
+static char disp_on58[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x22, 0x55, 0xFF, 0xFF,
+};
+static char disp_on59[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x23, 0x4D, 0xFF, 0xFF,
+};
+static char disp_on60[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2D, 0x02, 0xFF, 0xFF,
+};
+static char disp_on61[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x28, 0x01, 0xFF, 0xFF,
+};
+static char disp_on62[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2F, 0x02, 0xFF, 0xFF,
+};
+static char disp_on63[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x83, 0x01, 0xFF, 0xFF,
+};
+static char disp_on64[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9E, 0x58, 0xFF, 0xFF,
+};
+static char disp_on65[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9F, 0x6A, 0xFF, 0xFF,
+};
+static char disp_on66[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA0, 0x01, 0xFF, 0xFF,
+};
+static char disp_on67[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA2, 0x10, 0xFF, 0xFF,
+};
+static char disp_on68[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBB, 0x0A, 0xFF, 0xFF,
+};
+static char disp_on69[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBC, 0x0A, 0xFF, 0xFF,
+};
+static char disp_on70[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x32, 0x08, 0xFF, 0xFF,
+};
+static char disp_on71[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x33, 0xB8, 0xFF, 0xFF,
+};
+static char disp_on72[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x36, 0x01, 0xFF, 0xFF,
+};
+static char disp_on73[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x37, 0x00, 0xFF, 0xFF,
+};
+static char disp_on74[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x43, 0x00, 0xFF, 0xFF,
+};
+static char disp_on75[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4B, 0x21, 0xFF, 0xFF,
+};
+static char disp_on76[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4C, 0x03, 0xFF, 0xFF,
+};
+static char disp_on77[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x50, 0x21, 0xFF, 0xFF,
+};
+static char disp_on78[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x51, 0x03, 0xFF, 0xFF,
+};
+static char disp_on79[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x58, 0x21, 0xFF, 0xFF,
+};
+static char disp_on80[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x59, 0x03, 0xFF, 0xFF,
+};
+static char disp_on81[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5D, 0x21, 0xFF, 0xFF,
+};
+static char disp_on82[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5E, 0x03, 0xFF, 0xFF,
+};
+static char disp_on83[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6C, 0x00, 0xFF, 0xFF,
+};
+static char disp_on84[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on85[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on86[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x01, 0xFF, 0xFF,
+};
+static char disp_on87[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on88[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x75, 0x00, 0xFF, 0xFF,
+};
+static char disp_on89[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x76, 0x7D, 0xFF, 0xFF,
+};
+static char disp_on90[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x77, 0x00, 0xFF, 0xFF,
+};
+static char disp_on91[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x78, 0x8A, 0xFF, 0xFF,
+};
+static char disp_on92[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x79, 0x00, 0xFF, 0xFF,
+};
+static char disp_on93[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7A, 0x9C, 0xFF, 0xFF,
+};
+static char disp_on94[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7B, 0x00, 0xFF, 0xFF,
+};
+static char disp_on95[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7C, 0xB1, 0xFF, 0xFF,
+};
+static char disp_on96[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on97[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7E, 0xBF, 0xFF, 0xFF,
+};
+static char disp_on98[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7F, 0x00, 0xFF, 0xFF,
+};
+static char disp_on99[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x80, 0xCF, 0xFF, 0xFF,
+};
+static char disp_on100[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x81, 0x00, 0xFF, 0xFF,
+};
+static char disp_on101[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x82, 0xDD, 0xFF, 0xFF,
+};
+static char disp_on102[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x83, 0x00, 0xFF, 0xFF,
+};
+static char disp_on103[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x84, 0xE8, 0xFF, 0xFF,
+};
+static char disp_on104[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x85, 0x00, 0xFF, 0xFF,
+};
+static char disp_on105[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x86, 0xF2, 0xFF, 0xFF,
+};
+static char disp_on106[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x87, 0x01, 0xFF, 0xFF,
+};
+static char disp_on107[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x88, 0x1F, 0xFF, 0xFF,
+};
+static char disp_on108[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x89, 0x01, 0xFF, 0xFF,
+};
+static char disp_on109[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8A, 0x41, 0xFF, 0xFF,
+};
+static char disp_on110[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8B, 0x01, 0xFF, 0xFF,
+};
+static char disp_on111[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8C, 0x78, 0xFF, 0xFF,
+};
+static char disp_on112[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8D, 0x01, 0xFF, 0xFF,
+};
+static char disp_on113[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8E, 0xA5, 0xFF, 0xFF,
+};
+static char disp_on114[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8F, 0x01, 0xFF, 0xFF,
+};
+static char disp_on115[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x90, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on116[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x91, 0x02, 0xFF, 0xFF,
+};
+static char disp_on117[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x92, 0x29, 0xFF, 0xFF,
+};
+static char disp_on118[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x93, 0x02, 0xFF, 0xFF,
+};
+static char disp_on119[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x94, 0x2A, 0xFF, 0xFF,
+};
+static char disp_on120[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x95, 0x02, 0xFF, 0xFF,
+};
+static char disp_on121[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x96, 0x5D, 0xFF, 0xFF,
+};
+static char disp_on122[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x97, 0x02, 0xFF, 0xFF,
+};
+static char disp_on123[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x98, 0x93, 0xFF, 0xFF,
+};
+static char disp_on124[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x99, 0x02, 0xFF, 0xFF,
+};
+static char disp_on125[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9A, 0xB8, 0xFF, 0xFF,
+};
+static char disp_on126[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9B, 0x02, 0xFF, 0xFF,
+};
+static char disp_on127[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9C, 0xE7, 0xFF, 0xFF,
+};
+static char disp_on128[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on129[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9E, 0x07, 0xFF, 0xFF,
+};
+static char disp_on130[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on131[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA0, 0x37, 0xFF, 0xFF,
+};
+static char disp_on132[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA2, 0x03, 0xFF, 0xFF,
+};
+static char disp_on133[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA3, 0x46, 0xFF, 0xFF,
+};
+static char disp_on134[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA4, 0x03, 0xFF, 0xFF,
+};
+static char disp_on135[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA5, 0x56, 0xFF, 0xFF,
+};
+static char disp_on136[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA6, 0x03, 0xFF, 0xFF,
+};
+static char disp_on137[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA7, 0x66, 0xFF, 0xFF,
+};
+static char disp_on138[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on139[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAA, 0x7A, 0xFF, 0xFF,
+};
+static char disp_on140[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on141[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAC, 0x93, 0xFF, 0xFF,
+};
+static char disp_on142[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on143[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAE, 0xA3, 0xFF, 0xFF,
+};
+static char disp_on144[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAF, 0x03, 0xFF, 0xFF,
+};
+static char disp_on145[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB0, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on146[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB1, 0x03, 0xFF, 0xFF,
+};
+static char disp_on147[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB2, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on148[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on149[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB4, 0x7D, 0xFF, 0xFF,
+};
+static char disp_on150[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB5, 0x00, 0xFF, 0xFF,
+};
+static char disp_on151[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB6, 0x8A, 0xFF, 0xFF,
+};
+static char disp_on152[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB7, 0x00, 0xFF, 0xFF,
+};
+static char disp_on153[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB8, 0x9C, 0xFF, 0xFF,
+};
+static char disp_on154[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB9, 0x00, 0xFF, 0xFF,
+};
+static char disp_on155[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBA, 0xB1, 0xFF, 0xFF,
+};
+static char disp_on156[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBB, 0x00, 0xFF, 0xFF,
+};
+static char disp_on157[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBC, 0xBF, 0xFF, 0xFF,
+};
+static char disp_on158[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBD, 0x00, 0xFF, 0xFF,
+};
+static char disp_on159[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBE, 0xCF, 0xFF, 0xFF,
+};
+static char disp_on160[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on161[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC0, 0xDD, 0xFF, 0xFF,
+};
+static char disp_on162[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on163[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0xE8, 0xFF, 0xFF,
+};
+static char disp_on164[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on165[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC4, 0xF2, 0xFF, 0xFF,
+};
+static char disp_on166[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC5, 0x01, 0xFF, 0xFF,
+};
+static char disp_on167[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC6, 0x1F, 0xFF, 0xFF,
+};
+static char disp_on168[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC7, 0x01, 0xFF, 0xFF,
+};
+static char disp_on169[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC8, 0x41, 0xFF, 0xFF,
+};
+static char disp_on170[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC9, 0x01, 0xFF, 0xFF,
+};
+static char disp_on171[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCA, 0x78, 0xFF, 0xFF,
+};
+static char disp_on172[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on173[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCC, 0xA5, 0xFF, 0xFF,
+};
+static char disp_on174[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCD, 0x01, 0xFF, 0xFF,
+};
+static char disp_on175[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCE, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on176[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on177[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD0, 0x29, 0xFF, 0xFF,
+};
+static char disp_on178[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD1, 0x02, 0xFF, 0xFF,
+};
+static char disp_on179[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD2, 0x2A, 0xFF, 0xFF,
+};
+static char disp_on180[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD3, 0x02, 0xFF, 0xFF,
+};
+static char disp_on181[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD4, 0x5D, 0xFF, 0xFF,
+};
+static char disp_on182[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD5, 0x02, 0xFF, 0xFF,
+};
+static char disp_on183[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD6, 0x93, 0xFF, 0xFF,
+};
+static char disp_on184[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD7, 0x02, 0xFF, 0xFF,
+};
+static char disp_on185[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD8, 0xB8, 0xFF, 0xFF,
+};
+static char disp_on186[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD9, 0x02, 0xFF, 0xFF,
+};
+static char disp_on187[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDA, 0xE7, 0xFF, 0xFF,
+};
+static char disp_on188[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on189[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDC, 0x07, 0xFF, 0xFF,
+};
+static char disp_on190[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on191[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDE, 0x37, 0xFF, 0xFF,
+};
+static char disp_on192[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDF, 0x03, 0xFF, 0xFF,
+};
+static char disp_on193[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE0, 0x46, 0xFF, 0xFF,
+};
+static char disp_on194[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE1, 0x03, 0xFF, 0xFF,
+};
+static char disp_on195[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE2, 0x56, 0xFF, 0xFF,
+};
+static char disp_on196[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE3, 0x03, 0xFF, 0xFF,
+};
+static char disp_on197[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE4, 0x66, 0xFF, 0xFF,
+};
+static char disp_on198[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE5, 0x03, 0xFF, 0xFF,
+};
+static char disp_on199[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE6, 0x7A, 0xFF, 0xFF,
+};
+static char disp_on200[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE7, 0x03, 0xFF, 0xFF,
+};
+static char disp_on201[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE8, 0x93, 0xFF, 0xFF,
+};
+static char disp_on202[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on203[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEA, 0xA3, 0xFF, 0xFF,
+};
+static char disp_on204[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on205[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEC, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on206[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xED, 0x03, 0xFF, 0xFF,
+};
+static char disp_on207[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEE, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on208[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on209[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF0, 0xED, 0xFF, 0xFF,
+};
+static char disp_on210[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on211[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF2, 0xF3, 0xFF, 0xFF,
+};
+static char disp_on212[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on213[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF4, 0xFE, 0xFF, 0xFF,
+};
+static char disp_on214[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF5, 0x01, 0xFF, 0xFF,
+};
+static char disp_on215[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF6, 0x09, 0xFF, 0xFF,
+};
+static char disp_on216[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF7, 0x01, 0xFF, 0xFF,
+};
+static char disp_on217[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF8, 0x13, 0xFF, 0xFF,
+};
+static char disp_on218[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xF9, 0x01, 0xFF, 0xFF,
+};
+static char disp_on219[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFA, 0x1D, 0xFF, 0xFF,
+};
+static char disp_on220[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on221[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on222[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x00, 0x01, 0xFF, 0xFF,
+};
+static char disp_on223[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x01, 0x26, 0xFF, 0xFF,
+};
+static char disp_on224[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x02, 0x01, 0xFF, 0xFF,
+};
+static char disp_on225[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x03, 0x2F, 0xFF, 0xFF,
+};
+static char disp_on226[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x04, 0x01, 0xFF, 0xFF,
+};
+static char disp_on227[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x05, 0x37, 0xFF, 0xFF,
+};
+static char disp_on228[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x06, 0x01, 0xFF, 0xFF,
+};
+static char disp_on229[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x07, 0x56, 0xFF, 0xFF,
+};
+static char disp_on230[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x08, 0x01, 0xFF, 0xFF,
+};
+static char disp_on231[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x09, 0x70, 0xFF, 0xFF,
+};
+static char disp_on232[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on233[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0B, 0x9D, 0xFF, 0xFF,
+};
+static char disp_on234[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0C, 0x01, 0xFF, 0xFF,
+};
+static char disp_on235[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0D, 0xC2, 0xFF, 0xFF,
+};
+static char disp_on236[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0E, 0x01, 0xFF, 0xFF,
+};
+static char disp_on237[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x0F, 0xFF, 0xFF, 0xFF,
+};
+static char disp_on238[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x10, 0x02, 0xFF, 0xFF,
+};
+static char disp_on239[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x31, 0xFF, 0xFF,
+};
+static char disp_on240[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x02, 0xFF, 0xFF,
+};
+static char disp_on241[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x13, 0x32, 0xFF, 0xFF,
+};
+static char disp_on242[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x14, 0x02, 0xFF, 0xFF,
+};
+static char disp_on243[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x15, 0x60, 0xFF, 0xFF,
+};
+static char disp_on244[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x16, 0x02, 0xFF, 0xFF,
+};
+static char disp_on245[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x17, 0x94, 0xFF, 0xFF,
+};
+static char disp_on246[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x18, 0x02, 0xFF, 0xFF,
+};
+static char disp_on247[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x19, 0xB5, 0xFF, 0xFF,
+};
+static char disp_on248[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1A, 0x02, 0xFF, 0xFF,
+};
+static char disp_on249[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1B, 0xE3, 0xFF, 0xFF,
+};
+static char disp_on250[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1C, 0x03, 0xFF, 0xFF,
+};
+static char disp_on251[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on252[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1E, 0x03, 0xFF, 0xFF,
+};
+static char disp_on253[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x1F, 0x2D, 0xFF, 0xFF,
+};
+static char disp_on254[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x20, 0x03, 0xFF, 0xFF,
+};
+static char disp_on255[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x21, 0x3A, 0xFF, 0xFF,
+};
+static char disp_on256[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x22, 0x03, 0xFF, 0xFF,
+};
+static char disp_on257[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x23, 0x48, 0xFF, 0xFF,
+};
+static char disp_on258[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x24, 0x03, 0xFF, 0xFF,
+};
+static char disp_on259[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x25, 0x57, 0xFF, 0xFF,
+};
+static char disp_on260[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x26, 0x03, 0xFF, 0xFF,
+};
+static char disp_on261[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x27, 0x68, 0xFF, 0xFF,
+};
+static char disp_on262[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x28, 0x03, 0xFF, 0xFF,
+};
+static char disp_on263[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x29, 0x7B, 0xFF, 0xFF,
+};
+static char disp_on264[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2A, 0x03, 0xFF, 0xFF,
+};
+static char disp_on265[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2B, 0x90, 0xFF, 0xFF,
+};
+static char disp_on266[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on267[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x2F, 0xA0, 0xFF, 0xFF,
+};
+static char disp_on268[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x30, 0x03, 0xFF, 0xFF,
+};
+static char disp_on269[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x31, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on270[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x32, 0x00, 0xFF, 0xFF,
+};
+static char disp_on271[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x33, 0xED, 0xFF, 0xFF,
+};
+static char disp_on272[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x34, 0x00, 0xFF, 0xFF,
+};
+static char disp_on273[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x35, 0xF3, 0xFF, 0xFF,
+};
+static char disp_on274[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x36, 0x00, 0xFF, 0xFF,
+};
+static char disp_on275[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x37, 0xFE, 0xFF, 0xFF,
+};
+static char disp_on276[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x38, 0x01, 0xFF, 0xFF,
+};
+static char disp_on277[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x39, 0x09, 0xFF, 0xFF,
+};
+static char disp_on278[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on279[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3B, 0x13, 0xFF, 0xFF,
+};
+static char disp_on280[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3D, 0x01, 0xFF, 0xFF,
+};
+static char disp_on281[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x3F, 0x1D, 0xFF, 0xFF,
+};
+static char disp_on282[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x40, 0x01, 0xFF, 0xFF,
+};
+static char disp_on283[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x41, 0x26, 0xFF, 0xFF,
+};
+static char disp_on284[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x42, 0x01, 0xFF, 0xFF,
+};
+static char disp_on285[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x43, 0x2F, 0xFF, 0xFF,
+};
+static char disp_on286[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x44, 0x01, 0xFF, 0xFF,
+};
+static char disp_on287[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x45, 0x37, 0xFF, 0xFF,
+};
+static char disp_on288[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x46, 0x01, 0xFF, 0xFF,
+};
+static char disp_on289[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x47, 0x56, 0xFF, 0xFF,
+};
+static char disp_on290[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x48, 0x01, 0xFF, 0xFF,
+};
+static char disp_on291[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x49, 0x70, 0xFF, 0xFF,
+};
+static char disp_on292[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on293[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4B, 0x9D, 0xFF, 0xFF,
+};
+static char disp_on294[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4C, 0x01, 0xFF, 0xFF,
+};
+static char disp_on295[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4D, 0xC2, 0xFF, 0xFF,
+};
+static char disp_on296[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4E, 0x01, 0xFF, 0xFF,
+};
+static char disp_on297[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x4F, 0xFF, 0xFF, 0xFF,
+};
+static char disp_on298[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x50, 0x02, 0xFF, 0xFF,
+};
+static char disp_on299[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x51, 0x31, 0xFF, 0xFF,
+};
+static char disp_on300[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x52, 0x02, 0xFF, 0xFF,
+};
+static char disp_on301[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x53, 0x32, 0xFF, 0xFF,
+};
+static char disp_on302[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x54, 0x02, 0xFF, 0xFF,
+};
+static char disp_on303[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x55, 0x60, 0xFF, 0xFF,
+};
+static char disp_on304[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x56, 0x02, 0xFF, 0xFF,
+};
+static char disp_on305[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x58, 0x94, 0xFF, 0xFF,
+};
+static char disp_on306[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x59, 0x02, 0xFF, 0xFF,
+};
+static char disp_on307[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5A, 0xB5, 0xFF, 0xFF,
+};
+static char disp_on308[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5B, 0x02, 0xFF, 0xFF,
+};
+static char disp_on309[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5C, 0xE3, 0xFF, 0xFF,
+};
+static char disp_on310[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on311[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5E, 0x03, 0xFF, 0xFF,
+};
+static char disp_on312[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x5F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on313[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x60, 0x2D, 0xFF, 0xFF,
+};
+static char disp_on314[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x61, 0x03, 0xFF, 0xFF,
+};
+static char disp_on315[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x62, 0x3A, 0xFF, 0xFF,
+};
+static char disp_on316[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x63, 0x03, 0xFF, 0xFF,
+};
+static char disp_on317[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x64, 0x48, 0xFF, 0xFF,
+};
+static char disp_on318[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x65, 0x03, 0xFF, 0xFF,
+};
+static char disp_on319[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x66, 0x57, 0xFF, 0xFF,
+};
+static char disp_on320[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x67, 0x03, 0xFF, 0xFF,
+};
+static char disp_on321[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x68, 0x68, 0xFF, 0xFF,
+};
+static char disp_on322[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x69, 0x03, 0xFF, 0xFF,
+};
+static char disp_on323[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6A, 0x7B, 0xFF, 0xFF,
+};
+static char disp_on324[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6B, 0x03, 0xFF, 0xFF,
+};
+static char disp_on325[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6C, 0x90, 0xFF, 0xFF,
+};
+static char disp_on326[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on327[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6E, 0xA0, 0xFF, 0xFF,
+};
+static char disp_on328[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on329[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x70, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on330[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x71, 0x00, 0xFF, 0xFF,
+};
+static char disp_on331[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x72, 0x19, 0xFF, 0xFF,
+};
+static char disp_on332[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x73, 0x00, 0xFF, 0xFF,
+};
+static char disp_on333[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x74, 0x36, 0xFF, 0xFF,
+};
+static char disp_on334[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x75, 0x00, 0xFF, 0xFF,
+};
+static char disp_on335[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x76, 0x55, 0xFF, 0xFF,
+};
+static char disp_on336[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x77, 0x00, 0xFF, 0xFF,
+};
+static char disp_on337[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x78, 0x70, 0xFF, 0xFF,
+};
+static char disp_on338[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x79, 0x00, 0xFF, 0xFF,
+};
+static char disp_on339[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7A, 0x83, 0xFF, 0xFF,
+};
+static char disp_on340[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7B, 0x00, 0xFF, 0xFF,
+};
+static char disp_on341[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7C, 0x99, 0xFF, 0xFF,
+};
+static char disp_on342[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7D, 0x00, 0xFF, 0xFF,
+};
+static char disp_on343[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7E, 0xA8, 0xFF, 0xFF,
+};
+static char disp_on344[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x7F, 0x00, 0xFF, 0xFF,
+};
+static char disp_on345[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x80, 0xB7, 0xFF, 0xFF,
+};
+static char disp_on346[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x81, 0x00, 0xFF, 0xFF,
+};
+static char disp_on347[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x82, 0xC5, 0xFF, 0xFF,
+};
+static char disp_on348[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x83, 0x00, 0xFF, 0xFF,
+};
+static char disp_on349[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x84, 0xF7, 0xFF, 0xFF,
+};
+static char disp_on350[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x85, 0x01, 0xFF, 0xFF,
+};
+static char disp_on351[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x86, 0x1E, 0xFF, 0xFF,
+};
+static char disp_on352[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x87, 0x01, 0xFF, 0xFF,
+};
+static char disp_on353[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x88, 0x60, 0xFF, 0xFF,
+};
+static char disp_on354[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x89, 0x01, 0xFF, 0xFF,
+};
+static char disp_on355[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8A, 0x95, 0xFF, 0xFF,
+};
+static char disp_on356[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8B, 0x01, 0xFF, 0xFF,
+};
+static char disp_on357[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8C, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on358[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8D, 0x02, 0xFF, 0xFF,
+};
+static char disp_on359[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8E, 0x20, 0xFF, 0xFF,
+};
+static char disp_on360[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x8F, 0x02, 0xFF, 0xFF,
+};
+static char disp_on361[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x90, 0x23, 0xFF, 0xFF,
+};
+static char disp_on362[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x91, 0x02, 0xFF, 0xFF,
+};
+static char disp_on363[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x92, 0x59, 0xFF, 0xFF,
+};
+static char disp_on364[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x93, 0x02, 0xFF, 0xFF,
+};
+static char disp_on365[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x94, 0x94, 0xFF, 0xFF,
+};
+static char disp_on366[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x95, 0x02, 0xFF, 0xFF,
+};
+static char disp_on367[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x96, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on368[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x97, 0x02, 0xFF, 0xFF,
+};
+static char disp_on369[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x98, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on370[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x99, 0x03, 0xFF, 0xFF,
+};
+static char disp_on371[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9A, 0x01, 0xFF, 0xFF,
+};
+static char disp_on372[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9B, 0x03, 0xFF, 0xFF,
+};
+static char disp_on373[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9C, 0x28, 0xFF, 0xFF,
+};
+static char disp_on374[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9D, 0x03, 0xFF, 0xFF,
+};
+static char disp_on375[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9E, 0x30, 0xFF, 0xFF,
+};
+static char disp_on376[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x9F, 0x03, 0xFF, 0xFF,
+};
+static char disp_on377[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA0, 0x37, 0xFF, 0xFF,
+};
+static char disp_on378[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA2, 0x03, 0xFF, 0xFF,
+};
+static char disp_on379[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA3, 0x3B, 0xFF, 0xFF,
+};
+static char disp_on380[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA4, 0x03, 0xFF, 0xFF,
+};
+static char disp_on381[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA5, 0x40, 0xFF, 0xFF,
+};
+static char disp_on382[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA6, 0x03, 0xFF, 0xFF,
+};
+static char disp_on383[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA7, 0x50, 0xFF, 0xFF,
+};
+static char disp_on384[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xA9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on385[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAA, 0x6D, 0xFF, 0xFF,
+};
+static char disp_on386[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on387[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAC, 0x80, 0xFF, 0xFF,
+};
+static char disp_on388[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on389[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAE, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on390[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xAF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on391[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB0, 0x19, 0xFF, 0xFF,
+};
+static char disp_on392[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on393[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB2, 0x36, 0xFF, 0xFF,
+};
+static char disp_on394[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB3, 0x00, 0xFF, 0xFF,
+};
+static char disp_on395[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB4, 0x55, 0xFF, 0xFF,
+};
+static char disp_on396[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB5, 0x00, 0xFF, 0xFF,
+};
+static char disp_on397[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB6, 0x70, 0xFF, 0xFF,
+};
+static char disp_on398[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB7, 0x00, 0xFF, 0xFF,
+};
+static char disp_on399[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB8, 0x83, 0xFF, 0xFF,
+};
+static char disp_on400[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xB9, 0x00, 0xFF, 0xFF,
+};
+static char disp_on401[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBA, 0x99, 0xFF, 0xFF,
+};
+static char disp_on402[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBB, 0x00, 0xFF, 0xFF,
+};
+static char disp_on403[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBC, 0xA8, 0xFF, 0xFF,
+};
+static char disp_on404[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBD, 0x00, 0xFF, 0xFF,
+};
+static char disp_on405[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBE, 0xB7, 0xFF, 0xFF,
+};
+static char disp_on406[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xBF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on407[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC0, 0xC5, 0xFF, 0xFF,
+};
+static char disp_on408[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC1, 0x00, 0xFF, 0xFF,
+};
+static char disp_on409[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC2, 0xF7, 0xFF, 0xFF,
+};
+static char disp_on410[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC3, 0x01, 0xFF, 0xFF,
+};
+static char disp_on411[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC4, 0x1E, 0xFF, 0xFF,
+};
+static char disp_on412[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC5, 0x01, 0xFF, 0xFF,
+};
+static char disp_on413[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC6, 0x60, 0xFF, 0xFF,
+};
+static char disp_on414[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC7, 0x01, 0xFF, 0xFF,
+};
+static char disp_on415[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC8, 0x95, 0xFF, 0xFF,
+};
+static char disp_on416[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xC9, 0x01, 0xFF, 0xFF,
+};
+static char disp_on417[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCA, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on418[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCB, 0x02, 0xFF, 0xFF,
+};
+static char disp_on419[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCC, 0x20, 0xFF, 0xFF,
+};
+static char disp_on420[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCD, 0x02, 0xFF, 0xFF,
+};
+static char disp_on421[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCE, 0x23, 0xFF, 0xFF,
+};
+static char disp_on422[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xCF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on423[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD0, 0x59, 0xFF, 0xFF,
+};
+static char disp_on424[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD1, 0x02, 0xFF, 0xFF,
+};
+static char disp_on425[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD2, 0x94, 0xFF, 0xFF,
+};
+static char disp_on426[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD3, 0x02, 0xFF, 0xFF,
+};
+static char disp_on427[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD4, 0xB4, 0xFF, 0xFF,
+};
+static char disp_on428[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD5, 0x02, 0xFF, 0xFF,
+};
+static char disp_on429[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD6, 0xE1, 0xFF, 0xFF,
+};
+static char disp_on430[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD7, 0x03, 0xFF, 0xFF,
+};
+static char disp_on431[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD8, 0x01, 0xFF, 0xFF,
+};
+static char disp_on432[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xD9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on433[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDA, 0x28, 0xFF, 0xFF,
+};
+static char disp_on434[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDB, 0x03, 0xFF, 0xFF,
+};
+static char disp_on435[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDC, 0x30, 0xFF, 0xFF,
+};
+static char disp_on436[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDD, 0x03, 0xFF, 0xFF,
+};
+static char disp_on437[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDE, 0x37, 0xFF, 0xFF,
+};
+static char disp_on438[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xDF, 0x03, 0xFF, 0xFF,
+};
+static char disp_on439[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE0, 0x3B, 0xFF, 0xFF,
+};
+static char disp_on440[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE1, 0x03, 0xFF, 0xFF,
+};
+static char disp_on441[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE2, 0x40, 0xFF, 0xFF,
+};
+static char disp_on442[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE3, 0x03, 0xFF, 0xFF,
+};
+static char disp_on443[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE4, 0x50, 0xFF, 0xFF,
+};
+static char disp_on444[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE5, 0x03, 0xFF, 0xFF,
+};
+static char disp_on445[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE6, 0x6D, 0xFF, 0xFF,
+};
+static char disp_on446[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE7, 0x03, 0xFF, 0xFF,
+};
+static char disp_on447[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE8, 0x80, 0xFF, 0xFF,
+};
+static char disp_on448[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xE9, 0x03, 0xFF, 0xFF,
+};
+static char disp_on449[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xEA, 0xCB, 0xFF, 0xFF,
+};
+static char disp_on450[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x01, 0xFF, 0xFF,
+};
+static char disp_on451[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on452[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x02, 0xFF, 0xFF,
+};
+static char disp_on453[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on454[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x04, 0xFF, 0xFF,
+};
+static char disp_on455[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFB, 0x01, 0xFF, 0xFF,
+};
+static char disp_on456[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on457[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x11, 0x00, 0xFF, 0xFF,
+};
+static char disp_on458[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0xEE, 0xFF, 0xFF,
+};
+static char disp_on459[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x12, 0x50, 0xFF, 0xFF,
+};
+static char disp_on460[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x13, 0x02, 0xFF, 0xFF,
+};
+static char disp_on461[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x6A, 0x60, 0xFF, 0xFF,
+};
+static char disp_on462[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0xFF, 0x00, 0xFF, 0xFF,
+};
+static char disp_on463[8] = {
+ 0x02, 0x00, 0x39, 0xc0,
+ 0x29, 0x00, 0xFF, 0xFF,
+};
+
+static struct mipi_dsi_cmd nt35590_panel_video_mode_cmds[] = {
+ {sizeof(disp_on0), (char *)disp_on0},
+ {sizeof(disp_on1), (char *)disp_on1},
+ {sizeof(disp_on2), (char *)disp_on2},
+ {sizeof(disp_on3), (char *)disp_on3},
+ {sizeof(lane), (char *)lane},
+ {sizeof(video_mode), (char *)video_mode},
+ {sizeof(disp_on6), (char *)disp_on6},
+ {sizeof(disp_on7), (char *)disp_on7},
+ {sizeof(disp_on8), (char *)disp_on8},
+ {sizeof(disp_on9), (char *)disp_on9},
+ {sizeof(disp_on10), (char *)disp_on10},
+ {sizeof(disp_on11), (char *)disp_on11},
+ {sizeof(disp_on12), (char *)disp_on12},
+ {sizeof(disp_on13), (char *)disp_on13},
+ {sizeof(disp_on14), (char *)disp_on14},
+ {sizeof(disp_on15), (char *)disp_on15},
+ {sizeof(disp_on16), (char *)disp_on16},
+ {sizeof(disp_on17), (char *)disp_on17},
+ {sizeof(disp_on18), (char *)disp_on18},
+ {sizeof(disp_on19), (char *)disp_on19},
+ {sizeof(disp_on20), (char *)disp_on20},
+ {sizeof(disp_on21), (char *)disp_on21},
+ {sizeof(disp_on22), (char *)disp_on22},
+ {sizeof(disp_on23), (char *)disp_on23},
+ {sizeof(disp_on24), (char *)disp_on24},
+ {sizeof(disp_on25), (char *)disp_on25},
+ {sizeof(disp_on26), (char *)disp_on26},
+ {sizeof(disp_on27), (char *)disp_on27},
+ {sizeof(disp_on28), (char *)disp_on28},
+ {sizeof(disp_on29), (char *)disp_on29},
+ {sizeof(disp_on30), (char *)disp_on30},
+ {sizeof(disp_on31), (char *)disp_on31},
+ {sizeof(disp_on32), (char *)disp_on32},
+ {sizeof(disp_on33), (char *)disp_on33},
+ {sizeof(disp_on34), (char *)disp_on34},
+ {sizeof(disp_on35), (char *)disp_on35},
+ {sizeof(disp_on36), (char *)disp_on36},
+ {sizeof(disp_on37), (char *)disp_on37},
+ {sizeof(disp_on38), (char *)disp_on38},
+ {sizeof(disp_on39), (char *)disp_on39},
+ {sizeof(disp_on40), (char *)disp_on40},
+ {sizeof(disp_on41), (char *)disp_on41},
+ {sizeof(disp_on42), (char *)disp_on42},
+ {sizeof(disp_on43), (char *)disp_on43},
+ {sizeof(disp_on44), (char *)disp_on44},
+ {sizeof(disp_on45), (char *)disp_on45},
+ {sizeof(disp_on46), (char *)disp_on46},
+ {sizeof(disp_on47), (char *)disp_on47},
+ {sizeof(disp_on48), (char *)disp_on48},
+ {sizeof(disp_on49), (char *)disp_on49},
+ {sizeof(disp_on50), (char *)disp_on50},
+ {sizeof(disp_on51), (char *)disp_on51},
+ {sizeof(disp_on52), (char *)disp_on52},
+ {sizeof(disp_on53), (char *)disp_on53},
+ {sizeof(disp_on54), (char *)disp_on54},
+ {sizeof(disp_on55), (char *)disp_on55},
+ {sizeof(disp_on56), (char *)disp_on56},
+ {sizeof(disp_on57), (char *)disp_on57},
+ {sizeof(disp_on58), (char *)disp_on58},
+ {sizeof(disp_on59), (char *)disp_on59},
+ {sizeof(disp_on60), (char *)disp_on60},
+ {sizeof(disp_on61), (char *)disp_on61},
+ {sizeof(disp_on62), (char *)disp_on62},
+ {sizeof(disp_on63), (char *)disp_on63},
+ {sizeof(disp_on64), (char *)disp_on64},
+ {sizeof(disp_on65), (char *)disp_on65},
+ {sizeof(disp_on66), (char *)disp_on66},
+ {sizeof(disp_on67), (char *)disp_on67},
+ {sizeof(disp_on68), (char *)disp_on68},
+ {sizeof(disp_on69), (char *)disp_on69},
+ {sizeof(disp_on70), (char *)disp_on70},
+ {sizeof(disp_on71), (char *)disp_on71},
+ {sizeof(disp_on72), (char *)disp_on72},
+ {sizeof(disp_on73), (char *)disp_on73},
+ {sizeof(disp_on74), (char *)disp_on74},
+ {sizeof(disp_on75), (char *)disp_on75},
+ {sizeof(disp_on76), (char *)disp_on76},
+ {sizeof(disp_on77), (char *)disp_on77},
+ {sizeof(disp_on78), (char *)disp_on78},
+ {sizeof(disp_on79), (char *)disp_on79},
+ {sizeof(disp_on80), (char *)disp_on80},
+ {sizeof(disp_on81), (char *)disp_on81},
+ {sizeof(disp_on82), (char *)disp_on82},
+ {sizeof(disp_on83), (char *)disp_on83},
+ {sizeof(disp_on84), (char *)disp_on84},
+ {sizeof(disp_on85), (char *)disp_on85},
+ {sizeof(disp_on86), (char *)disp_on86},
+ {sizeof(disp_on87), (char *)disp_on87},
+ {sizeof(disp_on88), (char *)disp_on88},
+ {sizeof(disp_on89), (char *)disp_on89},
+ {sizeof(disp_on90), (char *)disp_on90},
+ {sizeof(disp_on91), (char *)disp_on91},
+ {sizeof(disp_on92), (char *)disp_on92},
+ {sizeof(disp_on93), (char *)disp_on93},
+ {sizeof(disp_on94), (char *)disp_on94},
+ {sizeof(disp_on95), (char *)disp_on95},
+ {sizeof(disp_on96), (char *)disp_on96},
+ {sizeof(disp_on97), (char *)disp_on97},
+ {sizeof(disp_on98), (char *)disp_on98},
+ {sizeof(disp_on99), (char *)disp_on99},
+ {sizeof(disp_on100), (char *)disp_on100},
+ {sizeof(disp_on101), (char *)disp_on101},
+ {sizeof(disp_on102), (char *)disp_on102},
+ {sizeof(disp_on103), (char *)disp_on103},
+ {sizeof(disp_on104), (char *)disp_on104},
+ {sizeof(disp_on105), (char *)disp_on105},
+ {sizeof(disp_on106), (char *)disp_on106},
+ {sizeof(disp_on107), (char *)disp_on107},
+ {sizeof(disp_on108), (char *)disp_on108},
+ {sizeof(disp_on109), (char *)disp_on109},
+ {sizeof(disp_on110), (char *)disp_on110},
+ {sizeof(disp_on111), (char *)disp_on111},
+ {sizeof(disp_on112), (char *)disp_on112},
+ {sizeof(disp_on113), (char *)disp_on113},
+ {sizeof(disp_on114), (char *)disp_on114},
+ {sizeof(disp_on115), (char *)disp_on115},
+ {sizeof(disp_on116), (char *)disp_on116},
+ {sizeof(disp_on117), (char *)disp_on117},
+ {sizeof(disp_on118), (char *)disp_on118},
+ {sizeof(disp_on119), (char *)disp_on119},
+ {sizeof(disp_on120), (char *)disp_on120},
+ {sizeof(disp_on121), (char *)disp_on121},
+ {sizeof(disp_on122), (char *)disp_on122},
+ {sizeof(disp_on123), (char *)disp_on123},
+ {sizeof(disp_on124), (char *)disp_on124},
+ {sizeof(disp_on125), (char *)disp_on125},
+ {sizeof(disp_on126), (char *)disp_on126},
+ {sizeof(disp_on127), (char *)disp_on127},
+ {sizeof(disp_on128), (char *)disp_on128},
+ {sizeof(disp_on129), (char *)disp_on129},
+ {sizeof(disp_on130), (char *)disp_on130},
+ {sizeof(disp_on131), (char *)disp_on131},
+ {sizeof(disp_on132), (char *)disp_on132},
+ {sizeof(disp_on133), (char *)disp_on133},
+ {sizeof(disp_on134), (char *)disp_on134},
+ {sizeof(disp_on135), (char *)disp_on135},
+ {sizeof(disp_on136), (char *)disp_on136},
+ {sizeof(disp_on137), (char *)disp_on137},
+ {sizeof(disp_on138), (char *)disp_on138},
+ {sizeof(disp_on139), (char *)disp_on139},
+ {sizeof(disp_on140), (char *)disp_on140},
+ {sizeof(disp_on141), (char *)disp_on141},
+ {sizeof(disp_on142), (char *)disp_on142},
+ {sizeof(disp_on143), (char *)disp_on143},
+ {sizeof(disp_on144), (char *)disp_on144},
+ {sizeof(disp_on145), (char *)disp_on145},
+ {sizeof(disp_on146), (char *)disp_on146},
+ {sizeof(disp_on147), (char *)disp_on147},
+ {sizeof(disp_on148), (char *)disp_on148},
+ {sizeof(disp_on149), (char *)disp_on149},
+ {sizeof(disp_on150), (char *)disp_on150},
+ {sizeof(disp_on151), (char *)disp_on151},
+ {sizeof(disp_on152), (char *)disp_on152},
+ {sizeof(disp_on153), (char *)disp_on153},
+ {sizeof(disp_on154), (char *)disp_on154},
+ {sizeof(disp_on155), (char *)disp_on155},
+ {sizeof(disp_on156), (char *)disp_on156},
+ {sizeof(disp_on157), (char *)disp_on157},
+ {sizeof(disp_on158), (char *)disp_on158},
+ {sizeof(disp_on159), (char *)disp_on159},
+ {sizeof(disp_on160), (char *)disp_on150},
+ {sizeof(disp_on161), (char *)disp_on161},
+ {sizeof(disp_on162), (char *)disp_on162},
+ {sizeof(disp_on163), (char *)disp_on163},
+ {sizeof(disp_on164), (char *)disp_on164},
+ {sizeof(disp_on165), (char *)disp_on165},
+ {sizeof(disp_on166), (char *)disp_on166},
+ {sizeof(disp_on167), (char *)disp_on167},
+ {sizeof(disp_on168), (char *)disp_on168},
+ {sizeof(disp_on169), (char *)disp_on169},
+ {sizeof(disp_on170), (char *)disp_on170},
+ {sizeof(disp_on171), (char *)disp_on171},
+ {sizeof(disp_on172), (char *)disp_on172},
+ {sizeof(disp_on173), (char *)disp_on173},
+ {sizeof(disp_on174), (char *)disp_on174},
+ {sizeof(disp_on175), (char *)disp_on175},
+ {sizeof(disp_on176), (char *)disp_on176},
+ {sizeof(disp_on177), (char *)disp_on177},
+ {sizeof(disp_on178), (char *)disp_on178},
+ {sizeof(disp_on179), (char *)disp_on179},
+ {sizeof(disp_on180), (char *)disp_on180},
+ {sizeof(disp_on181), (char *)disp_on181},
+ {sizeof(disp_on182), (char *)disp_on182},
+ {sizeof(disp_on183), (char *)disp_on183},
+ {sizeof(disp_on184), (char *)disp_on184},
+ {sizeof(disp_on185), (char *)disp_on185},
+ {sizeof(disp_on186), (char *)disp_on186},
+ {sizeof(disp_on187), (char *)disp_on187},
+ {sizeof(disp_on188), (char *)disp_on188},
+ {sizeof(disp_on189), (char *)disp_on189},
+ {sizeof(disp_on190), (char *)disp_on190},
+ {sizeof(disp_on191), (char *)disp_on191},
+ {sizeof(disp_on192), (char *)disp_on192},
+ {sizeof(disp_on193), (char *)disp_on193},
+ {sizeof(disp_on194), (char *)disp_on194},
+ {sizeof(disp_on195), (char *)disp_on195},
+ {sizeof(disp_on196), (char *)disp_on196},
+ {sizeof(disp_on197), (char *)disp_on197},
+ {sizeof(disp_on198), (char *)disp_on198},
+ {sizeof(disp_on199), (char *)disp_on199},
+ {sizeof(disp_on200), (char *)disp_on200},
+ {sizeof(disp_on201), (char *)disp_on201},
+ {sizeof(disp_on202), (char *)disp_on202},
+ {sizeof(disp_on203), (char *)disp_on203},
+ {sizeof(disp_on204), (char *)disp_on204},
+ {sizeof(disp_on205), (char *)disp_on205},
+ {sizeof(disp_on206), (char *)disp_on206},
+ {sizeof(disp_on207), (char *)disp_on207},
+ {sizeof(disp_on208), (char *)disp_on208},
+ {sizeof(disp_on209), (char *)disp_on209},
+ {sizeof(disp_on210), (char *)disp_on210},
+ {sizeof(disp_on211), (char *)disp_on211},
+ {sizeof(disp_on212), (char *)disp_on212},
+ {sizeof(disp_on213), (char *)disp_on213},
+ {sizeof(disp_on214), (char *)disp_on214},
+ {sizeof(disp_on215), (char *)disp_on215},
+ {sizeof(disp_on216), (char *)disp_on216},
+ {sizeof(disp_on217), (char *)disp_on217},
+ {sizeof(disp_on218), (char *)disp_on218},
+ {sizeof(disp_on219), (char *)disp_on219},
+ {sizeof(disp_on220), (char *)disp_on220},
+ {sizeof(disp_on221), (char *)disp_on221},
+ {sizeof(disp_on222), (char *)disp_on222},
+ {sizeof(disp_on223), (char *)disp_on223},
+ {sizeof(disp_on224), (char *)disp_on224},
+ {sizeof(disp_on225), (char *)disp_on225},
+ {sizeof(disp_on226), (char *)disp_on226},
+ {sizeof(disp_on227), (char *)disp_on227},
+ {sizeof(disp_on228), (char *)disp_on228},
+ {sizeof(disp_on229), (char *)disp_on229},
+ {sizeof(disp_on230), (char *)disp_on230},
+ {sizeof(disp_on231), (char *)disp_on231},
+ {sizeof(disp_on232), (char *)disp_on232},
+ {sizeof(disp_on233), (char *)disp_on233},
+ {sizeof(disp_on234), (char *)disp_on234},
+ {sizeof(disp_on235), (char *)disp_on235},
+ {sizeof(disp_on236), (char *)disp_on236},
+ {sizeof(disp_on237), (char *)disp_on237},
+ {sizeof(disp_on238), (char *)disp_on238},
+ {sizeof(disp_on239), (char *)disp_on239},
+ {sizeof(disp_on240), (char *)disp_on240},
+ {sizeof(disp_on241), (char *)disp_on241},
+ {sizeof(disp_on242), (char *)disp_on242},
+ {sizeof(disp_on243), (char *)disp_on243},
+ {sizeof(disp_on244), (char *)disp_on244},
+ {sizeof(disp_on245), (char *)disp_on245},
+ {sizeof(disp_on246), (char *)disp_on246},
+ {sizeof(disp_on247), (char *)disp_on247},
+ {sizeof(disp_on248), (char *)disp_on248},
+ {sizeof(disp_on249), (char *)disp_on249},
+ {sizeof(disp_on250), (char *)disp_on250},
+ {sizeof(disp_on251), (char *)disp_on251},
+ {sizeof(disp_on252), (char *)disp_on252},
+ {sizeof(disp_on253), (char *)disp_on253},
+ {sizeof(disp_on254), (char *)disp_on254},
+ {sizeof(disp_on255), (char *)disp_on255},
+ {sizeof(disp_on256), (char *)disp_on256},
+ {sizeof(disp_on257), (char *)disp_on257},
+ {sizeof(disp_on258), (char *)disp_on258},
+ {sizeof(disp_on259), (char *)disp_on259},
+ {sizeof(disp_on260), (char *)disp_on260},
+ {sizeof(disp_on261), (char *)disp_on261},
+ {sizeof(disp_on262), (char *)disp_on262},
+ {sizeof(disp_on263), (char *)disp_on263},
+ {sizeof(disp_on264), (char *)disp_on264},
+ {sizeof(disp_on265), (char *)disp_on265},
+ {sizeof(disp_on266), (char *)disp_on266},
+ {sizeof(disp_on267), (char *)disp_on267},
+ {sizeof(disp_on268), (char *)disp_on268},
+ {sizeof(disp_on269), (char *)disp_on269},
+ {sizeof(disp_on270), (char *)disp_on270},
+ {sizeof(disp_on271), (char *)disp_on271},
+ {sizeof(disp_on272), (char *)disp_on272},
+ {sizeof(disp_on273), (char *)disp_on273},
+ {sizeof(disp_on274), (char *)disp_on274},
+ {sizeof(disp_on275), (char *)disp_on275},
+ {sizeof(disp_on276), (char *)disp_on276},
+ {sizeof(disp_on277), (char *)disp_on277},
+ {sizeof(disp_on278), (char *)disp_on278},
+ {sizeof(disp_on279), (char *)disp_on279},
+ {sizeof(disp_on280), (char *)disp_on280},
+ {sizeof(disp_on281), (char *)disp_on281},
+ {sizeof(disp_on282), (char *)disp_on282},
+ {sizeof(disp_on283), (char *)disp_on283},
+ {sizeof(disp_on284), (char *)disp_on284},
+ {sizeof(disp_on285), (char *)disp_on285},
+ {sizeof(disp_on286), (char *)disp_on286},
+ {sizeof(disp_on287), (char *)disp_on287},
+ {sizeof(disp_on288), (char *)disp_on288},
+ {sizeof(disp_on289), (char *)disp_on289},
+ {sizeof(disp_on290), (char *)disp_on290},
+ {sizeof(disp_on291), (char *)disp_on291},
+ {sizeof(disp_on292), (char *)disp_on292},
+ {sizeof(disp_on293), (char *)disp_on293},
+ {sizeof(disp_on294), (char *)disp_on294},
+ {sizeof(disp_on295), (char *)disp_on295},
+ {sizeof(disp_on296), (char *)disp_on296},
+ {sizeof(disp_on297), (char *)disp_on297},
+ {sizeof(disp_on298), (char *)disp_on298},
+ {sizeof(disp_on299), (char *)disp_on299},
+ {sizeof(disp_on300), (char *)disp_on300},
+ {sizeof(disp_on301), (char *)disp_on301},
+ {sizeof(disp_on302), (char *)disp_on302},
+ {sizeof(disp_on303), (char *)disp_on303},
+ {sizeof(disp_on304), (char *)disp_on304},
+ {sizeof(disp_on305), (char *)disp_on305},
+ {sizeof(disp_on306), (char *)disp_on306},
+ {sizeof(disp_on307), (char *)disp_on307},
+ {sizeof(disp_on308), (char *)disp_on308},
+ {sizeof(disp_on309), (char *)disp_on309},
+ {sizeof(disp_on310), (char *)disp_on310},
+ {sizeof(disp_on311), (char *)disp_on311},
+ {sizeof(disp_on312), (char *)disp_on312},
+ {sizeof(disp_on313), (char *)disp_on313},
+ {sizeof(disp_on314), (char *)disp_on314},
+ {sizeof(disp_on315), (char *)disp_on315},
+ {sizeof(disp_on316), (char *)disp_on316},
+ {sizeof(disp_on317), (char *)disp_on317},
+ {sizeof(disp_on318), (char *)disp_on318},
+ {sizeof(disp_on319), (char *)disp_on319},
+ {sizeof(disp_on320), (char *)disp_on320},
+ {sizeof(disp_on321), (char *)disp_on321},
+ {sizeof(disp_on322), (char *)disp_on322},
+ {sizeof(disp_on323), (char *)disp_on323},
+ {sizeof(disp_on324), (char *)disp_on324},
+ {sizeof(disp_on325), (char *)disp_on325},
+ {sizeof(disp_on326), (char *)disp_on326},
+ {sizeof(disp_on327), (char *)disp_on327},
+ {sizeof(disp_on328), (char *)disp_on328},
+ {sizeof(disp_on329), (char *)disp_on329},
+ {sizeof(disp_on330), (char *)disp_on330},
+ {sizeof(disp_on331), (char *)disp_on331},
+ {sizeof(disp_on332), (char *)disp_on332},
+ {sizeof(disp_on333), (char *)disp_on333},
+ {sizeof(disp_on334), (char *)disp_on334},
+ {sizeof(disp_on335), (char *)disp_on335},
+ {sizeof(disp_on336), (char *)disp_on336},
+ {sizeof(disp_on337), (char *)disp_on337},
+ {sizeof(disp_on338), (char *)disp_on338},
+ {sizeof(disp_on339), (char *)disp_on339},
+ {sizeof(disp_on340), (char *)disp_on340},
+ {sizeof(disp_on341), (char *)disp_on341},
+ {sizeof(disp_on342), (char *)disp_on342},
+ {sizeof(disp_on343), (char *)disp_on343},
+ {sizeof(disp_on344), (char *)disp_on344},
+ {sizeof(disp_on345), (char *)disp_on345},
+ {sizeof(disp_on346), (char *)disp_on346},
+ {sizeof(disp_on347), (char *)disp_on347},
+ {sizeof(disp_on348), (char *)disp_on348},
+ {sizeof(disp_on349), (char *)disp_on349},
+ {sizeof(disp_on350), (char *)disp_on350},
+ {sizeof(disp_on351), (char *)disp_on351},
+ {sizeof(disp_on352), (char *)disp_on352},
+ {sizeof(disp_on353), (char *)disp_on353},
+ {sizeof(disp_on354), (char *)disp_on354},
+ {sizeof(disp_on355), (char *)disp_on355},
+ {sizeof(disp_on356), (char *)disp_on356},
+ {sizeof(disp_on357), (char *)disp_on357},
+ {sizeof(disp_on358), (char *)disp_on358},
+ {sizeof(disp_on359), (char *)disp_on359},
+ {sizeof(disp_on360), (char *)disp_on360},
+ {sizeof(disp_on361), (char *)disp_on361},
+ {sizeof(disp_on362), (char *)disp_on362},
+ {sizeof(disp_on363), (char *)disp_on363},
+ {sizeof(disp_on364), (char *)disp_on364},
+ {sizeof(disp_on365), (char *)disp_on365},
+ {sizeof(disp_on366), (char *)disp_on366},
+ {sizeof(disp_on367), (char *)disp_on367},
+ {sizeof(disp_on368), (char *)disp_on368},
+ {sizeof(disp_on369), (char *)disp_on369},
+ {sizeof(disp_on370), (char *)disp_on370},
+ {sizeof(disp_on371), (char *)disp_on371},
+ {sizeof(disp_on372), (char *)disp_on372},
+ {sizeof(disp_on373), (char *)disp_on373},
+ {sizeof(disp_on374), (char *)disp_on374},
+ {sizeof(disp_on375), (char *)disp_on375},
+ {sizeof(disp_on376), (char *)disp_on376},
+ {sizeof(disp_on377), (char *)disp_on377},
+ {sizeof(disp_on378), (char *)disp_on378},
+ {sizeof(disp_on379), (char *)disp_on379},
+ {sizeof(disp_on380), (char *)disp_on380},
+ {sizeof(disp_on381), (char *)disp_on381},
+ {sizeof(disp_on382), (char *)disp_on382},
+ {sizeof(disp_on383), (char *)disp_on383},
+ {sizeof(disp_on384), (char *)disp_on384},
+ {sizeof(disp_on385), (char *)disp_on385},
+ {sizeof(disp_on386), (char *)disp_on386},
+ {sizeof(disp_on387), (char *)disp_on387},
+ {sizeof(disp_on388), (char *)disp_on388},
+ {sizeof(disp_on389), (char *)disp_on389},
+ {sizeof(disp_on390), (char *)disp_on390},
+ {sizeof(disp_on391), (char *)disp_on391},
+ {sizeof(disp_on392), (char *)disp_on392},
+ {sizeof(disp_on393), (char *)disp_on393},
+ {sizeof(disp_on394), (char *)disp_on394},
+ {sizeof(disp_on395), (char *)disp_on395},
+ {sizeof(disp_on396), (char *)disp_on396},
+ {sizeof(disp_on397), (char *)disp_on397},
+ {sizeof(disp_on398), (char *)disp_on398},
+ {sizeof(disp_on399), (char *)disp_on399},
+ {sizeof(disp_on400), (char *)disp_on400},
+ {sizeof(disp_on401), (char *)disp_on401},
+ {sizeof(disp_on402), (char *)disp_on402},
+ {sizeof(disp_on403), (char *)disp_on403},
+ {sizeof(disp_on404), (char *)disp_on404},
+ {sizeof(disp_on405), (char *)disp_on405},
+ {sizeof(disp_on406), (char *)disp_on406},
+ {sizeof(disp_on407), (char *)disp_on407},
+ {sizeof(disp_on408), (char *)disp_on408},
+ {sizeof(disp_on409), (char *)disp_on409},
+ {sizeof(disp_on410), (char *)disp_on410},
+ {sizeof(disp_on411), (char *)disp_on411},
+ {sizeof(disp_on412), (char *)disp_on412},
+ {sizeof(disp_on413), (char *)disp_on413},
+ {sizeof(disp_on414), (char *)disp_on414},
+ {sizeof(disp_on415), (char *)disp_on415},
+ {sizeof(disp_on416), (char *)disp_on416},
+ {sizeof(disp_on417), (char *)disp_on417},
+ {sizeof(disp_on418), (char *)disp_on418},
+ {sizeof(disp_on419), (char *)disp_on419},
+ {sizeof(disp_on420), (char *)disp_on420},
+ {sizeof(disp_on421), (char *)disp_on421},
+ {sizeof(disp_on422), (char *)disp_on422},
+ {sizeof(disp_on423), (char *)disp_on423},
+ {sizeof(disp_on424), (char *)disp_on424},
+ {sizeof(disp_on425), (char *)disp_on425},
+ {sizeof(disp_on426), (char *)disp_on426},
+ {sizeof(disp_on427), (char *)disp_on427},
+ {sizeof(disp_on428), (char *)disp_on428},
+ {sizeof(disp_on429), (char *)disp_on429},
+ {sizeof(disp_on430), (char *)disp_on430},
+ {sizeof(disp_on431), (char *)disp_on431},
+ {sizeof(disp_on432), (char *)disp_on432},
+ {sizeof(disp_on433), (char *)disp_on433},
+ {sizeof(disp_on434), (char *)disp_on434},
+ {sizeof(disp_on435), (char *)disp_on435},
+ {sizeof(disp_on436), (char *)disp_on436},
+ {sizeof(disp_on437), (char *)disp_on437},
+ {sizeof(disp_on438), (char *)disp_on438},
+ {sizeof(disp_on439), (char *)disp_on439},
+ {sizeof(disp_on440), (char *)disp_on440},
+ {sizeof(disp_on441), (char *)disp_on441},
+ {sizeof(disp_on442), (char *)disp_on442},
+ {sizeof(disp_on443), (char *)disp_on443},
+ {sizeof(disp_on444), (char *)disp_on444},
+ {sizeof(disp_on445), (char *)disp_on445},
+ {sizeof(disp_on446), (char *)disp_on446},
+ {sizeof(disp_on447), (char *)disp_on447},
+ {sizeof(disp_on448), (char *)disp_on448},
+ {sizeof(disp_on449), (char *)disp_on449},
+ {sizeof(disp_on450), (char *)disp_on450},
+ {sizeof(disp_on451), (char *)disp_on451},
+ {sizeof(disp_on452), (char *)disp_on452},
+ {sizeof(disp_on453), (char *)disp_on453},
+ {sizeof(disp_on454), (char *)disp_on454},
+ {sizeof(disp_on455), (char *)disp_on455},
+ {sizeof(disp_on456), (char *)disp_on456},
+ {sizeof(disp_on457), (char *)disp_on457},
+ {sizeof(disp_on458), (char *)disp_on458},
+ {sizeof(disp_on459), (char *)disp_on459},
+ {sizeof(disp_on460), (char *)disp_on460},
+ {sizeof(disp_on461), (char *)disp_on461},
+ {sizeof(disp_on462), (char *)disp_on462},
+ {sizeof(disp_on463), (char *)disp_on463},
+};
+
+int mipi_nt35590_video_720p_config(void *pdata)
+{
+ int ret = NO_ERROR;
+
+ /* 4 Lanes -- Enables Data Lane0, 1, 2, 3 */
+ uint8_t lane_en = 0xf;
+ uint64_t low_pwr_stop_mode = 0;
+
+ /* Needed or else will have blank line at top of display */
+ uint8_t eof_bllp_pwr = 0x9;
+ uint8_t interleav = 0;
+ struct lcdc_panel_info *lcdc = NULL;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *)pdata;
+
+ dprintf(SPEW, "mipi_nt35590_video_720p_config\n");
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ lcdc = &(pinfo->lcdc);
+ if (lcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+ ret = mdss_dsi_video_mode_config((pinfo->xres + lcdc->xres_pad),
+ (pinfo->yres + lcdc->yres_pad),
+ (pinfo->xres),
+ (pinfo->yres),
+ (lcdc->h_front_porch),
+ (lcdc->h_back_porch + lcdc->h_pulse_width),
+ (lcdc->v_front_porch),
+ (lcdc->v_back_porch + lcdc->v_pulse_width),
+ (lcdc->h_pulse_width),
+ (lcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_en,
+ low_pwr_stop_mode,
+ eof_bllp_pwr,
+ interleav,
+ MIPI_DSI0_BASE);
+ return ret;
+}
+
+int mipi_nt35590_video_720p_on()
+{
+ int ret = NO_ERROR;
+ dprintf(SPEW, "mipi_nt35590_video_720p_on\n");
+ return ret;
+}
+
+int mipi_nt35590_video_720p_off()
+{
+ int ret = NO_ERROR;
+ dprintf(SPEW, "mipi_nt35590_video_720p_off\n");
+ return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
+ /* 720x1280, RGB888, 4 Lane 60 fps video mode */
+ /* regulator */
+ {0x07, 0x09, 0x03, 0x00, 0x20, 0x00, 0x01},
+ /* timing */
+ {0x7d, 0x25, 0x1d, 0x00, 0x37, 0x33, 0x22, 0x27,
+ 0x1e, 0x03, 0x04, 0x00},
+ /* phy ctrl */
+ {0x5f, 0x00, 0x00, 0x10},
+ /* strength */
+ {0xff, 0x06},
+ /* bist control */
+ {0x00, 0x00, 0xb1, 0xff, 0x00, 0x00},
+ /* lanes config */
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb},
+};
+
+void mipi_nt35590_video_720p_init(struct msm_panel_info *pinfo)
+{
+ if (!pinfo)
+ return;
+
+ dprintf(SPEW, "mipi_nt35590_video_720p_init\n");
+
+ pinfo->xres = 720;
+ pinfo->yres = 1280;
+
+ pinfo->type = MIPI_VIDEO_PANEL;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = 24;
+ pinfo->lcdc.h_back_porch = 164;
+ pinfo->lcdc.h_front_porch = 140;
+ pinfo->lcdc.h_pulse_width = 8;
+ pinfo->lcdc.v_back_porch = 1;
+ pinfo->lcdc.v_front_porch = 6;
+ pinfo->lcdc.v_pulse_width = 1;
+ pinfo->lcdc.border_clr = 0; /* blk */
+ pinfo->lcdc.underflow_clr = 0xff; /* blue */
+ pinfo->lcdc.hsync_skew = 0;
+ pinfo->clk_rate = 424000000;
+
+ pinfo->mipi.mode = DSI_VIDEO_MODE;
+ pinfo->mipi.pulse_mode_hsa_he = TRUE;
+ pinfo->mipi.hfp_power_stop = FALSE;
+ pinfo->mipi.hbp_power_stop = FALSE;
+ pinfo->mipi.hsa_power_stop = FALSE;
+ pinfo->mipi.eof_bllp_power_stop = TRUE;
+ pinfo->mipi.bllp_power_stop = TRUE;
+ pinfo->mipi.traffic_mode = DSI_BURST_MODE;
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo->mipi.vc = 0;
+ pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RGB;
+ pinfo->mipi.data_lane0 = TRUE;
+ pinfo->mipi.data_lane1 = TRUE;
+ pinfo->mipi.data_lane2 = TRUE;
+ pinfo->mipi.data_lane3 = TRUE;
+ pinfo->mipi.t_clk_post = 0x20;
+ pinfo->mipi.t_clk_pre = 0x2c;
+ pinfo->mipi.stream = 0; /* dma_p */
+ pinfo->mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
+ pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+ pinfo->mipi.frame_rate = 60;
+ pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+ pinfo->mipi.tx_eot_append = TRUE;
+
+ pinfo->mipi.num_of_lanes = 4;
+ pinfo->mipi.panel_cmds = nt35590_panel_video_mode_cmds;
+ pinfo->mipi.num_of_panel_cmds =
+ ARRAY_SIZE(nt35590_panel_video_mode_cmds);
+
+ pinfo->on = mipi_nt35590_video_720p_on;
+ pinfo->off = mipi_nt35590_video_720p_off;
+ pinfo->config = mipi_nt35590_video_720p_config;
+
+ return;
+}
diff --git a/dev/panel/msm/mipi_truly_cmd_wvga.c b/dev/panel/msm/mipi_truly_cmd_wvga.c
new file mode 100644
index 0000000..b1f6c31
--- /dev/null
+++ b/dev/panel/msm/mipi_truly_cmd_wvga.c
@@ -0,0 +1,314 @@
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <debug.h>
+#include <target/display.h>
+#include <platform/iomap.h>
+
+#define WVGA_MIPI_FB_WIDTH 480
+#define WVGA_MIPI_FB_HEIGHT 800
+
+#define TRULY_PANEL_FRAME_RATE 60
+#define TRULY_PANEL_NUM_OF_LANES 2
+#define TRULY_PANEL_LANE_SWAP 0
+#define TRULY_PANEL_T_CLK_PRE 0x41b
+#define TRULY_PANEL_T_CLK_POST 0x0
+#define TRULY_PANEL_BPP 24
+#define TRULY_PANEL_CLK_RATE 499000000
+
+static char disp_on0[4] = {
+ 0x01, 0x00, 0x05, 0x80
+};
+static char disp_on1[4] = {
+ 0xB0, 0x04, 0x23, 0x80
+};
+static char disp_on2[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xB3, 0x02, 0x00, 0xFF
+};
+static char disp_on3[4] = {
+ 0xBD, 0x00, 0x23, 0x80
+};
+static char disp_on4[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xC0, 0x18, 0x66, 0xFF
+};
+static char disp_on5[20] = {
+ 0x10, 0x00, 0x29, 0xC0,
+ 0xC1, 0x23, 0x31, 0x99,
+ 0x21, 0x20, 0x00, 0x30,
+ 0x28, 0x0C, 0x0C, 0x00,
+ 0x00, 0x00, 0x21, 0x01
+};
+static char disp_on6[12] = {
+ 0x07, 0x00, 0x29, 0xC0,
+ 0xC2, 0x00, 0x06, 0x06,
+ 0x01, 0x03, 0x00, 0xFF
+};
+static char disp_on7[32] = {
+ 0x19, 0x00, 0x29, 0xC0,
+ 0xC8, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0xFF, 0xFF, 0xFF
+};
+static char disp_on8[32] = {
+ 0x19, 0x00, 0x29, 0xC0,
+ 0xC9, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0xFF, 0xFF, 0xFF
+};
+static char disp_on9[32] = {
+ 0x19, 0x00, 0x29, 0xC0,
+ 0xCA, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0xFF, 0xFF, 0xFF
+};
+static char disp_on10[24] = {
+ 0x11, 0x00, 0x29, 0xC0,
+ 0xD0, 0x29, 0x03, 0xce,
+ 0xa6, 0x00, 0x43, 0x20,
+ 0x10, 0x01, 0x00, 0x01,
+ 0x01, 0x00, 0x03, 0x01,
+ 0x00, 0xFF, 0xFF, 0xFF
+};
+static char disp_on11[12] = {
+ 0x08, 0x00, 0x29, 0xC0,
+ 0xD1, 0x18, 0x0C, 0x23,
+ 0x03, 0x75, 0x02, 0x50
+};
+static char disp_on12[4] = {
+ 0xD3, 0x11, 0x23, 0x80
+};
+static char disp_on13[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xD5, 0x2A, 0x2A, 0xFF
+};
+static char disp_on14[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xDE, 0x01, 0x51, 0xFF
+};
+static char disp_on15[4] = {
+ 0xE6, 0x51, 0x23, 0x80
+};
+static char disp_on16[4] = {
+ 0xFA, 0x03, 0x23, 0x80
+};
+static char disp_on17[4] = {
+ 0xD6, 0x28, 0x23, 0x80
+};
+static char disp_on18[4] = {
+ 0x36, 0x41, 0x15, 0x80
+};
+static char disp_on19[12] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0x2A, 0x00, 0x00, 0x01,
+ 0xDF, 0xFF, 0xFF, 0xFF
+};
+static char disp_on20[12] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0x2B, 0x00, 0x00, 0x03,
+ 0x1F, 0xFF, 0xFF, 0xFF
+};
+static char disp_on21[4] = {
+ 0x35, 0x00, 0x15, 0x80
+};
+static char disp_on22[8] = {
+ 0x03, 0x00, 0x39, 0xc0,
+ 0x44, 0x00, 0x50, 0xFF
+};
+static char disp_on23[4] = {
+ 0x3A, 0x77, 0x15, 0x80
+};
+static char disp_on24[4] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+static char disp_on25[4] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd truly_wvga_panel_cmd_mode_cmds[] = {
+ {sizeof(disp_on0), (char *)disp_on0},
+ {sizeof(disp_on1), (char *)disp_on1},
+ {sizeof(disp_on2), (char *)disp_on2},
+ {sizeof(disp_on3), (char *)disp_on3},
+ {sizeof(disp_on4), (char *)disp_on4},
+ {sizeof(disp_on5), (char *)disp_on5},
+ {sizeof(disp_on6), (char *)disp_on6},
+ {sizeof(disp_on7), (char *)disp_on7},
+ {sizeof(disp_on8), (char *)disp_on8},
+ {sizeof(disp_on9), (char *)disp_on9},
+ {sizeof(disp_on10), (char *)disp_on10},
+ {sizeof(disp_on11), (char *)disp_on11},
+ {sizeof(disp_on12), (char *)disp_on12},
+ {sizeof(disp_on13), (char *)disp_on13},
+ {sizeof(disp_on14), (char *)disp_on14},
+ {sizeof(disp_on15), (char *)disp_on15},
+ {sizeof(disp_on16), (char *)disp_on16},
+ {sizeof(disp_on17), (char *)disp_on17},
+ {sizeof(disp_on18), (char *)disp_on18},
+ {sizeof(disp_on19), (char *)disp_on19},
+ {sizeof(disp_on20), (char *)disp_on20},
+ {sizeof(disp_on21), (char *)disp_on21},
+ {sizeof(disp_on22), (char *)disp_on22},
+ {sizeof(disp_on23), (char *)disp_on23},
+ {sizeof(disp_on24), (char *)disp_on24},
+ {sizeof(disp_on25), (char *)disp_on25},
+};
+
+int mipi_truly_cmd_wvga_config(void *pdata)
+{
+ int ret = NO_ERROR;
+ /* 2 Lanes -- Enables Data Lane0, 1 */
+ unsigned char lane_en = 0x3;
+ unsigned long low_pwr_stop_mode = 0;
+
+ /* Needed or else will have blank line at top of display */
+ unsigned char eof_bllp_pwr = 0x9;
+
+ unsigned char interleav = 0;
+ struct lcdc_panel_info *lcdc = NULL;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *) pdata;
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ lcdc = &(pinfo->lcdc);
+ if (lcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+ ret = mdss_dsi_cmd_mode_config((pinfo->xres + lcdc->xres_pad),
+ (pinfo->yres + lcdc->yres_pad),
+ (pinfo->xres),
+ (pinfo->yres),
+ pinfo->mipi.dst_format,
+ pinfo->bpp / 8,
+ lane_en,
+ 0);
+
+ return ret;
+}
+
+int mipi_truly_cmd_wvga_on()
+{
+ int ret = NO_ERROR;
+ return ret;
+}
+
+int mipi_truly_cmd_wvga_off()
+{
+ int ret = NO_ERROR;
+ return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
+ /* regulator */
+ {0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
+ /* timing */
+ {0x5d, 0x12, 0x0c, 0x00, 0x33, 0x38,
+ 0x10, 0x16, 0x1e, 0x03, 0x04, 0x00},
+ /* phy ctrl */
+ {0x7f, 0x00, 0x00, 0x00},
+ /* strength */
+ {0xff, 0x06},
+ /* bist */
+ {0x03, 0x03, 0x00, 0x00, 0x0f, 0x00},
+ /* lane config */
+ {0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x40, 0x67, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00},
+};
+
+void mipi_truly_cmd_wvga_init(struct msm_panel_info *pinfo)
+{
+ if (!pinfo)
+ return;
+
+ pinfo->xres = WVGA_MIPI_FB_WIDTH;
+ pinfo->yres = WVGA_MIPI_FB_HEIGHT;
+ pinfo->lcdc.h_back_porch = MIPI_HSYNC_BACK_PORCH_DCLK;
+ pinfo->lcdc.h_front_porch = MIPI_HSYNC_FRONT_PORCH_DCLK;
+ pinfo->lcdc.h_pulse_width = MIPI_HSYNC_PULSE_WIDTH;
+ pinfo->lcdc.v_back_porch = MIPI_VSYNC_BACK_PORCH_LINES;
+ pinfo->lcdc.v_front_porch = MIPI_VSYNC_FRONT_PORCH_LINES;
+ pinfo->lcdc.v_pulse_width = MIPI_VSYNC_PULSE_WIDTH;
+ pinfo->mipi.num_of_lanes = TRULY_PANEL_NUM_OF_LANES;
+ pinfo->mipi.frame_rate = TRULY_PANEL_FRAME_RATE;
+
+ pinfo->type = MIPI_CMD_PANEL;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = TRULY_PANEL_BPP;
+ pinfo->clk_rate = TRULY_PANEL_CLK_RATE;
+
+ pinfo->mipi.mode = DSI_CMD_MODE;
+ pinfo->mipi.traffic_mode = 1;
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo->mipi.vc = 0;
+ pinfo->mipi.lane_swap = TRULY_PANEL_LANE_SWAP;
+ pinfo->mipi.data_lane0 = TRUE;
+ pinfo->mipi.data_lane1 = TRUE;
+ pinfo->mipi.data_lane2 = FALSE;
+ pinfo->mipi.data_lane3 = FALSE;
+ pinfo->mipi.t_clk_post = TRULY_PANEL_T_CLK_POST;
+ pinfo->mipi.t_clk_pre = TRULY_PANEL_T_CLK_PRE;
+ pinfo->mipi.stream = 0;
+ pinfo->mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
+ pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+
+ pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+ pinfo->mipi.tx_eot_append = TRUE;
+
+ pinfo->mipi.panel_cmds = truly_wvga_panel_cmd_mode_cmds;
+ pinfo->mipi.num_of_panel_cmds = ARRAY_SIZE(truly_wvga_panel_cmd_mode_cmds);
+
+ pinfo->on = mipi_truly_cmd_wvga_on;
+ pinfo->off = mipi_truly_cmd_wvga_off;
+ pinfo->config = mipi_truly_cmd_wvga_config;
+
+ return;
+}
diff --git a/dev/panel/msm/mipi_truly_video_wvga.c b/dev/panel/msm/mipi_truly_video_wvga.c
new file mode 100644
index 0000000..fa757fe
--- /dev/null
+++ b/dev/panel/msm/mipi_truly_video_wvga.c
@@ -0,0 +1,313 @@
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <debug.h>
+#include <target/display.h>
+#include <platform/iomap.h>
+
+#define WVGA_MIPI_FB_WIDTH 480
+#define WVGA_MIPI_FB_HEIGHT 800
+
+#define TRULY_PANEL_FRAME_RATE 60
+#define TRULY_PANEL_NUM_OF_LANES 2
+#define TRULY_PANEL_LANE_SWAP 0
+#define TRULY_PANEL_T_CLK_PRE 0x41b
+#define TRULY_PANEL_T_CLK_POST 0x0
+#define TRULY_PANEL_BPP 24
+#define TRULY_PANEL_CLK_RATE 499000000
+
+static char disp_on0[4] = {
+ 0x01, 0x00, 0x05, 0x80
+};
+static char disp_on1[4] = {
+ 0xB0, 0x04, 0x23, 0x80
+};
+static char disp_on2[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xB3, 0x02, 0x00, 0xFF
+};
+static char disp_on3[4] = {
+ 0xBD, 0x00, 0x23, 0x80
+};
+static char disp_on4[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xC0, 0x18, 0x66, 0xFF
+};
+static char disp_on5[20] = {
+ 0x10, 0x00, 0x29, 0xC0,
+ 0xC1, 0x23, 0x31, 0x99,
+ 0x21, 0x20, 0x00, 0x30,
+ 0x28, 0x0C, 0x0C, 0x00,
+ 0x00, 0x00, 0x21, 0x01
+};
+static char disp_on6[12] = {
+ 0x07, 0x00, 0x29, 0xC0,
+ 0xC2, 0x00, 0x06, 0x06,
+ 0x01, 0x03, 0x00, 0xFF
+};
+static char disp_on7[32] = {
+ 0x19, 0x00, 0x29, 0xC0,
+ 0xC8, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0xFF, 0xFF, 0xFF
+};
+static char disp_on8[32] = {
+ 0x19, 0x00, 0x29, 0xC0,
+ 0xC9, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0xFF, 0xFF, 0xFF
+};
+static char disp_on9[32] = {
+ 0x19, 0x00, 0x29, 0xC0,
+ 0xCA, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0x04, 0x10, 0x18,
+ 0x20, 0x2E, 0x46, 0x3C,
+ 0x28, 0x1F, 0x18, 0x10,
+ 0x04, 0xFF, 0xFF, 0xFF
+};
+static char disp_on10[24] = {
+ 0x11, 0x00, 0x29, 0xC0,
+ 0xD0, 0x29, 0x03, 0xce,
+ 0xa6, 0x00, 0x43, 0x20,
+ 0x10, 0x01, 0x00, 0x01,
+ 0x01, 0x00, 0x03, 0x01,
+ 0x00, 0xFF, 0xFF, 0xFF
+};
+static char disp_on11[12] = {
+ 0x08, 0x00, 0x29, 0xC0,
+ 0xD1, 0x18, 0x0C, 0x23,
+ 0x03, 0x75, 0x02, 0x50
+};
+static char disp_on12[4] = {
+ 0xD3, 0x11, 0x23, 0x80
+};
+static char disp_on13[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xD5, 0x2A, 0x2A, 0xFF
+};
+static char disp_on14[8] = {
+ 0x03, 0x00, 0x29, 0xC0,
+ 0xDE, 0x01, 0x51, 0xFF
+};
+static char disp_on15[4] = {
+ 0xE6, 0x51, 0x23, 0x80
+};
+static char disp_on16[4] = {
+ 0xFA, 0x03, 0x23, 0x80
+};
+static char disp_on17[4] = {
+ 0xD6, 0x28, 0x23, 0x80
+};
+static char disp_on18[12] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0x2A, 0x00, 0x00, 0x01,
+ 0xDF, 0xFF, 0xFF, 0xFF
+};
+static char disp_on19[12] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0x2B, 0x00, 0x00, 0x03,
+ 0x1F, 0xFF, 0xFF, 0xFF
+};
+static char disp_on20[4] = {
+ 0x35, 0x00, 0x15, 0x80
+};
+static char disp_on21[8] = {
+ 0x03, 0x00, 0x39, 0xc0,
+ 0x44, 0x00, 0x50, 0xFF
+};
+static char disp_on22[4] = {
+ 0x36, 0xC1, 0x15, 0x80
+};
+static char disp_on23[4] = {
+ 0x3A, 0x77, 0x15, 0x80
+};
+static char disp_on24[4] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+static char disp_on25[4] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd truly_wvga_panel_video_mode_cmds[] = {
+ {sizeof(disp_on0), (char *)disp_on0},
+ {sizeof(disp_on1), (char *)disp_on1},
+ {sizeof(disp_on2), (char *)disp_on2},
+ {sizeof(disp_on3), (char *)disp_on3},
+ {sizeof(disp_on4), (char *)disp_on4},
+ {sizeof(disp_on5), (char *)disp_on5},
+ {sizeof(disp_on6), (char *)disp_on6},
+ {sizeof(disp_on7), (char *)disp_on7},
+ {sizeof(disp_on8), (char *)disp_on8},
+ {sizeof(disp_on9), (char *)disp_on9},
+ {sizeof(disp_on10), (char *)disp_on10},
+ {sizeof(disp_on11), (char *)disp_on11},
+ {sizeof(disp_on12), (char *)disp_on12},
+ {sizeof(disp_on13), (char *)disp_on13},
+ {sizeof(disp_on14), (char *)disp_on14},
+ {sizeof(disp_on15), (char *)disp_on15},
+ {sizeof(disp_on16), (char *)disp_on16},
+ {sizeof(disp_on17), (char *)disp_on17},
+ {sizeof(disp_on18), (char *)disp_on18},
+ {sizeof(disp_on19), (char *)disp_on19},
+ {sizeof(disp_on20), (char *)disp_on20},
+ {sizeof(disp_on21), (char *)disp_on21},
+ {sizeof(disp_on22), (char *)disp_on22},
+ {sizeof(disp_on23), (char *)disp_on23},
+ {sizeof(disp_on24), (char *)disp_on24},
+ {sizeof(disp_on25), (char *)disp_on25},
+};
+
+int mipi_truly_video_wvga_config(void *pdata)
+{
+ int ret = NO_ERROR;
+ /* 2 Lanes -- Enables Data Lane0, 1 */
+ unsigned char lane_en = 3;
+ unsigned long low_pwr_stop_mode = 0;
+
+ /* Needed or else will have blank line at top of display */
+ unsigned char eof_bllp_pwr = 0x9;
+
+ unsigned char interleav = 0;
+ struct lcdc_panel_info *lcdc = NULL;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *) pdata;
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ lcdc = &(pinfo->lcdc);
+ if (lcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+ ret = mdss_dsi_video_mode_config((pinfo->xres),
+ (pinfo->yres),
+ (pinfo->xres),
+ (pinfo->yres),
+ (lcdc->h_front_porch),
+ (lcdc->h_back_porch),
+ (lcdc->v_front_porch),
+ (lcdc->v_back_porch),
+ (lcdc->h_pulse_width),
+ (lcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_en,
+ low_pwr_stop_mode,
+ eof_bllp_pwr,
+ interleav,
+ MIPI_DSI0_BASE);
+ return ret;
+}
+
+int mipi_truly_video_wvga_on()
+{
+ int ret = NO_ERROR;
+ return ret;
+}
+
+int mipi_truly_video_wvga_off()
+{
+ int ret = NO_ERROR;
+ return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
+ /* regulator */
+ {0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
+ /* timing */
+ {0x5d, 0x12, 0x0c, 0x00, 0x33, 0x38,
+ 0x10, 0x16, 0x1e, 0x03, 0x04, 0x00},
+ /* phy ctrl */
+ {0x7f, 0x00, 0x00, 0x00},
+ /* strength */
+ {0xff, 0x06},
+ /* bist */
+ {0x03, 0x03, 0x00, 0x00, 0x0f, 0x00},
+ /* lane config */
+ {0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x40, 0x67, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00},
+};
+
+void mipi_truly_video_wvga_init(struct msm_panel_info *pinfo)
+{
+ if (!pinfo)
+ return;
+
+ pinfo->xres = WVGA_MIPI_FB_WIDTH;
+ pinfo->yres = WVGA_MIPI_FB_HEIGHT;
+ pinfo->lcdc.h_back_porch = MIPI_HSYNC_BACK_PORCH_DCLK;
+ pinfo->lcdc.h_front_porch = MIPI_HSYNC_FRONT_PORCH_DCLK;
+ pinfo->lcdc.h_pulse_width = MIPI_HSYNC_PULSE_WIDTH;
+ pinfo->lcdc.v_back_porch = MIPI_VSYNC_BACK_PORCH_LINES;
+ pinfo->lcdc.v_front_porch = MIPI_VSYNC_FRONT_PORCH_LINES;
+ pinfo->lcdc.v_pulse_width = MIPI_VSYNC_PULSE_WIDTH;
+ pinfo->mipi.num_of_lanes = TRULY_PANEL_NUM_OF_LANES;
+ pinfo->mipi.frame_rate = TRULY_PANEL_FRAME_RATE;
+
+ pinfo->type = MIPI_VIDEO_PANEL;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = TRULY_PANEL_BPP;
+ pinfo->clk_rate = TRULY_PANEL_CLK_RATE;
+
+ pinfo->mipi.mode = DSI_VIDEO_MODE;
+ pinfo->mipi.traffic_mode = 1;
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+ pinfo->mipi.tx_eot_append = TRUE;
+
+ pinfo->mipi.lane_swap = TRULY_PANEL_LANE_SWAP;
+ pinfo->mipi.t_clk_post = TRULY_PANEL_T_CLK_POST;
+ pinfo->mipi.t_clk_pre = TRULY_PANEL_T_CLK_PRE;
+ pinfo->mipi.panel_cmds = truly_wvga_panel_video_mode_cmds;
+ pinfo->mipi.num_of_panel_cmds = ARRAY_SIZE(truly_wvga_panel_video_mode_cmds);
+
+ pinfo->on = mipi_truly_video_wvga_on;
+ pinfo->off = mipi_truly_video_wvga_off;
+ pinfo->config = mipi_truly_video_wvga_config;
+
+ return;
+}
diff --git a/dev/panel/msm/rules.mk b/dev/panel/msm/rules.mk
index f151744..56e6815 100644
--- a/dev/panel/msm/rules.mk
+++ b/dev/panel/msm/rules.mk
@@ -24,5 +24,18 @@
ifeq ($(PLATFORM),msm8974)
OBJS += \
$(LOCAL_DIR)/mipi_toshiba_video_720p.o \
- $(LOCAL_DIR)/mipi_sharp_video_qhd.o
+ $(LOCAL_DIR)/mipi_sharp_video_qhd.o \
+ $(LOCAL_DIR)/edp_auo_1080p.o
+endif
+
+ifeq ($(PLATFORM),msm8226)
+OBJS += \
+ $(LOCAL_DIR)/mipi_nt35590_video_720p.o \
+ $(LOCAL_DIR)/mipi_nt35590_cmd_720p.o
+endif
+
+ifeq ($(PLATFORM),msm8610)
+OBJS += \
+ $(LOCAL_DIR)/mipi_truly_video_wvga.o \
+ $(LOCAL_DIR)/mipi_truly_cmd_wvga.o
endif
diff --git a/dev/pmic/pm8x41/include/pm8x41.h b/dev/pmic/pm8x41/include/pm8x41.h
index 3678bea..b230549 100644
--- a/dev/pmic/pm8x41/include/pm8x41.h
+++ b/dev/pmic/pm8x41/include/pm8x41.h
@@ -61,10 +61,17 @@
#define PON_PSHOLD_WARM_RESET 0x1
#define PON_PSHOLD_SHUTDOWN 0x4
+#define PON_PSHOLD_HARD_RESET 0x7
-#define PMIC_VERSION_V2 1
+enum PM8X41_VERSIONS
+{
+ PM8X41_VERSION_V1 = 0,
+ PM8X41_VERSION_V2 = 1,
+};
+
/*Target power on reasons*/
+#define HARD_RST 1
#define DC_CHG 8
#define USB_CHG 16
#define PON1 32
@@ -91,8 +98,10 @@
/* LDO base addresses. */
#define PM8x41_LDO2 0x14100
#define PM8x41_LDO4 0x14300
+#define PM8x41_LDO8 0x14700
#define PM8x41_LDO12 0x14B00
#define PM8x41_LDO14 0x14D00
+#define PM8x41_LDO15 0x14E00
#define PM8x41_LDO19 0x15200
#define PM8x41_LDO22 0x15500
@@ -182,8 +191,8 @@
int pm8x41_gpio_set(uint8_t gpio, uint8_t value);
int pm8x41_gpio_config(uint8_t gpio, struct pm8x41_gpio *config);
void pm8x41_set_boot_done();
+uint32_t pm8x41_v2_resin_status();
uint32_t pm8x41_resin_status();
-uint32_t pm8x41_resin_bark_workaround_status();
void pm8x41_reset_configure(uint8_t);
void pm8x41_v2_reset_configure(uint8_t);
int pm8x41_ldo_set_voltage(struct pm8x41_ldo *ldo, uint32_t voltage);
@@ -192,5 +201,6 @@
uint8_t pm8x41_get_pon_reason();
void pm8x41_config_output_mpp(struct pm8x41_mpp *mpp);
void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable);
+uint8_t pm8x41_get_is_cold_boot();
#endif
diff --git a/dev/pmic/pm8x41/include/pm8x41_adc.h b/dev/pmic/pm8x41/include/pm8x41_adc.h
index e2d6c65..3180899 100644
--- a/dev/pmic/pm8x41/include/pm8x41_adc.h
+++ b/dev/pmic/pm8x41/include/pm8x41_adc.h
@@ -103,6 +103,7 @@
#define VREF_125_CHAN_ID 10
#define GND_REF_CHAN_ID 14
#define VDD_VADC_CHAN_ID 15
+#define MPP_8_CHAN_ID 39
#define VADC_BAT_CHAN_ID 49
/* Calibration type */
@@ -155,6 +156,43 @@
#define BOOT_DONE 1
#define BOOT_DONE_BIT 7
+
+/* MPP defines */
+#define MPP_REG_BASE 0xA000
+#define MPP_REG_RANGE 0x100
+#define MPP_MAX_NUM 0x7
+
+#define MPP_MODE_AIN 0x4
+#define MPP_MASTER_ENABLE 0x1
+#define MPP_AIN_ROUTE_AMUX3 0x3
+
+/* control register base address offsets */
+#define Q_REG_MODE_CTL 0x40
+#define Q_REG_DIG_VIN_CTL 0x41
+#define Q_REG_DIG_PULL_CTL 0x42
+#define Q_REG_DIG_IN_CTL 0x43
+#define Q_REG_DIG_OUT_CTL 0x45
+#define Q_REG_EN_CTL 0x46
+#define Q_REG_AOUT_CTL 0x48
+#define Q_REG_AIN_CTL 0x4A
+#define Q_REG_SINK_CTL 0x4C
+
+/* control reg: mode */
+#define Q_REG_OUT_INVERT_SHIFT 0
+#define Q_REG_OUT_INVERT_MASK 0x1
+#define Q_REG_SRC_SEL_SHIFT 1
+#define Q_REG_SRC_SEL_MASK 0xE
+#define Q_REG_MODE_SEL_SHIFT 4
+#define Q_REG_MODE_SEL_MASK 0x70
+
+/* control reg: en */
+#define Q_REG_MASTER_EN_SHIFT 7
+#define Q_REG_MASTER_EN_MASK 0x80
+
+/* control reg: ana_in */
+#define Q_REG_AIN_ROUTE_SHIFT 0
+#define Q_REG_AIN_ROUTE_MASK 0x7
+
/* Function declations */
uint32_t pm8x41_adc_channel_read(uint16_t ch_num);
int pm8x41_iusb_max_config(uint32_t current);
@@ -167,4 +205,7 @@
uint32_t pm8x41_get_batt_voltage();
/* API: Get Voltage based State of Charge */
uint32_t pm8x41_get_voltage_based_soc(uint32_t cutoff_vol, uint32_t vdd_max);
+/* API: Set the MMP pin as ADC */
+void pm8x41_enable_mpp_as_adc(uint16_t mpp_num);
+
#endif /* _PM8X41_ADC_H_ */
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index 8a275ad..9c10ab8 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -57,6 +57,8 @@
/* PON Peripheral registers */
#define PON_PON_REASON1 0x808
+#define PON_WARMBOOT_STATUS1 0x80A
+#define PON_WARMBOOT_STATUS2 0x80B
#define PON_INT_RT_STS 0x810
#define PON_INT_SET_TYPE 0x811
#define PON_INT_POLARITY_HIGH 0x812
diff --git a/dev/pmic/pm8x41/include/pm8x41_wled.h b/dev/pmic/pm8x41/include/pm8x41_wled.h
index b357794..0ef9091 100644
--- a/dev/pmic/pm8x41/include/pm8x41_wled.h
+++ b/dev/pmic/pm8x41/include/pm8x41_wled.h
@@ -30,7 +30,7 @@
#include <debug.h>
#include <reg.h>
-#define PM_WLED_BASE 0x1D800
+#define PM_WLED_BASE 0x0D800
#define PM_WLED_CTNL_REG(n) (PM_WLED_BASE + n)
#define PM_WLED_LED_CTNL_REG(n) (PM_WLED_BASE + 0x60 + (n-1)*10)
@@ -57,7 +57,7 @@
#define PM_WLED_LED3_ILED_SYNC_MASK BIT(0)
#define PM_WLED_ENABLE_MODULE_MASK BIT(7)
-
+#define DEFAULT_SLAVE_ID 0x1
struct pm8x41_wled_data{
uint8_t mod_scheme;
uint16_t led1_brightness;
@@ -72,3 +72,4 @@
void pm8x41_wled_iled_sync_control(uint8_t enable);
void pm8x41_wled_sink_control(uint8_t enable);
void pm8x41_wled_enable(uint8_t enable);
+void pm8x41_wled_config_slave_id(uint8_t slave_id);
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index 93b5e57..0e1109b 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -187,7 +187,7 @@
}
/* Resin irq status for faulty pmic*/
-uint32_t pm8x41_resin_bark_workaround_status()
+uint32_t pm8x41_v2_resin_status()
{
uint8_t rt_sts = 0;
@@ -372,3 +372,13 @@
REG_WRITE(mpp->base + MPP_MODE_CTL, mpp->mode | (MPP_DIGITAL_OUTPUT << MPP_MODE_CTL_MODE_SHIFT));
}
+
+uint8_t pm8x41_get_is_cold_boot()
+{
+ if (REG_READ(PON_WARMBOOT_STATUS1) || REG_READ(PON_WARMBOOT_STATUS2)) {
+ dprintf(INFO,"%s: Warm boot\n", __func__);
+ return 0;
+ }
+ dprintf(INFO,"%s: cold boot\n", __func__);
+ return 1;
+}
diff --git a/dev/pmic/pm8x41/pm8x41_adc.c b/dev/pmic/pm8x41/pm8x41_adc.c
index cf6dfa9..6e4aa29 100644
--- a/dev/pmic/pm8x41/pm8x41_adc.c
+++ b/dev/pmic/pm8x41/pm8x41_adc.c
@@ -41,6 +41,7 @@
static struct adc_conf adc_data[] = {
CHAN_INIT(VADC_USR1_BASE, VADC_BAT_CHAN_ID, VADC_MODE_NORMAL, VADC_DECIM_RATIO_VAL, HW_SET_DELAY_100US, FAST_AVG_SAMP_1, CALIB_RATIO),
CHAN_INIT(VADC_USR1_BASE, VADC_BAT_VOL_CHAN_ID, VADC_MODE_NORMAL, VADC_DECIM_RATIO_VAL, HW_SET_DELAY_100US, FAST_AVG_SAMP_1, CALIB_ABS),
+ CHAN_INIT(VADC_USR1_BASE, MPP_8_CHAN_ID, VADC_MODE_NORMAL, VADC_DECIM_RATIO_VAL, HW_SET_DELAY_100US, FAST_AVG_SAMP_1, CALIB_ABS),
};
@@ -383,3 +384,31 @@
return vol_soc;
}
+
+/*
+ * API: pm8x41_enable_mpp_as_adc
+ * Configurate the MPP pin as the ADC feature.
+ */
+void pm8x41_enable_mpp_as_adc(uint16_t mpp_num)
+{
+ uint32_t val;
+ if(mpp_num > MPP_MAX_NUM)
+ {
+ dprintf(CRITICAL, "Error: The MPP pin number is unavailable\n");
+ return;
+ }
+ /* set the MPP mode as AIN */
+ val = (MPP_MODE_AIN << Q_REG_MODE_SEL_SHIFT) \
+ | (0x1 << Q_REG_OUT_INVERT_SHIFT) \
+ | (0x0 << Q_REG_SRC_SEL_SHIFT);
+ REG_WRITE((MPP_REG_BASE + mpp_num * MPP_REG_RANGE + Q_REG_MODE_CTL), val);
+
+ /* Enable the MPP */
+ val = (MPP_MASTER_ENABLE << Q_REG_MASTER_EN_SHIFT);
+ REG_WRITE((MPP_REG_BASE + mpp_num * MPP_REG_RANGE + Q_REG_EN_CTL), val);
+
+ /* AIN route to AMUX8 */
+ val = (MPP_AIN_ROUTE_AMUX3 << Q_REG_AIN_ROUTE_SHIFT);
+ REG_WRITE((MPP_REG_BASE + mpp_num * MPP_REG_RANGE + Q_REG_AIN_CTL), val);
+
+}
diff --git a/dev/pmic/pm8x41/pm8x41_wled.c b/dev/pmic/pm8x41/pm8x41_wled.c
index fd8b48f..8c37e12 100644
--- a/dev/pmic/pm8x41/pm8x41_wled.c
+++ b/dev/pmic/pm8x41/pm8x41_wled.c
@@ -31,6 +31,25 @@
#include <pm8x41_hw.h>
#include <pm8x41_wled.h>
+static uint8_t wled_slave_id;
+
+static void wled_reg_write(uint32_t addr, uint8_t val)
+{
+ uint32_t new_addr;
+ if (wled_slave_id) {
+ new_addr = addr + (wled_slave_id << 16);
+ REG_WRITE(new_addr, val);
+ } else {
+ new_addr = addr + (DEFAULT_SLAVE_ID << 16);
+ REG_WRITE(new_addr, val);
+ }
+}
+
+void pm8x41_wled_config_slave_id(uint8_t slave_id)
+{
+ wled_slave_id = slave_id;
+}
+
void pm8x41_wled_config(struct pm8x41_wled_data *wled_ctrl) {
if (!wled_ctrl) {
@@ -38,20 +57,20 @@
return;
}
- REG_WRITE(PM_WLED_MODULATION_SCHEME, wled_ctrl->mod_scheme);
+ wled_reg_write(PM_WLED_MODULATION_SCHEME, wled_ctrl->mod_scheme);
- REG_WRITE(PM_WLED_LED1_BRIGHTNESS_LSB, (wled_ctrl->led1_brightness & 0xFF));
- REG_WRITE(PM_WLED_LED1_BRIGHTNESS_MSB, ((wled_ctrl->led1_brightness >> 8) & 0xFF));
- REG_WRITE(PM_WLED_LED2_BRIGHTNESS_LSB, (wled_ctrl->led2_brightness & 0xFF));
- REG_WRITE(PM_WLED_LED2_BRIGHTNESS_MSB, ((wled_ctrl->led2_brightness >> 8) & 0xFF));
- REG_WRITE(PM_WLED_LED3_BRIGHTNESS_LSB, (wled_ctrl->led3_brightness & 0xFF));
- REG_WRITE(PM_WLED_LED3_BRIGHTNESS_MSB, ((wled_ctrl->led3_brightness >> 8) & 0xFF));
+ wled_reg_write(PM_WLED_LED1_BRIGHTNESS_LSB, (wled_ctrl->led1_brightness & 0xFF));
+ wled_reg_write(PM_WLED_LED1_BRIGHTNESS_MSB, ((wled_ctrl->led1_brightness >> 8) & 0xFF));
+ wled_reg_write(PM_WLED_LED2_BRIGHTNESS_LSB, (wled_ctrl->led2_brightness & 0xFF));
+ wled_reg_write(PM_WLED_LED2_BRIGHTNESS_MSB, ((wled_ctrl->led2_brightness >> 8) & 0xFF));
+ wled_reg_write(PM_WLED_LED3_BRIGHTNESS_LSB, (wled_ctrl->led3_brightness & 0xFF));
+ wled_reg_write(PM_WLED_LED3_BRIGHTNESS_MSB, ((wled_ctrl->led3_brightness >> 8) & 0xFF));
- REG_WRITE(PM_WLED_MAX_DUTY_CYCLE, wled_ctrl->max_duty_cycle);
- REG_WRITE(PM_WLED_OVP, wled_ctrl->ovp);
- REG_WRITE(LEDn_FULL_SCALE_CURRENT(1), wled_ctrl->full_current_scale);
- REG_WRITE(LEDn_FULL_SCALE_CURRENT(2), wled_ctrl->full_current_scale);
- REG_WRITE(LEDn_FULL_SCALE_CURRENT(3), wled_ctrl->full_current_scale);
+ wled_reg_write(PM_WLED_MAX_DUTY_CYCLE, wled_ctrl->max_duty_cycle);
+ wled_reg_write(PM_WLED_OVP, wled_ctrl->ovp);
+ wled_reg_write(LEDn_FULL_SCALE_CURRENT(1), wled_ctrl->full_current_scale);
+ wled_reg_write(LEDn_FULL_SCALE_CURRENT(2), wled_ctrl->full_current_scale);
+ wled_reg_write(LEDn_FULL_SCALE_CURRENT(3), wled_ctrl->full_current_scale);
dprintf(SPEW, "WLED Configuration Success.\n");
@@ -67,7 +86,7 @@
PM_WLED_LED3_SINK_MASK;
}
- REG_WRITE(PM_WLED_CURRENT_SINK, value);
+ wled_reg_write(PM_WLED_CURRENT_SINK, value);
dprintf(SPEW, "WLED Sink Success\n");
@@ -83,7 +102,7 @@
PM_WLED_LED1_ILED_SYNC_MASK;
}
- REG_WRITE(PM_WLED_ILED_SYNC_BIT, value);
+ wled_reg_write(PM_WLED_ILED_SYNC_BIT, value);
dprintf(SPEW, "WLED ILED Sync Success\n");
@@ -96,7 +115,7 @@
if (enable)
value = PM_WLED_ENABLE_MODULE_MASK;
- REG_WRITE(PM_WLED_ENABLE, value);
+ wled_reg_write(PM_WLED_ENABLE, value);
dprintf(SPEW, "WLED Enable Success\n");
diff --git a/include/dev/fbcon.h b/include/dev/fbcon.h
index e8b047b..7ab5ca1 100644
--- a/include/dev/fbcon.h
+++ b/include/dev/fbcon.h
@@ -2,7 +2,7 @@
* Copyright (c) 2008, Google Inc.
* All rights reserved.
*
- * Copyright (c) 2009-2010, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -32,7 +32,9 @@
#define __DEV_FBCON_H
#define FB_FORMAT_RGB565 0
-#define FB_FORMAT_RGB888 1
+#define FB_FORMAT_RGB666 1
+#define FB_FORMAT_RGB666_LOOSE 2
+#define FB_FORMAT_RGB888 3
struct fbcon_config {
void *base;
diff --git a/platform/init.c b/platform/init.c
index be48ad6..a809501 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -92,6 +92,12 @@
{
}
-__WEAK void bs_set_timestamp(enum bs_entry bs_id)
+__WEAK addr_t get_bs_info_addr()
{
+ return NULL;
+}
+
+__WEAK uint32_t platform_get_sclk_count(void)
+{
+ return 0;
}
diff --git a/platform/mdm9x25/platform.c b/platform/mdm9x25/platform.c
index e499601..71478de 100644
--- a/platform/mdm9x25/platform.c
+++ b/platform/mdm9x25/platform.c
@@ -105,38 +105,20 @@
dprintf(INFO, "platform_init()\n");
}
-static uint32_t platform_get_sclk_count(void)
+uint32_t platform_get_sclk_count(void)
{
return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL);
}
-static uint32_t kernel_load_start;
-void bs_set_timestamp(enum bs_entry bs_id)
+addr_t get_bs_info_addr()
{
- void *bs_imem;
uint32_t soc_ver = board_soc_version();
- if (bs_id >= BS_MAX) {
- dprintf(CRITICAL, "bad bs id: %u, max: %u\n", bs_id, BS_MAX);
- ASSERT(0);
- }
-
- if (bs_id == BS_KERNEL_LOAD_START) {
- kernel_load_start = platform_get_sclk_count();
- return;
- }
-
if (soc_ver < BOARD_SOC_VERSION2)
- bs_imem = (void *)BS_INFO_ADDR_V1;
+ return ((addr_t)BS_INFO_ADDR_V1);
else
- bs_imem = (void *)BS_INFO_ADDR_V2;
+ return ((addr_t)BS_INFO_ADDR_V2);
- if(bs_id == BS_KERNEL_LOAD_DONE)
- writel(platform_get_sclk_count() - kernel_load_start,
- bs_imem + (sizeof(uint32_t) * BS_KERNEL_LOAD_TIME));
- else
- writel(platform_get_sclk_count(),
- bs_imem + (sizeof(uint32_t) * bs_id));
}
void platform_uninit(void)
diff --git a/platform/mpq8092/acpuclock.c b/platform/mpq8092/acpuclock.c
new file mode 100644
index 0000000..2adfacb
--- /dev/null
+++ b/platform/mpq8092/acpuclock.c
@@ -0,0 +1,98 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <err.h>
+#include <assert.h>
+#include <debug.h>
+#include <reg.h>
+#include <platform/timer.h>
+#include <platform/iomap.h>
+#include <mmc.h>
+#include <clock.h>
+#include <platform/clock.h>
+
+void hsusb_clock_init(void)
+{
+
+}
+
+void clock_init_mmc(uint32_t interface)
+{
+
+}
+
+/* Configure MMC clock */
+void clock_config_mmc(uint32_t interface, uint32_t freq)
+{
+ uint32_t reg;
+
+ reg = 0;
+ reg |= MMC_BOOT_MCI_CLK_ENABLE;
+ reg |= MMC_BOOT_MCI_CLK_ENA_FLOW;
+ reg |= MMC_BOOT_MCI_CLK_IN_FEEDBACK;
+ writel(reg, MMC_BOOT_MCI_CLK);
+}
+
+/* Configure UART clock based on the UART block id*/
+void clock_config_uart_dm(uint8_t id)
+{
+
+}
+
+/* Function to asynchronously reset CE.
+ * Function assumes that all the CE clocks are off.
+ */
+static void ce_async_reset(uint8_t instance)
+{
+
+}
+
+static void clock_ce_enable(uint8_t instance)
+{
+
+}
+
+static void clock_ce_disable(uint8_t instance)
+{
+
+}
+
+void clock_config_ce(uint8_t instance)
+{
+ /* Need to enable the clock before disabling since the clk_disable()
+ * has a check to default to nop when the clk_enable() is not called
+ * on that particular clock.
+ */
+ clock_ce_enable(instance);
+
+ clock_ce_disable(instance);
+
+ ce_async_reset(instance);
+
+ clock_ce_enable(instance);
+}
diff --git a/platform/mpq8092/gpio.c b/platform/mpq8092/gpio.c
new file mode 100644
index 0000000..6f0c834
--- /dev/null
+++ b/platform/mpq8092/gpio.c
@@ -0,0 +1,63 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+#include <platform/gpio.h>
+
+void gpio_tlmm_config(uint32_t gpio, uint8_t func,
+ uint8_t dir, uint8_t pull,
+ uint8_t drvstr, uint32_t enable)
+{
+ uint32_t val = 0;
+ val |= pull;
+ val |= func << 2;
+ val |= drvstr << 6;
+ val |= enable << 9;
+ writel(val, (uint32_t *)GPIO_CONFIG_ADDR(gpio));
+ return;
+}
+
+void gpio_set(uint32_t gpio, uint32_t dir)
+{
+ writel(dir, (uint32_t *)GPIO_IN_OUT_ADDR(gpio));
+ return;
+}
+
+/* Configure gpio for blsp uart 2 */
+void gpio_config_uart_dm(uint8_t id)
+{
+ /* configure rx gpio */
+ gpio_tlmm_config(5, 2, GPIO_INPUT, GPIO_NO_PULL,
+ GPIO_8MA, GPIO_DISABLE);
+
+ /* configure tx gpio */
+ gpio_tlmm_config(4, 2, GPIO_OUTPUT, GPIO_NO_PULL,
+ GPIO_8MA, GPIO_DISABLE);
+}
diff --git a/platform/mpq8092/include/platform/clock.h b/platform/mpq8092/include/platform/clock.h
new file mode 100644
index 0000000..2113d4b
--- /dev/null
+++ b/platform/mpq8092/include/platform/clock.h
@@ -0,0 +1,45 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __MPQ8092_CLOCK_H
+#define __MPQ8092_CLOCK_H
+
+#include <clock.h>
+#include <clock_lib2.h>
+
+#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
+
+void platform_clock_init(void);
+
+void clock_init_mmc(uint32_t interface);
+void clock_config_mmc(uint32_t interface, uint32_t freq);
+void clock_config_uart_dm(uint8_t id);
+void hsusb_clock_init(void);
+void clock_config_ce(uint8_t instance);
+
+#endif
diff --git a/platform/mpq8092/include/platform/gpio.h b/platform/mpq8092/include/platform/gpio.h
new file mode 100644
index 0000000..4c6e24e
--- /dev/null
+++ b/platform/mpq8092/include/platform/gpio.h
@@ -0,0 +1,58 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __PLATFORM_MPQ8092_GPIO_H
+#define __PLATFORM_MPQ8092_GPIO_H
+
+/* GPIO TLMM: Direction */
+#define GPIO_INPUT 0
+#define GPIO_OUTPUT 1
+
+/* GPIO TLMM: Pullup/Pulldown */
+#define GPIO_NO_PULL 0
+#define GPIO_PULL_DOWN 1
+#define GPIO_KEEPER 2
+#define GPIO_PULL_UP 3
+
+/* GPIO TLMM: Drive Strength */
+#define GPIO_2MA 0
+#define GPIO_4MA 1
+#define GPIO_6MA 2
+#define GPIO_8MA 3
+#define GPIO_10MA 4
+#define GPIO_12MA 5
+#define GPIO_14MA 6
+#define GPIO_16MA 7
+
+/* GPIO TLMM: Status */
+#define GPIO_ENABLE 0
+#define GPIO_DISABLE 1
+
+void gpio_config_uart_dm(uint8_t id);
+
+#endif
diff --git a/platform/mpq8092/include/platform/iomap.h b/platform/mpq8092/include/platform/iomap.h
new file mode 100644
index 0000000..ba10f13
--- /dev/null
+++ b/platform/mpq8092/include/platform/iomap.h
@@ -0,0 +1,130 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM8092_IOMAP_H_
+#define _PLATFORM_MSM8092_IOMAP_H_
+
+#define MSM_IOMAP_BASE 0xF9000000
+#define MSM_IOMAP_END 0xFEFFFFFF
+
+#define SDRAM_START_ADDR 0x00000000
+
+#define MSM_SHARED_BASE 0x0FA00000
+
+#define APPS_SS_BASE 0xF9000000
+
+#define MSM_GIC_DIST_BASE APPS_SS_BASE
+#define MSM_GIC_CPU_BASE (APPS_SS_BASE + 0x2000)
+#define APPS_APCS_QTMR_AC_BASE (APPS_SS_BASE + 0x00020000)
+#define APPS_APCS_F0_QTMR_V1_BASE (APPS_SS_BASE + 0x00021000)
+#define QTMR_BASE APPS_APCS_F0_QTMR_V1_BASE
+
+#define PERIPH_SS_BASE 0xF9800000
+
+#define MSM_SDC1_BAM_BASE (PERIPH_SS_BASE + 0x00004000)
+#define MSM_SDC1_BASE (PERIPH_SS_BASE + 0x00024000)
+#define MSM_SDC1_DML_BASE (PERIPH_SS_BASE + 0x00024800)
+#define MSM_SDC3_BAM_BASE (PERIPH_SS_BASE + 0x00044000)
+#define MSM_SDC3_BASE (PERIPH_SS_BASE + 0x00064000)
+#define MSM_SDC3_DML_BASE (PERIPH_SS_BASE + 0x00064800)
+#define MSM_SDC2_BAM_BASE (PERIPH_SS_BASE + 0x00084000)
+#define MSM_SDC2_BASE (PERIPH_SS_BASE + 0x000A4000)
+#define MSM_SDC2_DML_BASE (PERIPH_SS_BASE + 0x000A4800)
+#define MSM_SDC4_BAM_BASE (PERIPH_SS_BASE + 0x000C4000)
+#define MSM_SDC4_BASE (PERIPH_SS_BASE + 0x000E4000)
+#define MSM_SDC4_DML_BASE (PERIPH_SS_BASE + 0x000E4800)
+
+#define BLSP1_UART0_BASE (PERIPH_SS_BASE + 0x0011D000)
+#define BLSP1_UART1_BASE (PERIPH_SS_BASE + 0x0011E000)
+#define BLSP1_UART2_BASE (PERIPH_SS_BASE + 0x0011F000)
+#define BLSP1_UART3_BASE (PERIPH_SS_BASE + 0x00120000)
+#define BLSP1_UART4_BASE (PERIPH_SS_BASE + 0x00121000)
+#define BLSP1_UART5_BASE (PERIPH_SS_BASE + 0x00122000)
+#define MSM_USB_BASE (PERIPH_SS_BASE + 0x00255000)
+
+#define CLK_CTL_BASE 0xFC400000
+
+#define GCC_WDOG_DEBUG (CLK_CTL_BASE + 0x00001780)
+
+#define USB_HS_BCR (CLK_CTL_BASE + 0x480)
+#define USB_BOOT_CLOCK_CTL (CLK_CTL_BASE + 0x1A00)
+
+#define SPMI_BASE 0xFC4C0000
+#define SPMI_GENI_BASE (SPMI_BASE + 0xA000)
+#define SPMI_PIC_BASE (SPMI_BASE + 0xB000)
+
+#define MSM_CE1_BAM_BASE 0xFD404000
+#define MSM_CE1_BASE 0xFD41A000
+
+#define TLMM_BASE_ADDR 0xFD510000
+#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
+#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + 0x1004 + (x)*0x10)
+
+#define MPM2_MPM_CTRL_BASE 0xFC4A1000
+#define MPM2_MPM_PS_HOLD 0xFC4AB000
+
+/* CE 2 */
+#define GCC_CE2_BCR (CLK_CTL_BASE + 0x1080)
+#define GCC_CE2_CMD_RCGR (CLK_CTL_BASE + 0x1090)
+#define GCC_CE2_CFG_RCGR (CLK_CTL_BASE + 0x1094)
+#define GCC_CE2_CBCR (CLK_CTL_BASE + 0x1084)
+#define GCC_CE2_AXI_CBCR (CLK_CTL_BASE + 0x1088)
+#define GCC_CE2_AHB_CBCR (CLK_CTL_BASE + 0x108C)
+
+/* GPLL */
+#define GPLL0_STATUS (CLK_CTL_BASE + 0x001C)
+#define APCS_GPLL_ENA_VOTE (CLK_CTL_BASE + 0x1480)
+#define APCS_CLOCK_BRANCH_ENA_VOTE (CLK_CTL_BASE + 0x1484)
+
+/* SDCC */
+#define SDCC1_BCR (CLK_CTL_BASE + 0x4C0) /* block reset */
+#define SDCC1_APPS_CBCR (CLK_CTL_BASE + 0x4C4) /* branch control */
+#define SDCC1_AHB_CBCR (CLK_CTL_BASE + 0x4C8)
+#define SDCC1_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x4CC)
+#define SDCC1_CMD_RCGR (CLK_CTL_BASE + 0x4D0) /* cmd */
+#define SDCC1_CFG_RCGR (CLK_CTL_BASE + 0x4D4) /* cfg */
+#define SDCC1_M (CLK_CTL_BASE + 0x4D8) /* m */
+#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
+#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+
+/* UART */
+#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
+#define BLSP1_UART2_APPS_CBCR (CLK_CTL_BASE + 0x704)
+#define BLSP1_UART2_APPS_CMD_RCGR (CLK_CTL_BASE + 0x70C)
+#define BLSP1_UART2_APPS_CFG_RCGR (CLK_CTL_BASE + 0x710)
+#define BLSP1_UART2_APPS_M (CLK_CTL_BASE + 0x714)
+#define BLSP1_UART2_APPS_N (CLK_CTL_BASE + 0x718)
+#define BLSP1_UART2_APPS_D (CLK_CTL_BASE + 0x71C)
+
+/* USB */
+#define USB_HS_SYSTEM_CBCR (CLK_CTL_BASE + 0x484)
+#define USB_HS_AHB_CBCR (CLK_CTL_BASE + 0x488)
+#define USB_HS_SYSTEM_CMD_RCGR (CLK_CTL_BASE + 0x490)
+#define USB_HS_SYSTEM_CFG_RCGR (CLK_CTL_BASE + 0x494)
+
+#endif
diff --git a/platform/mpq8092/include/platform/irqs.h b/platform/mpq8092/include/platform/irqs.h
new file mode 100644
index 0000000..33430cb
--- /dev/null
+++ b/platform/mpq8092/include/platform/irqs.h
@@ -0,0 +1,61 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __IRQS_MPQ8092_H
+#define __IRQS_MPQ8092_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15: STI/SGI (software triggered/generated interrupts)
+ * 16-31: PPI (private peripheral interrupts)
+ * 32+: SPI (shared peripheral interrupts)
+ */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+
+#define INT_QTMR_NON_SECURE_PHY_TIMER_EXP (GIC_PPI_START + 3)
+#define INT_QTMR_VIRTUAL_TIMER_EXP (GIC_PPI_START + 4)
+
+#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP (GIC_SPI_START + 8)
+
+#define USB1_HS_BAM_IRQ (GIC_SPI_START + 135)
+#define USB1_HS_IRQ (GIC_SPI_START + 134)
+
+/* Retrofit universal macro names */
+#define INT_USB_HS USB1_HS_IRQ
+
+#define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ (GIC_SPI_START + 190)
+
+#define NR_MSM_IRQS 256
+#define NR_GPIO_IRQS 173
+#define NR_BOARD_IRQS 0
+
+#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + \
+ NR_BOARD_IRQS)
+#endif /* __IRQS_MPQ8092_H */
diff --git a/platform/mpq8092/platform.c b/platform/mpq8092/platform.c
new file mode 100644
index 0000000..5509d78
--- /dev/null
+++ b/platform/mpq8092/platform.c
@@ -0,0 +1,49 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+#include <qgic.h>
+#include <qtimer.h>
+
+void platform_early_init(void)
+{
+ qgic_init();
+ qtimer_init();
+}
+
+void platform_init(void)
+{
+ dprintf(INFO, "platform_init()\n");
+}
+
+void platform_uninit(void)
+{
+ qtimer_uninit();
+}
diff --git a/platform/mpq8092/rules.mk b/platform/mpq8092/rules.mk
new file mode 100644
index 0000000..11faf01
--- /dev/null
+++ b/platform/mpq8092/rules.mk
@@ -0,0 +1,25 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+ARCH := arm
+#Compiling this as cortex-a8 until the compiler supports krait
+ARM_CPU := cortex-a8
+CPU := generic
+
+DEFINES += ARM_CPU_CORE_KRAIT
+
+MMC_SLOT := 1
+
+DEFINES += PERIPH_BLK_BLSP=1
+DEFINES += WITH_CPU_EARLY_INIT=0 WITH_CPU_WARM_BOOT=0 \
+ MMC_SLOT=$(MMC_SLOT)
+
+INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared/include
+
+OBJS += \
+ $(LOCAL_DIR)/platform.o \
+ $(LOCAL_DIR)/acpuclock.o \
+ $(LOCAL_DIR)/gpio.o
+
+LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
+
+include platform/msm_shared/rules.mk
diff --git a/platform/msm8226/acpuclock.c b/platform/msm8226/acpuclock.c
old mode 100644
new mode 100755
index a9e14e3..82e56a3
--- a/platform/msm8226/acpuclock.c
+++ b/platform/msm8226/acpuclock.c
@@ -279,3 +279,187 @@
}
+void mdp_gdsc_ctrl(uint8_t enable)
+{
+ uint32_t reg = 0;
+ reg = readl(MDP_GDSCR);
+ if (enable) {
+ if (reg & 0x1) {
+ reg &= ~(BIT(0) | GDSC_EN_FEW_WAIT_MASK);
+ reg |= GDSC_EN_FEW_WAIT_256_MASK;
+ writel(reg, MDP_GDSCR);
+ }
+
+ while(readl(MDP_GDSCR) & ((GDSC_POWER_ON_BIT) | (GDSC_POWER_ON_STATUS_BIT)));
+ } else {
+ reg &= ~BIT(0);
+ writel(reg, MDP_GDSCR);
+ while(!(readl(MDP_GDSCR) & ((GDSC_POWER_ON_BIT))));
+ }
+}
+
+/* Configure MDP clock */
+void mdp_clock_init(void)
+{
+ int ret;
+
+ /* Set MDP clock to 100MHz */
+ ret = clk_get_set_enable("mdp_ahb_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_ahb_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdss_mdp_clk_src", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_clk_src ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdss_vsync_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdss vsync clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdss_mdp_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdss_mdp_lut_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set lut_mdp clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+}
+
+void mdp_clock_disable(void)
+{
+ writel(0x0, DSI_BYTE0_CBCR);
+ writel(0x0, DSI_PIXEL0_CBCR);
+ clk_disable(clk_get("mdss_vsync_clk"));
+ clk_disable(clk_get("mdss_mdp_clk"));
+ clk_disable(clk_get("mdss_mdp_lut_clk"));
+ clk_disable(clk_get("mdss_mdp_clk_src"));
+ clk_disable(clk_get("mdp_ahb_clk"));
+}
+
+/* Initialize all clocks needed by Display */
+void mmss_clock_init(uint32_t dsi_pixel0_cfg_rcgr)
+{
+ int ret;
+
+ /* Configure Byte clock */
+ writel(0x100, DSI_BYTE0_CFG_RCGR);
+ writel(0x1, DSI_BYTE0_CMD_RCGR);
+ writel(0x1, DSI_BYTE0_CBCR);
+
+ /* Configure ESC clock */
+ ret = clk_get_set_enable("mdss_esc0_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set esc0_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_mmssnoc_axi_clk", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mmssnoc_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_s0_axi_clk", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mmss_s0_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure AXI clock */
+ ret = clk_get_set_enable("mdss_axi_clk", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdss_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure Pixel clock */
+ writel(dsi_pixel0_cfg_rcgr, DSI_PIXEL0_CFG_RCGR);
+ writel(0x1, DSI_PIXEL0_CMD_RCGR);
+ writel(0x1, DSI_PIXEL0_CBCR);
+}
+
+void mmss_clock_auto_pll_init(uint8_t pclk0_m, uint8_t pclk0_n, uint8_t pclk0_d)
+{
+ int ret;
+
+ /* Configure Byte clock -autopll- This will not change becasue
+ byte clock does not need any divider*/
+ writel(0x100, DSI_BYTE0_CFG_RCGR);
+ writel(0x1, DSI_BYTE0_CMD_RCGR);
+ writel(0x1, DSI_BYTE0_CBCR);
+
+ /* Configure ESC clock */
+ ret = clk_get_set_enable("mdss_esc0_clk", 0, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set esc0_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_mmssnoc_axi_clk", 100000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set mmssnoc_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_s0_axi_clk", 100000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set mmss_s0_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure AXI clock */
+ ret = clk_get_set_enable("mdss_axi_clk", 100000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set mdss_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure Pixel clock */
+ writel(0x100, DSI_PIXEL0_CFG_RCGR);
+ writel(0x1, DSI_PIXEL0_CMD_RCGR);
+ writel(0x1, DSI_PIXEL0_CBCR);
+
+ writel(pclk0_m, DSI_PIXEL0_M);
+ writel(pclk0_n, DSI_PIXEL0_N);
+ writel(pclk0_d, DSI_PIXEL0_D);
+}
+
+void mmss_clock_disable(void)
+{
+
+ /* Disable ESC clock */
+ clk_disable(clk_get("mdss_esc0_clk"));
+
+ /* Disable MDSS AXI clock */
+ clk_disable(clk_get("mdss_axi_clk"));
+
+ /* Disable MMSSNOC S0AXI clock */
+ clk_disable(clk_get("mmss_s0_axi_clk"));
+
+ /* Disable MMSSNOC AXI clock */
+ clk_disable(clk_get("mmss_mmssnoc_axi_clk"));
+
+}
diff --git a/platform/msm8226/gpio.c b/platform/msm8226/gpio.c
index f184fb0..441c8ba 100644
--- a/platform/msm8226/gpio.c
+++ b/platform/msm8226/gpio.c
@@ -44,12 +44,29 @@
return;
}
-void gpio_set(uint32_t gpio, uint32_t dir)
+void gpio_set_dir(uint32_t gpio, uint32_t dir)
{
writel(dir, (uint32_t *)GPIO_IN_OUT_ADDR(gpio));
return;
}
+void gpio_set_value(uint32_t gpio, uint32_t value)
+{
+ /* GPIO_OUTPUT */
+ if (value) {
+ writel(GPIO_OUT_VAL(gpio),
+ (uint32_t *)GPIO_OUT_SET_ADDR(gpio));
+ } else {
+ writel(GPIO_OUT_VAL(gpio),
+ (uint32_t *)GPIO_OUT_CLR_ADDR(gpio));
+ }
+ /* GPIO_OE */
+ writel(GPIO_OUT_OE_VAL(gpio),
+ (uint32_t *)GPIO_OUT_OE_SET_ADDR(gpio));
+
+ return;
+}
+
uint32_t gpio_status(uint32_t gpio)
{
return readl(GPIO_IN_OUT_ADDR(gpio)) & GPIO_IN;
diff --git a/platform/msm8226/include/platform/clock.h b/platform/msm8226/include/platform/clock.h
old mode 100644
new mode 100755
index 118428a..fbbd77a
--- a/platform/msm8226/include/platform/clock.h
+++ b/platform/msm8226/include/platform/clock.h
@@ -34,6 +34,44 @@
#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
+#define REG_MM(off) (MSM_MMSS_CLK_CTL_BASE + (off))
+
+#define MDP_GDSCR REG_MM(0x2304)
+#define GDSC_POWER_ON_BIT BIT(31)
+#define GDSC_POWER_ON_STATUS_BIT BIT(29)
+#define GDSC_EN_FEW_WAIT_MASK (0x0F << 16)
+#define GDSC_EN_FEW_WAIT_256_MASK BIT(19)
+
+#define VSYNC_CMD_RCGR REG_MM(0x2080)
+#define VSYNC_CFG_RCGR REG_MM(0x2084)
+#define MDSS_VSYNC_CBCR REG_MM(0x2328)
+
+#define MDP_CMD_RCGR REG_MM(0x2040)
+#define MDP_CFG_RCGR REG_MM(0x2044)
+#define MDP_CBCR REG_MM(0x231C)
+#define MDP_LUT_CBCR REG_MM(0x2320)
+#define MDP_AHB_CBCR REG_MM(0x2308)
+
+#define MDP_AXI_CMD_RCGR REG_MM(0x5040)
+#define MDP_AXI_CFG_RCGR REG_MM(0x5044)
+
+#define MDP_AXI_CBCR REG_MM(0x2310)
+#define MMSS_S0_AXI_CBCR REG_MM(0x5064)
+#define MMSS_MMSSNOC_AXI_CBCR REG_MM(0x506C)
+
+#define DSI_BYTE0_CMD_RCGR REG_MM(0x2120)
+#define DSI_BYTE0_CFG_RCGR REG_MM(0x2124)
+#define DSI_BYTE0_CBCR REG_MM(0x233C)
+#define DSI_ESC0_CMD_RCGR REG_MM(0x2160)
+#define DSI_ESC0_CFG_RCGR REG_MM(0x2164)
+#define DSI_ESC0_CBCR REG_MM(0x2344)
+#define DSI_PIXEL0_CMD_RCGR REG_MM(0x2000)
+#define DSI_PIXEL0_CFG_RCGR REG_MM(0x2004)
+#define DSI_PIXEL0_CBCR REG_MM(0x2314)
+#define DSI_PIXEL0_M REG_MM(0x2008)
+#define DSI_PIXEL0_N REG_MM(0x200C)
+#define DSI_PIXEL0_D REG_MM(0x2010)
+
void platform_clock_init(void);
void clock_init_mmc(uint32_t interface);
@@ -41,5 +79,7 @@
void clock_config_uart_dm(uint8_t id);
void hsusb_clock_init(void);
void clock_config_ce(uint8_t instance);
+void mdp_clock_init(void);
+void mdp_gdsc_ctrl(uint8_t enable);
#endif
diff --git a/platform/msm8226/include/platform/gpio.h b/platform/msm8226/include/platform/gpio.h
index 02849ab..b9a6050 100644
--- a/platform/msm8226/include/platform/gpio.h
+++ b/platform/msm8226/include/platform/gpio.h
@@ -68,5 +68,7 @@
uint8_t pull,
uint8_t drvstr,
uint32_t enable);
+void gpio_set_dir(uint32_t gpio, uint32_t dir);
+void gpio_set_value(uint32_t gpio, uint32_t value);
#endif
diff --git a/platform/msm8226/include/platform/iomap.h b/platform/msm8226/include/platform/iomap.h
index 851e798..5418229 100644
--- a/platform/msm8226/include/platform/iomap.h
+++ b/platform/msm8226/include/platform/iomap.h
@@ -45,6 +45,10 @@
#define DLOAD_MODE_ADDR (MSM_SHARED_IMEM_BASE + 0x0)
#define EMERGENCY_DLOAD_MODE_ADDR (MSM_SHARED_IMEM_BASE + 0xFE0)
+#define BS_INFO_OFFSET (0x6B0)
+#define BS_INFO_ADDR (MSM_SHARED_IMEM_BASE + BS_INFO_OFFSET)
+#define MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL 0xFC4A3000
+
#define MSM_GIC_DIST_BASE APPS_SS_BASE
#define MSM_GIC_CPU_BASE (APPS_SS_BASE + 0x2000)
#define APPS_APCS_QTMR_AC_BASE (APPS_SS_BASE + 0x00020000)
@@ -90,6 +94,11 @@
#define TLMM_BASE_ADDR 0xFD510000
#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + 0x1004 + (x)*0x10)
+#define GPIO_OUT_SET_ADDR(x) (TLMM_BASE_ADDR + 0x3040 + (x/32)*0x04)
+#define GPIO_OUT_CLR_ADDR(x) (TLMM_BASE_ADDR + 0x3020 + (x/32)*0x04)
+#define GPIO_OUT_VAL(x) (1 << (x - (x/32)*32))
+#define GPIO_OUT_OE_SET_ADDR(x) (TLMM_BASE_ADDR + 0x3120 + (x/32)*0x04)
+#define GPIO_OUT_OE_VAL(x) (1 << (x - (x/32)*32))
#define MPM2_MPM_CTRL_BASE 0xFC4A1000
#define MPM2_MPM_PS_HOLD 0xFC4AB000
@@ -119,6 +128,17 @@
#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+/* SDCC2 */
+#define SDCC2_BCR (CLK_CTL_BASE + 0x500) /* block reset */
+#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x504) /* branch control */
+#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x508)
+#define SDCC2_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x50C)
+#define SDCC2_CMD_RCGR (CLK_CTL_BASE + 0x510) /* cmd */
+#define SDCC2_CFG_RCGR (CLK_CTL_BASE + 0x514) /* cfg */
+#define SDCC2_M (CLK_CTL_BASE + 0x518) /* m */
+#define SDCC2_N (CLK_CTL_BASE + 0x51C) /* n */
+#define SDCC2_D (CLK_CTL_BASE + 0x520) /* d */
+
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP1_UART3_APPS_CBCR (CLK_CTL_BASE + 0x784)
@@ -135,10 +155,50 @@
#define USB_HS_SYSTEM_CFG_RCGR (CLK_CTL_BASE + 0x494)
/* SDHCI */
-#define SDCC_MCI_HC_MODE (PERIPH_SS_BASE + 0x00024078)
-#define SDCC_HC_PWRCTL_MASK_REG (PERIPH_SS_BASE + 0x000240E0)
-#define SDCC_HC_PWRCTL_CTL_REG (PERIPH_SS_BASE + 0x000240E8)
+#define SDCC_MCI_HC_MODE (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)
/* DRV strength for sdcc */
#define SDC1_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x00002044)
+
+/* MDSS */
+#define MSM_MMSS_CLK_CTL_BASE 0xFD8C0000
+#define MIPI_DSI_BASE (0xFD922800)
+#define MIPI_DSI0_BASE MIPI_DSI_BASE
+#define MIPI_DSI1_BASE MIPI_DSI_BASE
+#define REG_DSI(off) (MIPI_DSI_BASE + 0x04 + (off))
+#define MDP_BASE (0xfd900000)
+#define REG_MDP(off) (MDP_BASE + (off))
+
+#define SOFT_RESET 0x118
+#define CLK_CTRL 0x11C
+#define TRIG_CTRL 0x084
+#define CTRL 0x004
+#define COMMAND_MODE_DMA_CTRL 0x03C
+#define ERR_INT_MASK0 0x10C
+
+#define LANE_SWAP_CTL 0x0B0
+#define TIMING_CTL 0x0C4
+
+#define VIDEO_MODE_ACTIVE_H 0x024
+#define VIDEO_MODE_ACTIVE_V 0x028
+#define VIDEO_MODE_TOTAL 0x02C
+#define VIDEO_MODE_HSYNC 0x030
+#define VIDEO_MODE_VSYNC 0x034
+#define VIDEO_MODE_VSYNC_VPOS 0x038
+
+#define DMA_CMD_OFFSET 0x048
+#define DMA_CMD_LENGTH 0x04C
+
+#define INT_CTRL 0x110
+#define CMD_MODE_DMA_SW_TRIGGER 0x090
+
+#define EOT_PACKET_CTRL 0x0C8
+#define MISR_VIDEO_CTRL 0x0A4
+#define VIDEO_MODE_CTRL 0x010
+#define HS_TIMER_CTRL 0x0BC
+
#endif
diff --git a/platform/msm8226/include/platform/irqs.h b/platform/msm8226/include/platform/irqs.h
index 2e29d3a..c3abd2f 100644
--- a/platform/msm8226/include/platform/irqs.h
+++ b/platform/msm8226/include/platform/irqs.h
@@ -47,7 +47,9 @@
#define USB1_HS_BAM_IRQ (GIC_SPI_START + 135)
#define USB1_HS_IRQ (GIC_SPI_START + 134)
-#define SDCC_PWRCTRL_IRQ (GIC_SPI_START + 138)
+#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
+#define SDCC3_PWRCTL_IRQ (GIC_SPI_START + 224)
/* Retrofit universal macro names */
#define INT_USB_HS USB1_HS_IRQ
diff --git a/platform/msm8226/msm8226-clock.c b/platform/msm8226/msm8226-clock.c
index ccec8fc..4c4758d 100644
--- a/platform/msm8226/msm8226-clock.c
+++ b/platform/msm8226/msm8226-clock.c
@@ -166,6 +166,46 @@
},
};
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+ .cmd_reg = (uint32_t *) SDCC2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC2_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC2_M,
+ .n_reg = (uint32_t *) SDCC2_N,
+ .d_reg = (uint32_t *) SDCC2_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc2_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_APPS_CBCR,
+ .parent = &sdcc2_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* UART Clocks */
static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
{
@@ -322,6 +362,164 @@
},
};
+/* Display clocks */
+static struct clk_freq_tbl ftbl_mdss_esc0_1_clk[] = {
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_END
+};
+
+static struct clk_freq_tbl ftbl_mmss_axi_clk[] = {
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_MM(100000000, gpll0, 6, 0, 0),
+ F_END
+};
+
+static struct clk_freq_tbl ftbl_mdp_clk[] = {
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_END
+};
+
+static struct rcg_clk dsi_esc0_clk_src = {
+ .cmd_reg = (uint32_t *) DSI_ESC0_CMD_RCGR,
+ .cfg_reg = (uint32_t *) DSI_ESC0_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mdss_esc0_1_clk,
+
+ .c = {
+ .dbg_name = "dsi_esc0_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct clk_freq_tbl ftbl_mdss_vsync_clk[] = {
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk vsync_clk_src = {
+ .cmd_reg = (uint32_t *) VSYNC_CMD_RCGR,
+ .cfg_reg = (uint32_t *) VSYNC_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mdss_vsync_clk,
+
+ .c = {
+ .dbg_name = "vsync_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct rcg_clk mdp_axi_clk_src = {
+ .cmd_reg = (uint32_t *) MDP_AXI_CMD_RCGR,
+ .cfg_reg = (uint32_t *) MDP_AXI_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mmss_axi_clk,
+
+ .c = {
+ .dbg_name = "mdp_axi_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk mdss_esc0_clk = {
+ .cbcr_reg = (uint32_t *) DSI_ESC0_CBCR,
+ .parent = &dsi_esc0_clk_src.c,
+ .has_sibling = 0,
+
+ .c = {
+ .dbg_name = "mdss_esc0_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdss_axi_clk = {
+ .cbcr_reg = (uint32_t *) MDP_AXI_CBCR,
+ .parent = &mdp_axi_clk_src.c,
+ .has_sibling = 0,
+
+ .c = {
+ .dbg_name = "mdss_axi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mmss_mmssnoc_axi_clk = {
+ .cbcr_reg = (uint32_t *) MMSS_MMSSNOC_AXI_CBCR,
+ .parent = &mdp_axi_clk_src.c,
+ .has_sibling = 0,
+
+ .c = {
+ .dbg_name = "mmss_mmssnoc_axi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mmss_s0_axi_clk = {
+ .cbcr_reg = (uint32_t *) MMSS_S0_AXI_CBCR,
+ .parent = &mdp_axi_clk_src.c,
+ .has_sibling = 0,
+
+ .c = {
+ .dbg_name = "mmss_s0_axi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdp_ahb_clk = {
+ .cbcr_reg = (uint32_t *) MDP_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "mdp_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct rcg_clk mdss_mdp_clk_src = {
+ .cmd_reg = (uint32_t *) MDP_CMD_RCGR,
+ .cfg_reg = (uint32_t *) MDP_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mdp_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "mdss_mdp_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk mdss_mdp_clk = {
+ .cbcr_reg = (uint32_t *) MDP_CBCR,
+ .parent = &mdss_mdp_clk_src.c,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "mdss_mdp_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdss_mdp_lut_clk = {
+ .cbcr_reg = MDP_LUT_CBCR,
+ .parent = &mdss_mdp_clk_src.c,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "mdss_mdp_lut_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdss_vsync_clk = {
+ .cbcr_reg = MDSS_VSYNC_CBCR,
+ .parent = &vsync_clk_src.c,
+ .has_sibling = 0,
+
+ .c = {
+ .dbg_name = "mdss_vsync_clk",
+ .ops = &clk_ops_branch,
+ },
+};
/* Clock lookup table */
static struct clk_lookup msm_clocks_8226[] =
@@ -329,6 +527,9 @@
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+ CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
+
CLK_LOOKUP("uart3_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart3_core_clk", gcc_blsp1_uart3_apps_clk.c),
@@ -339,6 +540,16 @@
CLK_LOOKUP("ce1_axi_clk", gcc_ce1_axi_clk.c),
CLK_LOOKUP("ce1_core_clk", gcc_ce1_clk.c),
CLK_LOOKUP("ce1_src_clk", ce1_clk_src.c),
+
+ CLK_LOOKUP("mdp_ahb_clk", mdp_ahb_clk.c),
+ CLK_LOOKUP("mdss_esc0_clk", mdss_esc0_clk.c),
+ CLK_LOOKUP("mdss_axi_clk", mdss_axi_clk.c),
+ CLK_LOOKUP("mmss_mmssnoc_axi_clk", mmss_mmssnoc_axi_clk.c),
+ CLK_LOOKUP("mmss_s0_axi_clk", mmss_s0_axi_clk.c),
+ CLK_LOOKUP("mdss_vsync_clk", mdss_vsync_clk.c),
+ CLK_LOOKUP("mdss_mdp_clk_src", mdss_mdp_clk_src.c),
+ CLK_LOOKUP("mdss_mdp_clk", mdss_mdp_clk.c),
+ CLK_LOOKUP("mdss_mdp_lut_clk", mdss_mdp_lut_clk.c),
};
void platform_clock_init(void)
diff --git a/platform/msm8226/platform.c b/platform/msm8226/platform.c
index 3a44db4..3a25699 100644
--- a/platform/msm8226/platform.c
+++ b/platform/msm8226/platform.c
@@ -36,6 +36,7 @@
#include <arch/arm/mmu.h>
#include <smem.h>
#include <board.h>
+#include <boot_stats.h>
#define MB (1024*1024)
@@ -72,9 +73,23 @@
void platform_uninit(void)
{
+#if DISPLAY_SPLASH_SCREEN
+ display_shutdown();
+#endif
+
qtimer_uninit();
}
+uint32_t platform_get_sclk_count(void)
+{
+ return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL);
+}
+
+addr_t get_bs_info_addr()
+{
+ return ((addr_t)BS_INFO_ADDR);
+}
+
/* Setup memory for this platform */
void platform_init_mmu_mappings(void)
{
diff --git a/platform/msm8226/rules.mk b/platform/msm8226/rules.mk
index 6645153..91e3395 100644
--- a/platform/msm8226/rules.mk
+++ b/platform/msm8226/rules.mk
@@ -15,6 +15,9 @@
INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared/include
+DEVS += fbcon
+MODULES += dev/fbcon
+
OBJS += \
$(LOCAL_DIR)/platform.o \
$(LOCAL_DIR)/acpuclock.o \
diff --git a/platform/msm8610/acpuclock.c b/platform/msm8610/acpuclock.c
index 1d3fcfd..4376e68 100644
--- a/platform/msm8610/acpuclock.c
+++ b/platform/msm8610/acpuclock.c
@@ -121,9 +121,6 @@
snprintf(clk_name, 64, "sdc%u_core_clk", interface);
- /* Disalbe MCI_CLK before changing the sdcc clock */
- mmc_boot_mci_clk_disable();
-
if(freq == MMC_CLK_400KHZ)
{
ret = clk_get_set_enable(clk_name, 400000, 1);
@@ -132,6 +129,10 @@
{
ret = clk_get_set_enable(clk_name, 50000000, 1);
}
+ else if(freq == MMC_CLK_200MHZ)
+ {
+ ret = clk_get_set_enable(clk_name, 200000000, 1);
+ }
else
{
dprintf(CRITICAL, "sdc frequency (%d) is not supported\n", freq);
@@ -143,9 +144,6 @@
dprintf(CRITICAL, "failed to set sdc1_core_clk ret = %d\n", ret);
ASSERT(0);
}
-
- /* Enable MCI CLK */
- mmc_boot_mci_clk_enable();
}
/* Configure UART clock based on the UART block id*/
@@ -172,3 +170,278 @@
{
}
+/* Configure MDP clock */
+void mdp_clock_enable(void)
+{
+ int ret;
+
+ ret = clk_get_set_enable("axi_clk_src", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set axi_clk_src ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mmss_mmssnoc_axi_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mmss_mmssnoc_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mmss_s0_axi_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mmss_s0_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdp_ahb_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_ahb_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdp_axi_clk" , 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdp_vsync_clk" , 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_vsync_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+}
+
+void mdp_clock_disable(void)
+{
+ clk_disable(clk_get("mdp_vsync_clk"));
+ clk_disable(clk_get("mdp_axi_clk"));
+ clk_disable(clk_get("mdp_ahb_clk"));
+ clk_disable(clk_get("mmss_s0_axi_clk"));
+ clk_disable(clk_get("mmss_mmssnoc_axi_clk"));
+}
+
+int dsi_vco_set_rate(uint32_t rate)
+{
+ uint32_t temp, val;
+ unsigned long fb_divider;
+
+ temp = rate / 10;
+ val = VCO_PARENT_RATE / 10;
+ fb_divider = (temp * VCO_PREF_DIV_RATIO) / val;
+ fb_divider = fb_divider / 2 - 1;
+
+ temp = readl(DSIPHY_PLL_CTRL(1));
+ val = (temp & 0xFFFFFF00) | (fb_divider & 0xFF);
+ writel(val, DSIPHY_PLL_CTRL(1));
+
+ temp = readl(DSIPHY_PLL_CTRL(2));
+ val = (temp & 0xFFFFFFF8) | ((fb_divider >> 8) & 0x07);
+ writel(val, DSIPHY_PLL_CTRL(2));
+
+ temp = readl(DSIPHY_PLL_CTRL(3));
+ val = (temp & 0xFFFFFFC0) | (VCO_PREF_DIV_RATIO - 1);
+ writel(val, DSIPHY_PLL_CTRL(3));
+ return 0;
+}
+
+uint32_t dsi_vco_round_rate(uint32_t rate)
+{
+ uint32_t vco_rate = rate;
+
+ if (rate < VCO_MIN_RATE)
+ vco_rate = VCO_MIN_RATE;
+ else if (rate > VCO_MAX_RATE)
+ vco_rate = VCO_MAX_RATE;
+
+ return vco_rate;
+}
+
+int dsi_byte_clk_set(uint32_t *vcoclk_rate, uint32_t rate)
+{
+ int div, ret;
+ uint32_t vco_rate, bitclk_rate;
+ uint32_t temp, val;
+
+ bitclk_rate = 8 * rate;
+
+ for (div = 1; div < VCO_MAX_DIVIDER; div++)
+ {
+ vco_rate = dsi_vco_round_rate(bitclk_rate * div);
+
+ if (vco_rate == bitclk_rate * div)
+ break;
+
+ if (vco_rate < bitclk_rate * div)
+ return -1;
+ }
+
+ if (vco_rate != bitclk_rate * div)
+ return -1;
+
+ ret = dsi_vco_set_rate(vco_rate);
+ if (ret)
+ {
+ dprintf(CRITICAL, "fail to set vco rate, ret = %d\n", ret);
+ return ret;
+ }
+ *vcoclk_rate = vco_rate;
+
+ /* set the bit clk divider */
+ temp = readl(DSIPHY_PLL_CTRL(8));
+ val = (temp & 0xFFFFFFF0) | (div - 1);
+ writel(val, DSIPHY_PLL_CTRL(8));
+
+ /* set the byte clk divider */
+ temp = readl(DSIPHY_PLL_CTRL(9));
+ val = (temp & 0xFFFFFF00) | (vco_rate / rate - 1);
+ writel(val, DSIPHY_PLL_CTRL(9));
+
+ return 0;
+}
+
+int dsi_dsi_clk_set(uint32_t vco_rate, uint32_t rate)
+{
+ uint32_t temp, val;
+
+ if (vco_rate % rate != 0)
+ {
+ dprintf(CRITICAL, "dsiclk_set_rate invalid rate\n");
+ return -1;
+ }
+
+ temp = readl(DSIPHY_PLL_CTRL(10));
+ val = (temp & 0xFFFFFF00) | (vco_rate / rate - 1);
+ writel(val, DSIPHY_PLL_CTRL(10));
+
+ return 0;
+}
+
+void dsi_setup_dividers(uint32_t val, uint32_t cfg_rcgr,
+ uint32_t cmd_rcgr)
+{
+ uint32_t i = 0;
+ uint32_t term_cnt = 5000;
+ int32_t reg;
+
+ writel(val, cfg_rcgr);
+ writel(0x1, cmd_rcgr);
+ reg = readl(cmd_rcgr);
+ while (reg & 0x1)
+ {
+ i++;
+ if (i > term_cnt)
+ {
+ dprintf(CRITICAL, "some dsi clock not enabled"
+ "exceeded polling TIMEOUT!\n");
+ break;
+ }
+ udelay(1);
+ reg = readl(cmd_rcgr);
+ }
+}
+
+void vco_enable(int enable)
+{
+ if (enable)
+ {
+ writel(0x1, DSIPHY_PLL_CTRL(0));
+ while (!(readl(DSIPHY_PLL_READY) & 0x01))
+ udelay(1);
+ } else {
+ writel(0x0, DSIPHY_PLL_CTRL(0));
+ }
+}
+
+void dsi_clock_enable(uint32_t dsiclk_rate, uint32_t byteclk_rate)
+{
+ uint32_t vcoclk_rate;
+ int ret;
+
+ ret = clk_get_set_enable("dsi_ahb_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set dsi_ahb_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = dsi_byte_clk_set(&vcoclk_rate, byteclk_rate);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set byteclk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = dsi_dsi_clk_set(vcoclk_rate, dsiclk_rate);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set dsiclk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ vco_enable(1);
+
+ dsi_setup_dividers(0x105, DSI_PCLK_CFG_RCGR, DSI_PCLK_CMD_RCGR);
+ dsi_setup_dividers(0x101, DSI_BYTE_CFG_RCGR, DSI_BYTE_CMD_RCGR);
+ dsi_setup_dividers(0x101, DSI_CFG_RCGR, DSI_CMD_RCGR);
+
+ ret = clk_get_set_enable("dsi_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set dsi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("dsi_byte_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set dsi_byte_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("dsi_esc_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set dsi_esc_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("dsi_pclk_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set dsi_pclk_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdp_lcdc_clk" , 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_lcdc_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("mdp_dsi_clk" , 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdp_dsi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+}
+
+void dsi_clock_disable(void)
+{
+ clk_disable(clk_get("mdp_dsi_clk"));
+ clk_disable(clk_get("mdp_lcdc_clk"));
+ clk_disable(clk_get("dsi_pclk_clk"));
+ clk_disable(clk_get("dsi_esc_clk"));
+ clk_disable(clk_get("dsi_byte_clk"));
+ clk_disable(clk_get("dsi_clk"));
+ vco_enable(0);
+ clk_disable(clk_get("dsi_ahb_clk"));
+}
diff --git a/platform/msm8610/include/platform/clock.h b/platform/msm8610/include/platform/clock.h
index 1f37b03..de50978 100644
--- a/platform/msm8610/include/platform/clock.h
+++ b/platform/msm8610/include/platform/clock.h
@@ -32,13 +32,52 @@
#include <clock.h>
#include <clock_lib2.h>
+#define REG_MM(off) (MSM_MMSS_CLK_CTL_BASE + (off))
+
+#define VSYNC_CMD_RCGR REG_MM(0x2080)
+#define VSYNC_CFG_RCGR REG_MM(0x2084)
+#define AXI_CMD_RCGR REG_MM(0x5040)
+#define AXI_CFG_RCGR REG_MM(0x5044)
+
+#define MDP_AXI_CBCR REG_MM(0x2314)
+#define MDP_AHB_CBCR REG_MM(0x2318)
+#define MDP_VSYNC_CBCR REG_MM(0x231C)
+#define MDP_DSI_CBCR REG_MM(0x2320)
+#define MDP_LCDC_CBCR REG_MM(0x2340)
+
+#define MMSS_S0_AXI_CBCR REG_MM(0x5064)
+#define MMSS_MMSSNOC_AXI_CBCR REG_MM(0x506C)
+
+#define DSI_CBCR REG_MM(0x2324)
+#define DSI_BYTE_CBCR REG_MM(0x2328)
+#define DSI_ESC_CBCR REG_MM(0x232C)
+#define DSI_AHB_CBCR REG_MM(0x2330)
+#define DSI_PCLK_CBCR REG_MM(0x233C)
+
+#define DSI_CMD_RCGR REG_MM(0x2020)
+#define DSI_CFG_RCGR REG_MM(0x2024)
+#define DSI_PCLK_CMD_RCGR REG_MM(0x2000)
+#define DSI_PCLK_CFG_RCGR REG_MM(0x2004)
+#define DSI_BYTE_CMD_RCGR REG_MM(0x2120)
+#define DSI_BYTE_CFG_RCGR REG_MM(0x2124)
+
#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
+#define VCO_MAX_DIVIDER 256
+#define VCO_MIN_RATE 600000000
+#define VCO_MAX_RATE 1200000000
+#define VCO_PREF_DIV_RATIO 26
+#define VCO_PARENT_RATE 19200000
+
void platform_clock_init(void);
void clock_init_mmc(uint32_t interface);
void clock_config_mmc(uint32_t interface, uint32_t freq);
void clock_config_uart_dm(uint8_t id);
void hsusb_clock_init(void);
+void mdp_clock_enable(void);
+void mdp_clock_disable(void);
+void dsi_clock_enable(uint32_t dsiclk_rate, uint32_t byteclk_rate);
+void dsi_clock_disable(void);
#endif
diff --git a/platform/msm8610/include/platform/gpio.h b/platform/msm8610/include/platform/gpio.h
index 02bc2e7..fe7cb8a 100644
--- a/platform/msm8610/include/platform/gpio.h
+++ b/platform/msm8610/include/platform/gpio.h
@@ -30,6 +30,7 @@
#define __PLATFORM_MSM8610_GPIO_H
#include <bits.h>
+#include <gpio.h>
/* GPIO TLMM: Direction */
#define GPIO_INPUT 0
diff --git a/platform/msm8610/include/platform/iomap.h b/platform/msm8610/include/platform/iomap.h
index 0c00cf4..f9f1c27 100644
--- a/platform/msm8610/include/platform/iomap.h
+++ b/platform/msm8610/include/platform/iomap.h
@@ -1,5 +1,8 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
@@ -42,6 +45,10 @@
#define MSM_SHARED_IMEM_BASE 0xFE805000
#define RESTART_REASON_ADDR (MSM_SHARED_IMEM_BASE + 0x65C)
+#define BS_INFO_OFFSET (0x6B0)
+#define BS_INFO_ADDR (MSM_SHARED_IMEM_BASE + BS_INFO_OFFSET)
+#define MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL 0xFC4A3000
+
#define MSM_GIC_DIST_BASE APPS_SS_BASE
#define MSM_GIC_CPU_BASE (APPS_SS_BASE + 0x2000)
#define APPS_APCS_QTMR_AC_BASE (APPS_SS_BASE + 0x00020000)
@@ -53,9 +60,11 @@
#define MSM_SDC1_BAM_BASE (PERIPH_SS_BASE + 0x00004000)
#define MSM_SDC1_BASE (PERIPH_SS_BASE + 0x00024000)
#define MSM_SDC1_DML_BASE (PERIPH_SS_BASE + 0x00024800)
+#define MSM_SDC1_SDHCI_BASE (PERIPH_SS_BASE + 0x00024900)
#define MSM_SDC2_BAM_BASE (PERIPH_SS_BASE + 0x00084000)
#define MSM_SDC2_BASE (PERIPH_SS_BASE + 0x000A4000)
#define MSM_SDC2_DML_BASE (PERIPH_SS_BASE + 0x000A4800)
+#define MSM_SDC2_SDHCI_BASE (PERIPH_SS_BASE + 0x000A4900)
#define BLSP1_UART0_BASE (PERIPH_SS_BASE + 0x0011D000)
#define BLSP1_UART1_BASE (PERIPH_SS_BASE + 0x0011E000)
@@ -83,6 +92,105 @@
#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + 0x1004 + (x)*0x10)
+#define MSM_MMSS_CLK_CTL_BASE 0xFD8C0000
+
+/* DSI */
+#define MIPI_DSI_BASE 0xFDD00000
+#define MIPI_DSI0_BASE MIPI_DSI_BASE
+#define MIPI_DSI1_BASE MIPI_DSI_BASE
+#define REG_DSI(off) (MIPI_DSI_BASE + (off))
+
+#define DSIPHY_REGULATOR_BASE 0x500
+#define DSIPHY_TIMING_BASE 0x440
+#define DSIPHY_CTRL_BASE 0x470
+#define DSIPHY_PLL_BASE 0x200
+#define DSIPHY_STRENGTH_BASE 0x480
+#define DSIPHY_CAL_SW_BASE 0x52C
+#define DSIPHY_CAL_HW_BASE 0x538
+
+/* Range 0 - 4 */
+#define DSIPHY_REGULATOR_CTRL(x) REG_DSI(DSIPHY_REGULATOR_BASE + (x) * 4)
+/* Range 0 - 11 */
+#define DSIPHY_TIMING_CTRL(x) REG_DSI(DSIPHY_TIMING_BASE + (x) * 4)
+/* Range 0 - 3 */
+#define DSIPHY_CTRL(x) REG_DSI(DSIPHY_CTRL_BASE + (x) * 4)
+/* Range 0 - 2 */
+#define DSIPHY_STRENGTH_CTRL(x) REG_DSI(DSIPHY_STRENGTH_BASE + (x) * 4)
+/* Range 0 - 19 */
+#define DSIPHY_PLL_CTRL(x) REG_DSI(DSIPHY_PLL_BASE + (x) * 4)
+/* Range 0 - 2 */
+#define DSIPHY_CAL_SW_CFG(x) REG_DSI(DSIPHY_CAL_SW_BASE + (x) * 4)
+/* Range 0 - 4 */
+#define DSIPHY_CAL_HW_CFG(x) REG_DSI(DSIPHY_CAL_HW_BASE + (x) * 4)
+
+#define DSIPHY_REGULATOR_CAL_PWR_CFG REG_DSI(0x518)
+#define DSIPHY_CAL_HW_TRIGGER REG_DSI(0x528)
+#define DSIPHY_SW_RESET REG_DSI(0x128)
+#define DSIPHY_LANE_SWAP REG_DSI(0x0ac)
+#define DSIPHY_PLL_READY REG_DSI(0x280)
+
+/* MDP */
+#define MDP_BASE 0xFD900000
+#define REG_MDP(off) (MDP_BASE + (off))
+
+#define MDP_DMA_P_CONFIG REG_MDP(0x90000)
+#define MDP_DMA_P_OUT_XY REG_MDP(0x90010)
+#define MDP_DMA_P_SIZE REG_MDP(0x90004)
+#define MDP_DMA_P_BUF_ADDR REG_MDP(0x90008)
+#define MDP_DMA_P_BUF_Y_STRIDE REG_MDP(0x9000C)
+
+#define MDP_DSI_VIDEO_EN REG_MDP(0xF0000)
+#define MDP_DSI_VIDEO_HSYNC_CTL REG_MDP(0xF0004)
+#define MDP_DSI_VIDEO_VSYNC_PERIOD REG_MDP(0xF0008)
+#define MDP_DSI_VIDEO_VSYNC_PULSE_WIDTH REG_MDP(0xF000C)
+#define MDP_DSI_VIDEO_DISPLAY_HCTL REG_MDP(0xF0010)
+#define MDP_DSI_VIDEO_DISPLAY_V_START REG_MDP(0xF0014)
+#define MDP_DSI_VIDEO_DISPLAY_V_END REG_MDP(0xF0018)
+#define MDP_DSI_VIDEO_BORDER_CLR REG_MDP(0xF0028)
+#define MDP_DSI_VIDEO_HSYNC_SKEW REG_MDP(0xF0030)
+#define MDP_DSI_VIDEO_CTL_POLARITY REG_MDP(0xF0038)
+#define MDP_DSI_VIDEO_TEST_CTL REG_MDP(0xF0034)
+
+#define MDP_DMA_P_START REG_MDP(0x00044)
+#define MDP_DMA_S_START REG_MDP(0x00048)
+#define MDP_DISP_INTF_SEL REG_MDP(0x00038)
+#define MDP_MAX_RD_PENDING_CMD_CONFIG REG_MDP(0x0004C)
+#define MDP_INTR_ENABLE REG_MDP(0x00020)
+#define MDP_INTR_CLEAR REG_MDP(0x00028)
+#define MDP_DSI_CMD_MODE_ID_MAP REG_MDP(0xF1000)
+#define MDP_DSI_CMD_MODE_TRIGGER_EN REG_MDP(0XF1004)
+
+#define MDP_TEST_MODE_CLK REG_MDP(0xF0000)
+#define MDP_INTR_STATUS REG_MDP(0x00054)
+
+#define SOFT_RESET 0x114
+#define CLK_CTRL 0x118
+#define TRIG_CTRL 0x080
+#define CTRL 0x000
+#define COMMAND_MODE_DMA_CTRL 0x038
+#define ERR_INT_MASK0 0x108
+
+#define LANE_SWAP_CTL 0x0AC
+#define TIMING_CTL 0x0C0
+
+#define VIDEO_MODE_ACTIVE_H 0x020
+#define VIDEO_MODE_ACTIVE_V 0x024
+#define VIDEO_MODE_TOTAL 0x028
+#define VIDEO_MODE_HSYNC 0x02C
+#define VIDEO_MODE_VSYNC 0x030
+#define VIDEO_MODE_VSYNC_VPOS 0x034
+
+#define DMA_CMD_OFFSET 0x044
+#define DMA_CMD_LENGTH 0x048
+
+#define INT_CTRL 0x10C
+#define CMD_MODE_DMA_SW_TRIGGER 0x08C
+
+#define EOT_PACKET_CTRL 0x0C8
+#define MISR_VIDEO_CTRL 0x0A0
+#define VIDEO_MODE_CTRL 0x00C
+#define HS_TIMER_CTRL 0x0B8
+
#define MPM2_MPM_CTRL_BASE 0xFC4A1000
#define MPM2_MPM_PS_HOLD 0xFC4AB000
@@ -103,6 +211,17 @@
#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+/* SDCC2 */
+#define SDCC2_BCR (CLK_CTL_BASE + 0x500) /* block reset */
+#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x504) /* branch control */
+#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x508)
+#define SDCC2_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x50C)
+#define SDCC2_CMD_RCGR (CLK_CTL_BASE + 0x510) /* cmd */
+#define SDCC2_CFG_RCGR (CLK_CTL_BASE + 0x514) /* cfg */
+#define SDCC2_M (CLK_CTL_BASE + 0x518) /* m */
+#define SDCC2_N (CLK_CTL_BASE + 0x51C) /* n */
+#define SDCC2_D (CLK_CTL_BASE + 0x520) /* d */
+
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP1_UART2_APPS_CBCR (CLK_CTL_BASE + 0x704)
@@ -118,4 +237,13 @@
#define USB_HS_SYSTEM_CMD_RCGR (CLK_CTL_BASE + 0x490)
#define USB_HS_SYSTEM_CFG_RCGR (CLK_CTL_BASE + 0x494)
+/* DRV strength for sdcc */
+#define SDC1_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x00002044)
+
+/* SDHCI */
+#define SDCC_MCI_HC_MODE (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)
#endif
diff --git a/platform/msm8610/include/platform/irqs.h b/platform/msm8610/include/platform/irqs.h
index 6cecf4e..9c96345 100644
--- a/platform/msm8610/include/platform/irqs.h
+++ b/platform/msm8610/include/platform/irqs.h
@@ -47,6 +47,9 @@
#define USB1_HS_BAM_IRQ (GIC_SPI_START + 135)
#define USB1_HS_IRQ (GIC_SPI_START + 134)
+#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
+
/* Retrofit universal macro names */
#define INT_USB_HS USB1_HS_IRQ
diff --git a/platform/msm8610/msm8610-clock.c b/platform/msm8610/msm8610-clock.c
index 4d13801..95cb4d3 100644
--- a/platform/msm8610/msm8610-clock.c
+++ b/platform/msm8610/msm8610-clock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -166,6 +166,48 @@
},
};
+/* SDCC2 clocks */
+
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+ .cmd_reg = (uint32_t *) SDCC2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC2_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC2_M,
+ .n_reg = (uint32_t *) SDCC2_N,
+ .d_reg = (uint32_t *) SDCC2_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc2_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_APPS_CBCR,
+ .parent = &sdcc2_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* UART Clocks */
static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
{
@@ -270,17 +312,172 @@
},
};
+/* Diplay related clock LUT */
+static struct clk_freq_tbl ftbl_mmss_axi_clk[] = {
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_MM(100000000, gpll0, 6, 0, 0),
+ F_END
+};
+
+static struct clk_freq_tbl ftbl_mdss_vsync_clk[] = {
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk vsync_clk_src = {
+ .cmd_reg = (uint32_t *) VSYNC_CMD_RCGR,
+ .cfg_reg = (uint32_t *) VSYNC_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mdss_vsync_clk,
+ .c = {
+ .dbg_name = "vsync_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct rcg_clk axi_clk_src = {
+ .cmd_reg = (uint32_t *) AXI_CMD_RCGR,
+ .cfg_reg = (uint32_t *) AXI_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mmss_axi_clk,
+ .c = {
+ .dbg_name = "axi_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk mdp_ahb_clk = {
+ .cbcr_reg = (uint32_t *) MDP_AHB_CBCR,
+ .has_sibling = 1,
+ .c = {
+ .dbg_name = "mdp_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdp_axi_clk = {
+ .cbcr_reg = (uint32_t *) MDP_AXI_CBCR,
+ .parent = &axi_clk_src.c,
+ .c = {
+ .dbg_name = "mdp_axi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdp_dsi_clk = {
+ .cbcr_reg = (uint32_t *) MDP_DSI_CBCR,
+ .c = {
+ .dbg_name = "mdp_dsi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mmss_mmssnoc_axi_clk = {
+ .cbcr_reg = (uint32_t *) MMSS_MMSSNOC_AXI_CBCR,
+ .parent = &axi_clk_src.c,
+ .c = {
+ .dbg_name = "mmss_mmssnoc_axi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mmss_s0_axi_clk = {
+ .cbcr_reg = (uint32_t *) MMSS_S0_AXI_CBCR,
+ .parent = &axi_clk_src.c,
+ .c = {
+ .dbg_name = "mmss_s0_axi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdp_vsync_clk = {
+ .cbcr_reg = MDP_VSYNC_CBCR,
+ .parent = &vsync_clk_src.c,
+ .c = {
+ .dbg_name = "mdp_vsync_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdp_lcdc_clk = {
+ .cbcr_reg = MDP_LCDC_CBCR,
+ .parent = &axi_clk_src.c,
+ .c = {
+ .dbg_name = "mdp_lcdc_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk dsi_clk = {
+ .cbcr_reg = DSI_CBCR,
+ .c = {
+ .dbg_name = "dsi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk dsi_ahb_clk = {
+ .cbcr_reg = DSI_AHB_CBCR,
+ .has_sibling = 1,
+ .c = {
+ .dbg_name = "dsi_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk dsi_byte_clk = {
+ .cbcr_reg = DSI_BYTE_CBCR,
+ .c = {
+ .dbg_name = "dsi_byte_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk dsi_esc_clk = {
+ .cbcr_reg = DSI_ESC_CBCR,
+ .c = {
+ .dbg_name = "dsi_esc_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk dsi_pclk_clk = {
+ .cbcr_reg = DSI_PCLK_CBCR,
+ .c = {
+ .dbg_name = "dsi_pclk_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* Clock lookup table */
static struct clk_lookup msm_clocks_8610[] =
{
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+ CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
+
CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
CLK_LOOKUP("usb_iface_clk", gcc_usb_hs_ahb_clk.c),
CLK_LOOKUP("usb_core_clk", gcc_usb_hs_system_clk.c),
+
+ CLK_LOOKUP("axi_clk_src", axi_clk_src.c),
+ CLK_LOOKUP("mmss_mmssnoc_axi_clk", mmss_mmssnoc_axi_clk.c),
+ CLK_LOOKUP("mmss_s0_axi_clk", mmss_s0_axi_clk.c),
+ CLK_LOOKUP("mdp_axi_clk", mdp_axi_clk.c),
+ CLK_LOOKUP("mdp_dsi_clk", mdp_dsi_clk.c),
+ CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c),
+ CLK_LOOKUP("mdp_lcdc_clk", mdp_lcdc_clk.c),
+ CLK_LOOKUP("mdp_ahb_clk", mdp_ahb_clk.c),
+
+ CLK_LOOKUP("dsi_clk", dsi_clk.c),
+ CLK_LOOKUP("dsi_ahb_clk", dsi_ahb_clk.c),
+ CLK_LOOKUP("dsi_byte_clk", dsi_byte_clk.c),
+ CLK_LOOKUP("dsi_esc_clk", dsi_esc_clk.c),
+ CLK_LOOKUP("dsi_pclk_clk", dsi_pclk_clk.c),
};
void platform_clock_init(void)
diff --git a/platform/msm8610/platform.c b/platform/msm8610/platform.c
index ac74205..e4dad94 100644
--- a/platform/msm8610/platform.c
+++ b/platform/msm8610/platform.c
@@ -36,6 +36,7 @@
#include <arch/arm/mmu.h>
#include <smem.h>
#include <board.h>
+#include <boot_stats.h>
#define MB (1024*1024)
@@ -76,8 +77,22 @@
dprintf(INFO, "platform_init()\n");
}
+uint32_t platform_get_sclk_count(void)
+{
+ return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL);
+}
+
+addr_t get_bs_info_addr()
+{
+ return ((addr_t)BS_INFO_ADDR);
+}
+
void platform_uninit(void)
{
+#if DISPLAY_SPLASH_SCREEN
+ display_shutdown();
+#endif
+
qtimer_uninit();
}
diff --git a/platform/msm8610/rules.mk b/platform/msm8610/rules.mk
index 2aa5109..b050c3d 100644
--- a/platform/msm8610/rules.mk
+++ b/platform/msm8610/rules.mk
@@ -15,6 +15,9 @@
INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared/include
+DEV += fbcon
+MODULES += dev/fbcon
+
OBJS += \
$(LOCAL_DIR)/platform.o \
$(LOCAL_DIR)/acpuclock.o \
diff --git a/platform/msm8974/acpuclock.c b/platform/msm8974/acpuclock.c
index 4b1798f..6131e61 100644
--- a/platform/msm8974/acpuclock.c
+++ b/platform/msm8974/acpuclock.c
@@ -340,17 +340,18 @@
uint32_t reg = 0;
reg = readl(MDP_GDSCR);
if (enable) {
- if (reg & 0x1) {
+ if (!(reg & GDSC_POWER_ON_BIT)) {
reg &= ~(BIT(0) | GDSC_EN_FEW_WAIT_MASK);
reg |= GDSC_EN_FEW_WAIT_256_MASK;
writel(reg, MDP_GDSCR);
+ while(!(readl(MDP_GDSCR) & (GDSC_POWER_ON_BIT)));
+ } else {
+ dprintf(INFO, "MDP GDSC already enabled\n");
}
-
- while(readl(MDP_GDSCR) & ((GDSC_POWER_ON_BIT) | (GDSC_POWER_ON_STATUS_BIT)));
} else {
- reg &= ~BIT(0);
+ reg |= BIT(0);
writel(reg, MDP_GDSCR);
- while(!(readl(MDP_GDSCR) & ((GDSC_POWER_ON_BIT))));
+ while(readl(MDP_GDSCR) & (GDSC_POWER_ON_BIT));
}
}
diff --git a/platform/msm8974/include/platform/clock.h b/platform/msm8974/include/platform/clock.h
index e9f8d08..c96763a 100644
--- a/platform/msm8974/include/platform/clock.h
+++ b/platform/msm8974/include/platform/clock.h
@@ -81,6 +81,16 @@
#define DSI_PIXEL1_CFG_RCGR REG_MM(0x2024)
#define DSI_PIXEL1_CBCR REG_MM(0x2318)
+#define MDSS_EDPPIXEL_CBCR REG_MM(0x232C)
+#define MDSS_EDPLINK_CBCR REG_MM(0x2330)
+#define EDPPIXEL_M REG_MM(0x20A8)
+#define EDPPIXEL_N REG_MM(0x20AC)
+#define EDPPIXEL_D REG_MM(0x20B0)
+#define EDPPIXEL_CFG_RCGR REG_MM(0x20A4)
+#define EDPPIXEL_CMD_RCGR REG_MM(0x20A0)
+#define EDPLINK_CFG_RCGR REG_MM(0x20C4)
+#define EDPLINK_CMD_RCGR REG_MM(0x20C0)
+
void platform_clock_init(void);
void clock_init_mmc(uint32_t interface);
@@ -90,6 +100,7 @@
void clock_config_ce(uint8_t instance);
void mdp_clock_init(void);
void mdp_gdsc_ctrl(uint8_t enable);
+void edp_clk_enable(void);
void clock_ce_enable(uint8_t instance);
void clock_ce_disable(uint8_t instance);
diff --git a/platform/msm8974/include/platform/iomap.h b/platform/msm8974/include/platform/iomap.h
index 02a59bc..b3edca9 100644
--- a/platform/msm8974/include/platform/iomap.h
+++ b/platform/msm8974/include/platform/iomap.h
@@ -139,6 +139,17 @@
#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+/* SDCC2 */
+#define SDCC2_BCR (CLK_CTL_BASE + 0x500) /* block reset */
+#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x504) /* branch control */
+#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x508)
+#define SDCC2_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x50C)
+#define SDCC2_CMD_RCGR (CLK_CTL_BASE + 0x510) /* cmd */
+#define SDCC2_CFG_RCGR (CLK_CTL_BASE + 0x514) /* cfg */
+#define SDCC2_M (CLK_CTL_BASE + 0x518) /* m */
+#define SDCC2_N (CLK_CTL_BASE + 0x51C) /* n */
+#define SDCC2_D (CLK_CTL_BASE + 0x520) /* d */
+
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP2_AHB_CBCR (CLK_CTL_BASE + 0x944)
@@ -171,14 +182,46 @@
#define MIPI_DSI1_BASE (0xFD922E00)
#define REG_DSI(off) (MIPI_DSI_BASE + 0x04 + (off))
+#define EDP_BASE (0xFD923400)
+
#define MDP_BASE (0xfd900000)
#define REG_MDP(off) (MDP_BASE + (off))
+#define SOFT_RESET 0x118
+#define CLK_CTRL 0x11C
+#define TRIG_CTRL 0x084
+#define CTRL 0x004
+#define COMMAND_MODE_DMA_CTRL 0x03C
+#define ERR_INT_MASK0 0x10C
+
+#define LANE_SWAP_CTL 0x0B0
+#define TIMING_CTL 0x0C4
+
+#define VIDEO_MODE_ACTIVE_H 0x024
+#define VIDEO_MODE_ACTIVE_V 0x028
+#define VIDEO_MODE_TOTAL 0x02C
+#define VIDEO_MODE_HSYNC 0x030
+#define VIDEO_MODE_VSYNC 0x034
+#define VIDEO_MODE_VSYNC_VPOS 0x038
+
+#define DMA_CMD_OFFSET 0x048
+#define DMA_CMD_LENGTH 0x04C
+
+#define INT_CTRL 0x110
+#define CMD_MODE_DMA_SW_TRIGGER 0x090
+
+#define EOT_PACKET_CTRL 0x0C8
+#define MISR_VIDEO_CTRL 0x0A4
+#define VIDEO_MODE_CTRL 0x010
+#define HS_TIMER_CTRL 0x0BC
+
/* DRV strength for sdcc */
#define SDC1_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x00002044)
/* SDHCI */
-#define SDCC_MCI_HC_MODE (PERIPH_SS_BASE + 0x00024078)
-#define SDCC_HC_PWRCTL_MASK_REG (PERIPH_SS_BASE + 0x000240E0)
-#define SDCC_HC_PWRCTL_CTL_REG (PERIPH_SS_BASE + 0x000240E8)
+#define SDCC_MCI_HC_MODE (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)
#endif
diff --git a/platform/msm8974/include/platform/irqs.h b/platform/msm8974/include/platform/irqs.h
index 56ef1cb..e9b2d06 100644
--- a/platform/msm8974/include/platform/irqs.h
+++ b/platform/msm8974/include/platform/irqs.h
@@ -66,5 +66,8 @@
((GIC_SPI_START + 95) + qup_id):\
((GIC_SPI_START + 101) + qup_id))
-#define SDCC_PWRCTRL_IRQ (GIC_SPI_START + 138)
+#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
+#define SDCC3_PWRCTL_IRQ (GIC_SPI_START + 224)
+#define SDCC4_PWRCTL_IRQ (GIC_SPI_START + 227)
#endif /* __IRQS_COPPER_H */
diff --git a/platform/msm8974/msm8974-clock.c b/platform/msm8974/msm8974-clock.c
index 6c88589..991fe17 100644
--- a/platform/msm8974/msm8974-clock.c
+++ b/platform/msm8974/msm8974-clock.c
@@ -44,6 +44,8 @@
#define mmpll1_mm_source_val 2
#define mmpll3_mm_source_val 3
#define gpll0_mm_source_val 5
+#define edppll_270_mm_source_val 4
+#define edppll_350_mm_source_val 4
struct clk_freq_tbl rcg_dummy_freq = F_END;
@@ -166,6 +168,46 @@
},
};
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+ .cmd_reg = (uint32_t *) SDCC2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC2_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC2_M,
+ .n_reg = (uint32_t *) SDCC2_N,
+ .d_reg = (uint32_t *) SDCC2_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc2_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_APPS_CBCR,
+ .parent = &sdcc2_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* UART Clocks */
static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
{
@@ -584,12 +626,69 @@
},
};
+static struct clk_freq_tbl ftbl_mdss_edplink_clk[] = {
+ F_MDSS(162000000, edppll_270, 2, 0, 0),
+ F_MDSS(270000000, edppll_270, 11, 0, 0),
+ F_END
+};
+
+static struct rcg_clk edplink_clk_src = {
+ .cmd_reg = (uint32_t *)EDPLINK_CMD_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mdss_edplink_clk,
+ .current_freq = &rcg_dummy_freq,
+ .c = {
+ .dbg_name = "edplink_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct clk_freq_tbl ftbl_mdss_edppixel_clk[] = {
+ F_MDSS(138500000, edppll_350, 2, 0, 0),
+ F_MDSS(350000000, edppll_350, 11, 0, 0),
+ F_END
+};
+
+static struct rcg_clk edppixel_clk_src = {
+ .cmd_reg = (uint32_t *)EDPPIXEL_CMD_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_mdss_edppixel_clk,
+ .current_freq = &rcg_dummy_freq,
+ .c = {
+ .dbg_name = "edppixel_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk mdss_edplink_clk = {
+ .cbcr_reg = (uint32_t *)MDSS_EDPLINK_CBCR,
+ .has_sibling = 0,
+ .parent = &edplink_clk_src.c,
+ .c = {
+ .dbg_name = "mdss_edplink_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk mdss_edppixel_clk = {
+ .cbcr_reg = (uint32_t *)MDSS_EDPPIXEL_CBCR,
+ .has_sibling = 0,
+ .parent = &edppixel_clk_src.c,
+ .c = {
+ .dbg_name = "mdss_edppixel_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* Clock lookup table */
static struct clk_lookup msm_clocks_8974[] =
{
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+ CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
+
CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
@@ -620,6 +719,9 @@
CLK_LOOKUP("mdss_mdp_clk_src", mdss_mdp_clk_src.c),
CLK_LOOKUP("mdss_mdp_clk", mdss_mdp_clk.c),
CLK_LOOKUP("mdss_mdp_lut_clk", mdss_mdp_lut_clk.c),
+
+ CLK_LOOKUP("edp_pixel_clk", mdss_edppixel_clk.c),
+ CLK_LOOKUP("edp_link_clk", mdss_edplink_clk.c),
};
diff --git a/platform/msm8974/platform.c b/platform/msm8974/platform.c
index 8dc88f7..be35f84 100644
--- a/platform/msm8974/platform.c
+++ b/platform/msm8974/platform.c
@@ -82,38 +82,20 @@
dprintf(INFO, "platform_init()\n");
}
-static uint32_t platform_get_sclk_count(void)
+uint32_t platform_get_sclk_count(void)
{
return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL);
}
-static uint32_t kernel_load_start;
-void bs_set_timestamp(enum bs_entry bs_id)
+addr_t get_bs_info_addr()
{
- void *bs_imem;
uint32_t soc_ver = board_soc_version();
- if (bs_id >= BS_MAX) {
- dprintf(CRITICAL, "bad bs id: %u, max: %u\n", bs_id, BS_MAX);
- ASSERT(0);
- }
-
- if (bs_id == BS_KERNEL_LOAD_START) {
- kernel_load_start = platform_get_sclk_count();
- return;
- }
-
if (soc_ver < BOARD_SOC_VERSION2)
- bs_imem = (void *)BS_INFO_ADDR_V1;
+ return ((addr_t)BS_INFO_ADDR_V1);
else
- bs_imem = (void *)BS_INFO_ADDR_V2;
+ return ((addr_t)BS_INFO_ADDR_V2);
- if(bs_id == BS_KERNEL_LOAD_DONE)
- writel(platform_get_sclk_count() - kernel_load_start,
- bs_imem + (sizeof(uint32_t) * BS_KERNEL_LOAD_TIME));
- else
- writel(platform_get_sclk_count(),
- bs_imem + (sizeof(uint32_t) * bs_id));
}
void platform_uninit(void)
diff --git a/platform/msm_shared/bam.c b/platform/msm_shared/bam.c
index bd7a595..5deaecf 100644
--- a/platform/msm_shared/bam.c
+++ b/platform/msm_shared/bam.c
@@ -79,6 +79,7 @@
enum p_int_type interrupt)
{
uint32_t val;
+ uint32_t bamsts;
while (1)
{
@@ -90,8 +91,12 @@
} while (!((val & 0x7FFF) & (1 << bam->pipe[pipe_num].pipe_num)));
/* Check the reason for this BAM interrupt */
- if (readl(BAM_IRQ_STTS(bam->base)))
+ bamsts = readl(BAM_IRQ_STTS(bam->base));
+ if (bamsts)
+ {
+ dprintf(CRITICAL,"ERROR:BAM_IRQ_STTS %u \n", bamsts);
goto bam_wait_int_error;
+ }
/* Check the interrupt type */
/* Read interrupt status register */
@@ -109,17 +114,11 @@
writel (val, BAM_P_IRQ_CLRn(bam->pipe[pipe_num].pipe_num, bam->base));
return BAM_RESULT_SUCCESS;
}
- else if (val & P_TRNSFR_END_EN_MASK)
- {
- dprintf(CRITICAL,
- "Trasfer end signalled before the last descc was processed\n");
- goto bam_wait_int_error;
- }
}
bam_wait_int_error:
- dprintf(CRITICAL, "Unexpected interrupt\n");
+ dprintf(CRITICAL, "Unexpected interrupt : val %u\n", val);
return BAM_RESULT_FAILURE;
}
@@ -128,7 +127,7 @@
{
uint32_t int_mask = P_ERR_EN_MASK | P_OUT_OF_DESC_EN_MASK |
- P_PRCSD_DESC_EN_MASK | P_TRNSFR_END_EN_MASK;
+ P_PRCSD_DESC_EN_MASK;
uint32_t val;
/* Leave BAM error interrupts disabled. */
@@ -223,6 +222,9 @@
/* Initialize FIFO offset for the first read */
bam->pipe[pipe_num].fifo.offset = BAM_DESC_SIZE;
+ writel(P_ENABLE | readl(BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base)),
+ BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base));
+
/* Everything is set.
* Flag pipe init done.
*/
@@ -243,9 +245,9 @@
/* Pipe event threshold register is not relevant in sys modes */
/* Enable pipe in system mode and set the direction */
- writel(P_SYS_MODE_MASK | P_ENABLE |
- (bam->pipe[pipe_num].trans_type << P_DIRECTION_SHIFT),
- BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base));
+ writel(P_SYS_MODE_MASK | bam->pipe[pipe_num].lock_grp << P_LOCK_GRP_SHIFT |
+ (bam->pipe[pipe_num].trans_type << P_DIRECTION_SHIFT),
+ BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base));
/* Mark the pipe FIFO as uninitialized. */
bam->pipe[pipe_num].initialized = 0;
diff --git a/platform/msm_shared/board.c b/platform/msm_shared/board.c
index dcc750d..3e93888 100644
--- a/platform/msm_shared/board.c
+++ b/platform/msm_shared/board.c
@@ -103,6 +103,20 @@
board.platform_hw = board_info_v8.board_info_v3.hw_platform;
board.platform_subtype = board_info_v8.platform_subtype;
+ /*
+ * fill in board.target with variant_id information
+ * bit no |31 24 | 23 16| 15 8 |7 0|
+ * board.target =|subtype| major | minor |hw_platform|
+ * Have QRD board.target =| OEM | EVT/DVT|Reserved| QRD |
+ *
+ */
+ if (board_info_v8.board_info_v3.hw_platform == HW_PLATFORM_QRD) {
+ board.target = (((board_info_v8.platform_subtype & 0xff) << 24) |
+ (((board_info_v8.platform_version >> 16) & 0xff) << 16) |
+ ((board_info_v8.platform_version & 0xff) << 8) |
+ ((board_info_v8.board_info_v3.hw_platform & 0xff) << 0));
+ }
+
for (i = 0; i < SMEM_V8_SMEM_MAX_PMIC_DEVICES; i++) {
board.pmic_info[i].pmic_type = board_info_v8.pmic_info[i].pmic_type;
board.pmic_info[i].pmic_version = board_info_v8.pmic_info[i].pmic_version;
diff --git a/platform/msm_shared/boot_stats.c b/platform/msm_shared/boot_stats.c
new file mode 100644
index 0000000..551000e
--- /dev/null
+++ b/platform/msm_shared/boot_stats.c
@@ -0,0 +1,66 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation. nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <boot_stats.h>
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+
+static uint32_t kernel_load_start;
+void bs_set_timestamp(enum bs_entry bs_id)
+{
+ addr_t bs_imem = get_bs_info_addr();
+ uint32_t clk_count = 0;
+
+ if(bs_imem) {
+ if (bs_id >= BS_MAX) {
+ dprintf(CRITICAL, "bad bs id: %u, max: %u\n", bs_id, BS_MAX);
+ ASSERT(0);
+ }
+
+ if (bs_id == BS_KERNEL_LOAD_START) {
+ kernel_load_start = platform_get_sclk_count();
+ return;
+ }
+
+ if(bs_id == BS_KERNEL_LOAD_DONE){
+ clk_count = platform_get_sclk_count();
+ if(clk_count){
+ writel(clk_count - kernel_load_start,
+ bs_imem + (sizeof(uint32_t) * BS_KERNEL_LOAD_TIME));
+ }
+ }
+ else{
+ clk_count = platform_get_sclk_count();
+ if(clk_count){
+ writel(clk_count,
+ bs_imem + (sizeof(uint32_t) * bs_id));
+ }
+ }
+ }
+}
diff --git a/platform/msm_shared/crypto5_eng.c b/platform/msm_shared/crypto5_eng.c
index 669d6ac..ed5c8ad 100644
--- a/platform/msm_shared/crypto5_eng.c
+++ b/platform/msm_shared/crypto5_eng.c
@@ -256,6 +256,7 @@
dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].trans_type = BAM2SYS;
dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].fifo.size = params->read_fifo_size;
dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].fifo.head = crypto_allocate_fifo(params->read_fifo_size);
+ dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].lock_grp = params->pipes.read_pipe_grp;
/* Set Write pipe params. */
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].pipe_num = params->pipes.write_pipe;
@@ -263,6 +264,7 @@
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].trans_type = SYS2BAM;
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].fifo.size = params->write_fifo_size;
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].fifo.head = crypto_allocate_fifo(params->write_fifo_size);
+ dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].lock_grp = params->pipes.write_pipe_grp;
dev->bam.threshold = CRYPTO_MAX_THRESHOLD;
diff --git a/platform/msm_shared/dev_tree.c b/platform/msm_shared/dev_tree.c
index de5384b..6b596fa 100644
--- a/platform/msm_shared/dev_tree.c
+++ b/platform/msm_shared/dev_tree.c
@@ -52,6 +52,75 @@
*/
extern int check_aboot_addr_range_overlap(uint32_t start, uint32_t size);
+struct msm_id
+{
+ uint32_t platform_id;
+ uint32_t hardware_id;
+ uint32_t soc_rev;
+};
+
+/* Returns soc version if platform id and hardware id matches
+ otherwise return 0xFFFFFFFF */
+#define INVALID_SOC_REV_ID 0XFFFFFFFF
+static uint32_t dev_tree_compatible(void *dtb)
+{
+ int root_offset;
+ const void *prop;
+ char model[128];
+ struct msm_id msm_id;
+ int len;
+
+ root_offset = fdt_path_offset(dtb, "/");
+ if (root_offset < 0)
+ return false;
+
+ prop = fdt_getprop(dtb, root_offset, "model", &len);
+ if (prop && len > 0) {
+ memcpy(model, prop, MIN((int)sizeof(model), len));
+ model[sizeof(model) - 1] = '\0';
+ } else {
+ model[0] = '\0';
+ }
+
+ prop = fdt_getprop(dtb, root_offset, "qcom,msm-id", &len);
+ if (!prop || len <= 0) {
+ dprintf(INFO, "qcom,msm-id entry not found\n");
+ return false;
+ } else if (len < (int)sizeof(struct msm_id)) {
+ dprintf(INFO, "qcom,msm-id entry size mismatch (%d != %d)\n",
+ len, sizeof(struct msm_id));
+ return false;
+ }
+ msm_id.platform_id = fdt32_to_cpu(((const struct msm_id *)prop)->platform_id);
+ msm_id.hardware_id = fdt32_to_cpu(((const struct msm_id *)prop)->hardware_id);
+ msm_id.soc_rev = fdt32_to_cpu(((const struct msm_id *)prop)->soc_rev);
+
+ dprintf(INFO, "Found an appended flattened device tree (%s - %d %d 0x%x)\n",
+ *model ? model : "unknown",
+ msm_id.platform_id, msm_id.hardware_id, msm_id.soc_rev);
+
+ if (msm_id.platform_id != board_platform_id() ||
+ msm_id.hardware_id != board_hardware_id()) {
+ dprintf(INFO, "Device tree's msm_id doesn't match the board: <%d %d 0x%x> != <%d %d 0x%x>\n",
+ msm_id.platform_id,
+ msm_id.hardware_id,
+ msm_id.soc_rev,
+ board_platform_id(),
+ board_hardware_id(),
+ board_soc_version());
+ return INVALID_SOC_REV_ID;
+ }
+
+ dprintf(INFO, "Device tree's msm_id matchs the board: <%d %d 0x%x> != <%d %d 0x%x>\n",
+ msm_id.platform_id,
+ msm_id.hardware_id,
+ msm_id.soc_rev,
+ board_platform_id(),
+ board_hardware_id(),
+ board_soc_version());
+ return msm_id.soc_rev;
+}
+
/*
* Will relocate the DTB to the tags addr if the device tree is found and return
* its address
@@ -63,46 +132,66 @@
* Return Value: DTB address : If appended device tree is found
* 'NULL' : Otherwise
*/
-void *dev_tree_appended(void *kernel, void *tags, uint32_t kernel_size)
+void *dev_tree_appended(void *kernel, uint32_t kernel_size, void *tags)
{
+ void *kernel_end = kernel + kernel_size;
uint32_t app_dtb_offset = 0;
- uint32_t size;
+ void *dtb;
+ void *bestmatch_tag = NULL;
+ uint32_t bestmatch_tag_size;
+ uint32_t bestmatch_soc_rev_id = INVALID_SOC_REV_ID;
memcpy((void*) &app_dtb_offset, (void*) (kernel + DTB_OFFSET), sizeof(uint32_t));
- /*
- * Check if we have valid offset for the DTB, if not return error.
- * If the kernel image does not have appeneded device tree, DTB offset
- * might contain some random address which is not accessible & cause
- * data abort. If kernel start + dtb offset address exceed the total
- * size of the kernel, then we dont have an appeneded DTB.
- */
- if (app_dtb_offset < kernel_size)
- {
- if (!fdt_check_header((void*) (kernel + app_dtb_offset)))
- {
- void *dtb;
- int rc;
+ dtb = kernel + app_dtb_offset;
+ while (dtb + sizeof(struct fdt_header) < kernel_end) {
+ uint32_t dtb_soc_rev_id;
+ struct fdt_header dtb_hdr;
+ uint32_t dtb_size;
- dprintf(INFO, "Found Appeneded Flattened Device tree\n");
- dtb = kernel + app_dtb_offset;
- size = fdt_totalsize(dtb);
- if (check_aboot_addr_range_overlap(tags, size))
- {
- dprintf(CRITICAL, "Appended dtb aboot overlap check failed.\n");
- return NULL;
- }
- rc = fdt_open_into(dtb, tags, size);
- if (rc == 0)
- {
- /* clear out the old DTB magic so kernel doesn't find it */
- *((uint32_t *)dtb) = 0;
- return tags;
+ /* the DTB could be unaligned, so extract the header,
+ * and operate on it separately */
+ memcpy(&dtb_hdr, dtb, sizeof(struct fdt_header));
+ if (fdt_check_header((const void *)&dtb_hdr) != 0 ||
+ (dtb + fdt_totalsize((const void *)&dtb_hdr) > kernel_end))
+ break;
+ dtb_size = fdt_totalsize(&dtb_hdr);
+
+ /* now that we know we have a valid DTB, we need to copy
+ * it somewhere aligned, like tags */
+ memcpy(tags, dtb, dtb_size);
+
+ dtb_soc_rev_id = dev_tree_compatible(tags);
+ if (dtb_soc_rev_id == board_soc_version()) {
+ /* clear out the old DTB magic so kernel doesn't find it */
+ *((uint32_t *)(kernel + app_dtb_offset)) = 0;
+ return tags;
+ } else if ((dtb_soc_rev_id != INVALID_SOC_REV_ID) &&
+ (dtb_soc_rev_id < board_soc_version())) {
+ /* if current bestmatch is less than new dtb_soc_rev_id then update
+ bestmatch_tag */
+ if((bestmatch_soc_rev_id == INVALID_SOC_REV_ID) ||
+ (bestmatch_soc_rev_id < dtb_soc_rev_id)) {
+ bestmatch_tag = dtb;
+ bestmatch_tag_size = dtb_size;
+ bestmatch_soc_rev_id = dtb_soc_rev_id;
}
}
+
+ /* goto the next device tree if any */
+ dtb += dtb_size;
}
- else
- dprintf(CRITICAL, "DTB offset is incorrect, kernel image does not have appended DTB\n");
+
+ if(bestmatch_tag) {
+ dprintf(INFO,"DTB found with bestmatch soc rev id 0x%x.Board soc rev id 0x%x\n",
+ bestmatch_soc_rev_id, board_soc_version());
+ memcpy(tags, bestmatch_tag, bestmatch_tag_size);
+ /* clear out the old DTB magic so kernel doesn't find it */
+ *((uint32_t *)(kernel + app_dtb_offset)) = 0;
+ return tags;
+ }
+
+ dprintf(CRITICAL, "DTB offset is incorrect, kernel image does not have appended DTB\n");
return NULL;
}
@@ -134,13 +223,31 @@
return 0;
}
-/* Function to obtain the index information for the correct device tree
- * based on the platform data.
- * If a matching device tree is found, the information is returned in the
- * "dt_entry_info" out parameter and a function value of 0 is returned, otherwise
- * a non-zero function value is returned.
- */
-int dev_tree_get_entry_info(struct dt_table *table, struct dt_entry *dt_entry_info)
+static int platform_dt_match(struct dt_entry *cur_dt_entry, uint32_t target_variant_id, uint32_t subtype_mask)
+{
+ /* 1. must match the platform_id, hardware_id, platform_version
+ * 2. soc rev number equal then return 0
+ * 3. dt soc rev number less than cdt return -1
+ * 4. otherwise return 1
+ */
+ uint32_t cur_dt_target_id ;
+
+ cur_dt_target_id = cur_dt_entry->variant_id | ((cur_dt_entry->board_hw_subtype & subtype_mask & 0xff) << 24);
+
+ if((cur_dt_entry->platform_id == board_platform_id()) &&
+ (cur_dt_target_id == target_variant_id)) {
+ if(cur_dt_entry->soc_rev == board_soc_version()) {
+ return 0;
+ } else if(cur_dt_entry->soc_rev < board_soc_version()) {
+ return -1;
+ }
+ }
+
+ return 1;
+}
+
+static int __dev_tree_get_entry_info(struct dt_table *table, struct dt_entry *dt_entry_info,
+ uint32_t target_variant_id, uint32_t subtype_mask)
{
uint32_t i;
unsigned char *table_ptr;
@@ -149,6 +256,7 @@
struct dt_entry *cur_dt_entry;
struct dt_entry *best_match_dt_entry;
struct dt_entry_v1 *dt_entry_v1;
+ uint32_t found = 0;
if (!dt_entry_info) {
dprintf(CRITICAL, "ERROR: Bad parameter passed to %s \n",
@@ -160,7 +268,7 @@
cur_dt_entry = &dt_entry_buf_1;
best_match_dt_entry = NULL;
- for(i = 0; i < table->num_entries; i++)
+ for(i = 0; found == 0 && i < table->num_entries; i++)
{
memset(cur_dt_entry, 0, sizeof(struct dt_entry));
switch(table->version) {
@@ -190,37 +298,79 @@
* we pickup the DTB with highest soc rev number which is less
* than or equal to actual hardware
*/
- if((cur_dt_entry->platform_id == board_platform_id()) &&
- (cur_dt_entry->variant_id == board_hardware_id()) &&
- (cur_dt_entry->board_hw_subtype == board_hardware_subtype()))
- {
- if(cur_dt_entry->soc_rev == board_soc_version()) {
+ switch(platform_dt_match(cur_dt_entry, target_variant_id, subtype_mask)) {
+ case 0:
+ best_match_dt_entry = cur_dt_entry;
+ found = 1;
+ break;
+ case -1:
+ if (!best_match_dt_entry) {
/* copy structure */
- *dt_entry_info = *cur_dt_entry;
- return 0;
- } else if (cur_dt_entry->soc_rev < board_soc_version()){
- /* Keep this as the next best candidate. */
- if (!best_match_dt_entry) {
- best_match_dt_entry = cur_dt_entry;
- cur_dt_entry = &dt_entry_buf_2;
- } else {
- /* Swap dt_entry buffers */
- struct dt_entry *temp = cur_dt_entry;
- cur_dt_entry = best_match_dt_entry;
- best_match_dt_entry = temp;
- }
+ best_match_dt_entry = cur_dt_entry;
+ cur_dt_entry = &dt_entry_buf_2;
+ } else {
+ /* Swap dt_entry buffers */
+ struct dt_entry *temp = cur_dt_entry;
+ cur_dt_entry = best_match_dt_entry;
+ best_match_dt_entry = temp;
}
+ default:
+ break;
}
}
if (best_match_dt_entry) {
*dt_entry_info = *best_match_dt_entry;
+ found = 1;
+ }
+
+ if (found != 0) {
+ dprintf(INFO, "Using DTB entry %u/%08x/%u/%u for device %u/%08x/%u/%u\n",
+ dt_entry_info->platform_id, dt_entry_info->soc_rev,
+ dt_entry_info->variant_id, dt_entry_info->board_hw_subtype,
+ board_platform_id(), board_soc_version(),
+ board_hardware_id(), board_hardware_subtype());
return 0;
}
+ dprintf(CRITICAL, "ERROR: Unable to find suitable device tree for device (%u/0x%08x/%u/%u)\n",
+ board_platform_id(), board_soc_version(),
+ board_hardware_id(), board_hardware_subtype());
return -1;
}
+/* Function to obtain the index information for the correct device tree
+ * based on the platform data.
+ * If a matching device tree is found, the information is returned in the
+ * "dt_entry_info" out parameter and a function value of 0 is returned, otherwise
+ * a non-zero function value is returned.
+ */
+int dev_tree_get_entry_info(struct dt_table *table, struct dt_entry *dt_entry_info)
+{
+ uint32_t target_variant_id;
+
+ if(board_hardware_id() == HW_PLATFORM_QRD) {
+ target_variant_id = board_target_id();
+ if (__dev_tree_get_entry_info(table, dt_entry_info, target_variant_id, 0xff) == 0) {
+ return 0;
+ }
+ }
+ /*
+ * for compatible with version 1 and version 2 dtbtool
+ * will compare the subtype inside the variant id
+ */
+ target_variant_id = board_hardware_id() | ((board_hardware_subtype() & 0xff) << 24);
+ if (__dev_tree_get_entry_info(table, dt_entry_info, target_variant_id, 0xff) == 0) {
+ return 0;
+ }
+
+ /*
+ * add compatible with old device selection method which don't compare subtype
+ */
+ target_variant_id = board_hardware_id();
+ return __dev_tree_get_entry_info(table, dt_entry_info, target_variant_id, 0);
+}
+
/* Function to add the first RAM partition info to the device tree.
* Note: The function replaces the reg property in the "/memory" node
* with the addr and size provided.
@@ -362,3 +512,4 @@
return ret;
}
+
diff --git a/platform/msm_shared/display.c b/platform/msm_shared/display.c
index c6d02c4..3768ca8 100644
--- a/platform/msm_shared/display.c
+++ b/platform/msm_shared/display.c
@@ -73,6 +73,7 @@
int msm_display_config()
{
int ret = NO_ERROR;
+ int mdp_rev;
struct msm_panel_info *pinfo;
if (!panel)
@@ -93,7 +94,8 @@
case MIPI_VIDEO_PANEL:
dprintf(INFO, "Config MIPI_VIDEO_PANEL.\n");
- if (mdp_get_revision() == MDP_REV_50)
+ mdp_rev = mdp_get_revision();
+ if (mdp_rev == MDP_REV_50 || mdp_rev == MDP_REV_304)
ret = mdss_dsi_config(panel);
else
ret = mipi_config(panel);
@@ -110,8 +112,8 @@
break;
case MIPI_CMD_PANEL:
dprintf(INFO, "Config MIPI_CMD_PANEL.\n");
-
- if (mdp_get_revision() == MDP_REV_50)
+ mdp_rev = mdp_get_revision();
+ if (mdp_rev == MDP_REV_50 || mdp_rev == MDP_REV_304)
ret = mdss_dsi_config(panel);
else
ret = mipi_config(panel);
@@ -148,6 +150,7 @@
int msm_display_on()
{
int ret = NO_ERROR;
+ int mdp_rev;
struct msm_panel_info *pinfo;
if (!panel)
@@ -181,7 +184,8 @@
ret = mdp_dma_on();
if (ret)
goto msm_display_on_out;
- if (mdp_get_revision() != MDP_REV_50) {
+ mdp_rev = mdp_get_revision();
+ if (mdp_rev != MDP_REV_50 && mdp_rev != MDP_REV_304) {
ret = mipi_cmd_trigger();
if (ret)
goto msm_display_on_out;
@@ -236,6 +240,10 @@
if (pdata->clk_func)
ret = pdata->clk_func(1);
+ /* Only enabled for auto PLL calculation */
+ if (pdata->pll_clk_func)
+ ret = pdata->pll_clk_func(1, &(panel->panel_info));
+
if (ret)
goto msm_display_init_out;
@@ -277,7 +285,7 @@
ret = mdp_dsi_video_off();
if (ret)
goto msm_display_off_out;
- ret = mipi_dsi_off();
+ ret = mipi_dsi_off(pinfo);
if (ret)
goto msm_display_off_out;
break;
@@ -286,7 +294,7 @@
ret = mdp_dsi_cmd_off();
if (ret)
goto msm_display_off_out;
- ret = mipi_dsi_off();
+ ret = mipi_dsi_off(pinfo);
if (ret)
goto msm_display_off_out;
break;
@@ -310,6 +318,10 @@
if (panel->clk_func)
ret = panel->clk_func(0);
+ /* Only for AUTO PLL calculation */
+ if (panel->pll_clk_func)
+ ret = panel->pll_clk_func(0, pinfo);
+
if (ret)
goto msm_display_off_out;
diff --git a/platform/msm_shared/edp.c b/platform/msm_shared/edp.c
new file mode 100644
index 0000000..d170f19
--- /dev/null
+++ b/platform/msm_shared/edp.c
@@ -0,0 +1,163 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "edp.h"
+#include "mdp5.h"
+
+#define RGB_COMPONENTS 3
+#define MAX_NUMBER_EDP_LANES 4
+
+static void edp_config_sync(void)
+{
+ int ret = 0;
+
+ ret = edp_read(EDP_BASE + 0xc); /* EDP_CONFIGURATION_CTRL */
+ ret &= ~0x733;
+ ret |= (0x55 & 0x733);
+ edp_write(EDP_BASE + 0xc, ret);
+ edp_write(EDP_BASE + 0xc, 0x55); /* EDP_CONFIGURATION_CTRL */
+}
+
+static void edp_config_sw_div(void)
+{
+ edp_write(EDP_BASE + 0x14, 0x13b); /* EDP_SOFTWARE_MVID */
+ edp_write(EDP_BASE + 0x18, 0x266); /* EDP_SOFTWARE_NVID */
+}
+
+static void edp_config_static_mdiv(void)
+{
+ int ret = 0;
+
+ ret = edp_read(EDP_BASE + 0xc); /* EDP_CONFIGURATION_CTRL */
+ edp_write(EDP_BASE + 0xc, ret | 0x2); /* EDP_CONFIGURATION_CTRL */
+ edp_write(EDP_BASE + 0xc, 0x57); /* EDP_CONFIGURATION_CTRL */
+}
+
+static void edp_config_timing(void)
+{
+ edp_write(EDP_BASE + 0x98, 0);
+ edp_write(EDP_BASE + 0x9C, 0x8200020); /* EDP_HSYNC_CTL */
+ edp_write(EDP_BASE + 0x100, 0x233AC0); /* EDP_VSYNC_PERIOD_F0 */
+ edp_write(EDP_BASE + 0x104, 0x0);
+ edp_write(EDP_BASE + 0x10C, 0x0);
+ edp_write(EDP_BASE + 0x130, 0x7ef0070); /* EDP_DISPLAY_HCTL */
+ edp_write(EDP_BASE + 0x134, 0x0); /* EDP_ACTIVE_HCTL */
+ edp_write(EDP_BASE + 0x110, 0xB330); /* EDP_DISPLAY_V_START_F0 */
+ edp_write(EDP_BASE + 0x118, 0x22f98f); /* EDP_DISPLAY_V_END_F0 */
+ edp_write(EDP_BASE + 0x114, 0x0);
+ edp_write(EDP_BASE + 0x11C, 0x0);
+ edp_write(EDP_BASE + 0x120, 0x0); /* EDP_ACTIVE_V_START_F0 */
+ edp_write(EDP_BASE + 0x128, 0x0); /* EDP_ACTIVE_V_END_F0 */
+ edp_write(EDP_BASE + 0x124, 0x0);
+ edp_write(EDP_BASE + 0x12C, 0x0);
+}
+
+static void edp_enable(int enable)
+{
+ edp_write(EDP_BASE + 0x8, 0x0); /* EDP_STATE_CTRL */
+ edp_write(EDP_BASE + 0x8, 0x40); /* EDP_STATE_CTRL */
+ edp_write(EDP_BASE + 0x94, enable); /* EDP_TIMING_ENGINE_EN */
+ edp_write(EDP_BASE + 0x4, enable); /* EDP_MAINLINK_CTRL */
+}
+
+/*
+ * Converts from EDID struct to msm_panel_info
+ */
+void edp_edid2pinfo(struct edp_panel_data *edp_panel)
+{
+ struct display_timing_desc *dp;
+ struct msm_panel_info *pinfo;
+
+ dp = &edp_panel->edid.timing[0];
+ pinfo = &edp_panel->panel_data->panel_info;
+
+ pinfo->clk_rate = dp->pclk;
+
+ pinfo->xres = dp->h_addressable + dp->h_border * 2;
+ pinfo->yres = dp->v_addressable + dp->v_border * 2;
+
+ pinfo->lcdc.h_back_porch = dp->h_blank - dp->h_fporch \
+ - dp->h_sync_pulse;
+ pinfo->lcdc.h_front_porch = dp->h_fporch;
+ pinfo->lcdc.h_pulse_width = dp->h_sync_pulse;
+
+ pinfo->lcdc.v_back_porch = dp->v_blank - dp->v_fporch \
+ - dp->v_sync_pulse;
+ pinfo->lcdc.v_front_porch = dp->v_fporch;
+ pinfo->lcdc.v_pulse_width = dp->v_sync_pulse;
+
+ pinfo->type = EDP_PANEL;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = 24;
+
+ pinfo->lcdc.border_clr = 0; /* black */
+ pinfo->lcdc.underflow_clr = 0xff; /* blue */
+ pinfo->lcdc.hsync_skew = 0;
+}
+
+int edp_on(void)
+{
+ int i;
+
+ edp_phy_sw_reset();
+ edp_pll_configure();
+ edp_config_clk();
+ edp_phy_misc_cfg();
+ edp_config_sync();
+ edp_config_sw_div();
+ edp_config_static_mdiv();
+ edp_config_timing();
+
+ edp_hw_powerup(1);
+
+ for (i = 0; i < MAX_NUMBER_EDP_LANES; ++i)
+ edp_enable_lane_bist(i, 1);
+
+ edp_enable_mainlink(1);
+ edp_enable(1);
+
+ return 0;
+}
+
+int edp_off(void)
+{
+ int i;
+
+ mdp_edp_off();
+ edp_enable(0);
+ edp_unconfig_clk();
+ edp_enable_mainlink(0);
+
+ for (i = 0; i < MAX_NUMBER_EDP_LANES; ++i)
+ edp_enable_lane_bist(i, 0);
+
+ edp_hw_powerup(0);
+
+ return 0;
+}
diff --git a/platform/msm_shared/edp_phy.c b/platform/msm_shared/edp_phy.c
new file mode 100644
index 0000000..32ca68e
--- /dev/null
+++ b/platform/msm_shared/edp_phy.c
@@ -0,0 +1,197 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include "edp.h"
+#include <platform/timer.h>
+
+/* EDP phy configuration settings */
+void edp_phy_sw_reset(void)
+{
+ /* phy sw reset */
+ edp_write(EDP_BASE + 0x74, 0x100); /* EDP_PHY_CTRL */
+ dmb();
+ udelay(1);
+ edp_write(EDP_BASE + 0x74, 0x000); /* EDP_PHY_CTRL */
+ dmb();
+ udelay(1);
+
+ /* phy PLL sw reset */
+ edp_write(EDP_BASE + 0x74, 0x001); /* EDP_PHY_CTRL */
+ dmb();
+ udelay(1);
+ edp_write(EDP_BASE + 0x74, 0x000); /* EDP_PHY_CTRL */
+ dmb();
+ udelay(1);
+}
+
+void edp_hw_powerup(int enable)
+{
+ int ret = 0;
+
+ if (enable) {
+ /* EDP_PHY_EDPPHY_GLB_PD_CTL */
+ edp_write(EDP_BASE + 0x52c, 0x3f);
+ /* EDP_PHY_EDPPHY_GLB_CFG */
+ edp_write(EDP_BASE + 0x528, 0x1);
+ /* EDP_PHY_PLL_UNIPHY_PLL_GLB_CFG */
+ edp_write(EDP_BASE + 0x620, 0xf);
+ /* EDP_AUX_CTRL */
+ ret = edp_read(EDP_BASE + 0x300);
+ edp_write(EDP_BASE + 0x300, ret | 0x1);
+ } else {
+ /* EDP_PHY_EDPPHY_GLB_PD_CTL */
+ edp_write(EDP_BASE + 0x52c, 0xc0);
+ }
+}
+
+void edp_pll_configure(void)
+{
+ edp_write(EDP_BASE + 0x664, 0x5); /* UNIPHY_PLL_LKDET_CFG2 */
+ edp_write(EDP_BASE + 0x600, 0x1); /* UNIPHY_PLL_REFCLK_CFG */
+ edp_write(EDP_BASE + 0x638, 0x36); /* UNIPHY_PLL_SDM_CFG0 */
+ edp_write(EDP_BASE + 0x63c, 0x62); /* UNIPHY_PLL_SDM_CFG1 */
+ edp_write(EDP_BASE + 0x640, 0x0); /* UNIPHY_PLL_SDM_CFG2 */
+ edp_write(EDP_BASE + 0x644, 0x28); /* UNIPHY_PLL_SDM_CFG3 */
+ edp_write(EDP_BASE + 0x648, 0x0); /* UNIPHY_PLL_SDM_CFG4 */
+ edp_write(EDP_BASE + 0x64c, 0x80); /* UNIPHY_PLL_SSC_CFG0 */
+ edp_write(EDP_BASE + 0x650, 0x0); /* UNIPHY_PLL_SSC_CFG1 */
+ edp_write(EDP_BASE + 0x654, 0x0); /* UNIPHY_PLL_SSC_CFG2 */
+ edp_write(EDP_BASE + 0x658, 0x0); /* UNIPHY_PLL_SSC_CFG3 */
+ edp_write(EDP_BASE + 0x66c, 0xa); /* UNIPHY_PLL_CAL_CFG0 */
+ edp_write(EDP_BASE + 0x674, 0x1); /* UNIPHY_PLL_CAL_CFG2 */
+ edp_write(EDP_BASE + 0x684, 0x5a); /* UNIPHY_PLL_CAL_CFG6 */
+ edp_write(EDP_BASE + 0x688, 0x0); /* UNIPHY_PLL_CAL_CFG7 */
+ edp_write(EDP_BASE + 0x68c, 0x60); /* UNIPHY_PLL_CAL_CFG8 */
+ edp_write(EDP_BASE + 0x690, 0x0); /* UNIPHY_PLL_CAL_CFG9 */
+ edp_write(EDP_BASE + 0x694, 0x46); /* UNIPHY_PLL_CAL_CFG10 */
+ edp_write(EDP_BASE + 0x698, 0x5); /* UNIPHY_PLL_CAL_CFG11 */
+ edp_write(EDP_BASE + 0x65c, 0x10); /* UNIPHY_PLL_LKDET_CFG0 */
+ edp_write(EDP_BASE + 0x660, 0x1a); /* UNIPHY_PLL_LKDET_CFG1 */
+ edp_write(EDP_BASE + 0x604, 0x0); /* UNIPHY_PLL_POSTDIV1_CFG */
+ edp_write(EDP_BASE + 0x624, 0x0); /* UNIPHY_PLL_POSTDIV2_CFG */
+ edp_write(EDP_BASE + 0x628, 0x0); /* UNIPHY_PLL_POSTDIV3_CFG */
+
+ edp_write(EDP_BASE + 0x620, 0x1); /* UNIPHY_PLL_GLB_CFG */
+ edp_write(EDP_BASE + 0x620, 0x5); /* UNIPHY_PLL_GLB_CFG */
+ edp_write(EDP_BASE + 0x620, 0x7); /* UNIPHY_PLL_GLB_CFG */
+ edp_write(EDP_BASE + 0x620, 0xf); /* UNIPHY_PLL_GLB_CFG */
+}
+
+void edp_enable_mainlink(int enable)
+{
+ uint32_t data;
+
+ data = edp_read(EDP_BASE + 0x004);
+ data &= ~BIT(0);
+
+ if (enable) {
+ data |= 0x1;
+ edp_write(EDP_BASE + 0x004, data);
+ edp_write(EDP_BASE + 0x004, 0x1);
+ } else {
+ data |= 0x0;
+ edp_write(EDP_BASE + 0x004, data);
+ }
+}
+
+void edp_enable_lane_bist(int lane, int enable)
+{
+ unsigned char *addr_ln_bist_cfg, *addr_ln_pd_ctrl;
+
+ /* EDP_PHY_EDPPHY_LNn_PD_CTL */
+ addr_ln_pd_ctrl = (unsigned char *)(EDP_BASE + 0x404 + (0x40 * lane));
+ /* EDP_PHY_EDPPHY_LNn_BIST_CFG0 */
+ addr_ln_bist_cfg = (unsigned char *)(EDP_BASE + 0x408 + (0x40 * lane));
+
+ if (enable) {
+ edp_write(addr_ln_pd_ctrl, 0x0);
+ edp_write(addr_ln_bist_cfg, 0x10);
+
+ } else {
+ edp_write(addr_ln_pd_ctrl, 0xf);
+ edp_write(addr_ln_bist_cfg, 0x10);
+ }
+}
+
+void edp_enable_pixel_clk(int enable)
+{
+ if (!enable) {
+ edp_write(MDSS_EDPPIXEL_CBCR, 0); /* CBCR */
+ return;
+ }
+
+ edp_write(EDP_BASE + 0x624, 0x1); /* PostDiv2 */
+
+ /* Configuring MND for Pixel */
+ edp_write(EDPPIXEL_M, 0x3f); /* M value */
+ edp_write(EDPPIXEL_N, 0xb); /* N value */
+ edp_write(EDPPIXEL_D, 0x0); /* D value */
+
+ /* CFG RCGR */
+ edp_write(EDPPIXEL_CFG_RCGR, (5 << 8) | (2 << 12));
+ edp_write(EDPPIXEL_CMD_RCGR, 3); /* CMD RCGR */
+
+ edp_write(MDSS_EDPPIXEL_CBCR, 1); /* CBCR */
+}
+
+void edp_enable_link_clk(int enable)
+{
+ if (!enable) {
+ edp_write(MDSS_EDPLINK_CBCR, 0); /* CBCR */
+ return;
+ }
+
+ edp_write(EDPLINK_CFG_RCGR, (4 << 8)); /* CFG RCGR */
+ edp_write(EDPLINK_CMD_RCGR, 3); /* CMD RCGR */
+
+ edp_write(MDSS_EDPLINK_CBCR, 1); /* CBCR */
+}
+
+void edp_config_clk(void)
+{
+ edp_enable_link_clk(1);
+ edp_enable_pixel_clk(1);
+}
+
+void edp_unconfig_clk(void)
+{
+ edp_enable_link_clk(0);
+ edp_enable_pixel_clk(0);
+}
+
+void edp_phy_misc_cfg(void)
+{
+ /* EDP_PHY_EDPPHY_GLB_VM_CFG0 */
+ edp_write(EDP_BASE + 0x510, 0x3);
+ /* EDP_PHY_EDPPHY_GLB_VM_CFG1 */
+ edp_write(EDP_BASE + 0x514, 0x64);
+ /* EDP_PHY_EDPPHY_GLB_MISC9 */
+ edp_write(EDP_BASE + 0x518, 0x6c);
+ /* EDP_MISC1_MISC0 */
+ edp_write(EDP_BASE + 0x2c, 0x1);
+}
diff --git a/platform/msm_shared/include/bam.h b/platform/msm_shared/include/bam.h
index 099b1b6..ae673ab 100644
--- a/platform/msm_shared/include/bam.h
+++ b/platform/msm_shared/include/bam.h
@@ -81,6 +81,7 @@
#define P_SYS_MODE_MASK (1 << 5)
/* 1: Producer mode 0: Consumer mode */
#define P_DIRECTION_SHIFT 3
+#define P_LOCK_GRP_SHIFT 16
#define P_ENABLE (1 << 1)
#define BAM_P_RSTn(n, x) (0x00001000 + 0x4 + 0x1000 * (n) + (x))
@@ -198,6 +199,7 @@
uint8_t spi_num;
uint8_t int_mode;
uint8_t initialized;
+ uint8_t lock_grp;
};
/* Structure to define a BAM instance being used
diff --git a/include/boot_stats.h b/platform/msm_shared/include/boot_stats.h
similarity index 100%
rename from include/boot_stats.h
rename to platform/msm_shared/include/boot_stats.h
diff --git a/platform/msm_shared/include/clock_lib2.h b/platform/msm_shared/include/clock_lib2.h
index a7606bc..008d5fa 100644
--- a/platform/msm_shared/include/clock_lib2.h
+++ b/platform/msm_shared/include/clock_lib2.h
@@ -70,6 +70,16 @@
| BVAL(10, 8, s##_mm_source_val), \
}
+#define F_MDSS(f, s, div, m, n) \
+ { \
+ .freq_hz = (f), \
+ .m_val = (m), \
+ .n_val = ~((n)-(m)) * !!(n), \
+ .d_val = ~(n),\
+ .div_src_val = BVAL(4, 0, (int)(2*(div) - 1)) \
+ | BVAL(10, 8, s##_mm_source_val), \
+ }
+
/* Branch Clock Bits */
#define CBCR_BRANCH_ENABLE_BIT BIT(0)
#define CBCR_BRANCH_OFF_BIT BIT(31)
diff --git a/platform/msm_shared/include/crypto5_eng.h b/platform/msm_shared/include/crypto5_eng.h
index 958fa1a..872f46e 100644
--- a/platform/msm_shared/include/crypto5_eng.h
+++ b/platform/msm_shared/include/crypto5_eng.h
@@ -103,6 +103,8 @@
{
uint8_t read_pipe;
uint8_t write_pipe;
+ uint8_t read_pipe_grp;
+ uint8_t write_pipe_grp;
};
struct output_dump
diff --git a/platform/msm_shared/include/dev_tree.h b/platform/msm_shared/include/dev_tree.h
index d0b0ca8..2a8ee01 100644
--- a/platform/msm_shared/include/dev_tree.h
+++ b/platform/msm_shared/include/dev_tree.h
@@ -70,5 +70,5 @@
int dev_tree_get_entry_info(struct dt_table *table, struct dt_entry *dt_entry_info);
int update_device_tree(void *, const char *, void *, unsigned);
int dev_tree_add_mem_info(void *fdt, uint32_t offset, uint32_t size, uint32_t addr);
-void *dev_tree_appended(void *kernel, void *tags, uint32_t kernel_size);
+void *dev_tree_appended(void *kernel, uint32_t kernel_size, void *tags);
#endif
diff --git a/platform/msm_shared/include/edp.h b/platform/msm_shared/include/edp.h
new file mode 100644
index 0000000..04a3e49
--- /dev/null
+++ b/platform/msm_shared/include/edp.h
@@ -0,0 +1,55 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#ifndef EDP_H
+#define EDP_H
+
+#include "msm_panel.h"
+#include <reg.h>
+#include <debug.h>
+#include <err.h>
+#include <platform/iomap.h>
+#include <platform/clock.h>
+
+#define edp_read(offset) readl_relaxed((offset))
+#define edp_write(offset, data) writel_relaxed((data), (offset))
+
+void edp_phy_sw_reset(void);
+void edp_pll_configure(void);
+void edp_enable_lane_bist(int lane, int enable);
+void edp_enable_mainlink(int enable);
+void edp_hw_powerup(int enable);
+void edp_config_clk(void);
+void edp_unconfig_clk(void);
+void edp_phy_misc_cfg(void);
+void edp_edid2pinfo(struct edp_panel_data *edp_panel);
+int edp_on(void);
+int edp_off(void);
+int edp_config(void *pdata);
+
+#endif /* EDP_H */
diff --git a/platform/msm_shared/include/mdp3.h b/platform/msm_shared/include/mdp3.h
index 813b4ba..8dff686 100644
--- a/platform/msm_shared/include/mdp3.h
+++ b/platform/msm_shared/include/mdp3.h
@@ -28,6 +28,8 @@
*/
#include <dev/fbcon.h>
+#include <msm_panel.h>
+
//TODO: Make a global PASS / FAIL define
#define PASS 0
#define FAIL 1
@@ -51,3 +53,8 @@
void mdp_shutdown(void);
void mdp_set_revision(int rev);
int mdp_get_revision();
+
+/* defining no-op functions that are implemented only for mdp5 */
+int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb);
+int mdp_edp_on(void);
+int mdp_edp_off(void);
diff --git a/platform/msm_shared/include/mdp4.h b/platform/msm_shared/include/mdp4.h
index e0fc2c7..c988dee 100644
--- a/platform/msm_shared/include/mdp4.h
+++ b/platform/msm_shared/include/mdp4.h
@@ -111,4 +111,10 @@
int mdp_lcdc_off();
void mdp_set_revision(int rev);
int mdp_get_revision();
+
+/* defining no-op functions that are implemented only for mdp5 */
+int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb);
+int mdp_edp_on(void);
+int mdp_edp_off(void);
+
#endif
diff --git a/platform/msm_shared/include/mdp5.h b/platform/msm_shared/include/mdp5.h
index cf3f52e..75e4e0d 100644
--- a/platform/msm_shared/include/mdp5.h
+++ b/platform/msm_shared/include/mdp5.h
@@ -63,6 +63,7 @@
#define MDSS_MDP_HW_REV_100 0x10000000
+#define MDSS_MDP_HW_REV_101 0x10010000
#define MDSS_MDP_HW_REV_102 0x10020000
#define MDP_HW_REV REG_MDP(0x0100)
@@ -75,6 +76,7 @@
#define MDP_UPPER_NEW_ROI_PRIOR_RO_START REG_MDP(0x02EC)
#define MDP_LOWER_NEW_ROI_PRIOR_TO_START REG_MDP(0x04F8)
+#define MDP_INTF_0_TIMING_ENGINE_EN REG_MDP(0x12500)
#define MDP_INTF_1_TIMING_ENGINE_EN REG_MDP(0x12700)
#define MDP_CTL_0_BASE REG_MDP(0x600)
@@ -90,6 +92,7 @@
#define MDP_REG_SPLIT_DISPLAY_EN REG_MDP(0x3F4)
#define MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL REG_MDP(0x3F8)
+#define MDP_INTF_0_BASE REG_MDP(0x12500)
#define MDP_INTF_1_BASE REG_MDP(0x12700)
#define MDP_INTF_2_BASE REG_MDP(0x12900)
@@ -118,8 +121,10 @@
#define MDP_CLK_CTRL4 REG_MDP(0x04B0)
#define MDP_CLK_CTRL5 REG_MDP(0x04B8)
-#define MMSS_MDP_CLIENT_ID_RGB0 0x00000010
-#define MMSS_MDP_CLIENT_ID_RGB1 0x00000011
+#define MMSS_MDP_CLIENT_ID_UNUSED 0x00000000
+#define MMSS_MDP_1_1_CLIENT_ID_RGB0 0x00000007
+#define MMSS_MDP_1_2_CLIENT_ID_RGB0 0x00000010
+#define MMSS_MDP_1_2_CLIENT_ID_RGB1 0x00000011
#define MMSS_MDP_MAX_SMP_SIZE 0x00001000
#define MMSS_MDP_SMP_ALLOC_W_0 REG_MDP(0x0180)
@@ -153,6 +158,9 @@
unsigned short num_of_lanes);
int mdp_dsi_video_on(void);
int mdp_dma_on(void);
+int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb);
+int mdp_edp_on(void);
+int mdp_edp_off(void);
void mdp_disable(void);
#endif
diff --git a/platform/msm_shared/include/mipi_dsi.h b/platform/msm_shared/include/mipi_dsi.h
old mode 100644
new mode 100755
index 55f39e4..4f90f96
--- a/platform/msm_shared/include/mipi_dsi.h
+++ b/platform/msm_shared/include/mipi_dsi.h
@@ -39,34 +39,6 @@
#define DSI_SOFT_RESET REG_DSI(0x114)
#define DSI_CAL_CTRL REG_DSI(0x0F4)
-#define SOFT_RESET 0x118
-#define CLK_CTRL 0x11C
-#define TRIG_CTRL 0x084
-#define CTRL 0x004
-#define COMMAND_MODE_DMA_CTRL 0x03C
-#define ERR_INT_MASK0 0x10C
-
-#define LANE_SWAP_CTL 0x0B0
-#define TIMING_CTL 0x0C4
-
-#define VIDEO_MODE_ACTIVE_H 0x024
-#define VIDEO_MODE_ACTIVE_V 0x028
-#define VIDEO_MODE_TOTAL 0x02C
-#define VIDEO_MODE_HSYNC 0x030
-#define VIDEO_MODE_VSYNC 0x034
-#define VIDEO_MODE_VSYNC_VPOS 0x038
-
-#define DMA_CMD_OFFSET 0x048
-#define DMA_CMD_LENGTH 0x04C
-
-#define INT_CTRL 0x110
-#define CMD_MODE_DMA_SW_TRIGGER 0x090
-
-#define EOT_PACKET_CTRL 0x0C8
-#define MISR_VIDEO_CTRL 0x0A4
-#define VIDEO_MODE_CTRL 0x010
-#define HS_TIMER_CTRL 0x0BC
-
#define DSIPHY_SW_RESET REG_DSI(0x128)
#define DSIPHY_PLL_RDY REG_DSI(0x280)
#define DSIPHY_REGULATOR_CAL_PWR_CFG REG_DSI(0x518)
@@ -669,6 +641,21 @@
char laneCfg[45];
};
+typedef struct mdss_dsi_pll_config {
+ uint32_t pixel_clock;
+ uint32_t pixel_clock_mhz;
+ uint32_t byte_clock;
+ uint32_t bit_clock;
+ uint32_t halfbit_clock;
+ uint32_t vco_clock;
+ uint8_t directpath;
+ uint8_t posdiv1;
+ uint8_t posdiv3;
+ uint8_t pclk_m;
+ uint8_t pclk_n;
+ uint8_t pclk_d;
+};
+
struct mipi_dsi_cmd {
int size;
char *payload;
@@ -966,6 +953,15 @@
#define DSI_CMD_TRIGGER_SW_SEOF 0x05 /* cmd dma only */
#define DSI_CMD_TRIGGER_SW_TE 0x06
+#define DSI_DATALANE_SWAP_0123 0
+#define DSI_DATALANE_SWAP_3012 1
+#define DSI_DATALANE_SWAP_2301 2
+#define DSI_DATALANE_SWAP_1230 3
+#define DSI_DATALANE_SWAP_0321 4
+#define DSI_DATALANE_SWAP_1032 5
+#define DSI_DATALANE_SWAP_2103 6
+#define DSI_DATALANE_SWAP_3210 7
+
int mipi_config(struct msm_fb_panel_data *panel);
int mdss_dsi_config(struct msm_fb_panel_data *panel);
@@ -1004,7 +1000,7 @@
unsigned char eof_bllp_pwr,
unsigned char interleav);
int mipi_dsi_on();
-int mipi_dsi_off();
+int mipi_dsi_off(struct msm_panel_info *pinfo);
int mipi_dsi_cmds_tx(struct mipi_dsi_cmd *cmds, int count);
int mipi_dsi_cmds_rx(char **rp, int len);
#endif
diff --git a/platform/msm_shared/include/mmc_sdhci.h b/platform/msm_shared/include/mmc_sdhci.h
index 6aa323d..79d3965 100644
--- a/platform/msm_shared/include/mmc_sdhci.h
+++ b/platform/msm_shared/include/mmc_sdhci.h
@@ -143,6 +143,44 @@
#define MMC_ADDR_OUT_OF_RANGE(resp) ((resp >> 31) & 0x01)
+/* SD card related Macros */
+/* Arguments for commands */
+#define MMC_SD_HC_VOLT_SUPPLIED 0x000001AA
+#define MMC_SD_OCR 0x00FF8000
+#define MMC_SD_HC_HCS 0x40000000
+#define MMC_SD_DEV_READY 0x80000000
+#define MMC_CARD_TYPE_SDHC 0x1
+#define MMC_CARD_TYPE_STD_SD 0x0
+#define SD_CARD_RCA 0x0
+#define MMC_SD_SWITCH_HS 0x80FFFFF1
+
+#define SD_CMD8_MAX_RETRY 0x3
+#define SD_ACMD41_MAX_RETRY 0x14
+
+/* SCR(SD Card Register) related */
+#define SD_SCR_BUS_WIDTH 16
+#define SD_SCR_SD_SPEC 24
+#define SD_SCR_SD_SPEC3 15
+#define SD_SCR_BUS_WIDTH_MASK 0xf0000
+#define SD_SCR_SD_SPEC_MASK 0x0f000000
+#define SD_SCR_SD_SPEC3_MASK 0x8000
+#define SD_SCR_CMD23_SUPPORT BIT(1)
+#define SD_SCR_WIDTH_4BIT BIT(2)
+
+/* SSR related macros */
+#define MMC_SD_AU_SIZE_BIT 428
+#define MMC_SD_AU_SIZE_LEN 4
+#define MMC_SD_ERASE_SIZE_BIT 408
+#define MMC_SD_ERASE_SIZE_LEN 16
+
+/* Commands for SD card */
+#define CMD8_SEND_IF_COND 8
+#define ACMD6_SET_BUS_WIDTH 6
+#define ACMD13_SEND_SD_STATUS 13
+#define ACMD41_SEND_OP_COND 41
+#define ACMD51_READ_CARD_SCR 51
+#define CMD55_APP_CMD 55
+
/* Can be used to unpack array of upto 32 bits data */
#define UNPACK_BITS(array, start, len, size_of) \
({ \
@@ -156,6 +194,20 @@
unpck & mask; \
})
+#define swap_endian32(x) \
+ ((uint32_t)( \
+ (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
+ (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
+ (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
+ (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24) ))
+
+
+#define MMC_CARD_SD(card) ((card->type == MMC_CARD_TYPE_SDHC) || \
+ (card->type == MMC_CARD_TYPE_STD_SD))
+
+#define MMC_CARD_MMC(card) ((card->type == MMC_TYPE_STD_MMC) || \
+ (card->type == MMC_TYPE_MMCHC))
+
/* CSD Register.
* Note: not all the fields have been defined here
*/
@@ -196,6 +248,20 @@
uint32_t year; /* 4 bits manufacturing year */
};
+/* SCR register for SD card */
+struct mmc_sd_scr {
+ uint32_t bus_widths; /* Bus width support, 8 or 1 bit */
+ uint32_t sd_spec; /* sd spec version */
+ uint32_t sd3_spec; /* sd spec 3 version */
+ uint32_t cmd23_support; /* cmd23 supported or not */
+};
+
+/* SD Status Register */
+struct mmc_sd_ssr {
+ uint32_t au_size; /* Allocation unit (AU) size */
+ uint32_t num_aus; /* Number of AUs */
+};
+
/* mmc card register */
struct mmc_card {
uint32_t rca; /* Relative addres of the card*/
@@ -205,14 +271,19 @@
uint32_t status; /* Card status */
uint8_t *ext_csd; /* Ext CSD for the card info */
uint32_t raw_csd[4]; /* Raw CSD for the card */
+ uint32_t raw_scr[2]; /* SCR for SD card */
struct mmc_cid cid; /* CID structure */
struct mmc_csd csd; /* CSD structure */
+ struct mmc_sd_scr scr; /* SCR structure */
+ struct mmc_sd_ssr ssr; /* SSR Register */
};
/* mmc device config data */
struct mmc_config_data {
uint8_t slot; /* Sdcc slot used */
- uint32_t base; /* Based address for the sdcc */
+ uint8_t pwr_irq; /* Power Irq from card to host */
+ uint32_t sdhc_base; /* Base address for the sdhc */
+ uint32_t pwrctl_base; /* Base address for power control registers */
uint16_t bus_width; /* Bus width used */
uint32_t max_clk_rate; /* Max clock rate supported */
};
diff --git a/platform/msm_shared/include/msm_panel.h b/platform/msm_shared/include/msm_panel.h
old mode 100644
new mode 100755
index 8185a0f..42f2b47
--- a/platform/msm_shared/include/msm_panel.h
+++ b/platform/msm_shared/include/msm_panel.h
@@ -49,12 +49,14 @@
#define MIPI_CMD_PANEL 9 /* MIPI */
#define WRITEBACK_PANEL 10 /* Wifi display */
#define LVDS_PANEL 11 /* LVDS */
+#define EDP_PANEL 12 /* EDP */
enum msm_mdp_hw_revision {
MDP_REV_20 = 1,
MDP_REV_22,
MDP_REV_30,
MDP_REV_303,
+ MDP_REV_304,
MDP_REV_31,
MDP_REV_40,
MDP_REV_41,
@@ -106,6 +108,8 @@
struct mipi_panel_info {
char mode; /* video/cmd */
char interleave_mode;
+ int eof_bllp_power;
+ uint32_t bitclock;
char crc_check;
char ecc_check;
char dst_format; /* shared by video and command */
@@ -126,6 +130,7 @@
char vc; /* virtual channel */
struct mipi_dsi_phy_ctrl *dsi_phy_db;
struct mdss_dsi_phy_ctrl *mdss_dsi_phy_db;
+ struct mdss_dsi_pll_config *dsi_pll_config;
struct mipi_dsi_cmd *panel_cmds;
int num_of_panel_cmds;
/* video mode */
@@ -174,6 +179,9 @@
uint32_t type;
uint32_t wait_cycle;
uint32_t clk_rate;
+ uint32_t rotation;
+ uint32_t broadcastmode;
+ char lowpowerstop;
struct lcd_panel_info lcd;
struct lcdc_panel_info lcdc;
@@ -197,6 +205,57 @@
/* function entry chain */
int (*power_func) (int enable);
int (*clk_func) (int enable);
+ int (*pll_clk_func) (int enable, struct msm_panel_info *);
+};
+
+struct display_timing_desc {
+ uint32_t pclk;
+ uint32_t h_addressable; /* addressable + boder = active */
+ uint32_t h_border;
+ uint32_t h_blank; /* fporch + bporch + sync_pulse = blank */
+ uint32_t h_fporch;
+ uint32_t h_sync_pulse;
+ uint32_t v_addressable; /* addressable + boder = active */
+ uint32_t v_border;
+ uint32_t v_blank; /* fporch + bporch + sync_pulse = blank */
+ uint32_t v_fporch;
+ uint32_t v_sync_pulse;
+ uint32_t width_mm;
+ uint32_t height_mm;
+ uint32_t interlaced;
+ uint32_t stereo;
+ uint32_t sync_type;
+ uint32_t sync_separate;
+ uint32_t vsync_pol;
+ uint32_t hsync_pol;
+};
+
+struct edp_edid {
+ char id_name[4];
+ short id_product;
+ char version;
+ char revision;
+ char video_digital;
+ char color_depth; /* 6, 8, 10, 12 and 14 bits */
+ char color_format; /* RGB 4:4:4, YCrCb 4:4:4, Ycrcb 4:2:2 */
+ char dpm; /* display power management */
+ char sync_digital; /* 1 = digital */
+ char sync_separate; /* 1 = separate */
+ char vsync_pol; /* 0 = negative, 1 = positive */
+ char hsync_pol; /* 0 = negative, 1 = positive */
+ char ext_block_cnt;
+ struct display_timing_desc timing[4];
+};
+
+struct dpcd_cap {
+ char max_lane_count;
+ uint32_t max_link_clk; /* 162, 270 and 540 Mb, divided by 10 */
+};
+
+struct edp_panel_data {
+ struct msm_fb_panel_data *panel_data;
+ struct edp_edid edid;
+ struct dpcd_cap dpcd;
};
diff --git a/platform/msm_shared/include/partition_parser.h b/platform/msm_shared/include/partition_parser.h
index 0508e00..25a73ca 100644
--- a/platform/msm_shared/include/partition_parser.h
+++ b/platform/msm_shared/include/partition_parser.h
@@ -162,6 +162,7 @@
unsigned long long partition_get_offset(int index);
unsigned int partition_read_table();
unsigned int write_partition(unsigned size, unsigned char *partition);
+bool partition_gpt_exists();
/* For Debugging */
void partition_dump(void);
diff --git a/platform/msm_shared/include/qpic_nand.h b/platform/msm_shared/include/qpic_nand.h
index abc2bb9..0676301 100644
--- a/platform/msm_shared/include/qpic_nand.h
+++ b/platform/msm_shared/include/qpic_nand.h
@@ -325,6 +325,9 @@
unsigned read_pipe;
unsigned write_pipe;
unsigned cmd_pipe;
+ uint8_t read_pipe_grp;
+ uint8_t write_pipe_grp;
+ uint8_t cmd_pipe_grp;
};
/* Structure to define the initial nand config */
diff --git a/platform/msm_shared/include/sdhci.h b/platform/msm_shared/include/sdhci.h
index 20861fc..ef48d1d 100644
--- a/platform/msm_shared/include/sdhci.h
+++ b/platform/msm_shared/include/sdhci.h
@@ -31,6 +31,7 @@
#include <reg.h>
#include <bits.h>
+#include <kernel/event.h>
/*
* Capabilities for the host controller
@@ -55,6 +56,7 @@
struct sdhci_host {
uint32_t base; /* Base address for the host */
uint32_t cur_clk_rate; /* Running clock rate */
+ event_t* sdhc_event; /* Event for power control irqs */
struct host_caps caps; /* Host capabilities */
};
@@ -79,6 +81,7 @@
uint32_t resp[4]; /* 128 bit response value */
uint32_t trans_mode; /* Transfer mode, read/write */
uint32_t cmd_retry; /* Retry the command, if card is busy */
+ uint32_t cmd23_support; /* If card supports cmd23 */
struct mmc_data data; /* Data pointer */
};
@@ -239,6 +242,7 @@
#define SDHCI_BLK_CNT_EN BIT(1)
#define SDHCI_DMA_EN BIT(0)
#define SDHCI_AUTO_CMD23_EN BIT(3)
+#define SDHCI_AUTO_CMD12_EN BIT(2)
#define SDHCI_ADMA_32BIT BIT(4)
/*
diff --git a/platform/msm_shared/include/sdhci_msm.h b/platform/msm_shared/include/sdhci_msm.h
new file mode 100644
index 0000000..1d77823
--- /dev/null
+++ b/platform/msm_shared/include/sdhci_msm.h
@@ -0,0 +1,43 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __SDHCI_MSM_H__
+#define __SDHCI_MSM_H__
+
+#include <kernel/event.h>
+
+struct sdhci_msm_data
+{
+ uint32_t pwrctl_base;
+ uint32_t pwr_irq;
+ event_t* sdhc_event;
+};
+
+void sdhci_msm_init(struct sdhci_msm_data *data);
+
+#endif
diff --git a/platform/msm_shared/mdp3.c b/platform/msm_shared/mdp3.c
index 0629b8e..169dce5 100644
--- a/platform/msm_shared/mdp3.c
+++ b/platform/msm_shared/mdp3.c
@@ -165,7 +165,7 @@
int mdp_dma_on()
{
int ret = 0;
-
+ mdelay(100);
writel(0x00000001, MDP_DMA_P_START);
return ret;
@@ -180,3 +180,18 @@
return ret;
}
+
+int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb)
+{
+ return NO_ERROR;
+}
+
+int mdp_edp_on(void)
+{
+ return NO_ERROR;
+}
+
+int mdp_edp_off(void)
+{
+ return NO_ERROR;
+}
diff --git a/platform/msm_shared/mdp4.c b/platform/msm_shared/mdp4.c
index e347438..b3ade80 100644
--- a/platform/msm_shared/mdp4.c
+++ b/platform/msm_shared/mdp4.c
@@ -408,3 +408,18 @@
{
return mdp_rev;
}
+
+int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb)
+{
+ return NO_ERROR;
+}
+
+int mdp_edp_on(void)
+{
+ return NO_ERROR;
+}
+
+int mdp_edp_off(void)
+{
+ return NO_ERROR;
+}
diff --git a/platform/msm_shared/mdp5.c b/platform/msm_shared/mdp5.c
index cb7d20d..1a190ab 100644
--- a/platform/msm_shared/mdp5.c
+++ b/platform/msm_shared/mdp5.c
@@ -38,7 +38,6 @@
#include <mipi_dsi.h>
#include <err.h>
#include <clock.h>
-#include <mdp5.h>
#include <scm.h>
int restore_secure_cfg(uint32_t id);
@@ -60,7 +59,7 @@
uint32_t mdss_mdp_intf_off;
uint32_t mdss_mdp_rev = readl(MDP_HW_REV);
- if (mdss_mdp_rev > MDSS_MDP_HW_REV_100)
+ if (mdss_mdp_rev >= MDSS_MDP_HW_REV_102)
mdss_mdp_intf_off = 0;
else
mdss_mdp_intf_off = 0xEC00;
@@ -119,16 +118,17 @@
static void mdss_vbif_setup()
{
int access_secure = restore_secure_cfg(SECURE_DEVICE_MDSS);
+ uint32_t mdp_hw_rev = readl(MDP_HW_REV);
/* TZ returns an errornous ret val even if the VBIF registers were
* successfully unlocked. Ignore TZ return value till it's fixed */
if (!access_secure || 1) {
dprintf(SPEW, "MDSS VBIF registers unlocked by TZ.\n");
-
/* Force VBIF Clocks on */
writel(0x1, VBIF_VBIF_DDR_FORCE_CLK_ON);
- if (readl(MDP_HW_REV) == MDSS_MDP_HW_REV_100) {
+ if (mdp_hw_rev == MDSS_MDP_HW_REV_100
+ || mdp_hw_rev >= MDSS_MDP_HW_REV_102) {
/* Configure DDR burst length */
writel(0x00000707, VBIF_VBIF_DDR_OUT_MAX_BURST);
writel(0x00000030, VBIF_VBIF_DDR_ARB_CTRL );
@@ -137,6 +137,9 @@
writel(0x0FFF0FFF, VBIF_VBIF_DDR_OUT_AX_AOOO);
writel(0x22222222, VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0);
writel(0x00002222, VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1);
+ } else if (mdp_hw_rev >= MDSS_MDP_HW_REV_101) {
+ writel(0x00000707, VBIF_VBIF_DDR_OUT_MAX_BURST);
+ writel(0x00000003, VBIF_VBIF_DDR_ARB_CTRL);
}
}
}
@@ -145,10 +148,19 @@
{
uint32_t smp_cnt = 0, reg_rgb0 = 0, reg_rgb1 = 0, shift = 0;
uint32_t xres, bpp;
+ uint32_t rgb0_client_id = MMSS_MDP_CLIENT_ID_UNUSED;
+ uint32_t rgb1_client_id = MMSS_MDP_1_2_CLIENT_ID_RGB1;
+ uint32_t mdss_mdp_rev = readl(MDP_HW_REV);
xres = pinfo->xres;
bpp = pinfo->bpp;
+ if (mdss_mdp_rev == MDSS_MDP_HW_REV_100
+ || mdss_mdp_rev >= MDSS_MDP_HW_REV_102)
+ rgb0_client_id = MMSS_MDP_1_2_CLIENT_ID_RGB0;
+ else if (mdss_mdp_rev >= MDSS_MDP_HW_REV_101)
+ rgb0_client_id = MMSS_MDP_1_1_CLIENT_ID_RGB0;
+
if (pinfo->lcdc.dual_pipe) {
/* Each pipe driving half the screen */
xres /= 2;
@@ -176,8 +188,8 @@
}
while((smp_cnt > 0) && !(shift > 16)) {
- reg_rgb0 |= ((MMSS_MDP_CLIENT_ID_RGB0) << (shift));
- reg_rgb1 |= ((MMSS_MDP_CLIENT_ID_RGB1) << (shift));
+ reg_rgb0 |= ((rgb0_client_id) << (shift));
+ reg_rgb1 |= ((rgb1_client_id) << (shift));
smp_cnt--;
shift += 8;
}
@@ -241,6 +253,11 @@
display_vend = ((vsync_period - lcdc->v_front_porch) * hsync_period)
+lcdc->hsync_skew - 1;
+ if (intf_base == MDP_INTF_0_BASE) { /* eDP */
+ display_vstart += lcdc->h_pulse_width + lcdc->h_back_porch;
+ display_vend -= lcdc->h_front_porch;
+ }
+
hsync_ctl = (hsync_period << 16) | lcdc->h_pulse_width;
display_hctl = (hsync_end_x << 16) | hsync_start_x;
@@ -266,8 +283,10 @@
writel(0x00, MDP_ACTIVE_V_END_F1 + mdss_mdp_intf_off);
writel(0xFF, MDP_UNDERFFLOW_COLOR + mdss_mdp_intf_off);
- writel(0x213F, MDP_PANEL_FORMAT + mdss_mdp_intf_off);
-
+ if (intf_base == MDP_INTF_0_BASE) /* eDP */
+ writel(0x212A, MDP_PANEL_FORMAT + mdss_mdp_intf_off);
+ else
+ writel(0x213F, MDP_PANEL_FORMAT + mdss_mdp_intf_off);
}
void mdss_layer_mixer_setup(struct fbcon_config *fb, struct msm_panel_info
@@ -356,6 +375,33 @@
return 0;
}
+int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb)
+{
+ int ret = NO_ERROR;
+ struct lcdc_panel_info *lcdc = NULL;
+
+ mdss_intf_tg_setup(pinfo, MDP_INTF_0_BASE);
+
+ mdp_clk_gating_ctrl();
+
+ mdss_vbif_setup();
+ mdss_smp_setup(pinfo);
+
+ writel(0x0E9, MDP_QOS_REMAPPER_CLASS_0);
+
+ mdss_rgb_pipe_config(fb, pinfo, MDP_VP_0_RGB_0_BASE);
+
+ mdss_layer_mixer_setup(fb, pinfo);
+
+ writel(0x1F10, MDP_CTL_0_BASE + CTL_TOP);
+ writel(0x9, MDP_DISP_INTF_SEL);
+ writel(0x1111, MDP_VIDEO_INTF_UNDERFLOW_CTL);
+ writel(0x01, MDP_UPPER_NEW_ROI_PRIOR_RO_START);
+ writel(0x01, MDP_LOWER_NEW_ROI_PRIOR_TO_START);
+
+ return 0;
+}
+
int mdp_dsi_cmd_config(struct msm_panel_info *pinfo,
struct fbcon_config *fb)
{
@@ -440,3 +486,26 @@
{
}
+
+int mdp_edp_on(void)
+{
+ writel(0x32048, MDP_CTL_0_BASE + CTL_FLUSH);
+ writel(0x01, MDP_INTF_0_TIMING_ENGINE_EN + mdss_mdp_intf_offset());
+ return NO_ERROR;
+}
+
+int mdp_edp_off(void)
+{
+ if (!target_cont_splash_screen()) {
+
+ writel(0x00000000, MDP_INTF_0_TIMING_ENGINE_EN +
+ mdss_mdp_intf_offset());
+ mdelay(60);
+ /* Ping-Pong done Tear Check Read/Write */
+ /* Underrun(Interface 0/1/2/3) VSYNC Interrupt Enable */
+ writel(0xFF777713, MDP_INTR_CLEAR);
+ writel(0x00000000, MDP_INTR_EN);
+ }
+
+ return NO_ERROR;
+}
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 1a45097..6b6e6c6 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -121,6 +121,7 @@
uint32_t count = 0;
int status = 0;
+#if (DISPLAY_TYPE_MDSS == 1)
writel(0x03030303, MIPI_DSI0_BASE + INT_CTRL);
writel(0x1, MIPI_DSI0_BASE + CMD_MODE_DMA_SW_TRIGGER);
dsb();
@@ -144,6 +145,7 @@
writel((readl(MIPI_DSI1_BASE + INT_CTRL) | 0x01000001),
MIPI_DSI1_BASE + INT_CTRL);
dprintf(SPEW, "Panel CMD: command mode dma tested successfully\n");
+#endif
return status;
}
@@ -181,6 +183,7 @@
char pload[256];
uint32_t off;
+#if (DISPLAY_TYPE_MDSS == 1)
/* Align pload at 8 byte boundry */
off = pload;
off &= 0x07;
@@ -200,6 +203,7 @@
udelay(80);
cm++;
}
+#endif
return ret;
}
@@ -336,6 +340,7 @@
uint8_t lane_swap = 0;
uint32_t timing_ctl = 0;
+#if (DISPLAY_TYPE_MDSS == 1)
switch (pinfo->num_of_lanes) {
default:
case 1:
@@ -401,10 +406,10 @@
pinfo->num_of_panel_cmds);
}
}
+#endif
return status;
}
-
int mipi_dsi_panel_initialize(struct mipi_dsi_panel_config *pinfo)
{
uint8_t DMA_STREAM1 = 0; // for mdp display processor path
@@ -743,7 +748,7 @@
}
/* Enable MMSS_AHB_ARB_MATER_PORT_E for arbiter master0 and master 1 request */
-#if (!DISPLAY_MIPI_PANEL_RENESAS && !DISPLAY_TYPE_DSI6G)
+#if (!DISPLAY_MIPI_PANEL_RENESAS && !DISPLAY_TYPE_DSI6G && !DISPLAY_TYPE_8610)
writel(0x00001800, MMSS_SFPB_GPREG);
#endif
@@ -790,7 +795,7 @@
/* Enable MMSS_AHB_ARB_MATER_PORT_E for
arbiter master0 and master 1 request */
-#if (!DISPLAY_MIPI_PANEL_RENESAS && !DISPLAY_TYPE_DSI6G)
+#if (!DISPLAY_MIPI_PANEL_RENESAS && !DISPLAY_TYPE_DSI6G && !DISPLAY_TYPE_8610)
writel(0x00001800, MMSS_SFPB_GPREG);
#endif
@@ -822,9 +827,9 @@
uint8_t interleav,
uint32_t ctl_base)
{
-
int status = 0;
+#if (DISPLAY_TYPE_MDSS == 1)
/* disable mdp first */
mdp_disable();
@@ -890,6 +895,7 @@
writel(interleav << 30 | 0 << 24 | 0 << 20 | lane_en << 4
| 0x103, ctl_base + CTRL);
+#endif
return status;
}
@@ -900,6 +906,7 @@
struct msm_panel_info *pinfo;
struct mipi_dsi_panel_config mipi_pinfo;
+#if (DISPLAY_TYPE_MDSS == 1)
if (!panel)
return ERR_INVALID_ARGS;
@@ -922,6 +929,7 @@
if (pinfo->rotate && panel->rotate)
pinfo->rotate();
+#endif
return ret;
}
@@ -943,7 +951,6 @@
unsigned char eof_bllp_pwr,
unsigned char interleav)
{
-
int status = 0;
/* disable mdp first */
@@ -1025,17 +1032,29 @@
uint16_t img_width,
uint16_t img_height,
uint16_t dst_format,
- uint16_t traffic_mode)
+ uint8_t ystride,
+ uint8_t lane_en,
+ uint8_t interleav)
{
- uint8_t DST_FORMAT;
- uint8_t TRAFIC_MODE;
- uint8_t DLNx_EN;
- // video mode data ctrl
- int status = 0;
- uint8_t interleav = 0;
- uint8_t ystride = 0x03;
- // disable mdp first
+ uint16_t dst_fmt = 0;
+ switch (dst_format) {
+ case DSI_VIDEO_DST_FORMAT_RGB565:
+ dst_fmt = DSI_CMD_DST_FORMAT_RGB565;
+ break;
+ case DSI_VIDEO_DST_FORMAT_RGB666:
+ case DSI_VIDEO_DST_FORMAT_RGB666_LOOSE:
+ dst_fmt = DSI_CMD_DST_FORMAT_RGB666;
+ break;
+ case DSI_VIDEO_DST_FORMAT_RGB888:
+ dst_fmt = DSI_CMD_DST_FORMAT_RGB888;
+ break;
+ default:
+ dprintf(CRITICAL, "unsupported dst format\n");
+ return ERROR;
+ }
+
+#if (DISPLAY_TYPE_MDSS == 1)
writel(0x00000000, DSI_CLK_CTRL);
writel(0x00000000, DSI_CLK_CTRL);
writel(0x00000000, DSI_CLK_CTRL);
@@ -1052,16 +1071,7 @@
writel(0x02020202, DSI_INT_CTRL);
- DST_FORMAT = 8; // RGB888
- dprintf(SPEW, "DSI_Cmd_Mode - Dst Format: RGB888\n");
-
- DLNx_EN = 0xf; // 4 lane with clk programming
- dprintf(SPEW, "Data Lane: 4 lane\n");
-
- TRAFIC_MODE = 0; // non burst mode with sync pulses
- dprintf(SPEW, "Traffic mode: non burst mode with sync pulses\n");
-
- writel(DST_FORMAT, DSI_COMMAND_MODE_MDP_CTRL);
+ writel(dst_fmt, DSI_COMMAND_MODE_MDP_CTRL);
writel((img_width * ystride + 1) << 16 | 0x0039,
DSI_COMMAND_MODE_MDP_STREAM0_CTRL);
writel((img_width * ystride + 1) << 16 | 0x0039,
@@ -1071,12 +1081,13 @@
writel(img_height << 16 | img_width,
DSI_COMMAND_MODE_MDP_STREAM1_TOTAL);
writel(0x13c2c, DSI_COMMAND_MODE_MDP_DCS_CMD_CTRL);
- writel(interleav << 30 | 0 << 24 | 0 << 20 | DLNx_EN << 4 | 0x105,
+ writel(interleav << 30 | 0 << 24 | 0 << 20 | lane_en << 4 | 0x105,
DSI_CTRL);
writel(0x10000000, DSI_COMMAND_MODE_DMA_CTRL);
writel(0x10000000, DSI_MISR_CMD_CTRL);
+#endif
- return NO_ERROR;
+ return 0;
}
int mipi_dsi_cmd_mode_config(unsigned short disp_width,
@@ -1165,14 +1176,12 @@
return ret;
}
-int mipi_dsi_off()
+int mipi_dsi_off(struct msm_panel_info *pinfo)
{
if(!target_cont_splash_screen())
{
writel(0, DSI_CLK_CTRL);
writel(0x1F1, DSI_CTRL);
- writel(0x00000001, DSIPHY_SW_RESET);
- writel(0x00000000, DSIPHY_SW_RESET);
mdelay(10);
writel(0x0001, DSI_SOFT_RESET);
writel(0x0000, DSI_SOFT_RESET);
@@ -1181,6 +1190,8 @@
}
writel(0x1115501, DSI_INT_CTRL);
+ if (pinfo->mipi.broadcast)
+ writel(0x1115501, DSI_INT_CTRL + 0x600);
return NO_ERROR;
}
diff --git a/platform/msm_shared/mipi_dsi_autopll.c b/platform/msm_shared/mipi_dsi_autopll.c
new file mode 100755
index 0000000..5616956
--- /dev/null
+++ b/platform/msm_shared/mipi_dsi_autopll.c
@@ -0,0 +1,387 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <debug.h>
+#include <reg.h>
+#include <err.h>
+#include <smem.h>
+#include <mipi_dsi.h>
+#include <platform/iomap.h>
+
+#define LPFR_LUT_SIZE 10
+
+#define VCO_REF_CLOCK_RATE 19200000
+
+#define FRAC_DIVIDER 10000
+
+typedef struct lpfr_cfg {
+ uint32_t vco_rate;
+ uint8_t resistance;
+};
+
+static struct lpfr_cfg lpfr_lut[LPFR_LUT_SIZE] = {
+ {479500000, 8},
+ {480000000, 11},
+ {575500000, 8},
+ {576000000, 12},
+ {610500000, 8},
+ {659500000, 9},
+ {671500000, 10},
+ {672000000, 14},
+ {708500000, 10},
+ {750000000, 11},
+ };
+
+uint64_t div_s64(uint64_t dividend, uint32_t divisor, uint32_t *remainder)
+{
+ *remainder = dividend % divisor;
+
+ return dividend / divisor;
+}
+
+static uint32_t dsi_pll_enable_seq_m(void)
+{
+ uint32_t i = 0;
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+ for (i = 0; (i < 4) && !pll_locked; i++) {
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ if (i != 0)
+ writel(0x34, MIPI_DSI_BASE + 0x00270); /* CAL CFG1*/
+ udelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+ }
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_d(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_f1(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0d, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_c(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_e(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0d, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+
+
+static uint32_t dsi_pll_enable_seq_8974(void)
+{
+ uint32_t rc = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+
+ while (!(readl(MIPI_DSI_BASE + 0x02c0) & 0x01)) {
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(2);
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ }
+ return rc;
+}
+
+static uint32_t dsi_pll_enable_seq(void)
+{
+ uint32_t platformid = board_platform_id();
+
+ /* Only one enable seq for 8974 target */
+ if (platformid == MSM8974) {
+ dsi_pll_enable_seq_8974();
+ }
+
+ /* 6 enable seq for 8226 target */
+ else if (platformid == MSM8826 ||
+ platformid == MSM8626 ||
+ platformid == MSM8226 ||
+ platformid == MSM8926 ||
+ platformid == MSM8126 ||
+ platformid == MSM8326 ||
+ platformid == APQ8026) {
+ if (dsi_pll_enable_seq_m()) {
+ } else if (dsi_pll_enable_seq_d()) {
+ } else if (dsi_pll_enable_seq_d()) {
+ } else if (dsi_pll_enable_seq_f1()) {
+ } else if (dsi_pll_enable_seq_c()) {
+ } else if (dsi_pll_enable_seq_e()) {
+ } else {
+ dprintf(CRITICAL, "Not able to enable the pll\n");
+ }
+ } else {
+ dprintf(CRITICAL, "Target not supported in auto PLL\n");
+ }
+
+}
+
+int32_t mdss_dsi_auto_pll_config(struct mdss_dsi_pll_config *pd)
+{
+ uint32_t rem, divider;
+ uint32_t refclk_cfg = 0, frac_n_mode = 0, ref_doubler_en_b = 0;
+ uint64_t vco_clock, div_fbx;
+ uint32_t ref_clk_to_pll = 0, frac_n_value = 0;
+ uint32_t sdm_cfg0, sdm_cfg1, sdm_cfg2, sdm_cfg3;
+ uint32_t gen_vco_clk, cal_cfg10, cal_cfg11;
+ uint32_t res;
+ uint8_t i, rc = NO_ERROR;
+
+ /* Configure the Loop filter resistance */
+ for (i = 0; i < LPFR_LUT_SIZE; i++)
+ if (pd->vco_clock <= lpfr_lut[i].vco_rate)
+ break;
+ if (i == LPFR_LUT_SIZE) {
+ dprintf(INFO, "unable to get loop filter resistance. vco=%d\n"
+ , lpfr_lut[i].vco_rate);
+ rc = ERROR;
+ return rc;
+ }
+
+ mdss_dsi_phy_sw_reset(MIPI_DSI_BASE);
+
+ /* Loop filter resistance value */
+ writel(lpfr_lut[i].resistance, MIPI_DSI_BASE + 0x022c);
+ /* Loop filter capacitance values : c1 and c2 */
+ writel(0x70, MIPI_DSI_BASE + 0x0230);
+ writel(0x15, MIPI_DSI_BASE + 0x0234);
+
+ writel(0x02, MIPI_DSI_BASE + 0x0208); /* ChgPump */
+ /* postDiv1 - calculated in pll config*/
+ writel(pd->posdiv1, MIPI_DSI_BASE + 0x0204);
+ /* postDiv2 - fixed devision 4 */
+ writel(0x03, MIPI_DSI_BASE + 0x0224);
+ /* postDiv3 - calculated in pll config */
+ writel(pd->posdiv3, MIPI_DSI_BASE + 0x0228); /* postDiv3 */
+
+ writel(0x2b, MIPI_DSI_BASE + 0x0278); /* Cal CFG3 */
+ writel(0x66, MIPI_DSI_BASE + 0x027c); /* Cal CFG4 */
+ writel(0x05, MIPI_DSI_BASE + 0x0264); /* LKDetect CFG2 */
+
+ rem = pd->vco_clock % VCO_REF_CLOCK_RATE;
+ if (rem) {
+ refclk_cfg = 0x1;
+ frac_n_mode = 1;
+ ref_doubler_en_b = 0;
+ } else {
+ refclk_cfg = 0x0;
+ frac_n_mode = 0;
+ ref_doubler_en_b = 1;
+ }
+
+ ref_clk_to_pll = (VCO_REF_CLOCK_RATE * 2 * refclk_cfg)
+ + (ref_doubler_en_b * VCO_REF_CLOCK_RATE);
+
+ vco_clock = ((uint64_t) pd->vco_clock) * FRAC_DIVIDER;
+
+ div_fbx = vco_clock / ref_clk_to_pll;
+
+ rem = (uint32_t) (div_fbx % FRAC_DIVIDER);
+ rem = rem * (1 << 16);
+ frac_n_value = rem / FRAC_DIVIDER;
+
+ divider = pd->vco_clock / ref_clk_to_pll;
+ div_fbx *= ref_clk_to_pll;
+ gen_vco_clk = div_fbx / FRAC_DIVIDER;
+
+ if (frac_n_mode) {
+ sdm_cfg0 = 0x0;
+ sdm_cfg1 = (divider & 0x3f) - 1;
+ sdm_cfg3 = frac_n_value / 256;
+ sdm_cfg2 = frac_n_value % 256;
+ } else {
+ sdm_cfg0 = (0x1 << 5);
+ sdm_cfg0 |= (divider & 0x3f) - 1;
+ sdm_cfg1 = 0x0;
+ sdm_cfg2 = 0;
+ sdm_cfg3 = 0;
+ }
+
+ cal_cfg11 = gen_vco_clk / 256000000;
+ cal_cfg10 = (gen_vco_clk % 256000000) / 1000000;
+
+ writel(sdm_cfg1 , MIPI_DSI_BASE + 0x023c); /* SDM CFG1 */
+ writel(sdm_cfg2 , MIPI_DSI_BASE + 0x0240); /* SDM CFG2 */
+ writel(sdm_cfg3 , MIPI_DSI_BASE + 0x0244); /* SDM CFG3 */
+ writel(0x00, MIPI_DSI_BASE + 0x0248); /* SDM CFG4 */
+
+ udelay(10);
+
+ writel(refclk_cfg, MIPI_DSI_BASE + 0x0200); /* REFCLK CFG */
+ writel(0x00, MIPI_DSI_BASE + 0x0214); /* PWRGEN CFG */
+ writel(0x71, MIPI_DSI_BASE + 0x020c); /* VCOLPF CFG */
+ writel(pd->directpath, MIPI_DSI_BASE + 0x0210); /* VREG CFG */
+ writel(sdm_cfg0, MIPI_DSI_BASE + 0x0238); /* SDM CFG0 */
+
+ writel(0x0a, MIPI_DSI_BASE + 0x026c); /* CAL CFG0 */
+ writel(0x30, MIPI_DSI_BASE + 0x0284); /* CAL CFG6 */
+ writel(0x00, MIPI_DSI_BASE + 0x0288); /* CAL CFG7 */
+ writel(0x60, MIPI_DSI_BASE + 0x028c); /* CAL CFG8 */
+ writel(0x00, MIPI_DSI_BASE + 0x0290); /* CAL CFG9 */
+ writel(cal_cfg10, MIPI_DSI_BASE + 0x0294); /* CAL CFG10 */
+ writel(cal_cfg11, MIPI_DSI_BASE + 0x0298); /* CAL CFG11 */
+ writel(0x20, MIPI_DSI_BASE + 0x029c); /* EFUSE CFG */
+
+ dsi_pll_enable_seq();
+}
diff --git a/platform/msm_shared/mipi_dsi_phy.c b/platform/msm_shared/mipi_dsi_phy.c
index d3a92f1..e3a4527 100644
--- a/platform/msm_shared/mipi_dsi_phy.c
+++ b/platform/msm_shared/mipi_dsi_phy.c
@@ -392,11 +392,66 @@
}
+int mdss_dsi_v2_phy_init(struct mipi_dsi_panel_config *pinfo, uint32_t ctl_base)
+{
+ struct mdss_dsi_phy_ctrl *pd;
+ uint32_t i, ln, off = 0, offset;
+
+ pd = pinfo->mdss_dsi_phy_config;
+ /* DSI PHY configuration */
+ off = 0x480;
+ writel(pd->strength[0], ctl_base + off + (4 * 0));
+ writel(pd->strength[1], ctl_base + off + (4 * 2));
+
+ off = 0x470;
+ writel(0x10, ctl_base + off + (4 * 3));
+ writel(0x5F, ctl_base + off + (4 * 0));
+
+ off = 0x500;
+ /* use LDO mode */
+ writel(0x25, ctl_base + 0x4B0);
+ for (i = 0; i < 5; i++)
+ writel(pd->regulator[i], ctl_base + off + (4 * i));
+
+ mipi_dsi_calibration();
+
+ /* 4 lanes + clk lane configuration */
+ /* lane config n * (0 - 4) & DataPath setup */
+ for (ln = 0; ln < 5; ln++) {
+ off = 0x0300 + (ln * 0x40);
+ for (i = 0; i < 9; i++) {
+ offset = i + (ln * 9);
+ writel(pd->laneCfg[offset], ctl_base + off);
+ dmb();
+ off += 4;
+ }
+ }
+
+ off = 0x440;
+ for (i = 0; i < 12; i++)
+ writel(pd->timing[i], ctl_base + off + (4 * i));
+
+ if (1 == pinfo->num_of_lanes)
+ writel(0x8, ctl_base + 0x200 + (4 * 11));
+
+
+ if (pinfo->lane_swap)
+ writel(pinfo->lane_swap, ctl_base + 0x0ac);
+
+ /* T_CLK_POST, T_CLK_PRE for CLK lane P/N HS 200 mV timing
+ length should > data lane HS timing length */
+ writel(0x41b, ctl_base + 0x0c0);
+ return 0;
+}
+
int mdss_dsi_phy_init(struct mipi_dsi_panel_config *pinfo, uint32_t ctl_base)
{
struct mdss_dsi_phy_ctrl *pd;
uint32_t i, off = 0, ln, offset;
+ if (mdp_get_revision() == MDP_REV_304)
+ return mdss_dsi_v2_phy_init(pinfo, ctl_base);
+
pd = (pinfo->mdss_dsi_phy_config);
/* Strength ctrl 0 */
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 1e6aaa8..8dae760 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -32,6 +32,7 @@
#include <reg.h>
#include <mmc_sdhci.h>
#include <sdhci.h>
+#include <sdhci_msm.h>
#include <partition_parser.h>
#include <platform/iomap.h>
#include <platform/timer.h>
@@ -85,8 +86,7 @@
mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
- if ((card->type == MMC_TYPE_SDHC)
- || (card->type == MMC_TYPE_STD_SD)) {
+ if (MMC_CARD_SD(card)) {
/* Parse CSD according to SD card spec. */
/* CSD register is little bit differnet for CSD version 2.0 High
@@ -133,7 +133,7 @@
mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
/* Calculate the card capcity */
- card->capacity = (1 + mmc_csd.c_size) * 512 * 1024;
+ card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
} else {
/* CSD Version 1.0 */
mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
@@ -177,7 +177,7 @@
/* Calculate the card capacity */
mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
- card->capacity = mmc_temp * mmc_csd.read_blk_len;
+ card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
}
} else {
/* Parse CSD according to MMC card spec. */
@@ -213,7 +213,7 @@
if (mmc_csd.c_size != 0xFFF) {
/* For cards less than or equal to 2GB */
mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
- card->capacity = mmc_temp * mmc_csd.read_blk_len;
+ card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
} else {
/* For cards greater than 2GB, Ext CSD register's SEC_COUNT
* is used to calculate the size.
@@ -224,7 +224,6 @@
| (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
| (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
| card->ext_csd[MMC_SEC_COUNT1];
-
card->capacity = sec_count * MMC_BLK_SZ;
}
}
@@ -234,22 +233,22 @@
sizeof(struct mmc_csd));
dprintf(SPEW, "Decoded CSD fields:\n");
- dprintf(SPEW, "cmmc_structure: %d\n", mmc_csd.cmmc_structure);
+ dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
- dprintf(SPEW, "write_blk_len: %d\n", mmc_csd.write_blk_len);
- dprintf(SPEW, "read_blk_len: %d\n", mmc_csd.read_blk_len);
- dprintf(SPEW, "r2w_factor: %d\n", mmc_csd.r2w_factor);
- dprintf(SPEW, "sector_size: %d\n", mmc_csd.sector_size);
- dprintf(SPEW, "c_size_mult:%d\n", mmc_csd.c_size_mult);
- dprintf(SPEW, "c_size: %d\n", mmc_csd.c_size);
- dprintf(SPEW, "nsac_clk_cycle: %d\n", mmc_csd.nsac_clk_cycle);
- dprintf(SPEW, "taac_ns: %d\n", mmc_csd.taac_ns);
- dprintf(SPEW, "tran_speed: %d kbps\n", mmc_csd.tran_speed);
- dprintf(SPEW, "erase_blk_len: %d\n", mmc_csd.erase_blk_len);
- dprintf(SPEW, "read_blk_misalign: %d\n", mmc_csd.read_blk_misalign);
- dprintf(SPEW, "write_blk_misalign: %d\n", mmc_csd.write_blk_misalign);
- dprintf(SPEW, "read_blk_partial: %d\n", mmc_csd.read_blk_partial);
- dprintf(SPEW, "write_blk_partial: %d\n", mmc_csd.write_blk_partial);
+ dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
+ dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
+ dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
+ dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
+ dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
+ dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
+ dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
+ dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
+ dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
+ dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
+ dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
+ dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
+ dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
+ dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
return 0;
@@ -274,8 +273,7 @@
mmc_sizeof = sizeof(uint32_t) * 8;
- if ((card->type == MMC_TYPE_SDHC) ||
- (card->type == MMC_TYPE_STD_SD)) {
+ if (MMC_CARD_SD(card)) {
mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
@@ -289,7 +287,7 @@
mmc_cid.pnm[6] = 0;
mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
- mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 31, mmc_sizeof);
+ mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
mmc_cid.year += 2000;
@@ -304,7 +302,7 @@
mmc_cid.pnm[6] = 0;
mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
- mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 31, mmc_sizeof);
+ mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
mmc_cid.year += 1997;
@@ -467,8 +465,7 @@
/* CMD3 Format:
* [31:0] stuff bits
*/
- if (card->type == MMC_TYPE_SDHC ||
- card->type == MMC_TYPE_STD_SD) {
+ if (MMC_CARD_SD(card)) {
cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
cmd.argument = 0;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
@@ -535,14 +532,13 @@
/*
* Function: mmc select card
- * Arg : host, card structure & RCA
+ * Arg : host, card structure
* Return : 0 on Success, 1 on Failure
* Flow : Selects a card by sending CMD7 to the card with its RCA.
* If RCA field is set as 0 ( or any other address ),
* the card will be de-selected. (CMD7)
*/
-static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card,
- uint32_t rca)
+static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
{
struct mmc_command cmd;
uint32_t mmc_arg = 0;
@@ -554,16 +550,15 @@
* [31:16] RCA
* [15:0] stuff bits
*/
- mmc_arg |= rca << 16;
+ mmc_arg |= card->rca << 16;
cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
cmd.argument = mmc_arg;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
/* If we are deselecting card, we do not get response */
- if (rca == card->rca && rca) {
- if (card->type == MMC_TYPE_SDHC ||
- card->type == MMC_TYPE_STD_SD)
+ if (card->rca) {
+ if (MMC_CARD_SD(card))
cmd.resp_type = SDHCI_CMD_RESP_R1B;
else
cmd.resp_type = SDHCI_CMD_RESP_R1;
@@ -896,10 +891,27 @@
struct sdhci_host *host;
struct mmc_config_data *cfg;
+ struct sdhci_msm_data data;
+
+ event_t sdhc_event;
host = &dev->host;
cfg = &dev->config;
+ event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
+
+ host->base = cfg->sdhc_base;
+ host->sdhc_event = &sdhc_event;
+
+ data.sdhc_event = &sdhc_event;
+ data.pwrctl_base = cfg->pwrctl_base;
+ data.pwr_irq = cfg->pwr_irq;
+
+ /*
+ * MSM specific sdhc init
+ */
+ sdhci_msm_init(&data);
+
/*
* Initialize the controller, read the host capabilities
* set power on mode
@@ -953,7 +965,7 @@
}
/* Select the card (CMD7) */
- mmc_return = mmc_select_card(host, card, card->rca);
+ mmc_return = mmc_select_card(host, card);
if (mmc_return) {
dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
return mmc_return;
@@ -989,6 +1001,7 @@
* Send CMD1 to identify and reject cards that do not match host's VDD range
* profile. Cards sends its OCR register in response.
*/
+
mmc_return = mmc_send_op_cond(host, card);
/* OCR is not received, init could not complete */
@@ -1000,6 +1013,257 @@
return 0;
}
+static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
+{
+ struct mmc_command cmd = {0};
+
+ cmd.cmd_index = CMD55_APP_CMD;
+ cmd.argument = (card->rca << 16);
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+
+ if (sdhci_send_command(host, &cmd))
+ {
+ dprintf(CRITICAL, "Failed Sending CMD55\n");
+ return 1;
+ }
+ return 0;
+}
+
+uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
+{
+ uint8_t i;
+ uint32_t mmc_ret;
+ struct mmc_command cmd;
+
+ memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
+
+ /* Use the SD card RCA 0x0 during init */
+ card->rca = SD_CARD_RCA;
+
+ /* Send CMD8 for voltage check*/
+ for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
+ {
+ cmd.cmd_index = CMD8_SEND_IF_COND;
+ cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R7;
+
+ if (sdhci_send_command(host, &cmd))
+ {
+ dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
+ return 1;
+ }
+ else
+ {
+ /* If the command response echos the voltage back */
+ if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
+ break;
+ }
+ /* As per SDCC the spec try for max three times with
+ * 1 ms delay
+ */
+ mdelay(1);
+ }
+
+ if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
+ {
+ dprintf(CRITICAL, "Error: CMD8 response timed out\n");
+ return 1;
+ }
+
+ /* Send ACMD41 for OCR */
+ for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
+ {
+ /* Send APP_CMD before ACMD41*/
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ /* APP_CMD is successful, send ACMD41 now */
+ cmd.cmd_index = ACMD41_SEND_OP_COND;
+ cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R3;
+
+ if (sdhci_send_command(host, &cmd))
+ {
+ dprintf(CRITICAL, "Failure sending ACMD41\n");
+ return 1;
+ }
+ else
+ {
+ if (cmd.resp[0] & MMC_SD_DEV_READY)
+ {
+ if (cmd.resp[0] & (1 << 30))
+ card->type = MMC_CARD_TYPE_SDHC;
+ else
+ card->type = MMC_CARD_TYPE_STD_SD;
+
+ break;
+ }
+ }
+ /*
+ * As per SDCC spec try for max 1 second
+ */
+ mdelay(50);
+ }
+
+ if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
+ {
+ dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+/*
+ * Function to read SD card information from SD status
+ */
+static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
+{
+ BUF_DMA_ALIGN(raw_sd_status, 64);
+ struct mmc_command cmd = {0};
+ uint32_t sd_status[16];
+ uint32_t *status = sd_status;
+ uint32_t au_size;
+ int i;
+ int j;
+
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ cmd.cmd_index = ACMD13_SEND_SD_STATUS;
+ cmd.argument = 0x0;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R2;
+ cmd.trans_mode = SDHCI_MMC_READ;
+ cmd.data_present = 0x1;
+ cmd.data.data_ptr = raw_sd_status;
+ cmd.data.num_blocks = 0x1;
+ cmd.data.blk_sz = 0x40;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ memcpy(sd_status, raw_sd_status, sizeof(sd_status));
+
+ for (i = 15, j = 0; i >=0 ; i--, j++)
+ sd_status[i] = swap_endian32(sd_status[j]);
+
+ au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
+ /* Card AU size in sectors */
+ card->ssr.au_size = 1 << (au_size + 4);
+ card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
+
+ return 0;
+}
+
+/*
+ * Function to read the SD CARD configuration register
+ */
+static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
+{
+ BUF_DMA_ALIGN(scr_resp, 8);
+ struct mmc_command cmd = {0};
+ uint32_t raw_scr[2];
+
+ /* Now read the SCR register */
+ /* Send APP_CMD before ACMD51*/
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ cmd.cmd_index = ACMD51_READ_CARD_SCR;
+ cmd.argument = 0x0;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+ cmd.trans_mode = SDHCI_MMC_READ;
+ cmd.data_present = 0x1;
+ cmd.data.data_ptr = scr_resp;
+ cmd.data.num_blocks = 0x1;
+ cmd.data.blk_sz = 0x8;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ memcpy(raw_scr, scr_resp, sizeof(raw_scr));
+
+ card->raw_scr[0] = swap_endian32(raw_scr[0]);
+ card->raw_scr[1] = swap_endian32(raw_scr[1]);
+
+ /*
+ * Parse & Populate the SCR data as per sdcc spec
+ */
+ card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
+ card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
+ card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
+ card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
+
+ return 0;
+}
+
+/*
+ * Function: mmc_set_sd_bus_width
+ * Arg : host, device structure & width
+ * Return : 0 on Success, 1 on Failure
+ * Flow : Set the bus width for the card
+ */
+uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
+{
+ struct mmc_command cmd = {0};
+
+ /* Send APP_CMD before ACMD6*/
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
+ cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ return 0;
+}
+
+uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
+{
+ struct mmc_command cmd = {0};
+ BUF_DMA_ALIGN(switch_resp, 64);
+
+ cmd.cmd_index = CMD6_SWITCH_FUNC;
+ cmd.argument = MMC_SD_SWITCH_HS;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+ cmd.trans_mode = SDHCI_MMC_READ;
+ cmd.data_present = 0x1;
+ cmd.data.data_ptr = switch_resp;
+ cmd.data.num_blocks = 0x1;
+ cmd.data.blk_sz = 0x40;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ return 0;
+}
+
/*
* Function: mmc_init_card
* Arg : mmc device structure
@@ -1028,10 +1292,19 @@
/* TODO: Get the OCR params from target */
card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
- /* Reset the card & get the OCR */
+ /* Initialize the internal MMC */
mmc_return = mmc_reset_card_and_send_op(host, card);
if (mmc_return)
- return mmc_return;
+ {
+ dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
+ /* Reset the card & get the OCR */
+ mmc_return = mmc_sd_card_init(host, card);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to initialize SD card\n");
+ return mmc_return;
+ }
+ }
/* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
mmc_return = mmc_identify_card(host, card);
@@ -1039,18 +1312,30 @@
return mmc_return;
/* set interface speed */
- mmc_return = mmc_set_hs_interface(host, card);
- if (mmc_return) {
- dprintf(CRITICAL, "Error adjusting interface speed!\n");
- return mmc_return;
+ if (MMC_CARD_SD(card))
+ {
+ mmc_return = mmc_sd_set_hs(host, card);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to set HS for SD card\n");
+ return mmc_return;
+ }
+ }
+ else
+ {
+ mmc_return = mmc_set_hs_interface(host, card);
+ if (mmc_return) {
+ dprintf(CRITICAL, "Error adjusting interface speed!\n");
+ return mmc_return;
+ }
}
/* Set the sdcc clock to 50 MHZ */
sdhci_clk_supply(host, SDHCI_CLK_50MHZ);
/* Now get the extended CSD for the card */
- if ((card->type == MMC_TYPE_STD_MMC) ||
- (card->type == MMC_TYPE_MMCHC)) {
+ if (MMC_CARD_MMC(card))
+ {
/* For MMC cards, also get the extended csd */
mmc_return = mmc_get_ext_csd(host, card);
@@ -1059,6 +1344,21 @@
return mmc_return;
}
}
+ else
+ {
+ /*Read SCR for sd card */
+ if (mmc_sd_get_card_scr(host, card))
+ {
+ dprintf(CRITICAL, "Failure getting card's SCR register\n");
+ return 1;
+ }
+ /* Read SSR for the SD card */
+ if (mmc_sd_get_card_ssr(host, card))
+ {
+ dprintf(CRITICAL, "Failed to get SSR from the card\n");
+ return 1;
+ }
+ }
/* Decode and save the CSD register */
mmc_return = mmc_decode_and_save_csd(card);
@@ -1068,53 +1368,79 @@
}
- /* Set the bus width based on host, target capbilities */
- if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
- bus_width = DATA_BUS_WIDTH_8BIT;
- /*
- * Host contoller by default supports 4 bit & 1 bit mode.
- * No need to check for host support here
- */
- else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
- bus_width = DATA_BUS_WIDTH_4BIT;
+ if (MMC_CARD_MMC(card))
+ {
+ /* Set the bus width based on host, target capbilities */
+ if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
+ bus_width = DATA_BUS_WIDTH_8BIT;
+ /*
+ * Host contoller by default supports 4 bit & 1 bit mode.
+ * No need to check for host support here
+ */
+ else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
+ bus_width = DATA_BUS_WIDTH_4BIT;
+ else
+ bus_width = DATA_BUS_WIDTH_1BIT;
+
+ /* Set 4/8 bit SDR bus width in controller */
+ mmc_return = sdhci_set_bus_width(host, bus_width);
+
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failed to set bus width for host controller\n");
+ return 1;
+ }
+
+ /* Enable high speed mode in the follwing order:
+ * 1. HS200 mode if supported by host & card
+ * 2. DDR mode host, if supported by host & card
+ * 3. Use normal speed mode with supported bus width
+ */
+ if (mmc_card_supports_hs200_mode(card) && host->caps.sdr50_support) {
+ mmc_return = mmc_set_hs200_mode(host, card, bus_width);
+
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
+ card->rca);
+ return mmc_return;
+ }
+ } else if (mmc_card_supports_ddr_mode(card) && host->caps.ddr_support) {
+ mmc_return = mmc_set_ddr_mode(host, card);
+
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
+ card->rca);
+ return mmc_return;
+ }
+ } else {
+ /* Set 4/8 bit bus width for the card */
+ mmc_return = mmc_set_bus_width(host, card, bus_width);
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
+ card->rca);
+ return mmc_return;
+ }
+ }
+ }
else
+ {
+ /* Check the supported bus width for the card from SCR register */
+ if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
+ bus_width = DATA_BUS_WIDTH_4BIT;
+ else
bus_width = DATA_BUS_WIDTH_1BIT;
- /* Set 4/8 bit SDR bus width in controller */
- mmc_return = sdhci_set_bus_width(host, bus_width);
-
- if (mmc_return) {
- dprintf(CRITICAL, "Failed to set bus width for host controller\n");
- return 1;
- }
-
- /* Enable high speed mode in the follwing order:
- * 1. HS200 mode if supported by host & card
- * 2. DDR mode host, if supported by host & card
- * 3. Use normal speed mode with supported bus width
- */
- if (mmc_card_supports_hs200_mode(card) && host->caps.sdr50_support) {
- mmc_return = mmc_set_hs200_mode(host, card, bus_width);
-
- if (mmc_return) {
- dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
- card->rca);
+ mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to set bus width for the card\n");
return mmc_return;
}
- } else if (mmc_card_supports_ddr_mode(card) && host->caps.ddr_support) {
- mmc_return = mmc_set_ddr_mode(host, card);
- if (mmc_return) {
- dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
- card->rca);
- return mmc_return;
- }
- } else {
- /* Set 4/8 bit bus width for the card */
- mmc_return = mmc_set_bus_width(host, card, bus_width);
- if (mmc_return) {
- dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
- card->rca);
+ /* Set bit SDR bus width in controller */
+ mmc_return = sdhci_set_bus_width(host, bus_width);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to set bus width for host controller\n");
return mmc_return;
}
}
@@ -1174,8 +1500,6 @@
memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
- dev->host.base = data->base;
-
/* Initialize the host & clock */
dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
@@ -1227,6 +1551,8 @@
cmd.resp_type = SDHCI_CMD_RESP_R1;
cmd.trans_mode = SDHCI_MMC_READ;
cmd.data_present = 0x1;
+ /* Use CMD23 If card supports cMD23 */
+ cmd.cmd23_support = dev->card.scr.cmd23_support;
cmd.data.data_ptr = dest;
cmd.data.num_blocks = num_blocks;
@@ -1284,6 +1610,8 @@
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
cmd.resp_type = SDHCI_CMD_RESP_R1;
cmd.trans_mode = SDHCI_MMC_WRITE;
+ /* Use CMD23 If card supports cMD23 */
+ cmd.cmd23_support = dev->card.scr.cmd23_support;
cmd.data_present = 0x1;
cmd.data.data_ptr = src;
cmd.data.num_blocks = num_blocks;
@@ -1320,10 +1648,15 @@
static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
{
struct mmc_command cmd;
+ struct mmc_card *card = &dev->card;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
- cmd.cmd_index = CMD35_ERASE_GROUP_START;
+ if (MMC_CARD_MMC(card))
+ cmd.cmd_index = CMD35_ERASE_GROUP_START;
+ else
+ cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
+
cmd.argument = erase_start;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
cmd.resp_type = SDHCI_CMD_RESP_R1;
@@ -1350,10 +1683,15 @@
static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
{
struct mmc_command cmd;
+ struct mmc_card *card = &dev->card;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
- cmd.cmd_index = CMD36_ERASE_GROUP_END;
+ if (MMC_CARD_MMC(card))
+ cmd.cmd_index = CMD36_ERASE_GROUP_END;
+ else
+ cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
+
cmd.argument = erase_end;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
cmd.resp_type = SDHCI_CMD_RESP_R1;
@@ -1381,7 +1719,7 @@
{
struct mmc_command cmd;
uint32_t status;
- uint32_t retry;
+ uint32_t retry = 0;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
@@ -1433,14 +1771,29 @@
uint32_t blk_end;
uint32_t num_erase_grps;
uint32_t *out;
+ struct mmc_card *card;
+
+
+ card = &dev->card;
/*
- * Calculate the erase unit size as per the emmc specification v4.5
+ * Calculate the erase unit size,
+ * 1. Based on emmc 4.5 spec for emmc card
+ * 2. Use SD Card Status info for SD cards
*/
- if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
- erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
+ if (MMC_CARD_MMC(card))
+ {
+ /*
+ * Calculate the erase unit size as per the emmc specification v4.5
+ */
+ if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
+ erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
+ else
+ erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
+ }
else
- erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
+ erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
+
/* Convert length in blocks */
len = len / MMC_BLK_SZ;
@@ -1537,7 +1890,7 @@
uint32_t status;
uint32_t num_wp_grps;
uint32_t ret;
- uint32_t retry;
+ uint32_t retry = 0;
uint32_t i;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
diff --git a/platform/msm_shared/partition_parser.c b/platform/msm_shared/partition_parser.c
index 881d2a0..5cca931 100644
--- a/platform/msm_shared/partition_parser.c
+++ b/platform/msm_shared/partition_parser.c
@@ -59,7 +59,7 @@
unsigned int vfat_count = 0;
struct partition_entry partition_entries[NUM_PARTITIONS];
-unsigned gpt_partitions_exist = 0;
+static unsigned gpt_partitions_exist = 0;
unsigned partition_count = 0;
unsigned int partition_read_table()
@@ -957,3 +957,8 @@
return 0;
}
+
+bool partition_gpt_exists()
+{
+ return (gpt_partitions_exist != 0);
+}
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index 6a386ce..16a498b 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -259,6 +259,7 @@
bam.pipe[DATA_PRODUCER_PIPE_INDEX].trans_type = BAM2SYS;
bam.pipe[DATA_PRODUCER_PIPE_INDEX].fifo.size = QPIC_BAM_DATA_FIFO_SIZE;
bam.pipe[DATA_PRODUCER_PIPE_INDEX].fifo.head = data_desc_fifo;
+ bam.pipe[DATA_PRODUCER_PIPE_INDEX].lock_grp = config->pipes.read_pipe_grp;
/* Set Write pipe params. */
bam.pipe[DATA_CONSUMER_PIPE_INDEX].pipe_num = config->pipes.write_pipe;
@@ -266,6 +267,7 @@
bam.pipe[DATA_CONSUMER_PIPE_INDEX].trans_type = SYS2BAM;
bam.pipe[DATA_CONSUMER_PIPE_INDEX].fifo.size = QPIC_BAM_DATA_FIFO_SIZE;
bam.pipe[DATA_CONSUMER_PIPE_INDEX].fifo.head = data_desc_fifo;
+ bam.pipe[DATA_CONSUMER_PIPE_INDEX].lock_grp = config->pipes.write_pipe_grp;
/* Set Cmd pipe params. */
bam.pipe[CMD_PIPE_INDEX].pipe_num = config->pipes.cmd_pipe;
@@ -273,6 +275,7 @@
bam.pipe[CMD_PIPE_INDEX].trans_type = BAM2SYS;
bam.pipe[CMD_PIPE_INDEX].fifo.size = QPIC_BAM_CMD_FIFO_SIZE;
bam.pipe[CMD_PIPE_INDEX].fifo.head = cmd_desc_fifo;
+ bam.pipe[CMD_PIPE_INDEX].lock_grp = config->pipes.cmd_pipe_grp;
/* Programs the threshold for BAM transfer
* When this threshold is reached, BAM signals the peripheral via the pipe_bytes_available
diff --git a/platform/msm_shared/qtimer.c b/platform/msm_shared/qtimer.c
index bf9de81..c8d6bd7 100644
--- a/platform/msm_shared/qtimer.c
+++ b/platform/msm_shared/qtimer.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -93,7 +93,7 @@
{
uint64_t ticks;
- ticks = (msecs * ticks_per_sec) / 1000;
+ ticks = ((uint64_t) msecs * ticks_per_sec) / 1000;
delay(ticks);
}
@@ -102,7 +102,7 @@
{
uint64_t ticks;
- ticks = (usecs * ticks_per_sec) / 1000000;
+ ticks = ((uint64_t) usecs * ticks_per_sec) / 1000000;
delay(ticks);
}
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
old mode 100644
new mode 100755
index a0b4662..0ffa27c
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -13,11 +13,13 @@
$(LOCAL_DIR)/hsusb.o \
$(LOCAL_DIR)/jtag_hook.o \
$(LOCAL_DIR)/jtag.o \
- $(LOCAL_DIR)/partition_parser.o
+ $(LOCAL_DIR)/partition_parser.o \
+ $(LOCAL_DIR)/boot_stats.o
ifeq ($(ENABLE_SDHCI_SUPPORT),1)
OBJS += \
$(LOCAL_DIR)/sdhci.o \
+ $(LOCAL_DIR)/sdhci_msm.o \
$(LOCAL_DIR)/mmc_sdhci.o \
$(LOCAL_DIR)/mmc_wrapper.o
else
@@ -96,7 +98,9 @@
$(LOCAL_DIR)/crypto5_wrapper.o \
$(LOCAL_DIR)/i2c_qup.o \
$(LOCAL_DIR)/gpio.o \
- $(LOCAL_DIR)/dload_util.o
+ $(LOCAL_DIR)/dload_util.o \
+ $(LOCAL_DIR)/edp.o \
+ $(LOCAL_DIR)/edp_phy.o
endif
ifeq ($(PLATFORM),msm8226)
@@ -110,6 +114,12 @@
$(LOCAL_DIR)/clock_lib2.o \
$(LOCAL_DIR)/uart_dm.o \
$(LOCAL_DIR)/board.o \
+ $(LOCAL_DIR)/scm.o \
+ $(LOCAL_DIR)/mdp5.o \
+ $(LOCAL_DIR)/display.o \
+ $(LOCAL_DIR)/mipi_dsi.o \
+ $(LOCAL_DIR)/mipi_dsi_phy.o \
+ $(LOCAL_DIR)/mipi_dsi_autopll.o \
$(LOCAL_DIR)/spmi.o \
$(LOCAL_DIR)/bam.o \
$(LOCAL_DIR)/qpic_nand.o \
@@ -123,7 +133,24 @@
$(LOCAL_DIR)/dload_util.o
endif
+ifeq ($(PLATFORM),mpq8092)
+ OBJS += $(LOCAL_DIR)/qgic.o \
+ $(LOCAL_DIR)/qtimer.o \
+ $(LOCAL_DIR)/qtimer_mmap.o \
+ $(LOCAL_DIR)/interrupts.o \
+ $(LOCAL_DIR)/clock.o \
+ $(LOCAL_DIR)/clock_pll.o \
+ $(LOCAL_DIR)/clock_lib2.o \
+ $(LOCAL_DIR)/uart_dm.o \
+ $(LOCAL_DIR)/board.o \
+ $(LOCAL_DIR)/spmi.o \
+ $(LOCAL_DIR)/bam.o \
+ $(LOCAL_DIR)/qpic_nand.o \
+ $(LOCAL_DIR)/dev_tree.o
+endif
+
ifeq ($(PLATFORM),msm8610)
+DEFINES += DISPLAY_TYPE_MDSS=1
OBJS += $(LOCAL_DIR)/qgic.o \
$(LOCAL_DIR)/qtimer.o \
$(LOCAL_DIR)/qtimer_mmap.o \
@@ -133,10 +160,15 @@
$(LOCAL_DIR)/clock_lib2.o \
$(LOCAL_DIR)/uart_dm.o \
$(LOCAL_DIR)/board.o \
+ $(LOCAL_DIR)/display.o \
+ $(LOCAL_DIR)/mipi_dsi.o \
+ $(LOCAL_DIR)/mipi_dsi_phy.o \
+ $(LOCAL_DIR)/mdp3.o \
$(LOCAL_DIR)/spmi.o \
$(LOCAL_DIR)/bam.o \
$(LOCAL_DIR)/qpic_nand.o \
- $(LOCAL_DIR)/dev_tree.o
+ $(LOCAL_DIR)/dev_tree.o \
+ $(LOCAL_DIR)/gpio.o
endif
ifeq ($(PLATFORM),msm7x27a)
diff --git a/platform/msm_shared/sdhci.c b/platform/msm_shared/sdhci.c
index 417e0eb..ce54433 100644
--- a/platform/msm_shared/sdhci.c
+++ b/platform/msm_shared/sdhci.c
@@ -40,41 +40,6 @@
/*
- * Function: sdhci int handler
- * Arg : Event argument
- * Return : 0
- * Flow: : 1. Read the power control mask register
- * 2. Check if bus is ON
- * 3. Write success to ack regiser
- * Details : This is power control interrupt handler.
- * Once we receive the interrupt, we will ack the power control
- * register that we have successfully completed pmic transactions
- */
-enum handler_return sdhci_int_handler(void *arg)
-{
- uint32_t ack;
- uint32_t status;
-
- /*
- * Read the mask register to check if BUS & IO level
- * interrupts are enabled
- */
- status = readl(SDCC_HC_PWRCTL_MASK_REG);
-
- if (status & (SDCC_HC_BUS_ON | SDCC_HC_BUS_OFF))
- ack = SDCC_HC_BUS_ON_OFF_SUCC;
- if (status & (SDCC_HC_IO_SIG_LOW | SDCC_HC_IO_SIG_HIGH))
- ack |= SDCC_HC_IO_SIG_SUCC;
-
- /* Write success to power control register */
- writel(ack, SDCC_HC_PWRCTL_CTL_REG);
-
- event_signal((event_t *)arg, false);
-
- return 0;
-}
-
-/*
* Function: sdhci error status enable
* Arg : Host structure
* Return : None
@@ -207,7 +172,7 @@
voltage = host->caps.voltage;
voltage <<= SDHCI_BUS_VOL_SEL;
- REG_WRITE8(host, voltage, SDHCI_BUS_PWR_EN);
+ REG_WRITE8(host, voltage, SDHCI_PWR_CTRL_REG);
voltage |= SDHCI_BUS_PWR_EN;
@@ -458,6 +423,8 @@
if (int_status & SDHCI_ERR_INT_STAT_MASK) {
if (sdhci_cmd_err_status(host)) {
dprintf(CRITICAL, "Error: Command completed with errors\n");
+ /* Reset the command & Data line */
+ REG_WRITE8(host, (SOFT_RESET_CMD | SOFT_RESET_DATA), SDHCI_RESET_REG);
return 1;
}
}
@@ -712,10 +679,16 @@
if (cmd->trans_mode == SDHCI_MMC_READ)
trans_mode |= SDHCI_READ_MODE;
- /* Enable auto cmd 23 for multi block transfer */
+ /* Enable auto cmd23 or cmd12 for multi block transfer
+ * based on what command card supports
+ */
if (cmd->data.num_blocks > 1) {
- trans_mode |= SDHCI_TRANS_MULTI | SDHCI_AUTO_CMD23_EN | SDHCI_BLK_CNT_EN;
- REG_WRITE32(host, cmd->data.num_blocks, SDHCI_ARG2_REG);
+ if (cmd->cmd23_support) {
+ trans_mode |= SDHCI_TRANS_MULTI | SDHCI_AUTO_CMD23_EN | SDHCI_BLK_CNT_EN;
+ REG_WRITE32(host, cmd->data.num_blocks, SDHCI_ARG2_REG);
+ }
+ else
+ trans_mode |= SDHCI_TRANS_MULTI | SDHCI_AUTO_CMD12_EN | SDHCI_BLK_CNT_EN;
}
}
@@ -763,20 +736,6 @@
}
/*
- * Function: sdhci mode enable
- * Arg : Flag (0/1)
- * Return : None
- * Flow: : Enable/Disable Sdhci mode
- */
-void sdhci_mode_enable(uint8_t enable)
-{
- if (enable)
- writel(SDHCI_HC_MODE_EN, SDCC_MCI_HC_MODE);
- else
- writel(SDHCI_HC_MODE_DIS, SDCC_MCI_HC_MODE);
-}
-
-/*
* Function: sdhci init
* Arg : Host structure
* Return : None
@@ -791,9 +750,6 @@
void sdhci_init(struct sdhci_host *host)
{
uint32_t caps[2];
- event_t sdhc_event;
-
- event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
/*
* Reset the controller
@@ -832,20 +788,11 @@
/* SDR50 mode support */
host->caps.sdr50_support = (caps[1] & SDHCI_SDR50_MODE_MASK) ? 1 : 0;
- /*
- * Register the interrupt handler for pwr irq
- */
- register_int_handler(SDCC_PWRCTRL_IRQ, sdhci_int_handler, &sdhc_event);
- unmask_interrupt(SDCC_PWRCTRL_IRQ);
-
- /* Enable pwr control interrupt */
- writel(SDCC_HC_PWR_CTRL_INT, SDCC_HC_PWRCTL_MASK_REG);
-
/* Set bus power on */
sdhci_set_bus_power_on(host);
/* Wait for power interrupt to be handled */
- event_wait(&sdhc_event);
+ event_wait(host->sdhc_event);
/* Set bus width */
sdhci_set_bus_width(host, SDHCI_BUS_WITDH_1BIT);
diff --git a/platform/msm_shared/sdhci_msm.c b/platform/msm_shared/sdhci_msm.c
new file mode 100644
index 0000000..1b6c8b0
--- /dev/null
+++ b/platform/msm_shared/sdhci_msm.c
@@ -0,0 +1,139 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <platform/iomap.h>
+#include <platform/irqs.h>
+#include <platform/interrupts.h>
+#include <platform/timer.h>
+#include <target.h>
+#include <string.h>
+#include <stdlib.h>
+#include <bits.h>
+#include <debug.h>
+#include <sdhci.h>
+#include <sdhci_msm.h>
+
+
+/*
+ * Function: sdhci int handler
+ * Arg : MSM specific data for sdhci
+ * Return : 0
+ * Flow: : 1. Read the power control mask register
+ * 2. Check if bus is ON
+ * 3. Write success to ack regiser
+ * Details : This is power control interrupt handler.
+ * Once we receive the interrupt, we will ack the power control
+ * register that we have successfully completed pmic transactions
+ */
+static enum handler_return sdhci_int_handler(struct sdhci_msm_data *data)
+{
+ uint32_t ack;
+ uint32_t status;
+
+ /*
+ * Read the mask register to check if BUS & IO level
+ * interrupts are enabled
+ */
+ status = readl(data->pwrctl_base + SDCC_HC_PWRCTL_MASK_REG);
+
+ if (status & (SDCC_HC_BUS_ON | SDCC_HC_BUS_OFF))
+ ack = SDCC_HC_BUS_ON_OFF_SUCC;
+ if (status & (SDCC_HC_IO_SIG_LOW | SDCC_HC_IO_SIG_HIGH))
+ ack |= SDCC_HC_IO_SIG_SUCC;
+
+ /* Write success to power control register */
+ writel(ack, (data->pwrctl_base + SDCC_HC_PWRCTL_CTL_REG));
+
+ event_signal(data->sdhc_event, false);
+
+ return 0;
+}
+
+/*
+ * Function: sdhci clear pending interrupts
+ * Arg : MSM specific data for sdhci
+ * Return : None
+ * Flow: : Clear pending interrupts
+ */
+static void sdhci_clear_power_ctrl_irq(struct sdhci_msm_data *data)
+{
+ uint32_t irq_ctl;
+ uint32_t irq_stat;
+
+ /*
+ * Read the power control status register to know
+ * the status of BUS & IO_HIGH_V
+ */
+ irq_stat = readl(data->pwrctl_base + SDCC_HC_PWRCTL_STATUS_REG);
+
+ /* Clear the power control status */
+ writel(irq_stat, (data->pwrctl_base + SDCC_HC_PWRCTL_CLEAR_REG));
+
+ /*
+ * Handle the pending irq by ack'ing the bus & IO switch
+ */
+ irq_ctl = readl(data->pwrctl_base + SDCC_HC_PWRCTL_CTL_REG);
+
+ if (irq_stat & (SDCC_HC_BUS_ON | SDCC_HC_BUS_OFF))
+ irq_ctl |= SDCC_HC_BUS_ON_OFF_SUCC;
+ if (irq_stat & (SDCC_HC_IO_SIG_LOW | SDCC_HC_IO_SIG_HIGH))
+ irq_ctl |= SDCC_HC_IO_SIG_SUCC;
+
+ writel(irq_ctl, (data->pwrctl_base + SDCC_HC_PWRCTL_CTL_REG));
+}
+
+/*
+ * Function: sdhci msm init
+ * Arg : MSM specific config data for sdhci
+ * Return : None
+ * Flow: : Enable sdhci mode & do msm specific init
+ */
+void sdhci_msm_init(struct sdhci_msm_data *config)
+{
+ /* Enable sdhc mode */
+ writel(SDHCI_HC_MODE_EN, (config->pwrctl_base + SDCC_MCI_HC_MODE));
+
+ /*
+ * CORE_SW_RST may trigger power irq if previous status of PWRCTL
+ * was either BUS_ON or IO_HIGH. So before we enable the power irq
+ * interrupt in GIC (by registering the interrupt handler), we need to
+ * ensure that any pending power irq interrupt status is acknowledged
+ * otherwise power irq interrupt handler would be fired prematurely.
+ */
+ sdhci_clear_power_ctrl_irq(config);
+
+ /*
+ * Register the interrupt handler for pwr irq
+ */
+ register_int_handler(config->pwr_irq, sdhci_int_handler, (void *)config);
+
+ unmask_interrupt(config->pwr_irq);
+
+ /* Enable pwr control interrupt */
+ writel(SDCC_HC_PWR_CTRL_INT, (config->pwrctl_base + SDCC_HC_PWRCTL_MASK_REG));
+}
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 1b6c78a..8ebbce8 100755
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -270,6 +270,7 @@
MSM8630AA = 143,
MSM8230AA = 144,
MSM8626 = 145,
+ MPQ8092 = 146,
MSM8610 = 147,
MDM9225 = 149,
MDM9225M = 150,
@@ -299,10 +300,22 @@
APQ8074 = 184,
MSM8274 = 185,
MSM8674 = 186,
+ MSM8974AC = 194,
MSM8126 = 198,
APQ8026 = 199,
MSM8926 = 200,
MSM8326 = 205,
+ APQ8074AA = 208,
+ APQ8074AB = 209,
+ APQ8074AC = 210,
+ MSM8274AA = 211,
+ MSM8274AB = 212,
+ MSM8274AC = 213,
+ MSM8674AA = 214,
+ MSM8674AB = 215,
+ MSM8674AC = 216,
+ MSM8974AA = 217,
+ MSM8974AB = 218,
};
enum platform {
@@ -329,6 +342,7 @@
enum platform_subtype {
HW_PLATFORM_SUBTYPE_UNKNOWN = 0,
HW_PLATFORM_SUBTYPE_MDM = 1,
+ HW_PLATFORM_SUBTYPE_8974PRO_PM8084 = 1,
HW_PLATFORM_SUBTYPE_CSFB = 1,
HW_PLATFORM_SUBTYPE_SVLTE1 = 2,
HW_PLATFORM_SUBTYPE_SVLTE2A = 3,
diff --git a/project/mpq8092.mk b/project/mpq8092.mk
new file mode 100644
index 0000000..0ad0671
--- /dev/null
+++ b/project/mpq8092.mk
@@ -0,0 +1,16 @@
+# top level project rules for the mpq8092 project
+#
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+TARGET := mpq8092
+
+MODULES += app/aboot
+
+DEBUG := 1
+
+#DEFINES += WITH_DEBUG_DCC=1
+DEFINES += WITH_DEBUG_UART=1
+#DEFINES += WITH_DEBUG_FBCON=1
+DEFINES += DEVICE_TREE=1
+#DEFINES += MMC_BOOT_BAM=1
+#DEFINES += CRYPTO_BAM=1
diff --git a/project/msm8610.mk b/project/msm8610.mk
index 13b4268..02676ef 100644
--- a/project/msm8610.mk
+++ b/project/msm8610.mk
@@ -7,6 +7,7 @@
MODULES += app/aboot
DEBUG := 1
+ENABLE_SDHCI_SUPPORT := 1
#DEFINES += WITH_DEBUG_DCC=1
DEFINES += WITH_DEBUG_UART=1
@@ -14,3 +15,13 @@
DEFINES += DEVICE_TREE=1
#DEFINES += MMC_BOOT_BAM=1
#DEFINES += CRYPTO_BAM=1
+
+#Disable thumb mode
+#TODO: The gold linker has issues generating correct
+#thumb interworking code for LK. Confirm that the issue
+#is with the linker and file a bug report.
+ENABLE_THUMB := false
+
+ifeq ($(ENABLE_SDHCI_SUPPORT),1)
+DEFINES += MMC_SDHCI_SUPPORT=1
+endif
diff --git a/target/mdm9625/init.c b/target/mdm9625/init.c
index ab9fd90..77f7331 100644
--- a/target/mdm9625/init.c
+++ b/target/mdm9625/init.c
@@ -54,6 +54,11 @@
#define DATA_PRODUCER_PIPE 1
#define CMD_PIPE 2
+/* NANDc BAM pipe groups */
+#define DATA_PRODUCER_PIPE_GRP 0
+#define DATA_CONSUMER_PIPE_GRP 0
+#define CMD_PIPE_GRP 1
+
/* NANDc EE */
#define QPIC_NAND_EE 0
@@ -122,6 +127,10 @@
config.pipes.write_pipe = DATA_CONSUMER_PIPE;
config.pipes.cmd_pipe = CMD_PIPE;
+ config.pipes.read_pipe_grp = DATA_PRODUCER_PIPE_GRP;
+ config.pipes.write_pipe_grp = DATA_CONSUMER_PIPE_GRP;
+ config.pipes.cmd_pipe_grp = CMD_PIPE_GRP;
+
config.bam_base = MSM_NAND_BAM_BASE;
config.nand_base = MSM_NAND_BASE;
config.ee = QPIC_NAND_EE;
diff --git a/target/mpq8092/init.c b/target/mpq8092/init.c
new file mode 100644
index 0000000..86b7bc9
--- /dev/null
+++ b/target/mpq8092/init.c
@@ -0,0 +1,100 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <platform/iomap.h>
+#include <reg.h>
+#include <target.h>
+#include <platform.h>
+#include <uart_dm.h>
+#include <mmc.h>
+#include <spmi.h>
+#include <board.h>
+
+#define PMIC_ARB_CHANNEL_NUM 0
+#define PMIC_ARB_OWNER_ID 0
+
+static uint32_t mmc_sdc_base[] =
+ { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE };
+
+void target_early_init(void)
+{
+#if WITH_DEBUG_UART
+ uart_dm_init(1, 0, BLSP1_UART1_BASE);
+#endif
+}
+void target_mmc_caps(struct mmc_host *host)
+{
+ host->caps.ddr_mode = 0;
+ host->caps.hs200_mode = 0;
+ host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
+ host->caps.hs_clk_rate = MMC_CLK_50MHZ;
+}
+static void target_keystatus()
+{
+}
+
+void target_init(void)
+{
+ uint32_t base_addr;
+ uint8_t slot;
+
+ dprintf(INFO, "target_init()\n");
+
+ spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
+
+ target_keystatus();
+
+ /* Trying Slot 1*/
+ slot = 1;
+ base_addr = mmc_sdc_base[slot - 1];
+ if (mmc_boot_main(slot, base_addr))
+ {
+
+ /* Trying Slot 2 next */
+ slot = 2;
+ base_addr = mmc_sdc_base[slot - 1];
+ if (mmc_boot_main(slot, base_addr)) {
+ dprintf(CRITICAL, "mmc init failed!");
+ ASSERT(0);
+ }
+ }
+}
+
+void target_serialno(unsigned char *buf)
+{
+ uint32_t serialno;
+ if (target_is_emmc_boot()) {
+ serialno = mmc_get_psn();
+ snprintf((char *)buf, 13, "%x", serialno);
+ }
+}
+
+unsigned board_machtype(void)
+{
+}
diff --git a/target/mpq8092/meminfo.c b/target/mpq8092/meminfo.c
new file mode 100644
index 0000000..f12476d
--- /dev/null
+++ b/target/mpq8092/meminfo.c
@@ -0,0 +1,81 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <reg.h>
+#include <debug.h>
+#include <malloc.h>
+#include <smem.h>
+#include <stdint.h>
+#include <libfdt.h>
+#include <platform/iomap.h>
+#include <dev_tree.h>
+
+/* Funtion to add the ram partition entries into device tree.
+ * The function assumes that all the entire fixed memory regions should
+ * be listed in the first bank of the passed in ddr regions.
+ */
+uint32_t target_dev_tree_mem(void *fdt, uint32_t memory_node_offset)
+{
+ struct smem_ram_ptable ram_ptable;
+ uint32_t i;
+ int ret = 0;
+
+ /* Make sure RAM partition table is initialized */
+ ASSERT(smem_ram_ptable_init(&ram_ptable));
+
+ /* Calculating the size of the mem_info_ptr */
+ for (i = 0 ; i < ram_ptable.len; i++)
+ {
+ if ((ram_ptable.parts[i].category == SDRAM) &&
+ (ram_ptable.parts[i].type == SYS_MEMORY)) {
+
+ /* Pass along all other usable memory regions to Linux */
+ ret = dev_tree_add_mem_info(fdt,
+ memory_node_offset,
+ ram_ptable.parts[i].start,
+ ram_ptable.parts[i].size);
+ if (ret) {
+ dprintf(CRITICAL, "Failed to add secondary banks memory addresses\n");
+ goto target_dev_tree_mem_err;
+ }
+ }
+ }
+target_dev_tree_mem_err:
+
+ return ret;
+}
+
+void *target_get_scratch_address(void)
+{
+ return ((void *)SCRATCH_ADDR);
+}
+
+unsigned target_get_max_flash_size(void)
+{
+ return (512 * 1024 * 1024);
+}
diff --git a/target/mpq8092/rules.mk b/target/mpq8092/rules.mk
new file mode 100644
index 0000000..0d56e4d
--- /dev/null
+++ b/target/mpq8092/rules.mk
@@ -0,0 +1,35 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
+
+PLATFORM := mpq8092
+
+MEMBASE := 0x0FF00000 # SDRAM
+MEMSIZE := 0x00100000 # 1MB
+
+BASE_ADDR := 0x00000
+
+TAGS_ADDR := BASE_ADDR+0x00000100
+KERNEL_ADDR := BASE_ADDR+0x00008000
+RAMDISK_ADDR := BASE_ADDR+0x01000000
+SCRATCH_ADDR := 0x10000000
+
+MODULES += \
+ dev/keys \
+ lib/ptable \
+ dev/pmic/pm8x41 \
+ lib/libfdt
+
+DEFINES += \
+ MEMSIZE=$(MEMSIZE) \
+ MEMBASE=$(MEMBASE) \
+ BASE_ADDR=$(BASE_ADDR) \
+ TAGS_ADDR=$(TAGS_ADDR) \
+ KERNEL_ADDR=$(KERNEL_ADDR) \
+ RAMDISK_ADDR=$(RAMDISK_ADDR) \
+ SCRATCH_ADDR=$(SCRATCH_ADDR)
+
+
+OBJS += \
+ $(LOCAL_DIR)/init.o \
+ $(LOCAL_DIR)/meminfo.o
diff --git a/target/mpq8092/tools/makefile b/target/mpq8092/tools/makefile
new file mode 100644
index 0000000..2757e07
--- /dev/null
+++ b/target/mpq8092/tools/makefile
@@ -0,0 +1,44 @@
+#Makefile to generate appsboot.mbn
+
+ifeq ($(BOOTLOADER_OUT),.)
+APPSBOOTHEADER_DIR := $(BUILDDIR)
+else
+APPSBOOTHEADER_DIR := $(BOOTLOADER_OUT)/../..
+endif
+
+SRC_DIR := target/$(TARGET)/tools
+COMPILER := gcc
+
+ifeq ($(EMMC_BOOT), 1)
+ APPSBOOTHDR_FILES := EMMCBOOT.MBN
+else
+ ifeq ($(BUILD_NANDWRITE), 1)
+ APPSBOOTHDR_FILES :=
+ else
+ APPSBOOTHDR_FILES := appsboot.mbn
+ endif
+endif
+
+APPSBOOTHEADER: $(APPSBOOTHDR_FILES)
+
+
+appsboot.mbn: appsboothd.mbn $(OUTBIN)
+ cp $(OUTBIN) $(APPSBOOTHEADER_DIR)/appsboot.raw
+ cat $(APPSBOOTHEADER_DIR)/appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/appsboot.mbn
+ rm -f $(APPSBOOTHEADER_DIR)/appsboothd.mbn
+
+appsboothd.mbn: mkheader $(OUTBIN)
+ $(BUILDDIR)/mkheader $(OUTBIN) $(APPSBOOTHEADER_DIR)/appsboothd.mbn
+
+EMMCBOOT.MBN: emmc_appsboothd.mbn $(OUTBIN)
+ cp $(OUTBIN) $(APPSBOOTHEADER_DIR)/emmc_appsboot.raw
+ cat $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/EMMCBOOT.MBN
+ cat $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/emmc_appsboot.mbn
+ rm -f $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn
+
+emmc_appsboothd.mbn: mkheader $(OUTBIN)
+ $(BUILDDIR)/mkheader $(OUTBIN) $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn
+
+mkheader: $(SRC_DIR)/mkheader.c
+ @mkdir -p $(BUILDDIR)
+ ${COMPILER} -DMEMBASE=$(MEMBASE) $(SRC_DIR)/mkheader.c -o $(BUILDDIR)/mkheader
diff --git a/target/mpq8092/tools/mkheader.c b/target/mpq8092/tools/mkheader.c
new file mode 100644
index 0000000..2d1cf9d
--- /dev/null
+++ b/target/mpq8092/tools/mkheader.c
@@ -0,0 +1,341 @@
+/*
+ * Copyright (c) 2007, Google Inc.
+ *
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <string.h>
+
+#include <sys/stat.h>
+
+int print_usage()
+{
+ fprintf(stderr, "usage: mkheader <bin> <hdr> <none|unified-boot>\n");
+ fprintf(stderr, " mkheader <bin> <hdr> <unsecure-boot>"
+ " <outbin>\n");
+ fprintf(stderr, " mkheader <bin> <hdr> <secure-boot> <outbin>"
+ " <maxsize>\n");
+ fprintf(stderr, " mkheader <bin> <hdr> <secure-boot> <outbin>"
+ " <maxsize> <certchain> <files...>\n\n");
+ fprintf(stderr, "bin: Input raw appsbl binary\n");
+ fprintf(stderr,
+ "hdr: Output of appsbl header location\n");
+ fprintf(stderr,
+ "outbin: Output of the signed or unsigned"
+ "apps boot location\n");
+ fprintf(stderr,
+ "maxsize: Maximum size for certificate" " chain\n");
+ fprintf(stderr,
+ "certchain: Output of the certchain location\n");
+ fprintf(stderr,
+ "files: Input format <bin signature>"
+ "<certifcate file(s) for certificate chain>...\n");
+ fprintf(stderr,
+ "certificate chain: Files will be concatenated in order"
+ "to create the certificate chain\n\n");
+ return -1;
+}
+
+int cat(FILE * in, FILE * out, unsigned size, unsigned buff_size)
+{
+ unsigned bytes_left = size;
+ char buf[buff_size];
+ int ret = 0;
+
+ while (bytes_left) {
+ fread(buf, sizeof(char), buff_size, in);
+ if (!feof(in)) {
+ bytes_left -= fwrite(buf, sizeof(char), buff_size, out);
+ } else
+ bytes_left = 0;
+ }
+ ret = ferror(in) | ferror(out);
+ if (ret)
+ fprintf(stderr, "ERROR: Occured during file concatenation\n");
+ return ret;
+}
+
+int main(int argc, char *argv[])
+{
+ struct stat s;
+ unsigned size, base;
+ int unified_boot = 0;
+ unsigned unified_boot_magic[20];
+ unsigned non_unified_boot_magic[10];
+ unsigned magic_len = 0;
+ unsigned *magic;
+ unsigned cert_chain_size = 0;
+ unsigned signature_size = 0;
+ int secure_boot = 0;
+ int fd;
+
+ if (argc < 3) {
+ return print_usage();
+ }
+
+ if (argc == 4) {
+ if (!strcmp("unified-boot", argv[3])) {
+ unified_boot = 1;
+ } else if (!strcmp("secure-boot", argv[3])) {
+ fprintf(stderr,
+ "ERROR: Missing arguments: [outbin maxsize] |"
+ " [outbin, maxsize, certchain,"
+ " signature + certifcate(s)]\n");
+ return print_usage();
+ } else if (!strcmp("unsecure-boot", argv[3])) {
+ fprintf(stderr, "ERROR: Missing arguments:"
+ " outbin directory\n");
+ return print_usage();
+ }
+ }
+
+ if (argc > 4) {
+ if (!strcmp("secure-boot", argv[3])) {
+ if (argc < 9 && argc != 6) {
+ fprintf(stderr,"ERROR: Missing argument(s):"
+ " [outbin maxsize] | [outbin, maxsize,"
+ " certchain,"
+ " signature + certifcate(s)]\n");
+ return print_usage();
+ }
+ secure_boot = 1;
+ signature_size = 256; //Support SHA 256
+ cert_chain_size = atoi(argv[5]);
+ }
+ }
+
+ if (stat(argv[1], &s)) {
+ perror("cannot stat binary");
+ return -1;
+ }
+
+ if (unified_boot) {
+ magic = unified_boot_magic;
+ magic_len = sizeof(unified_boot_magic);
+ } else {
+ magic = non_unified_boot_magic;
+ magic_len = sizeof(non_unified_boot_magic);
+ }
+
+ size = s.st_size;
+#if MEMBASE
+ base = MEMBASE;
+#else
+ base = 0;
+#endif
+
+ printf("Image Destination Pointer: 0x%x\n", base);
+
+ magic[0] = 0x00000005; /* appsbl */
+ magic[1] = 0x00000003; //Flash_partition_version /* nand */
+ magic[2] = 0x00000000; //image source pointer
+ magic[3] = base; //image destination pointer
+ magic[4] = size + cert_chain_size + signature_size; //image size
+ magic[5] = size; //code size
+ magic[6] = base + size;
+ magic[7] = signature_size;
+ magic[8] = size + base + signature_size;
+ magic[9] = cert_chain_size;
+
+ if (unified_boot == 1) {
+ magic[10] = 0x33836685; /* cookie magic number */
+ magic[11] = 0x00000001; /* cookie version */
+ magic[12] = 0x00000002; /* file formats */
+ magic[13] = 0x00000000;
+ magic[14] = 0x00000000; /* not setting size for boot.img */
+ magic[15] = 0x00000000;
+ magic[16] = 0x00000000;
+ magic[17] = 0x00000000;
+ magic[18] = 0x00000000;
+ magic[19] = 0x00000000;
+}
+
+fd = open(argv[2], O_WRONLY | O_CREAT | O_TRUNC, 0644);
+if (fd < 0) {
+ perror("cannot open header for writing");
+ return -1;
+}
+if (write(fd, magic, magic_len) != magic_len) {
+ perror("cannot write header");
+ close(fd);
+ unlink(argv[2]);
+ return -1;
+}
+close(fd);
+
+if (secure_boot && argc > 6) {
+ FILE *input_file;
+ FILE *output_file;
+ unsigned buff_size = 1;
+ char buf[buff_size];
+ unsigned bytes_left;
+ unsigned current_cert_chain_size = 0;
+ int padding_size = 0;
+ int i;
+
+ if ((output_file = fopen(argv[6], "wb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ printf("Certificate Chain Output File: %s\n", argv[6]);
+
+ for (i = 8; i < argc; i++) {
+ if ((input_file = fopen(argv[i], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ stat(argv[i], &s);
+ bytes_left = s.st_size;
+ current_cert_chain_size += bytes_left;
+ if (cat(input_file, output_file, bytes_left, buff_size))
+ return -1;
+ fclose(input_file);
+ }
+
+ //Pad certifcate chain to the max expected size from input
+ memset(buf, 0xFF, sizeof(buf));
+ padding_size = cert_chain_size - current_cert_chain_size;
+
+ if (padding_size < 0) {
+ fprintf(stderr, "ERROR: Input certificate chain"
+ " (Size=%d) is larger than the maximum"
+ " specified (Size=%d)\n",
+ current_cert_chain_size, cert_chain_size);
+ return -1;
+ }
+
+ bytes_left = (padding_size > 0) ? padding_size : 0;
+ while (bytes_left) {
+ if (!ferror(output_file))
+ bytes_left -= fwrite(buf,
+ sizeof(buf),
+ buff_size, output_file);
+ else {
+ fprintf(stderr, "ERROR: Occured during"
+ " certifcate chain padding\n");
+ return -1;
+ }
+ }
+ fclose(output_file);
+
+ /* Concat and combine to signed image.
+ * Format [HDR][RAW APPSBOOT][PADDED CERT CHAIN]
+ */
+ if ((output_file = fopen(argv[4], "wb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ printf("Image Output File: %s\n", argv[4]);
+
+ //Header
+ if ((input_file = fopen(argv[2], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ stat(argv[2], &s);
+ if (cat(input_file, output_file, s.st_size, buff_size))
+ return -1;
+ fclose(input_file);
+
+ //Raw Appsbl
+ if ((input_file = fopen(argv[1], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ stat(argv[1], &s);
+ if (cat(input_file, output_file, s.st_size, buff_size))
+ return -1;
+ fclose(input_file);
+
+ //Signature
+ if ((input_file = fopen(argv[7], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ stat(argv[7], &s);
+ if (cat(input_file, output_file, s.st_size, buff_size))
+ return -1;
+ fclose(input_file);
+
+ //Certifcate Chain
+ if ((input_file = fopen(argv[6], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ if (cat(input_file, output_file,
+ (current_cert_chain_size + padding_size), buff_size))
+ return -1;
+ fclose(input_file);
+
+ fclose(output_file);
+
+ } else if (argc == 5 || argc == 6) {
+ FILE *input_file;
+ FILE *output_file;
+ unsigned buff_size = 1;
+ char buf[buff_size];
+
+ /* Concat and combine to unsigned image.
+ * Format [HDR][RAW APPSBOOT]
+ */
+ if ((output_file = fopen(argv[4], "wb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ printf("Image Output File: %s\n", argv[4]);
+
+ //Header
+ if ((input_file = fopen(argv[2], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ stat(argv[2], &s);
+ if (cat(input_file, output_file, s.st_size, buff_size))
+ return -1;
+ fclose(input_file);
+
+ //Raw Appsbl
+ if ((input_file = fopen(argv[1], "rb")) == NULL) {
+ perror("ERROR: Occured during fopen");
+ return -1;
+ }
+ stat(argv[1], &s);
+ if (cat(input_file, output_file, s.st_size, buff_size))
+ return -1;
+ fclose(input_file);
+ fclose(output_file);
+ }
+
+ printf("Done execution\n");
+
+ return 0;
+}
diff --git a/target/msm8226/include/target/display.h b/target/msm8226/include/target/display.h
new file mode 100755
index 0000000..bce13b8
--- /dev/null
+++ b/target/msm8226/include/target/display.h
@@ -0,0 +1,119 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef _TARGET_MSM8226_DISPLAY_H
+#define _TARGET_MSM8226_DISPLAY_H
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <display_resource.h>
+
+/*---------------------------------------------------------------------------*/
+/* GPIO configuration */
+/*---------------------------------------------------------------------------*/
+static struct gpio_pin reset_gpio = {
+ "msmgpio", 25, 3, 1, 0, 1
+};
+
+static struct gpio_pin enable_gpio = {
+ 0, 0, 0, 0, 0, 0
+};
+
+static struct gpio_pin te_gpio = {
+ 0, 0, 0, 0, 0, 0
+};
+
+static struct gpio_pin pwm_gpio = {
+ 0, 0, 0, 0, 0, 0
+};
+
+static struct panel_reset_sequence reset_sequence = {
+ { 1, 0, 1, }, { 20, 20, 20, }, 2
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* LDO configuration */
+/*---------------------------------------------------------------------------*/
+static struct ldo_entry ldo_entry_array[] = {
+ { "vdd", 15, 0, 2800000, 100000, 100, 0, 20, 0, 20},
+{ "vddio", 8, 0, 1800000, 100000, 100, 0, 30, 0, 30},
+{ "vdda", 4, 1, 1200000, 100000, 100, 0, 20, 0, 30},
+};
+
+#define TOTAL_LDO_DEFINED 3
+
+/*---------------------------------------------------------------------------*/
+/* Target Physical configuration */
+/*---------------------------------------------------------------------------*/
+
+static const uint32_t panel_strength_ctrl[] = {
+ 0xff, 0x06
+};
+
+static const char panel_bist_ctrl[] = {
+ 0x00, 0x00, 0xb1, 0xff, 0x00, 0x00
+};
+
+static const uint32_t panel_regulator_settings[] = {
+ 0x07, 0x09, 0x03, 0x00, 0x20, 0x00, 0x01
+};
+
+static const char panel_lane_config[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb
+};
+
+static const uint32_t panel_physical_ctrl[] = {
+ 0x5f, 0x00, 0x00, 0x10
+};
+
+/*---------------------------------------------------------------------------*/
+/* Other Configuration */
+/*---------------------------------------------------------------------------*/
+
+#define msm8226_DSI_FEATURE_ENABLE 0
+
+#define MIPI_FB_ADDR 0x0D200000
+
+#define MIPI_HSYNC_PULSE_WIDTH 12
+#define MIPI_HSYNC_BACK_PORCH_DCLK 32
+#define MIPI_HSYNC_FRONT_PORCH_DCLK 144
+
+#define MIPI_VSYNC_PULSE_WIDTH 4
+#define MIPI_VSYNC_BACK_PORCH_LINES 3
+#define MIPI_VSYNC_FRONT_PORCH_LINES 9
+
+extern int mdss_dsi_phy_init(struct mipi_dsi_panel_config *, uint32_t ctl_base);
+extern int mdss_dsi_uniphy_pll_config(uint32_t ctl_base);
+int mdss_dsi_auto_pll_config(struct mipi_dsi_panel_config *);
+#endif
diff --git a/target/msm8226/init.c b/target/msm8226/init.c
index e5b33fb..dbd12d3 100644
--- a/target/msm8226/init.c
+++ b/target/msm8226/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <reg.h>
#include <target.h>
#include <platform.h>
@@ -55,13 +56,27 @@
#define CRYPTO_ENGINE_FIFO_SIZE 64
#define CRYPTO_ENGINE_READ_PIPE 3
#define CRYPTO_ENGINE_WRITE_PIPE 2
+#define CRYPTO_READ_PIPE_LOCK_GRP 0
+#define CRYPTO_WRITE_PIPE_LOCK_GRP 0
#define CRYPTO_ENGINE_CMD_ARRAY_SIZE 20
#define TLMM_VOL_UP_BTN_GPIO 106
+enum target_subtype {
+ HW_PLATFORM_SUBTYPE_SKUAA = 1,
+ HW_PLATFORM_SUBTYPE_SKUF = 2,
+ HW_PLATFORM_SUBTYPE_SKUAB = 3,
+};
+
+static uint32_t mmc_pwrctl_base[] =
+ { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE };
+
static uint32_t mmc_sdhci_base[] =
{ MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE, MSM_SDC3_SDHCI_BASE };
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ, SDCC3_PWRCTL_IRQ };
+
struct mmc_device *dev;
void target_early_init(void)
@@ -116,9 +131,11 @@
ce_params.bam_base = MSM_CE1_BAM_BASE;
/* Set up BAM config. */
- ce_params.bam_ee = CRYPTO_ENGINE_EE;
- ce_params.pipes.read_pipe = CRYPTO_ENGINE_READ_PIPE;
- ce_params.pipes.write_pipe = CRYPTO_ENGINE_WRITE_PIPE;
+ ce_params.bam_ee = CRYPTO_ENGINE_EE;
+ ce_params.pipes.read_pipe = CRYPTO_ENGINE_READ_PIPE;
+ ce_params.pipes.write_pipe = CRYPTO_ENGINE_WRITE_PIPE;
+ ce_params.pipes.read_pipe_grp = CRYPTO_READ_PIPE_LOCK_GRP;
+ ce_params.pipes.write_pipe_grp = CRYPTO_WRITE_PIPE_LOCK_GRP;
/* Assign buffer sizes. */
ce_params.num_ce = CRYPTO_ENGINE_CMD_ARRAY_SIZE;
@@ -130,27 +147,30 @@
void target_sdc_init()
{
- struct mmc_config_data config;
+ struct mmc_config_data config = {0};
/*
* Set drive strength & pull ctrl for emmc
*/
set_sdc_power_ctrl();
- /* Enable sdhci mode */
- sdhci_mode_enable(1);
-
config.bus_width = DATA_BUS_WIDTH_8BIT;
config.max_clk_rate = MMC_CLK_200MHZ;
/* Trying Slot 1*/
config.slot = 1;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
if (!(dev = mmc_init(&config)))
{
/* Trying Slot 2 next */
config.slot = 2;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
if (!(dev = mmc_init(&config))) {
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
@@ -174,6 +194,13 @@
target_keystatus();
+ /* Display splash screen if enabled */
+#if DISPLAY_SPLASH_SCREEN
+ dprintf(SPEW, "Display Init: Start\n");
+ display_init();
+ dprintf(SPEW, "Display Init: Done\n");
+#endif
+
target_sdc_init();
if (target_use_signed_kernel())
@@ -190,7 +217,9 @@
/* Detect the target type */
void target_detect(struct board_data *board)
{
- board->target = LINUX_MACHTYPE_UNKNOWN;
+ /*
+ * already fill the board->target on board.c
+ */
}
/* Detect the modem type */
@@ -211,6 +240,12 @@
{
case HW_PLATFORM_SUBTYPE_UNKNOWN:
break;
+ case HW_PLATFORM_SUBTYPE_SKUAA:
+ break;
+ case HW_PLATFORM_SUBTYPE_SKUF:
+ break;
+ case HW_PLATFORM_SUBTYPE_SKUAB:
+ break;
default:
dprintf(CRITICAL, "Platform Subtype : %u is not supported\n", platform_subtype);
ASSERT(0);
@@ -308,19 +343,43 @@
writel(val, USB_USBCMD);
}
+/* Returns 1 if target supports continuous splash screen. */
+int target_cont_splash_screen()
+{
+ switch(board_hardware_id())
+ {
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_QRD:
+ case HW_PLATFORM_SURF:
+ dprintf(SPEW, "Target_cont_splash=1\n");
+ return 1;
+ break;
+ default:
+ dprintf(SPEW, "Target_cont_splash=0\n");
+ return 0;
+ }
+}
+
unsigned target_pause_for_battery_charge(void)
{
+#if 0
uint8_t pon_reason = pm8x41_get_pon_reason();
-
- /* This function will always return 0 to facilitate
- * automated testing/reboot with usb connected.
- * uncomment if this feature is needed.
+ uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
+ dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
+ pon_reason, is_cold_boot);
+ /* In case of fastboot reboot,adb reboot or if we see the power key
+ * pressed we do not want go into charger mode.
+ * fastboot reboot is warm boot with PON hard reset bit not set
+ * adb reboot is a cold boot with PON hard reset bit set
*/
- /* if ((pon_reason == USB_CHG) || (pon_reason == DC_CHG))
- * return 1;
- */
-
- return 0;
+ if (is_cold_boot &&
+ (!(pon_reason & HARD_RST)) &&
+ (!(pon_reason & KPDPWR_N)) &&
+ ((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
+ return 1;
+ else
+#endif
+ return 0;
}
unsigned target_baseband()
diff --git a/target/msm8226/rules.mk b/target/msm8226/rules.mk
old mode 100644
new mode 100755
index cdd9a35..0d338c8
--- a/target/msm8226/rules.mk
+++ b/target/msm8226/rules.mk
@@ -1,6 +1,7 @@
LOCAL_DIR := $(GET_LOCAL_DIR)
INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
+INCLUDES += -I$(LK_TOP_DIR)/dev/gcdb/display -I$(LK_TOP_DIR)/dev/gcdb/display/include
PLATFORM := msm8226
@@ -14,10 +15,17 @@
RAMDISK_ADDR := BASE_ADDR+0x01000000
SCRATCH_ADDR := 0x10000000
+DEFINES += DISPLAY_SPLASH_SCREEN=1
+DEFINES += DISPLAY_TYPE_MIPI=1
+DEFINES += DISPLAY_TYPE_DSI6G=1
+DEFINES += DISPLAY_TYPE_CMD_MODE=0
+
MODULES += \
dev/keys \
lib/ptable \
dev/pmic/pm8x41 \
+ dev/panel/msm \
+ dev/gcdb/display \
lib/libfdt
DEFINES += \
@@ -32,4 +40,5 @@
OBJS += \
$(LOCAL_DIR)/init.o \
- $(LOCAL_DIR)/meminfo.o
+ $(LOCAL_DIR)/meminfo.o \
+ $(LOCAL_DIR)/target_display.o
diff --git a/target/msm8226/target_display.c b/target/msm8226/target_display.c
new file mode 100755
index 0000000..a30b568
--- /dev/null
+++ b/target/msm8226/target_display.c
@@ -0,0 +1,151 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <smem.h>
+#include <err.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <pm8x41.h>
+#include <pm8x41_wled.h>
+#include <board.h>
+#include <mdp5.h>
+#include <platform/gpio.h>
+#include <platform/iomap.h>
+#include <target/display.h>
+
+#include "include/display_resource.h"
+
+static struct pm8x41_wled_data wled_ctrl = {
+ .mod_scheme = 0x00,
+ .led1_brightness = (0x0F << 8) | 0xEF,
+ .max_duty_cycle = 0x01,
+ .ovp = 0x0,
+ .full_current_scale = 0x19
+};
+
+int target_backlight_ctrl(uint8_t enable)
+{
+ dprintf(SPEW, "target_backlight_ctrl\n");
+
+ pm8x41_wled_config(&wled_ctrl);
+ pm8x41_wled_sink_control(1);
+ pm8x41_wled_iled_sync_control(1);
+ pm8x41_wled_enable(1);
+
+ return 0;
+}
+
+int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
+{
+ struct mdss_dsi_pll_config *pll_data;
+ dprintf(SPEW, "target_panel_clock\n");
+
+ pll_data = pinfo->mipi.dsi_pll_config;
+
+ if (enable) {
+ mdp_gdsc_ctrl(enable);
+ mdp_clock_init();
+ mdss_dsi_auto_pll_config(pll_data);
+ mmss_clock_auto_pll_init(pll_data->pclk_m,
+ pll_data->pclk_n,
+ pll_data->pclk_d);
+ } else if(!target_cont_splash_screen()) {
+ /* Add here for non-continuous splash */
+ /* FIXME:Need to disable the clocks.
+ * For now leave the clocks enabled until the kernel
+ * hang issue gets resolved
+ */
+ }
+
+ return 0;
+}
+
+int target_panel_reset(uint8_t enable,
+ struct gpio_pin *resetgpio,
+ struct gpio_pin *enablegpio,
+ struct panel_reset_sequence *resetseq)
+{
+ int ret = NO_ERROR;
+ if (enable) {
+ gpio_tlmm_config(resetgpio->pin_id, 0,
+ resetgpio->pin_direction, resetgpio->pin_pull,
+ resetgpio->pin_strength, resetgpio->pin_state);
+
+ gpio_set_dir(resetgpio->pin_id, 2);
+
+ gpio_set_value(resetgpio->pin_id, resetseq->pin_state[0]);
+ mdelay(resetseq->sleep[0]);
+ gpio_set_value(resetgpio->pin_id, resetseq->pin_state[1]);
+ mdelay(resetseq->sleep[1]);
+ gpio_set_value(resetgpio->pin_id, resetseq->pin_state[2]);
+ mdelay(resetseq->sleep[2]);
+ } else if(!target_cont_splash_screen()) {
+ gpio_set_value(resetgpio->pin_id, 0);
+ }
+
+ return ret;
+}
+
+int target_ldo_ctrl(uint8_t enable, struct ldo_entry ldo_entry_array[],
+ uint8_t ldo_array_size)
+{
+ uint32_t ret = NO_ERROR;
+ uint32_t ldocounter = 0;
+ uint32_t pm8x41_ldo_base = 0x13F00;
+
+ while (ldocounter < ldo_array_size) {
+ struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
+ 0x100 * ldo_entry_array[ldocounter].ldo_id),
+ ldo_entry_array[ldocounter].ldo_type);
+
+ dprintf(SPEW, "Setting %s\n",
+ ldo_entry_array[ldocounter].ldo_id);
+
+ /* Set voltage during power on */
+ if (enable == 1) {
+ pm8x41_ldo_set_voltage(&ldo_entry,
+ ldo_entry_array[ldocounter].ldo_voltage);
+ }
+ pm8x41_ldo_control(&ldo_entry, enable);
+ ldocounter++;
+ }
+
+ return ret;
+}
+
+void display_init(void)
+{
+ gcdb_display_init(MDP_REV_50, MIPI_FB_ADDR);
+}
+
+void display_shutdown(void)
+{
+ gcdb_display_shutdown();
+}
diff --git a/target/msm8610/include/target/display.h b/target/msm8610/include/target/display.h
new file mode 100644
index 0000000..4c8bd15
--- /dev/null
+++ b/target/msm8610/include/target/display.h
@@ -0,0 +1,44 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _TARGET_MSM8610_DISPLAY_H
+#define _TARGET_MSM8610_DISPLAY_H
+
+#define MIPI_FB_ADDR 0x0D200000
+
+#define MIPI_HSYNC_PULSE_WIDTH 8
+#define MIPI_HSYNC_BACK_PORCH_DCLK 40
+#define MIPI_HSYNC_FRONT_PORCH_DCLK 160
+
+#define MIPI_VSYNC_PULSE_WIDTH 2
+#define MIPI_VSYNC_BACK_PORCH_LINES 10
+#define MIPI_VSYNC_FRONT_PORCH_LINES 12
+
+extern int mdss_dsi_v2_phy_init(struct mipi_dsi_panel_config *);
+#endif
diff --git a/target/msm8610/init.c b/target/msm8610/init.c
index 6537a4d..92c9855 100644
--- a/target/msm8610/init.c
+++ b/target/msm8610/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <reg.h>
#include <target.h>
#include <platform.h>
@@ -48,9 +49,25 @@
#define TLMM_VOL_UP_BTN_GPIO 72
-static uint32_t mmc_sdc_base[] =
+enum target_subtype {
+ HW_PLATFORM_SUBTYPE_SKUAA = 1,
+ HW_PLATFORM_SUBTYPE_SKUF = 2,
+ HW_PLATFORM_SUBTYPE_SKUAB = 3,
+};
+
+static void set_sdc_power_ctrl(void);
+
+static uint32_t mmc_pwrctl_base[] =
{ MSM_SDC1_BASE, MSM_SDC2_BASE };
+static uint32_t mmc_sdhci_base[] =
+ { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
+
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
+
+struct mmc_device *dev;
+
void target_early_init(void)
{
#if WITH_DEBUG_UART
@@ -92,33 +109,60 @@
keys_post_event(KEY_VOLUMEUP, 1);
}
+void target_sdc_init()
+{
+ struct mmc_config_data config;
+
+ /* Set drive strength & pull ctrl values */
+ set_sdc_power_ctrl();
+
+ /* Display splash screen if enabled */
+ dprintf(SPEW, "Display Init: Start\n");
+ display_init();
+ dprintf(SPEW, "Display Init: Done\n");
+
+
+ config.bus_width = DATA_BUS_WIDTH_8BIT;
+ config.max_clk_rate = MMC_CLK_200MHZ;
+
+ /* Try slot 1*/
+ config.slot = 1;
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
+ if (!(dev = mmc_init(&config)))
+ {
+ /* Try slot 2 */
+ config.slot = 2;
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
+ if (!(dev = mmc_init(&config)))
+ {
+ dprintf(CRITICAL, "mmc init failed!");
+ ASSERT(0);
+ }
+ }
+
+ /* MMC initialization is complete, read the partition table info */
+ if (partition_read_table())
+ {
+ dprintf(CRITICAL, "Error reading the partition table info\n");
+ ASSERT(0);
+ }
+}
+
void target_init(void)
{
- uint32_t base_addr;
- uint8_t slot;
-
dprintf(INFO, "target_init()\n");
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
target_keystatus();
- /* Trying Slot 1*/
- slot = 1;
- base_addr = mmc_sdc_base[slot - 1];
-
- if (mmc_boot_main(slot, base_addr))
- {
- /* Trying Slot 2 next */
- slot = 2;
- base_addr = mmc_sdc_base[slot - 1];
-
- if (mmc_boot_main(slot, base_addr))
- {
- dprintf(CRITICAL, "mmc init failed!");
- ASSERT(0);
- }
- }
+ target_sdc_init();
}
/* Do any target specific intialization needed before entering fastboot mode */
@@ -131,7 +175,10 @@
/* Detect the target type */
void target_detect(struct board_data *board)
{
- board->target = LINUX_MACHTYPE_UNKNOWN;
+ /*
+ * already fill the board->target on board.c
+ */
+
}
/* Detect the modem type */
@@ -152,6 +199,12 @@
{
case HW_PLATFORM_SUBTYPE_UNKNOWN:
break;
+ case HW_PLATFORM_SUBTYPE_SKUAA:
+ break;
+ case HW_PLATFORM_SUBTYPE_SKUF:
+ break;
+ case HW_PLATFORM_SUBTYPE_SKUAB:
+ break;
default:
dprintf(CRITICAL, "Platform Subtype : %u is not supported\n", platform_subtype);
ASSERT(0);
@@ -214,6 +267,23 @@
dprintf(CRITICAL, "Rebooting failed\n");
}
+int target_cont_splash_screen()
+{
+ int ret = 0;
+ switch(board_hardware_id())
+ {
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_QRD:
+ case HW_PLATFORM_SURF:
+ dprintf(SPEW, "Target_cont_splash=0\n");
+ ret = 0;
+ default:
+ dprintf(SPEW, "Target_cont_splash=0\n");
+ ret = 0;
+ }
+ return ret;
+}
+
unsigned target_pause_for_battery_charge(void)
{
uint8_t pon_reason = pm8x41_get_pon_reason();
@@ -258,13 +328,30 @@
return 0;
}
-/*
- * Function to set the capabilities for the host
- */
-void target_mmc_caps(struct mmc_host *host)
+static void set_sdc_power_ctrl()
{
- host->caps.ddr_mode = 0;
- host->caps.hs200_mode = 0;
- host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
- host->caps.hs_clk_rate = MMC_CLK_50MHZ;
+ /* Drive strength configs for sdc pins */
+ struct tlmm_cfgs sdc1_hdrv_cfg[] =
+ {
+ { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK },
+ { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+ { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+ };
+
+ /* Pull configs for sdc pins */
+ struct tlmm_cfgs sdc1_pull_cfg[] =
+ {
+ { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK },
+ { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+ { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+ };
+
+ /* Set the drive strength & pull control values */
+ tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
+ tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
+}
+
+struct mmc_device *target_mmc_device()
+{
+ return dev;
}
diff --git a/target/msm8610/rules.mk b/target/msm8610/rules.mk
index 2d9f6fa..92c669f 100644
--- a/target/msm8610/rules.mk
+++ b/target/msm8610/rules.mk
@@ -14,10 +14,15 @@
RAMDISK_ADDR := BASE_ADDR+0x01000000
SCRATCH_ADDR := 0x0E000000
+DEFINES += DISPLAY_TYPE_8610=1
+DEFINES += DISPLAY_SPLASH_SCREEN=1
+DEFINES += DISPLAY_TYPE_MIPI=1
+
MODULES += \
dev/keys \
lib/ptable \
dev/pmic/pm8x41 \
+ dev/panel/msm \
lib/libfdt
DEFINES += \
@@ -32,4 +37,5 @@
OBJS += \
$(LOCAL_DIR)/init.o \
- $(LOCAL_DIR)/meminfo.o
+ $(LOCAL_DIR)/meminfo.o \
+ $(LOCAL_DIR)/target_display.o
diff --git a/target/msm8610/target_display.c b/target/msm8610/target_display.c
new file mode 100644
index 0000000..6316fa8
--- /dev/null
+++ b/target/msm8610/target_display.c
@@ -0,0 +1,204 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <debug.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <pm8x41.h>
+#include <pm8x41_wled.h>
+#include <board.h>
+#include <platform/gpio.h>
+#include <platform/iomap.h>
+#include <target/display.h>
+
+static struct msm_fb_panel_data panel;
+static uint8_t display_enable;
+
+extern int msm_display_init(struct msm_fb_panel_data *pdata);
+extern int msm_display_off();
+extern void dsi_phy_init(struct msm_panel_info *pinfo);
+
+static int msm8610_backlight(uint8_t enable)
+{
+ struct pm8x41_mpp mpp;
+ mpp.base = PM8x41_MMP3_BASE;
+ mpp.mode = MPP_HIGH;
+ mpp.vin = MPP_VIN3;
+ if (enable)
+ {
+ pm8x41_config_output_mpp(&mpp);
+ pm8x41_enable_mpp(&mpp, MPP_ENABLE);
+ } else {
+ pm8x41_enable_mpp(&mpp, MPP_DISABLE);
+ }
+ /* Need delay before power on regulators */
+ mdelay(20);
+ return 0;
+}
+
+void dsi_calc_clk_rate(uint32_t *dsiclk_rate, uint32_t *byteclk_rate)
+{
+ uint32_t hbp, hfp, vbp, vfp, hspw, vspw, width, height;
+ uint32_t bitclk_rate;
+ int frame_rate, lanes;
+
+ width = panel.panel_info.xres;
+ height = panel.panel_info.yres;
+ hbp = panel.panel_info.lcdc.h_back_porch;
+ hfp = panel.panel_info.lcdc.h_front_porch;
+ hspw = panel.panel_info.lcdc.h_pulse_width;
+ vbp = panel.panel_info.lcdc.v_back_porch;
+ vfp = panel.panel_info.lcdc.v_front_porch;
+ vspw = panel.panel_info.lcdc.v_pulse_width;
+ lanes = panel.panel_info.mipi.num_of_lanes;
+ frame_rate = panel.panel_info.mipi.frame_rate;
+
+ bitclk_rate = (width + hbp + hfp + hspw) * (height + vbp + vfp + vspw);
+ bitclk_rate *= frame_rate;
+ bitclk_rate *= panel.panel_info.bpp;
+ bitclk_rate /= lanes;
+
+ *byteclk_rate = bitclk_rate / 8;
+ *dsiclk_rate = *byteclk_rate * lanes;
+}
+
+static int msm8610_mdss_dsi_panel_clock(uint8_t enable)
+{
+ uint32_t dsiclk_rate, byteclk_rate;
+
+ if (enable)
+ {
+ mdp_clock_enable();
+ dsi_calc_clk_rate(&dsiclk_rate, &byteclk_rate);
+ dsi_clock_enable(dsiclk_rate, byteclk_rate);
+ } else if(!target_cont_splash_screen()) {
+ dsi_clock_disable();
+ mdp_clock_disable();
+ }
+
+ return 0;
+}
+
+static void msm8610_mdss_mipi_panel_reset(int enable)
+{
+ dprintf(SPEW, "msm8610_mdss_mipi_panel_reset, enable = %d\n", enable);
+
+ if (enable)
+ {
+ gpio_tlmm_config(41, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
+ gpio_tlmm_config(7, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
+
+ /* reset */
+ gpio_set(41, 2);
+ mdelay(20);
+ gpio_set(41, 0);
+ udelay(20);
+ gpio_set(41, 2);
+ mdelay(20);
+
+ if (panel.panel_info.type == MIPI_VIDEO_PANEL)
+ gpio_set(7, 2);
+ else if (panel.panel_info.type == MIPI_CMD_PANEL)
+ gpio_set(7, 0);
+ } else if(!target_cont_splash_screen()) {
+ gpio_set(7, 0);
+ gpio_set(41, 0);
+ }
+ return;
+}
+
+static int msm8610_mipi_panel_power(uint8_t enable)
+{
+ int ret;
+ struct pm8x41_ldo ldo14 = LDO(PM8x41_LDO14, PLDO_TYPE);
+ struct pm8x41_ldo ldo19 = LDO(PM8x41_LDO19, PLDO_TYPE);
+
+ dprintf(SPEW, "msm8610_mipi_panel_power, enable = %d\n", enable);
+ if (enable)
+ {
+ /* backlight */
+ msm8610_backlight(enable);
+
+ /* regulators */
+ pm8x41_ldo_set_voltage(&ldo14, 1800000);
+ pm8x41_ldo_control(&ldo14, enable);
+ pm8x41_ldo_set_voltage(&ldo19, 2850000);
+ pm8x41_ldo_control(&ldo19, enable);
+
+ /* reset */
+ msm8610_mdss_mipi_panel_reset(enable);
+ } else if(!target_cont_splash_screen()) {
+ msm8610_backlight(0);
+ msm8610_mdss_mipi_panel_reset(enable);
+
+ pm8x41_ldo_control(&ldo19, enable);
+ pm8x41_ldo_control(&ldo14, enable);
+ }
+ return 0;
+}
+
+void display_init(void)
+{
+ uint32_t hw_id = board_hardware_id();
+
+ dprintf(SPEW, "display_init(),target_id=%d.\n", hw_id);
+
+ switch (hw_id) {
+ case HW_PLATFORM_QRD:
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ mipi_truly_video_wvga_init(&(panel.panel_info));
+ panel.clk_func = msm8610_mdss_dsi_panel_clock;
+ panel.power_func = msm8610_mipi_panel_power;
+ panel.fb.base = MIPI_FB_ADDR;
+ panel.fb.width = panel.panel_info.xres;
+ panel.fb.height = panel.panel_info.yres;
+ panel.fb.stride = panel.panel_info.xres;
+ panel.fb.bpp = panel.panel_info.bpp;
+ panel.fb.format = FB_FORMAT_RGB888;
+ panel.mdp_rev = MDP_REV_304;
+ break;
+ default:
+ return;
+ };
+
+ if (msm_display_init(&panel))
+ {
+ dprintf(CRITICAL, "Display init failed!\n");
+ return;
+ }
+
+ display_enable = 1;
+}
+
+void display_shutdown(void)
+{
+ if (display_enable)
+ msm_display_off();
+}
diff --git a/target/msm8974/init.c b/target/msm8974/init.c
index 35e0add..b5fbf82 100644
--- a/target/msm8974/init.c
+++ b/target/msm8974/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <platform/gpio.h>
#include <reg.h>
#include <target.h>
@@ -70,6 +71,8 @@
#define CE_FIFO_SIZE 64
#define CE_READ_PIPE 3
#define CE_WRITE_PIPE 2
+#define CE_READ_PIPE_LOCK_GRP 0
+#define CE_WRITE_PIPE_LOCK_GRP 0
#define CE_ARRAY_SIZE 20
#ifdef SSD_ENABLE
@@ -77,6 +80,10 @@
#define SSD_PARTITION_SIZE 8192
#endif
+#define FASTBOOT_MODE 0x77665500
+
+#define BOARD_SOC_VERSION1(soc_rev) (soc_rev >= 0x10000 && soc_rev < 0x20000)
+
#if MMC_SDHCI_SUPPORT
static uint32_t mmc_sdhci_base[] =
{ MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE, MSM_SDC3_SDHCI_BASE, MSM_SDC4_SDHCI_BASE };
@@ -85,6 +92,9 @@
static uint32_t mmc_sdc_base[] =
{ MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE };
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ, SDCC3_PWRCTL_IRQ, SDCC4_PWRCTL_IRQ };
+
void target_early_init(void)
{
#if WITH_DEBUG_UART
@@ -92,6 +102,27 @@
#endif
}
+/* Check for 8974 chip */
+static int target_is_8974()
+{
+ uint32_t platform = board_platform_id();
+ int ret = 0;
+
+ switch(platform)
+ {
+ case APQ8074:
+ case MSM8274:
+ case MSM8674:
+ case MSM8974:
+ ret = 1;
+ break;
+ default:
+ ret = 0;
+ };
+
+ return ret;
+}
+
/* Return 1 if vol_up pressed */
static int target_volume_up()
{
@@ -123,8 +154,8 @@
uint32_t target_volume_down()
{
/* Volume down button is tied in with RESIN on MSM8974. */
- if (pmic_ver == PMIC_VERSION_V2)
- return pm8x41_resin_bark_workaround_status();
+ if (target_is_8974() && (pmic_ver == PM8X41_VERSION_V2))
+ return pm8x41_v2_resin_status();
else
return pm8x41_resin_status();
}
@@ -151,9 +182,11 @@
ce_params.bam_base = MSM_CE2_BAM_BASE;
/* Set up BAM config. */
- ce_params.bam_ee = CE_EE;
- ce_params.pipes.read_pipe = CE_READ_PIPE;
- ce_params.pipes.write_pipe = CE_WRITE_PIPE;
+ ce_params.bam_ee = CE_EE;
+ ce_params.pipes.read_pipe = CE_READ_PIPE;
+ ce_params.pipes.write_pipe = CE_WRITE_PIPE;
+ ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
+ ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
/* Assign buffer sizes. */
ce_params.num_ce = CE_ARRAY_SIZE;
@@ -175,14 +208,11 @@
}
#if MMC_SDHCI_SUPPORT
-static target_mmc_sdhci_init()
+static void target_mmc_sdhci_init()
{
- struct mmc_config_data config;
+ struct mmc_config_data config = {0};
uint32_t soc_ver = 0;
- /* Enable sdhci mode */
- sdhci_mode_enable(1);
-
soc_ver = board_soc_version();
/*
@@ -192,10 +222,10 @@
switch(board_hardware_id())
{
case HW_PLATFORM_FLUID:
- if (soc_ver >= BOARD_SOC_VERSION2)
- config.bus_width = DATA_BUS_WIDTH_8BIT;
- else
+ if (target_is_8974() && BOARD_SOC_VERSION1(soc_ver))
config.bus_width = DATA_BUS_WIDTH_4BIT;
+ else
+ config.bus_width = DATA_BUS_WIDTH_8BIT;
break;
default:
config.bus_width = DATA_BUS_WIDTH_8BIT;
@@ -205,12 +235,17 @@
/* Trying Slot 1*/
config.slot = 1;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_sdc_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
if (!(dev = mmc_init(&config))) {
/* Trying Slot 2 next */
config.slot = 2;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_sdc_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
if (!(dev = mmc_init(&config))) {
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
@@ -230,8 +265,9 @@
{
return dev;
}
+
#else
-static target_mmc_mci_init()
+static void target_mmc_mci_init()
{
uint32_t base_addr;
uint8_t slot;
@@ -268,10 +304,10 @@
switch(board_hardware_id())
{
case HW_PLATFORM_FLUID:
- if (soc_ver >= BOARD_SOC_VERSION2)
- host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
- else
+ if (target_is_8974() && BOARD_SOC_VERSION1(soc_ver))
host->caps.bus_width = MMC_BOOT_BUS_WIDTH_4_BIT;
+ else
+ host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
break;
default:
host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
@@ -393,10 +429,8 @@
*/
switch(platform_subtype) {
case HW_PLATFORM_SUBTYPE_UNKNOWN:
+ case HW_PLATFORM_SUBTYPE_8974PRO_PM8084:
break;
- case HW_PLATFORM_SUBTYPE_MDM:
- board->baseband = BASEBAND_MDM;
- return;
default:
dprintf(CRITICAL, "Platform Subtype : %u is not supported\n",platform_subtype);
ASSERT(0);
@@ -406,9 +440,21 @@
case MSM8974:
case MSM8274:
case MSM8674:
+ case MSM8274AA:
+ case MSM8274AB:
+ case MSM8274AC:
+ case MSM8674AA:
+ case MSM8674AB:
+ case MSM8674AC:
+ case MSM8974AA:
+ case MSM8974AB:
+ case MSM8974AC:
board->baseband = BASEBAND_MSM;
break;
case APQ8074:
+ case APQ8074AA:
+ case APQ8074AB:
+ case APQ8074AC:
board->baseband = BASEBAND_APQ;
break;
default:
@@ -439,10 +485,10 @@
soc_ver = board_soc_version();
- if (soc_ver >= BOARD_SOC_VERSION2)
- restart_reason_addr = RESTART_REASON_ADDR_V2;
- else
+ if (target_is_8974() && BOARD_SOC_VERSION1(soc_ver))
restart_reason_addr = RESTART_REASON_ADDR;
+ else
+ restart_reason_addr = RESTART_REASON_ADDR_V2;
/* Read reboot reason and scrub it */
restart_reason = readl(restart_reason_addr);
@@ -454,20 +500,26 @@
void reboot_device(unsigned reboot_reason)
{
uint32_t soc_ver = 0;
+ uint8_t reset_type = 0;
soc_ver = board_soc_version();
/* Write the reboot reason */
- if (soc_ver >= BOARD_SOC_VERSION2)
- writel(reboot_reason, RESTART_REASON_ADDR_V2);
- else
+ if (target_is_8974() && BOARD_SOC_VERSION1(soc_ver))
writel(reboot_reason, RESTART_REASON_ADDR);
+ else
+ writel(reboot_reason, RESTART_REASON_ADDR_V2);
+
+ if(reboot_reason == FASTBOOT_MODE)
+ reset_type = PON_PSHOLD_WARM_RESET;
+ else
+ reset_type = PON_PSHOLD_HARD_RESET;
/* Configure PMIC for warm reset */
- if (pmic_ver == PMIC_VERSION_V2)
- pm8x41_v2_reset_configure(PON_PSHOLD_WARM_RESET);
+ if (target_is_8974() && (pmic_ver == PM8X41_VERSION_V2))
+ pm8x41_v2_reset_configure(reset_type);
else
- pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
+ pm8x41_reset_configure(reset_type);
/* Disable Watchdog Debug.
* Required becuase of a H/W bug which causes the system to
@@ -496,9 +548,20 @@
return 0;
}
+/* Check if MSM needs VBUS mimic for USB */
+static int target_needs_vbus_mimic()
+{
+ if (target_is_8974())
+ return 0;
+
+ return 1;
+}
+
/* Do target specific usb initialization */
void target_usb_init(void)
{
+ uint32_t val;
+
/* Enable secondary USB PHY on DragonBoard8074 */
if (board_hardware_id() == HW_PLATFORM_DRAGON) {
/* Route ChipIDea to use secondary USB HS port2 */
@@ -524,6 +587,21 @@
writel_relaxed(((readl_relaxed(USB_PORTSC) & 0xC0000000)
| 0x8c000004), USB_PORTSC);
}
+
+ if (target_needs_vbus_mimic())
+ {
+ /* Select and enable external configuration with USB PHY */
+ ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET);
+
+ /* Enable sess_vld */
+ val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN;
+ writel(val, USB_GENCONFIG_2);
+
+ /* Enable external vbus configuration in the LINK */
+ val = readl(USB_USBCMD);
+ val |= SESS_VLD_CTRL;
+ writel(val, USB_USBCMD);
+ }
}
/* Returns 1 if target supports continuous splash screen. */
@@ -574,7 +652,7 @@
dprintf(CRITICAL, "Going down for shutdown.\n");
/* Configure PMIC for shutdown. */
- if (pmic_ver == PMIC_VERSION_V2)
+ if (target_is_8974() && (pmic_ver == PM8X41_VERSION_V2))
pm8x41_v2_reset_configure(PON_PSHOLD_SHUTDOWN);
else
pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
@@ -614,3 +692,12 @@
{
return _emmc_recovery_init();
}
+
+void target_usb_stop(void)
+{
+ uint32_t platform = board_platform_id();
+
+ /* Disable VBUS mimicing in the controller. */
+ if (target_needs_vbus_mimic())
+ ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR);
+}
diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index 34650cc..d612015 100644
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -59,6 +59,18 @@
static int msm8974_backlight_on()
{
+ uint32_t platform_id = board_platform_id();
+ uint32_t hardware_id = board_hardware_id();
+ uint8_t slave_id = 1, i;
+ struct board_pmic_data *pmic_info;
+
+ if (platform_id == MSM8974AC)
+ if ((hardware_id == HW_PLATFORM_SURF)
+ || (hardware_id == HW_PLATFORM_MTP)
+ || (hardware_id == HW_PLATFORM_LIQUID))
+ slave_id = 3;
+
+ pm8x41_wled_config_slave_id(slave_id);
pm8x41_wled_config(&wled_ctrl);
pm8x41_wled_sink_control(1);
pm8x41_wled_iled_sync_control(1);
@@ -108,27 +120,40 @@
/* Pull DISP_RST_N high to get panel out of reset */
static void msm8974_mdss_mipi_panel_reset(uint8_t enable)
{
- struct pm8x41_gpio gpio19_param = {
+ uint32_t rst_gpio = 19;
+ uint32_t platform_id = board_platform_id();
+ uint32_t hardware_id = board_hardware_id();
+
+ struct pm8x41_gpio gpio_param = {
.direction = PM_GPIO_DIR_OUT,
.output_buffer = PM_GPIO_OUT_CMOS,
.out_strength = PM_GPIO_OUT_DRIVE_MED,
};
- pm8x41_gpio_config(19, &gpio19_param);
+ if (platform_id == MSM8974AC)
+ if ((hardware_id == HW_PLATFORM_SURF)
+ || (hardware_id == HW_PLATFORM_MTP)
+ || (hardware_id == HW_PLATFORM_LIQUID))
+ rst_gpio = 20;
+
+ dprintf(SPEW, "platform_id: %u, rst_gpio: %u\n",
+ platform_id, rst_gpio);
+
+ pm8x41_gpio_config(rst_gpio, &gpio_param);
if (enable) {
gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_HIGH);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_HIGH);
mdelay(2);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_LOW);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
mdelay(5);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_HIGH);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_HIGH);
mdelay(2);
gpio_set(58, 2);
} else {
- gpio19_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
- pm8x41_gpio_config(19, &gpio19_param);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_LOW);
+ gpio_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
+ pm8x41_gpio_config(rst_gpio, &gpio_param);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
gpio_set(58, 2);
}
}