Merge "target: apq8084: Add support for new soc apq8084."
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 50e1425..2f8aff1 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -69,8 +69,6 @@
#include "scm.h"
extern bool target_use_signed_kernel(void);
-extern void dsb();
-extern void isb();
extern void platform_uninit(void);
extern void target_uninit(void);
@@ -121,7 +119,7 @@
/* Assuming unauthorized kernel image by default */
static int auth_kernel_img = 0;
-static device_info device = {DEVICE_MAGIC, 0, 0};
+static device_info device = {DEVICE_MAGIC, 0, 0, 0};
struct atag_ptbl_entry
{
@@ -155,6 +153,7 @@
};
char max_download_size[MAX_RSP_SIZE];
+char charger_screen_enabled[MAX_RSP_SIZE];
char sn_buf[13];
extern int emmc_recovery_init(void);
@@ -213,7 +212,8 @@
cmdline_len += strlen(ffbm_mode_string);
/* reduce kernel console messages to speed-up boot */
cmdline_len += strlen(loglevel);
- } else if (target_pause_for_battery_charge()) {
+ } else if (device.charger_screen_enabled &&
+ target_pause_for_battery_charge()) {
pause_at_bootup = 1;
cmdline_len += strlen(battchg_pause);
}
@@ -1194,6 +1194,7 @@
memcpy(info->magic, DEVICE_MAGIC, DEVICE_MAGIC_SIZE);
info->is_unlocked = 0;
info->is_tampered = 0;
+ info->charger_screen_enabled = 0;
write_device_info_mmc(info);
}
@@ -1836,6 +1837,22 @@
reboot_device(FASTBOOT_MODE);
}
+void cmd_oem_enable_charger_screen(const char *arg, void *data, unsigned size)
+{
+ dprintf(INFO, "Enabling charger screen check\n");
+ device.charger_screen_enabled = 1;
+ write_device_info(&device);
+ fastboot_okay("");
+}
+
+void cmd_oem_disable_charger_screen(const char *arg, void *data, unsigned size)
+{
+ dprintf(INFO, "Disabling charger screen check\n");
+ device.charger_screen_enabled = 0;
+ write_device_info(&device);
+ fastboot_okay("");
+}
+
void cmd_oem_unlock(const char *arg, void *data, unsigned sz)
{
if(!device.is_unlocked)
@@ -1849,9 +1866,11 @@
void cmd_oem_devinfo(const char *arg, void *data, unsigned sz)
{
char response[64];
- snprintf(response, 64, "\tDevice tampered: %s", (device.is_tampered ? "true" : "false"));
+ snprintf(response, sizeof(response), "\tDevice tampered: %s", (device.is_tampered ? "true" : "false"));
fastboot_info(response);
- snprintf(response, 64, "\tDevice unlocked: %s", (device.is_unlocked ? "true" : "false"));
+ snprintf(response, sizeof(response), "\tDevice unlocked: %s", (device.is_unlocked ? "true" : "false"));
+ fastboot_info(response);
+ snprintf(response, sizeof(response), "\tCharger screen enabled: %s", (device.charger_screen_enabled ? "true" : "false"));
fastboot_info(response);
fastboot_okay("");
}
@@ -1971,7 +1990,10 @@
fastboot_register("oem unlock", cmd_oem_unlock);
fastboot_register("oem device-info", cmd_oem_devinfo);
fastboot_register("preflash", cmd_preflash);
-
+ fastboot_register("oem enable-charger-screen",
+ cmd_oem_enable_charger_screen);
+ fastboot_register("oem disable-charger-screen",
+ cmd_oem_disable_charger_screen);
/* publish variables and their values */
fastboot_publish("product", TARGET(BOARD));
fastboot_publish("kernel", "lk");
@@ -1987,8 +2009,14 @@
publish_getvar_partition_info(part_info, ARRAY_SIZE(part_info));
/* Max download size supported */
- snprintf(max_download_size, MAX_RSP_SIZE, "\t0x%x", target_get_max_flash_size());
+ snprintf(max_download_size, MAX_RSP_SIZE, "\t0x%x",
+ target_get_max_flash_size());
fastboot_publish("max-download-size", (const char *) max_download_size);
+ /* Is the charger screen check enabled */
+ snprintf(charger_screen_enabled, MAX_RSP_SIZE, "%d",
+ device.charger_screen_enabled);
+ fastboot_publish("charger-screen-enabled",
+ (const char *) charger_screen_enabled);
}
void aboot_init(const struct app_descriptor *app)
@@ -2010,11 +2038,7 @@
ASSERT((MEMBASE + MEMSIZE) > MEMBASE);
- if(target_use_signed_kernel())
- {
- read_device_info(&device);
-
- }
+ read_device_info(&device);
target_serialno((unsigned char *) sn_buf);
dprintf(SPEW,"serial number: %s\n",sn_buf);
diff --git a/app/aboot/devinfo.h b/app/aboot/devinfo.h
index 1d87581..558aaf9 100644
--- a/app/aboot/devinfo.h
+++ b/app/aboot/devinfo.h
@@ -40,6 +40,7 @@
unsigned char magic[DEVICE_MAGIC_SIZE];
bool is_unlocked;
bool is_tampered;
+ bool charger_screen_enabled;
};
#endif
diff --git a/arch/arm/include/arch/defines.h b/arch/arm/include/arch/defines.h
index 2041f39..d08988e 100644
--- a/arch/arm/include/arch/defines.h
+++ b/arch/arm/include/arch/defines.h
@@ -41,5 +41,12 @@
#endif
#define IS_CACHE_LINE_ALIGNED(addr) !((uint32_t) (addr) & (CACHE_LINE - 1))
+
+#if ARM_ISA_ARMV7
+#define dsb() __asm__ volatile ("dsb" : : : "memory");
+#elif ARM_ISA_ARMV6
+#define dsb() __asm__ volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0): "memory");
+#endif
+
#endif
diff --git a/arch/arm/mmu.c b/arch/arm/mmu.c
index 3fc61bf..2027b41 100644
--- a/arch/arm/mmu.c
+++ b/arch/arm/mmu.c
@@ -25,6 +25,7 @@
#include <compiler.h>
#include <arch.h>
#include <arch/arm.h>
+#include <arch/defines.h>
#include <arch/arm/mmu.h>
#if ARM_WITH_MMU
@@ -94,6 +95,10 @@
void arch_disable_mmu(void)
{
+ /* Ensure all memory access are complete
+ * before disabling MMU
+ */
+ dsb();
arm_write_cr1(arm_read_cr1() & ~(1<<0));
arm_invalidate_tlb();
}
diff --git a/arch/arm/ops.S b/arch/arm/ops.S
index 2581273..6b9d966 100644
--- a/arch/arm/ops.S
+++ b/arch/arm/ops.S
@@ -209,6 +209,12 @@
/* void arm_write_cr1(uint32_t val) */
FUNCTION(arm_write_cr1)
mcr p15, 0, r0, c1, c0, 0
+#if ARM_CPU_CORTEX_A8
+ isb sy
+#elif ARM_CPU_ARM1136
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 4
+#endif
bx lr
/* uint32_t arm_read_cr1_aux(void) */
@@ -235,6 +241,18 @@
FUNCTION(arm_invalidate_tlb)
mov r0, #0
mcr p15, 0, r0, c8, c7, 0
+#if ARM_CPU_CORTEX_A8
+ dsb sy
+#elif ARM_CPU_ARM1136
+ mov r0, #0
+ mcr p15, 0, r0, c7, c10, 4
+#endif
+#if ARM_CPU_CORTEX_A8
+ isb sy
+#elif ARM_CPU_ARM1136
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 4
+#endif
bx lr
/* void arch_switch_stacks_and_call(addr_t call, addr_t stack) */
@@ -252,26 +270,6 @@
#endif
bx lr
-/*void isb(void) */
-FUNCTION(isb)
-#if ARM_CPU_CORTEX_A8
- isb sy
-#elif ARM_CPU_ARM1136
- mov r0, #0
- mcr p15, 0, r0, c7, c5, 4
-#endif
- bx lr
-
-/*void dsb(void) */
-FUNCTION(dsb)
-#if ARM_CPU_CORTEX_A8
- dsb sy
-#elif ARM_CPU_ARM1136
- mov r0, #0
- mcr p15, 0, r0, c7, c10, 4
-#endif
- bx lr
-
/* uint32_t arm_read_cycle_count(void); */
FUNCTION(arm_read_cycle_count)
diff --git a/dev/gcdb/display/include/panel_nt35521_720p_video.h b/dev/gcdb/display/include/panel_nt35521_720p_video.h
index e9e4104..ae70a50 100644
--- a/dev/gcdb/display/include/panel_nt35521_720p_video.h
+++ b/dev/gcdb/display/include/panel_nt35521_720p_video.h
@@ -1185,6 +1185,9 @@
0x53, 0x2C, 0xFF, 0xFF, };
+static char nt35521_720p_video_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0xFF, 0xFF, 0xFF, };
static struct mipi_dsi_cmd nt35521_720p_video_on_command[] = {
@@ -1392,9 +1395,10 @@
{ 0x4 , nt35521_720p_video_on_cmd201},
{ 0xc , nt35521_720p_video_on_cmd202},
{ 0xc , nt35521_720p_video_on_cmd203},
-{ 0x8 , nt35521_720p_video_on_cmd204}
+{ 0x8 , nt35521_720p_video_on_cmd204},
+{ 0x8 , nt35521_720p_video_on_cmd205}
};
-#define NT35521_720P_VIDEO_ON_COMMAND 205
+#define NT35521_720P_VIDEO_ON_COMMAND 206
static char nt35521_720p_videooff_cmd0[] = {
diff --git a/dev/panel/msm/mipi_hx8379a_video_wvga.c b/dev/panel/msm/mipi_hx8379a_video_wvga.c
new file mode 100644
index 0000000..de04f2f
--- /dev/null
+++ b/dev/panel/msm/mipi_hx8379a_video_wvga.c
@@ -0,0 +1,263 @@
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <debug.h>
+#include <target/display.h>
+#include <platform/iomap.h>
+
+#define WVGA_MIPI_FB_WIDTH 480
+#define WVGA_MIPI_FB_HEIGHT 800
+
+#define HX8379A_PANEL_FRAME_RATE 60
+#define HX8379A_PANEL_NUM_OF_LANES 2
+#define HX8379A_PANEL_LANE_SWAP 1
+#define HX8379A_PANEL_T_CLK_PRE 0x41b
+#define HX8379A_PANEL_T_CLK_POST 0x0
+#define HX8379A_PANEL_BPP 24
+#define HX8379A_PANEL_CLK_RATE 499000000
+
+#define MIPI_HSYNC_PULSE_WIDTH 17
+#define MIPI_HSYNC_BACK_PORCH_DCLK 90
+#define MIPI_HSYNC_FRONT_PORCH_DCLK 90
+#define MIPI_VSYNC_PULSE_WIDTH 6
+#define MIPI_VSYNC_BACK_PORCH_LINES 10
+#define MIPI_VSYNC_FRONT_PORCH_LINES 15
+
+static char disp_on0[8] = {
+ 0x04, 0x00, 0x39, 0xC0,
+ 0xB9, 0xFF, 0x83, 0x79
+};
+static char disp_on1[4] = {
+ 0xBA, 0x51, 0x23, 0x80,
+};
+static char disp_on2[8] = {
+ 0x04, 0x00, 0x39, 0xC0,
+ 0xDE, 0x05, 0x50, 0x04
+};
+static char disp_on3[24] = {
+ 0x14, 0x00, 0x39, 0xC0,
+ 0xB1, 0x00, 0x50, 0x44,
+ 0xEA, 0x8D, 0x08, 0x11,
+ 0x11, 0x11, 0x27, 0x2F,
+ 0x9A, 0x1A, 0x42, 0x0B,
+ 0x6E, 0xF1, 0x00, 0xE6
+};
+static char disp_on4[20] = {
+ 0x0E, 0x00, 0x39, 0xC0,
+ 0xB2, 0x00, 0x00, 0x3C,
+ 0x08, 0x04, 0x19, 0x22,
+ 0x00, 0xFF, 0x08, 0x04,
+ 0x19, 0x20, 0xFF, 0xFF
+};
+static char disp_on5[36] = {
+ 0x20, 0x00, 0x39, 0xC0,
+ 0xB4, 0x82, 0x08, 0x00,
+ 0x32, 0x10, 0x03, 0x32,
+ 0x13, 0x70, 0x32, 0x10,
+ 0x08, 0x37, 0x01, 0x28,
+ 0x07, 0x37, 0x08, 0x3A,
+ 0x08, 0x42, 0x42, 0x08,
+ 0x00, 0x40, 0x08, 0x28,
+ 0x08, 0x30, 0x30, 0x04
+};
+static char disp_on6[52] = {
+ 0x30, 0x00, 0x39, 0xC0,
+ 0xD5, 0x00, 0x00, 0x0A,
+ 0x00, 0x01, 0x05, 0x00,
+ 0x03, 0x00, 0x88, 0x88,
+ 0x88, 0x88, 0x23, 0x01,
+ 0x67, 0x45, 0x02, 0x13,
+ 0x88, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x54, 0x76,
+ 0x10, 0x32, 0x31, 0x20,
+ 0x88, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+};
+static char disp_on7[40] = {
+ 0x24, 0x00, 0x39, 0xC0,
+ 0xE0, 0x79, 0x05, 0x0F,
+ 0x14, 0x26, 0x29, 0x3F,
+ 0x2B, 0x46, 0x04, 0x0E,
+ 0x12, 0x15, 0x18, 0x16,
+ 0x16, 0x11, 0x17, 0x05,
+ 0x0F, 0x14, 0x26, 0x29,
+ 0x3F, 0x2B, 0x46, 0x04,
+ 0x0E, 0x12, 0x15, 0x18,
+ 0x16, 0x16, 0x11, 0x17
+};
+static char disp_on8[4] = {
+ 0xCC, 0x02, 0x23, 0x80,
+};
+static char disp_on9[12] = {
+ 0x05, 0x00, 0x39, 0xC0,
+ 0xB6, 0x00, 0x9C, 0x00,
+ 0x9C, 0xFF, 0xFF, 0xFF
+};
+static char disp_on10[4] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+static char disp_on11[4] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd hx8379a_wvga_panel_video_mode_cmds[] = {
+ {sizeof(disp_on0), (char *)disp_on0},
+ {sizeof(disp_on1), (char *)disp_on1},
+ {sizeof(disp_on2), (char *)disp_on2},
+ {sizeof(disp_on3), (char *)disp_on3},
+ {sizeof(disp_on4), (char *)disp_on4},
+ {sizeof(disp_on5), (char *)disp_on5},
+ {sizeof(disp_on6), (char *)disp_on6},
+ {sizeof(disp_on7), (char *)disp_on7},
+ {sizeof(disp_on8), (char *)disp_on8},
+ {sizeof(disp_on9), (char *)disp_on9},
+ {sizeof(disp_on10), (char *)disp_on10},
+ {sizeof(disp_on11), (char *)disp_on11},
+};
+
+int mipi_hx8379a_video_wvga_config(void *pdata)
+{
+ int ret = NO_ERROR;
+ /* 2 Lanes -- Enables Data Lane0, 1 */
+ unsigned char lane_en = 3;
+ unsigned long low_pwr_stop_mode = 0;
+
+ /* Needed or else will have blank line at top of display */
+ unsigned char eof_bllp_pwr = 0x9;
+
+ unsigned char interleav = 0;
+ struct lcdc_panel_info *lcdc = NULL;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *) pdata;
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ lcdc = &(pinfo->lcdc);
+ if (lcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+ ret = mdss_dsi_video_mode_config((pinfo->xres),
+ (pinfo->yres),
+ (pinfo->xres),
+ (pinfo->yres),
+ (lcdc->h_front_porch),
+ (lcdc->h_back_porch),
+ (lcdc->v_front_porch),
+ (lcdc->v_back_porch),
+ (lcdc->h_pulse_width),
+ (lcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_en,
+ low_pwr_stop_mode,
+ eof_bllp_pwr,
+ interleav,
+ MIPI_DSI0_BASE);
+ return ret;
+}
+
+int mipi_hx8379a_video_wvga_on()
+{
+ int ret = NO_ERROR;
+ return ret;
+}
+
+int mipi_hx8379a_video_wvga_off()
+{
+ int ret = NO_ERROR;
+ return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
+ /* regulator */
+ {0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
+ /* timing */
+ {0x5d, 0x12, 0x0c, 0x00, 0x33, 0x39,
+ 0x10, 0x16, 0x15, 0x03, 0x04, 0x00},
+ /* phy ctrl */
+ {0x7f, 0x00, 0x00, 0x00},
+ /* strength */
+ {0xff, 0x06},
+ /* bist */
+ {0x03, 0x03, 0x00, 0x00, 0x0f, 0x00},
+ /* lane config */
+ { 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+ 0x40, 0x67, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00},
+};
+
+void mipi_hx8379a_video_wvga_init(struct msm_panel_info *pinfo)
+{
+ if (!pinfo)
+ return;
+
+ pinfo->xres = WVGA_MIPI_FB_WIDTH;
+ pinfo->yres = WVGA_MIPI_FB_HEIGHT;
+ pinfo->lcdc.h_back_porch = MIPI_HSYNC_BACK_PORCH_DCLK;
+ pinfo->lcdc.h_front_porch = MIPI_HSYNC_FRONT_PORCH_DCLK;
+ pinfo->lcdc.h_pulse_width = MIPI_HSYNC_PULSE_WIDTH;
+ pinfo->lcdc.v_back_porch = MIPI_VSYNC_BACK_PORCH_LINES;
+ pinfo->lcdc.v_front_porch = MIPI_VSYNC_FRONT_PORCH_LINES;
+ pinfo->lcdc.v_pulse_width = MIPI_VSYNC_PULSE_WIDTH;
+ pinfo->mipi.num_of_lanes = HX8379A_PANEL_NUM_OF_LANES;
+ pinfo->mipi.frame_rate = HX8379A_PANEL_FRAME_RATE;
+
+ pinfo->type = MIPI_VIDEO_PANEL;
+ pinfo->wait_cycle = 0;
+ pinfo->bpp = HX8379A_PANEL_BPP;
+ pinfo->clk_rate = HX8379A_PANEL_CLK_RATE;
+
+ pinfo->mipi.mode = DSI_VIDEO_MODE;
+ pinfo->mipi.traffic_mode = 2;
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+ pinfo->mipi.tx_eot_append = TRUE;
+
+ pinfo->mipi.lane_swap = HX8379A_PANEL_LANE_SWAP;
+ pinfo->mipi.t_clk_post = HX8379A_PANEL_T_CLK_POST;
+ pinfo->mipi.t_clk_pre = HX8379A_PANEL_T_CLK_PRE;
+ pinfo->mipi.panel_cmds = hx8379a_wvga_panel_video_mode_cmds;
+ pinfo->mipi.num_of_panel_cmds = ARRAY_SIZE(hx8379a_wvga_panel_video_mode_cmds);
+
+ pinfo->on = mipi_hx8379a_video_wvga_on;
+ pinfo->off = mipi_hx8379a_video_wvga_off;
+ pinfo->config = mipi_hx8379a_video_wvga_config;
+
+ return;
+};
diff --git a/dev/panel/msm/rules.mk b/dev/panel/msm/rules.mk
index 56e6815..510b476 100644
--- a/dev/panel/msm/rules.mk
+++ b/dev/panel/msm/rules.mk
@@ -37,5 +37,6 @@
ifeq ($(PLATFORM),msm8610)
OBJS += \
$(LOCAL_DIR)/mipi_truly_video_wvga.o \
- $(LOCAL_DIR)/mipi_truly_cmd_wvga.o
+ $(LOCAL_DIR)/mipi_truly_cmd_wvga.o \
+ $(LOCAL_DIR)/mipi_hx8379a_video_wvga.o
endif
diff --git a/platform/fsm9900/include/platform/iomap.h b/platform/fsm9900/include/platform/iomap.h
index c8fdcf9..4cc017b 100644
--- a/platform/fsm9900/include/platform/iomap.h
+++ b/platform/fsm9900/include/platform/iomap.h
@@ -85,6 +85,8 @@
#define BLSP2_UART4_BASE (PERIPH_SS_BASE + 0x00161000)
#define BLSP2_UART5_BASE (PERIPH_SS_BASE + 0x00162000)
+#define MSM_USB_BASE (PERIPH_SS_BASE + 0x00255000)
+
#define CLK_CTL_BASE 0xFC400000
#define GCC_WDOG_DEBUG (CLK_CTL_BASE + 0x00001780)
diff --git a/platform/msm8974/acpuclock.c b/platform/msm8974/acpuclock.c
index e162feb..5284d0f 100644
--- a/platform/msm8974/acpuclock.c
+++ b/platform/msm8974/acpuclock.c
@@ -524,3 +524,61 @@
ASSERT(0);
}
}
+
+void edp_clk_enable(void)
+{
+ int ret;
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_mmssnoc_axi_clk", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mmssnoc_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_s0_axi_clk", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mmss_s0_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure AXI clock */
+ ret = clk_get_set_enable("mdss_axi_clk", 100000000, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set mdss_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("edp_pixel_clk", 138500000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set edp_pixel_clk ret = %d\n",
+ ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("edp_link_clk", 270000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set edp_link_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("edp_aux_clk", 19200000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set edp_aux_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+}
+
+void edp_clk_disable(void)
+{
+
+ writel(0x0, MDSS_EDPPIXEL_CBCR);
+ writel(0x0, MDSS_EDPLINK_CBCR);
+ clk_disable(clk_get("edp_pixel_clk"));
+ clk_disable(clk_get("edp_link_clk"));
+ clk_disable(clk_get("edp_aux_clk"));
+}
diff --git a/platform/msm8974/include/platform/clock.h b/platform/msm8974/include/platform/clock.h
index 04d620c..f83c2ae 100644
--- a/platform/msm8974/include/platform/clock.h
+++ b/platform/msm8974/include/platform/clock.h
@@ -83,6 +83,7 @@
#define MDSS_EDPPIXEL_CBCR REG_MM(0x232C)
#define MDSS_EDPLINK_CBCR REG_MM(0x2330)
+#define MDSS_EDPAUX_CBCR REG_MM(0x2334)
#define EDPPIXEL_M REG_MM(0x20A8)
#define EDPPIXEL_N REG_MM(0x20AC)
#define EDPPIXEL_D REG_MM(0x20B0)
@@ -90,6 +91,8 @@
#define EDPPIXEL_CMD_RCGR REG_MM(0x20A0)
#define EDPLINK_CFG_RCGR REG_MM(0x20C4)
#define EDPLINK_CMD_RCGR REG_MM(0x20C0)
+#define EDPAUX_CFG_RCGR REG_MM(0x20E4)
+#define EDPAUX_CMD_RCGR REG_MM(0x20E0)
void platform_clock_init(void);
diff --git a/platform/msm8974/msm8974-clock.c b/platform/msm8974/msm8974-clock.c
index a646916..68000d5 100644
--- a/platform/msm8974/msm8974-clock.c
+++ b/platform/msm8974/msm8974-clock.c
@@ -626,6 +626,33 @@
},
};
+static struct clk_freq_tbl ftbl_mdss_edpaux_clk[] = {
+ F_MM(19200000, cxo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk edpaux_clk_src = {
+ .cmd_reg = (uint32_t *) EDPAUX_CMD_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_mdss_edpaux_clk,
+
+ .c = {
+ .dbg_name = "edpaux_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk mdss_edpaux_clk = {
+ .cbcr_reg = MDSS_EDPAUX_CBCR,
+ .parent = &edpaux_clk_src.c,
+ .has_sibling = 0,
+
+ .c = {
+ .dbg_name = "mdss_edpaux_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct clk_freq_tbl ftbl_mdss_edplink_clk[] = {
F_MDSS(162000000, edppll_270, 2, 0, 0),
F_MDSS(270000000, edppll_270, 11, 0, 0),
@@ -770,6 +797,7 @@
CLK_LOOKUP("edp_pixel_clk", mdss_edppixel_clk.c),
CLK_LOOKUP("edp_link_clk", mdss_edplink_clk.c),
+ CLK_LOOKUP("edp_aux_clk", mdss_edpaux_clk.c),
/* USB 3.0 */
CLK_LOOKUP("usb30_iface_clk", gcc_sys_noc_usb30_axi_clk.c),
diff --git a/platform/msm_shared/crypto4_eng.c b/platform/msm_shared/crypto4_eng.c
index 84fbc9f..a19c224 100644
--- a/platform/msm_shared/crypto4_eng.c
+++ b/platform/msm_shared/crypto4_eng.c
@@ -26,6 +26,7 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include <arch/defines.h>
#include <string.h>
#include <endian.h>
#include <debug.h>
@@ -37,7 +38,6 @@
#include <scm.h>
#include <smem.h>
-extern void dsb(void);
extern void ce_async_reset();
void wr_ce(uint32_t val,uint32_t reg)
diff --git a/platform/msm_shared/display.c b/platform/msm_shared/display.c
index 3768ca8..3bf9278 100644
--- a/platform/msm_shared/display.c
+++ b/platform/msm_shared/display.c
@@ -136,6 +136,12 @@
if (ret)
goto msm_display_config_out;
break;
+ case EDP_PANEL:
+ dprintf(INFO, "Config EDP PANEL.\n");
+ ret = mdp_edp_config(pinfo, &(panel->fb));
+ if (ret)
+ goto msm_display_config_out;
+ break;
default:
return ERR_INVALID_ARGS;
};
@@ -207,7 +213,12 @@
if (ret)
goto msm_display_on_out;
break;
-
+ case EDP_PANEL:
+ dprintf(INFO, "Turn on EDP PANEL.\n");
+ ret = mdp_edp_on();
+ if (ret)
+ goto msm_display_on_out;
+ break;
default:
return ERR_INVALID_ARGS;
};
@@ -302,6 +313,12 @@
dprintf(INFO, "Turn off LCDC PANEL.\n");
mdp_lcdc_off();
break;
+ case EDP_PANEL:
+ dprintf(INFO, "Turn off EDP PANEL.\n");
+ ret = mdp_edp_off();
+ if (ret)
+ goto msm_display_off_out;
+ break;
default:
return ERR_INVALID_ARGS;
};
diff --git a/platform/msm_shared/dload_util.c b/platform/msm_shared/dload_util.c
index 06140f2..7455a19 100644
--- a/platform/msm_shared/dload_util.c
+++ b/platform/msm_shared/dload_util.c
@@ -37,8 +37,6 @@
#define EMERGENCY_DLOAD_COOKIE_1 0xC67E4350
#define EMERGENCY_DLOAD_COOKIE_2 0x77777777
-extern void dsb();
-
void dload_util_write_cookie(uint32_t target_dload_mode_addr,
enum dload_mode mode)
{
diff --git a/platform/msm_shared/include/mipi_dsi.h b/platform/msm_shared/include/mipi_dsi.h
index 4f90f96..2a6d067 100755
--- a/platform/msm_shared/include/mipi_dsi.h
+++ b/platform/msm_shared/include/mipi_dsi.h
@@ -659,6 +659,7 @@
struct mipi_dsi_cmd {
int size;
char *payload;
+ int wait;
};
struct mipi_dsi_panel_config {
diff --git a/platform/msm_shared/lvds.c b/platform/msm_shared/lvds.c
index 85ab7fb..0a16c34 100644
--- a/platform/msm_shared/lvds.c
+++ b/platform/msm_shared/lvds.c
@@ -31,6 +31,7 @@
#include <reg.h>
#include <err.h>
#include <bits.h>
+#include <arch/defines.h>
#include <platform/iomap.h>
#include <platform/clock.h>
#include <dev/fbcon.h>
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 6b6e6c6..92d575e 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -46,7 +46,6 @@
unsigned short num_of_lanes);
extern void mdp_shutdown(void);
extern void mdp_start_dma(void);
-extern void dsb(void);
#if (DISPLAY_TYPE_MDSS == 0)
#define MIPI_DSI0_BASE MIPI_DSI_BASE
@@ -229,7 +228,11 @@
writel(cm->size, DSI_DMA_CMD_LENGTH); // reg 0x48 for this build
dsb();
ret += dsi_cmd_dma_trigger_for_panel();
- udelay(80);
+ dsb();
+ if (cm->wait)
+ mdelay(cm->wait);
+ else
+ udelay(80);
cm++;
}
return ret;
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index 16a498b..44e3c35 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -64,6 +64,7 @@
/* Flash ID ID Mask Density(MB) Wid Pgsz Blksz oobsz 8-bit ECCf */
{0x1590AC2C, 0xFFFFFFFF, 0x20000000, 0, 2048, 0x00020000, 0x40, 0},
{0x2690AC2C, 0xFFFFFFFF, 0x20000000, 0, 4096, 0x00040000, 0xE0, 1},
+ {0x1590ACAD, 0xFFFFFFFF, 0x20000000, 0, 2048, 0x00020000, 0x80, 0},
/* Note: Width flag is 0 for 8 bit Flash and 1 for 16 bit flash */
};
diff --git a/platform/msm_shared/qtimer_mmap.c b/platform/msm_shared/qtimer_mmap.c
index ef76075..bcd9a9a 100644
--- a/platform/msm_shared/qtimer_mmap.c
+++ b/platform/msm_shared/qtimer_mmap.c
@@ -30,6 +30,7 @@
#include <reg.h>
#include <compiler.h>
#include <qtimer.h>
+#include <arch/defines.h>
#include <platform/irqs.h>
#include <platform/iomap.h>
#include <platform/interrupts.h>
@@ -42,7 +43,6 @@
static volatile uint32_t current_time;
static uint32_t tick_count;
-extern void dsb();
static void qtimer_enable();
static enum handler_return qtimer_irq(void *arg)
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index 0ffa27c..063d1f9 100755
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -235,3 +235,28 @@
$(LOCAL_DIR)/clock_pll.o \
$(LOCAL_DIR)/clock_lib2.o
endif
+
+ifeq ($(PLATFORM),fsm9900)
+ OBJS += $(LOCAL_DIR)/qgic.o \
+ $(LOCAL_DIR)/qtimer.o \
+ $(LOCAL_DIR)/qtimer_mmap.o \
+ $(LOCAL_DIR)/interrupts.o \
+ $(LOCAL_DIR)/clock.o \
+ $(LOCAL_DIR)/clock_pll.o \
+ $(LOCAL_DIR)/clock_lib2.o \
+ $(LOCAL_DIR)/uart_dm.o \
+ $(LOCAL_DIR)/board.o \
+ $(LOCAL_DIR)/scm.o \
+ $(LOCAL_DIR)/spmi.o \
+ $(LOCAL_DIR)/bam.o \
+ $(LOCAL_DIR)/qpic_nand.o \
+ $(LOCAL_DIR)/dev_tree.o \
+ $(LOCAL_DIR)/certificate.o \
+ $(LOCAL_DIR)/image_verify.o \
+ $(LOCAL_DIR)/crypto_hash.o \
+ $(LOCAL_DIR)/crypto5_eng.o \
+ $(LOCAL_DIR)/crypto5_wrapper.o \
+ $(LOCAL_DIR)/i2c_qup.o \
+ $(LOCAL_DIR)/gpio.o \
+ $(LOCAL_DIR)/dload_util.o
+endif
diff --git a/platform/msm_shared/uart_dm.c b/platform/msm_shared/uart_dm.c
index 01bcbb6..f551a7a 100644
--- a/platform/msm_shared/uart_dm.c
+++ b/platform/msm_shared/uart_dm.c
@@ -43,7 +43,6 @@
#define NULL 0
#endif
-extern void dsb(void);
static int uart_init_flag = 0;
diff --git a/target/msm8226/init.c b/target/msm8226/init.c
index 6def2a6..7b31f43 100644
--- a/target/msm8226/init.c
+++ b/target/msm8226/init.c
@@ -423,7 +423,6 @@
unsigned target_pause_for_battery_charge(void)
{
-#if 0
uint8_t pon_reason = pm8x41_get_pon_reason();
uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
@@ -439,7 +438,6 @@
((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
return 1;
else
-#endif
return 0;
}
diff --git a/target/msm8226/target_display.c b/target/msm8226/target_display.c
index a30b568..5b719cc 100755
--- a/target/msm8226/target_display.c
+++ b/target/msm8226/target_display.c
@@ -42,6 +42,8 @@
#include "include/display_resource.h"
+#define HFPLL_LDO_ID 8
+
static struct pm8x41_wled_data wled_ctrl = {
.mod_scheme = 0x00,
.led1_brightness = (0x0F << 8) | 0xEF,
@@ -129,11 +131,16 @@
ldo_entry_array[ldocounter].ldo_id);
/* Set voltage during power on */
- if (enable == 1) {
+ if (enable) {
pm8x41_ldo_set_voltage(&ldo_entry,
ldo_entry_array[ldocounter].ldo_voltage);
+
+ pm8x41_ldo_control(&ldo_entry, enable);
+
+ } else if(!target_cont_splash_screen() &&
+ ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
+ pm8x41_ldo_control(&ldo_entry, enable);
}
- pm8x41_ldo_control(&ldo_entry, enable);
ldocounter++;
}
diff --git a/target/msm8610/init.c b/target/msm8610/init.c
index 3ad6a30..e00dccb 100644
--- a/target/msm8610/init.c
+++ b/target/msm8610/init.c
@@ -276,11 +276,14 @@
int ret = 0;
switch(board_hardware_id())
{
- case HW_PLATFORM_MTP:
case HW_PLATFORM_QRD:
- case HW_PLATFORM_SURF:
- dprintf(SPEW, "Target_cont_splash=0\n");
ret = 0;
+ break;
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ dprintf(SPEW, "Target_cont_splash=1\n");
+ ret = 1;
+ break;
default:
dprintf(SPEW, "Target_cont_splash=0\n");
ret = 0;
@@ -291,16 +294,21 @@
unsigned target_pause_for_battery_charge(void)
{
uint8_t pon_reason = pm8x41_get_pon_reason();
-
- /* This function will always return 0 to facilitate
- * automated testing/reboot with usb connected.
- * uncomment if this feature is needed.
+ uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
+ dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
+ pon_reason, is_cold_boot);
+ /*In case of fastboot reboot, adb reboot or if we see the power key
+ * pressed we do not want go into charger mode.
+ * fastboot reboot is warm boot with PON hard reset bit not set
+ * adb reboot is a cold boot with PON hard reset bit set
*/
- /* if ((pon_reason == USB_CHG) || (pon_reason == DC_CHG))
- * return 1;
- */
-
- return 0;
+ if (is_cold_boot &&
+ (!(pon_reason & HARD_RST)) &&
+ (!(pon_reason & KPDPWR_N)) &&
+ ((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
+ return 1;
+ else
+ return 0;
}
void target_usb_stop(void)
diff --git a/target/msm8610/target_display.c b/target/msm8610/target_display.c
index 6316fa8..b5f230a 100644
--- a/target/msm8610/target_display.c
+++ b/target/msm8610/target_display.c
@@ -171,6 +171,17 @@
switch (hw_id) {
case HW_PLATFORM_QRD:
+ mipi_hx8379a_video_wvga_init(&(panel.panel_info));
+ panel.clk_func = msm8610_mdss_dsi_panel_clock;
+ panel.power_func = msm8610_mipi_panel_power;
+ panel.fb.base = MIPI_FB_ADDR;
+ panel.fb.width = panel.panel_info.xres;
+ panel.fb.height = panel.panel_info.yres;
+ panel.fb.stride = panel.panel_info.xres;
+ panel.fb.bpp = panel.panel_info.bpp;
+ panel.fb.format = FB_FORMAT_RGB888;
+ panel.mdp_rev = MDP_REV_304;
+ break;
case HW_PLATFORM_MTP:
case HW_PLATFORM_SURF:
mipi_truly_video_wvga_init(&(panel.panel_info));
diff --git a/target/msm8974/include/target/display.h b/target/msm8974/include/target/display.h
index 818011c..468b6d5 100644
--- a/target/msm8974/include/target/display.h
+++ b/target/msm8974/include/target/display.h
@@ -30,6 +30,7 @@
#define _TARGET_COPPER_DISPLAY_H
#define MIPI_FB_ADDR 0x0D200000
+#define EDP_FB_ADDR 0x7EF00000
#define MIPI_HSYNC_PULSE_WIDTH 12
#define MIPI_HSYNC_BACK_PORCH_DCLK 32
diff --git a/target/msm8974/init.c b/target/msm8974/init.c
index b5fbf82..a9382b7 100644
--- a/target/msm8974/init.c
+++ b/target/msm8974/init.c
@@ -144,6 +144,9 @@
pm8x41_gpio_config(5, &gpio);
+ /* Wait for the pmic gpio config to take effect */
+ thread_sleep(1);
+
/* Get status of P_GPIO_5 */
pm8x41_gpio_get(5, &status);
diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index 2329965..fcefcfe 100644
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -46,6 +46,7 @@
extern int msm_display_off();
extern int mdss_dsi_uniphy_pll_config(uint32_t ctl_base);
extern int mdss_sharp_dsi_uniphy_pll_config(uint32_t ctl_base);
+extern void edp_auo_1080p_init(struct edp_panel_data *edp_panel);
static struct pm8x41_wled_data wled_ctrl = {
.mod_scheme = 0x00,
@@ -200,8 +201,60 @@
return 0;
}
+static int msm8974_mdss_edp_panel_clock(int enable)
+{
+ if (enable) {
+ mdp_gdsc_ctrl(enable);
+ mdp_clock_init();
+ edp_clk_enable();
+ mmss_clock_init();
+ } else if (!target_cont_splash_screen()) {
+ /* Add here for continuous splash */
+ }
+
+ return 0;
+}
+
+static int msm8974_edp_panel_power(int enable)
+{
+ struct pm8x41_gpio gpio36_param = {
+ .direction = PM_GPIO_DIR_OUT,
+ .output_buffer = PM_GPIO_OUT_CMOS,
+ .out_strength = PM_GPIO_OUT_DRIVE_MED,
+ };
+
+ struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
+
+ if (enable) {
+ /* Enable backlight */
+ dprintf(SPEW, "Enable Backlight\n");
+ pm8x41_gpio_config(36, &gpio36_param);
+ pm8x41_gpio_set(36, PM_GPIO_FUNC_HIGH);
+ dprintf(SPEW, "Enable Backlight Done\n");
+
+ /* Turn on LDO12 for edp vdda */
+ dprintf(SPEW, "Setting LDO12 n");
+ pm8x41_ldo_set_voltage(&ldo12, 1800000);
+ pm8x41_ldo_control(&ldo12, enable);
+ dprintf(SPEW, "Setting LDO12 Done\n");
+
+ /* Panel Enable */
+ dprintf(SPEW, "Panel Enable\n");
+ gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA,
+ GPIO_DISABLE);
+ gpio_set(58, 2);
+ dprintf(SPEW, "Panel Enable Done\n");
+ } else {
+ /* Keep LDO12 on, otherwise kernel will not boot */
+ pm8x41_gpio_set(36, PM_GPIO_FUNC_LOW);
+ }
+
+ return 0;
+}
+
void display_init(void)
{
+ struct edp_panel_data edp_panel;
uint32_t hw_id = board_hardware_id();
uint32_t soc_ver = board_soc_version();
@@ -224,8 +277,9 @@
break;
case HW_PLATFORM_DRAGON:
mipi_sharp_video_qhd_init(&(panel.panel_info));
- wled_ctrl.ovp = 0x1; /* 32V */
+ wled_ctrl.ovp = 0x0; /* 35V */
wled_ctrl.full_current_scale = 0x14; /* 20mA */
+ wled_ctrl.max_duty_cycle = 0; /* 26ns */
panel.clk_func = msm8974_mdss_sharp_dsi_panel_clock;
panel.power_func = msm8974_mipi_panel_power;
panel.fb.base = MIPI_FB_ADDR;
@@ -236,6 +290,19 @@
panel.fb.format = FB_FORMAT_RGB888;
panel.mdp_rev = MDP_REV_50;
break;
+ case HW_PLATFORM_LIQUID:
+ edp_panel.panel_data = &panel;
+ edp_auo_1080p_init(&edp_panel);
+ panel.clk_func = msm8974_mdss_edp_panel_clock;
+ panel.power_func = msm8974_edp_panel_power;
+ panel.fb.base = (void *)EDP_FB_ADDR;
+ panel.fb.width = panel.panel_info.xres;
+ panel.fb.height = panel.panel_info.yres;
+ panel.fb.stride = panel.panel_info.xres;
+ panel.fb.bpp = panel.panel_info.bpp;
+ panel.fb.format = FB_FORMAT_RGB888;
+ panel.mdp_rev = MDP_REV_50;
+ break;
default:
return;
};