Merge "[qsd8650a]: Limit cpu frequency to 768 MHz"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 2884229..3c1ab9c 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -238,17 +238,17 @@
dprintf(CRITICAL, "ERROR: Cannot read boot image header\n");
return -1;
}
- offset += page_size;
if (memcmp(hdr->magic, BOOT_MAGIC, BOOT_MAGIC_SIZE)) {
dprintf(CRITICAL, "ERROR: Invaled boot image header\n");
return -1;
}
- if (hdr->page_size != page_size) {
- dprintf(CRITICAL, "ERROR: Invaled boot image pagesize. Device pagesize: %d, Image pagesize: %d\n",page_size,hdr->page_size);
- return -1;
+ if (hdr->page_size && (hdr->page_size != page_size)) {
+ page_size = hdr->page_size;
+ page_mask = page_size - 1;
}
+ offset += page_size;
n = ROUND_TO_PAGE(hdr->kernel_size, page_mask);
if (mmc_read(ptn + offset, (void *)hdr->kernel_addr, n)) {
@@ -396,6 +396,11 @@
/* ensure commandline is terminated */
hdr.cmdline[BOOT_ARGS_SIZE-1] = 0;
+ if(target_is_emmc_boot() && hdr.page_size) {
+ page_size = hdr.page_size;
+ page_mask = page_size - 1;
+ }
+
kernel_actual = ROUND_TO_PAGE(hdr.kernel_size, page_mask);
ramdisk_actual = ROUND_TO_PAGE(hdr.ramdisk_size, page_mask);
diff --git a/include/reg.h b/include/reg.h
index d04d4ea..b5dd528 100644
--- a/include/reg.h
+++ b/include/reg.h
@@ -39,4 +39,6 @@
#define writel(v, a) (*REG32(a) = (v))
#define readl(a) (*REG32(a))
+#define writeb(v, a) (*REG8(a) = (v))
+#define readb(a) (*REG8(a))
#endif
diff --git a/platform/msm7x30/rules.mk b/platform/msm7x30/rules.mk
index eb069c2..83acb56 100644
--- a/platform/msm7x30/rules.mk
+++ b/platform/msm7x30/rules.mk
@@ -5,7 +5,7 @@
#arm1136j-s
CPU := generic
-MC_SLOT := 2
+MMC_SLOT := 2
DEFINES += WITH_CPU_EARLY_INIT=1 WITH_CPU_WARM_BOOT=1 \
MMC_SLOT=$(MMC_SLOT)
diff --git a/platform/msm8x60/include/platform/iomap.h b/platform/msm8x60/include/platform/iomap.h
index fa642c8..2c267e7 100755
--- a/platform/msm8x60/include/platform/iomap.h
+++ b/platform/msm8x60/include/platform/iomap.h
@@ -55,4 +55,35 @@
#else
#define MSM_SHARED_BASE 0x01F00000
#endif
+
+#define SURF_DEBUG_LED_ADDR 0x1D000202
+
+#define GPIO_CFG133_ADDR 0x00801850
+#define GPIO_CFG135_ADDR 0x00801870
+#define GPIO_CFG136_ADDR 0x00801880
+#define GPIO_CFG137_ADDR 0x00801890
+#define GPIO_CFG138_ADDR 0x008018A0
+#define GPIO_CFG139_ADDR 0x008018B0
+#define GPIO_CFG140_ADDR 0x008018C0
+#define GPIO_CFG141_ADDR 0x008018D0
+#define GPIO_CFG142_ADDR 0x008018E0
+#define GPIO_CFG143_ADDR 0x008018F0
+#define GPIO_CFG144_ADDR 0x00801900
+#define GPIO_CFG145_ADDR 0x00801910
+#define GPIO_CFG146_ADDR 0x00801920
+#define GPIO_CFG147_ADDR 0x00801930
+#define GPIO_CFG148_ADDR 0x00801940
+#define GPIO_CFG149_ADDR 0x00801950
+#define GPIO_CFG150_ADDR 0x00801960
+#define GPIO_CFG151_ADDR 0x00801970
+#define GPIO_CFG152_ADDR 0x00801980
+#define GPIO_CFG153_ADDR 0x00801990
+#define GPIO_CFG154_ADDR 0x008019A0
+#define GPIO_CFG155_ADDR 0x008019B0
+#define GPIO_CFG156_ADDR 0x008019C0
+#define GPIO_CFG157_ADDR 0x008019D0
+#define GPIO_CFG158_ADDR 0x008019E0
+
+#define EBI2_CHIP_SELECT_CFG0 0x1A100000
+#define EBI2_XMEM_CS3_CFG1 0x1A110034
#endif
diff --git a/target/msm7630_surf/init.c b/target/msm7630_surf/init.c
index 54d63ad..c9478d0 100644
--- a/target/msm7630_surf/init.c
+++ b/target/msm7630_surf/init.c
@@ -84,7 +84,7 @@
},
{
.start = DIFF_START_ADDR,
- .length = 105 /* In MB */,
+ .length = 115 /* In MB */,
.name = "system",
},
{
@@ -188,7 +188,10 @@
#endif
if (target_is_emmc_boot())
+ {
+ mmc_boot_main();
return;
+ }
ptable_init(&flash_ptable);
smem_ptable_init();
diff --git a/target/msm7630_surf/tools/mkheader.c b/target/msm7630_surf/tools/mkheader.c
index 8701007..c7ad742 100644
--- a/target/msm7630_surf/tools/mkheader.c
+++ b/target/msm7630_surf/tools/mkheader.c
@@ -66,7 +66,7 @@
magic[11] = 0x00000001; /* cookie version */
magic[12] = 0x00000002; /* file formats */
magic[13] = 0x00000000;
- magic[14] = 0x00500000; /* 5M for boot.img */
+ magic[14] = 0x00000000; /* not setting size for boot.img */
magic[15] = 0x00000000;
magic[16] = 0x00000000;
magic[17] = 0x00000000;
diff --git a/target/msm8660_surf/init.c b/target/msm8660_surf/init.c
index 3362b60..edebdfd 100755
--- a/target/msm8660_surf/init.c
+++ b/target/msm8660_surf/init.c
@@ -36,20 +36,29 @@
#include <lib/ptable.h>
#include <dev/flash.h>
#include <smem.h>
+#include <platform/iomap.h>
+#include <reg.h>
-#define LINUX_MACHTYPE_SURF 0xf656a
+#define LINUX_MACHTYPE_8660_SURF 1009002
+#define LINUX_MACHTYPE_8660_FFA 1009003
void keypad_init(void);
static int emmc_boot = -1; /* set to uninitialized */
int target_is_emmc_boot(void);
+void debug_led_write(char);
+char debug_led_read();
void target_init(void)
{
dprintf(INFO, "target_init()\n");
+ setup_fpga();
+
+ /* Setting Debug LEDs ON */
+ debug_led_write(0xFF);
#if (!ENABLE_NANDWRITE)
keys_init();
keypad_init();
@@ -63,7 +72,17 @@
unsigned board_machtype(void)
{
- return LINUX_MACHTYPE_SURF;
+ /* Writing to Debug LED register and reading back to auto detect
+ SURF and FFA. If we read back, it is SURF */
+ debug_led_write(0xA5);
+
+ if((debug_led_read() & 0xFF) == 0xA5)
+ {
+ debug_led_write(0);
+ return LINUX_MACHTYPE_8660_SURF;
+ }
+ else
+ return LINUX_MACHTYPE_8660_FFA;
}
void reboot_device(unsigned reboot_reason)
@@ -79,3 +98,45 @@
void target_battery_charging_enable(unsigned enable, unsigned disconnect)
{
}
+
+void setup_fpga()
+{
+ writel(0x147, GPIO_CFG133_ADDR);
+ writel(0x144, GPIO_CFG135_ADDR);
+ writel(0x144, GPIO_CFG136_ADDR);
+ writel(0x144, GPIO_CFG137_ADDR);
+ writel(0x144, GPIO_CFG138_ADDR);
+ writel(0x144, GPIO_CFG139_ADDR);
+ writel(0x144, GPIO_CFG140_ADDR);
+ writel(0x144, GPIO_CFG141_ADDR);
+ writel(0x144, GPIO_CFG142_ADDR);
+ writel(0x144, GPIO_CFG143_ADDR);
+ writel(0x144, GPIO_CFG144_ADDR);
+ writel(0x144, GPIO_CFG145_ADDR);
+ writel(0x144, GPIO_CFG146_ADDR);
+ writel(0x144, GPIO_CFG147_ADDR);
+ writel(0x144, GPIO_CFG148_ADDR);
+ writel(0x144, GPIO_CFG149_ADDR);
+ writel(0x144, GPIO_CFG150_ADDR);
+ writel(0x147, GPIO_CFG151_ADDR);
+ writel(0x147, GPIO_CFG152_ADDR);
+ writel(0x147, GPIO_CFG153_ADDR);
+ writel(0x3, GPIO_CFG154_ADDR);
+ writel(0x147, GPIO_CFG155_ADDR);
+ writel(0x147, GPIO_CFG156_ADDR);
+ writel(0x147, GPIO_CFG157_ADDR);
+ writel(0x3, GPIO_CFG158_ADDR);
+
+ writel(0x00000B31, EBI2_CHIP_SELECT_CFG0);
+ writel(0xA3030020, EBI2_XMEM_CS3_CFG1);
+}
+
+void debug_led_write(char val)
+{
+ writeb(val,SURF_DEBUG_LED_ADDR);
+}
+
+char debug_led_read()
+{
+ return readb(SURF_DEBUG_LED_ADDR);
+}