platform: msm_shared: Set the clock divider before changing the clock
Clock divider must be set before changing the clock to higher rate
for hs400 to ensure card receives no more than 200 MHz.
CRs-Fixed: 631261
Change-Id: I230149fc43d46a4e97b5976ff7ba6d42e392ac00
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 0883c53..3a01191 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -844,9 +844,15 @@
/* Run the clock @ 400 Mhz */
if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
{
- clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
/* Save the timing value, before changing the clock */
MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
+ /*
+ * Set the MCI_CLK divider before changing the sdcc core
+ * core clk to ensure card receives no more than 200 MHZ
+ * clock frequency
+ */
+ sdhci_msm_set_mci_clk(host);
+ clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
}
else
{
@@ -993,6 +999,10 @@
/* Save the timing value, before changing the clock */
MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
+ /*
+ * Enable HS400 mode
+ */
+ sdhci_msm_set_mci_clk(host);
/* 7. Execute Tuning for hs400 mode */
if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
diff --git a/platform/msm_shared/sdhci.c b/platform/msm_shared/sdhci.c
index 547f4ec..9c4e8ed 100644
--- a/platform/msm_shared/sdhci.c
+++ b/platform/msm_shared/sdhci.c
@@ -264,13 +264,6 @@
REG_WRITE16(host, ctrl, SDHCI_HOST_CTRL2_REG);
- /*
- * SDHC spec does not have matching UHS mode
- * So we use Vendor specific registers to enable
- * HS400 mode
- */
- sdhci_msm_set_mci_clk(host);
-
/* Run the clock back */
sdhci_clk_supply(host, clk_val);
}