target/platform: msm8994: Enable kernel authentication
Add support to initialize CE engine instace 3 and needed macros
for kernel authentication.
CRs-Fixed: 674993
Change-Id: Iea4eb49a0bf74a2ba287a8f6cc51cf6a4db58239
diff --git a/platform/msm8994/include/platform/iomap.h b/platform/msm8994/include/platform/iomap.h
index fd51de5..60c9865 100644
--- a/platform/msm8994/include/platform/iomap.h
+++ b/platform/msm8994/include/platform/iomap.h
@@ -176,8 +176,8 @@
#define SPMI_GENI_BASE (SPMI_BASE + 0xA000)
#define SPMI_PIC_BASE (SPMI_BASE + 0xB000)
-#define MSM_CE2_BAM_BASE 0xFD444000
-#define MSM_CE2_BASE 0xFD45A000
+#define MSM_CE3_BAM_BASE 0xFD3C4000
+#define MSM_CE3_BASE 0xFD3DA000
#define TLMM_BASE_ADDR 0xFD510000
#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
diff --git a/target/msm8994/init.c b/target/msm8994/init.c
index 6ceafed..1dbca75 100644
--- a/target/msm8994/init.c
+++ b/target/msm8994/init.c
@@ -55,6 +55,15 @@
#include <boot_device.h>
#include <qmp_phy.h>
+#define CE_INSTANCE 3
+#define CE_EE 1
+#define CE_FIFO_SIZE 64
+#define CE_READ_PIPE 3
+#define CE_WRITE_PIPE 2
+#define CE_READ_PIPE_LOCK_GRP 0
+#define CE_WRITE_PIPE_LOCK_GRP 0
+#define CE_ARRAY_SIZE 20
+
#define PMIC_ARB_CHANNEL_NUM 0
#define PMIC_ARB_OWNER_ID 0
@@ -132,6 +141,9 @@
/* Disable HC mode before jumping to kernel */
sdhci_mode_disable(&dev->host);
}
+
+ if (crypto_initialized())
+ crypto_eng_cleanup();
}
/* Do target specific usb initialization */
@@ -250,6 +262,10 @@
target_keystatus();
+
+ if (target_use_signed_kernel())
+ target_crypto_init_params();
+
platform_read_boot_config();
if (platform_boot_dev_isemmc())
@@ -394,3 +410,39 @@
{
return 1;
}
+
+/* Set up params for h/w CE. */
+void target_crypto_init_params()
+{
+ struct crypto_init_params ce_params;
+
+ /* Set up base addresses and instance. */
+ ce_params.crypto_instance = CE_INSTANCE;
+ ce_params.crypto_base = MSM_CE3_BASE;
+ ce_params.bam_base = MSM_CE3_BAM_BASE;
+
+ /* Set up BAM config. */
+ ce_params.bam_ee = CE_EE;
+ ce_params.pipes.read_pipe = CE_READ_PIPE;
+ ce_params.pipes.write_pipe = CE_WRITE_PIPE;
+ ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
+ ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
+
+ /* Assign buffer sizes. */
+ ce_params.num_ce = CE_ARRAY_SIZE;
+ ce_params.read_fifo_size = CE_FIFO_SIZE;
+ ce_params.write_fifo_size = CE_FIFO_SIZE;
+
+ /* BAM is initialized by TZ for this platform.
+ * Do not do it again as the initialization address space
+ * is locked.
+ */
+ ce_params.do_bam_init = 0;
+
+ crypto_init_params(&ce_params);
+}
+
+crypto_engine_type board_ce_type(void)
+{
+ return CRYPTO_ENGINE_TYPE_HW;
+}