commit 4ddb64bc360f61a08d819f2f2e392087f3c5e248
author anisha agarwal <anishaa@codeaurora.org> Wed Aug 13 14:03:08 2014 -0700
committer anisha agarwal <anishaa@codeaurora.org> Wed Aug 13 14:03:08 2014 -0700
tree 2687e0673708358f8dbb4fc2094ed4a84e2eea7e
parent a5278fc3bf68803987b02cc2069ec890294a3adc

platform: msmzirc: Add qusb2 phy tuning registers

Add qusb2 phy tuning registers.

Change-Id: If434c11cc1a06a39d83b2d313bbfae2b319a0140

platform/msmzirc/include/platform/iomap.h

diff --git a/platform/msmzirc/include/platform/iomap.h b/platform/msmzirc/include/platform/iomap.h
index a401803..f8e9cf3 100644
--- a/platform/msmzirc/include/platform/iomap.h
+++ b/platform/msmzirc/include/platform/iomap.h
@@ -171,6 +171,11 @@
 #define QUSB2_PHY_BASE              0x00079000
 #define QUSB2PHY_PORT_POWERDOWN     (QUSB2_PHY_BASE + 0x000000B4)
 #define GCC_QUSB2_PHY_BCR           (CLK_CTL_BASE + 0x00041028)
+#define QUSB2PHY_PORT_UTMI_CTRL2    (QUSB2_PHY_BASE + 0x000000C4)
+#define QUSB2PHY_PORT_TUNE1         (QUSB2_PHY_BASE + 0x00000080)
+#define QUSB2PHY_PORT_TUNE2         (QUSB2_PHY_BASE + 0x00000084)
+#define QUSB2PHY_PORT_TUNE3         (QUSB2_PHY_BASE + 0x00000088)
+#define QUSB2PHY_PORT_TUNE4         (QUSB2_PHY_BASE + 0x0000008C)
 
 /* SS QMP (Qulacomm Multi Protocol) */
 #define QMP_PHY_BASE                0x78000