commit 4ebc11c0a2446a774bfc2f90b8a9c0e808bd09ad
author Linux Build Service Account <lnxbuild@qualcomm.com> Thu Oct 07 22:24:58 2010 -0700
committer QuIC Gerrit Code Review <code-review@quicinc.com> Thu Oct 07 22:24:58 2010 -0700
tree a62dbc198db819d7478bb81d461cc6baf84d58c2
parent ced976f2c1bd462f7aa3e1b41f97c3b8532402ba
parent 0af3482a3514dbe6aea0ef215d50d892029e8cc2

Merge "[platform/msm7x30]: Add code to enable USBH Core clock."

platform/msm_shared/proc_comm.c

diff --git a/platform/msm_shared/proc_comm.c b/platform/msm_shared/proc_comm.c
index f20e550..d82beaa 100644
--- a/platform/msm_shared/proc_comm.c
+++ b/platform/msm_shared/proc_comm.c
@@ -81,6 +81,7 @@
 #define MDP_LCDC_PAD_PCLK_CLK 43
 #define MDP_VSYNC_CLK         44
 
+#define P_USB_HS_CORE_CLK     53  /* High speed USB 1 core clock */
 /* msm7x30 adds... */
 #define MDP_P_CLK             86
 
@@ -227,6 +228,7 @@
 {
 	clock_enable(USB_HS_PCLK);
 	clock_enable(USB_HS_CLK);
+	clock_enable(P_USB_HS_CORE_CLK);
 }
 
 void lcdc_clock_init(unsigned rate)