Merge "msmzirc: disable logs in user builds"
diff --git a/dev/gcdb/display/include/panel_jdi_fhd_video.h b/dev/gcdb/display/include/panel_jdi_fhd_video.h
index f869f5a..a301056 100644
--- a/dev/gcdb/display/include/panel_jdi_fhd_video.h
+++ b/dev/gcdb/display/include/panel_jdi_fhd_video.h
@@ -118,11 +118,11 @@
};
static char jdi_fhd_video_on_cmd13[] = {
- 0x11, 0xFF, 0x05, 0x80
+ 0x11, 0x00, 0x05, 0x80
};
static char jdi_fhd_video_on_cmd14[] = {
- 0x29, 0xFF, 0x05, 0x80
+ 0x29, 0x00, 0x05, 0x80
};
static struct mipi_dsi_cmd jdi_fhd_video_on_command[] = {
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index db4473c..44e9599 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -143,6 +143,16 @@
#define VBAT_DET_HI_RT_STS 0x02
#define VCP_ENABLE 0x01
+#define PMI8994_CHGR_CFG2 0x210FC
+#define CURRENT_TERM_EN BIT(3)
+#define PMI8994_FCC_CFG 0x210F2
+#define PMI8994_FV_CFG 0x210F4
+#define PMI8994_INT_RT_STS 0x21010
+#define BAT_TAPER_MODE_CHARGING_RT_STS BIT(6)
+#define PMI8994_CHGR_TRIM_OPTIONS_7_0 0x216F6
+#define INPUT_MISSING_POLLER_EN BIT(3)
+
int pm8xxx_is_battery_broken(void);
+bool pmi8994_battery_broken(void);
#endif
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index dc4c32d..5886161 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -625,3 +625,38 @@
return batt_is_broken;
}
+
+/* Detect broken battery for pmi 8994*/
+bool pmi8994_is_battery_broken()
+{
+ bool batt_is_broken;
+ uint8_t fast_charge = 0;
+
+ /* Disable the input missing ppoller */
+ REG_WRITE(PMI8994_CHGR_TRIM_OPTIONS_7_0, REG_READ(PMI8994_CHGR_TRIM_OPTIONS_7_0) & ~INPUT_MISSING_POLLER_EN);
+ /* Disable current termination */
+ REG_WRITE(PMI8994_CHGR_CFG2, REG_READ(PMI8994_CHGR_CFG2) & ~CURRENT_TERM_EN);
+ /* Fast-charge current to 300 mA */
+ fast_charge = REG_READ(PMI8994_FCC_CFG);
+ REG_WRITE(PMI8994_FCC_CFG, 0x0);
+ /* Change the float voltage to 4.50V */
+ REG_WRITE(PMI8994_FV_CFG, 0x3F);
+
+ mdelay(5);
+
+ if (REG_READ(PMI8994_INT_RT_STS) & BAT_TAPER_MODE_CHARGING_RT_STS)
+ batt_is_broken = true;
+ else
+ batt_is_broken = false;
+
+ /* Set float voltage back to 4.35V */
+ REG_WRITE(PMI8994_FV_CFG, 0x2B);
+ /* Enable current termination */
+ REG_WRITE(PMI8994_CHGR_CFG2, REG_READ(PMI8994_CHGR_CFG2) | CURRENT_TERM_EN);
+ /* Fast-charge current back to default mA */
+ REG_WRITE(PMI8994_FCC_CFG, fast_charge);
+ /* Re-enable the input missing poller */
+ REG_WRITE(PMI8994_CHGR_TRIM_OPTIONS_7_0, REG_READ(PMI8994_CHGR_TRIM_OPTIONS_7_0) | INPUT_MISSING_POLLER_EN);
+
+ return batt_is_broken;
+}
diff --git a/platform/apq8084/include/platform/iomap.h b/platform/apq8084/include/platform/iomap.h
index 67a6f5b..d0ab775 100644
--- a/platform/apq8084/include/platform/iomap.h
+++ b/platform/apq8084/include/platform/iomap.h
@@ -304,6 +304,17 @@
#define LPASS_LPAIF_RDDMA_PER_LEN0 0xFE152010
#define LPASS_LPAIF_DEBUG_CTL 0xFE15E004
+#define HDMI_DDC_SPEED REG_HDMI(0x220)
+#define HDMI_DDC_SETUP REG_HDMI(0x224)
+#define HDMI_DDC_REF REG_HDMI(0x27C)
+#define HDMI_DDC_DATA REG_HDMI(0x238)
+#define HDMI_DDC_TRANS0 REG_HDMI(0x228)
+#define HDMI_DDC_TRANS1 REG_HDMI(0x22C)
+#define HDMI_DDC_CTRL REG_HDMI(0x20C)
+#define HDMI_DDC_INT_CTRL REG_HDMI(0x214)
+#define HDMI_DDC_SW_STATUS REG_HDMI(0x218)
+#define HDMI_DDC_ARBITRATION REG_HDMI(0x210)
+
#define HDMI_USEC_REFTIMER REG_HDMI(0x208)
#define HDMI_CTRL REG_HDMI(0x000)
#define HDMI_HPD_INT_STATUS REG_HDMI(0x250)
diff --git a/platform/msm_shared/board.c b/platform/msm_shared/board.c
index 07d4f8a..538d381 100644
--- a/platform/msm_shared/board.c
+++ b/platform/msm_shared/board.c
@@ -48,6 +48,8 @@
struct smem_board_info_v6 board_info_v6;
struct smem_board_info_v7 board_info_v7;
struct smem_board_info_v8 board_info_v8;
+ struct smem_board_info_v9 board_info_v9;
+ struct smem_board_info_v10 board_info_v10;
unsigned int board_info_len = 0;
unsigned ret = 0;
unsigned format = 0;
@@ -102,10 +104,8 @@
board.pmic_info[0].pmic_type = board_info_v7.pmic_type;
board.pmic_info[0].pmic_version = board_info_v7.pmic_version;
}
- else if (format_minor >= 8)
+ else if (format_minor == 8)
{
- dprintf(INFO, "Minor socinfo format detected: %u.%u\n", format_major, format_minor);
-
board_info_len = sizeof(board_info_v8);
ret = smem_read_alloc_entry(SMEM_BOARD_INFO_LOCATION,
@@ -145,12 +145,93 @@
board.pmic_info[i].pmic_target = (((board_info_v8.pmic_info[i].pmic_version >> 16) & 0xff) << 16) |
((board_info_v8.pmic_info[i].pmic_version & 0xff) << 8) | (pmic_type & 0xff);
}
+ }
+ else if (format_minor == 0x9)
+ {
+ board_info_len = sizeof(board_info_v9);
- if (format_minor == 0x9)
- board.foundry_id = board_info_v8.foundry_id;
+ ret = smem_read_alloc_entry(SMEM_BOARD_INFO_LOCATION,
+ &board_info_v9,
+ board_info_len);
+ if (ret)
+ return;
- if (format_minor == 0xA)
- board.chip_serial = board_info_v8.chip_serial;
+ board.platform = board_info_v9.board_info_v3.msm_id;
+ board.platform_version = board_info_v9.board_info_v3.msm_version;
+ board.platform_hw = board_info_v9.board_info_v3.hw_platform;
+ board.platform_subtype = board_info_v9.platform_subtype;
+
+ /*
+ * fill in board.target with variant_id information
+ * bit no |31 24 | 23 16 | 15 8 |7 0|
+ * board.target = |subtype| plat_hw_ver major | plat_hw_ver minor |hw_platform|
+ *
+ */
+ board.target = (((board_info_v9.platform_subtype & 0xff) << 24) |
+ (((board_info_v9.platform_version >> 16) & 0xff) << 16) |
+ ((board_info_v9.platform_version & 0xff) << 8) |
+ (board_info_v9.board_info_v3.hw_platform & 0xff));
+
+ for (i = 0; i < SMEM_V8_SMEM_MAX_PMIC_DEVICES; i++) {
+ board.pmic_info[i].pmic_type = board_info_v9.pmic_info[i].pmic_type;
+ board.pmic_info[i].pmic_version = board_info_v9.pmic_info[i].pmic_version;
+
+ /*
+ * fill in pimc_board_info with pmic type and pmic version information
+ * bit no |31 24 | 23 16 | 15 8 |7 0|
+ * pimc_board_info = |Unused | Major version | Minor version|PMIC_MODEL|
+ *
+ */
+ pmic_type = board_info_v9.pmic_info[i].pmic_type == PMIC_IS_INVALID? 0 : board_info_v9.pmic_info[i].pmic_type;
+
+ board.pmic_info[i].pmic_target = (((board_info_v9.pmic_info[i].pmic_version >> 16) & 0xff) << 16) |
+ ((board_info_v9.pmic_info[i].pmic_version & 0xff) << 8) | (pmic_type & 0xff);
+ }
+ board.foundry_id = board_info_v9.foundry_id;
+ }
+ else if (format_minor >= 0xA)
+ {
+ board_info_len = sizeof(board_info_v10);
+
+ ret = smem_read_alloc_entry(SMEM_BOARD_INFO_LOCATION,
+ &board_info_v10,
+ board_info_len);
+ if (ret)
+ return;
+
+ board.platform = board_info_v10.board_info_v3.msm_id;
+ board.platform_version = board_info_v10.board_info_v3.msm_version;
+ board.platform_hw = board_info_v10.board_info_v3.hw_platform;
+ board.platform_subtype = board_info_v10.platform_subtype;
+
+ /*
+ * fill in board.target with variant_id information
+ * bit no |31 24 | 23 16 | 15 8 |7 0|
+ * board.target = |subtype| plat_hw_ver major | plat_hw_ver minor |hw_platform|
+ *
+ */
+ board.target = (((board_info_v10.platform_subtype & 0xff) << 24) |
+ (((board_info_v10.platform_version >> 16) & 0xff) << 16) |
+ ((board_info_v10.platform_version & 0xff) << 8) |
+ (board_info_v10.board_info_v3.hw_platform & 0xff));
+
+ for (i = 0; i < SMEM_V8_SMEM_MAX_PMIC_DEVICES; i++) {
+ board.pmic_info[i].pmic_type = board_info_v10.pmic_info[i].pmic_type;
+ board.pmic_info[i].pmic_version = board_info_v10.pmic_info[i].pmic_version;
+
+ /*
+ * fill in pimc_board_info with pmic type and pmic version information
+ * bit no |31 24 | 23 16 | 15 8 |7 0|
+ * pimc_board_info = |Unused | Major version | Minor version|PMIC_MODEL|
+ *
+ */
+ pmic_type = board_info_v10.pmic_info[i].pmic_type == PMIC_IS_INVALID? 0 : board_info_v10.pmic_info[i].pmic_type;
+
+ board.pmic_info[i].pmic_target = (((board_info_v10.pmic_info[i].pmic_version >> 16) & 0xff) << 16) |
+ ((board_info_v10.pmic_info[i].pmic_version & 0xff) << 8) | (pmic_type & 0xff);
+ }
+ board.foundry_id = board_info_v10.foundry_id;
+ board.chip_serial = board_info_v10.chip_serial;
}
/* HLOS subtype
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 1ac8fbd..641c4d1 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -92,7 +92,7 @@
exit_read_signature:
/* Keep the non detectable panel at the end and set panel signature 0xFFFF */
- if (panel_signature == 0xFFFF)
+ if ((panel_signature == 0) || (panel_signature == 0xFFFF))
ret = 0;
#endif
return ret;
@@ -515,6 +515,7 @@
if (!status && target_panel_auto_detect_enabled())
status =
mdss_dsi_read_panel_signature(pinfo->signature);
+ dprintf(SPEW, "Read panel signature status = 0x%x \n", status);
}
}
#endif
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index ecb5bbb..b972cce 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -48,7 +48,8 @@
static uint32_t cfg1_raw;
static uint32_t ecc_bch_cfg;
-struct cmd_element ce_array[100];
+struct cmd_element ce_array[100] __attribute__ ((aligned(16)));
+struct cmd_element ce_read_array[20] __attribute__ ((aligned(16)));
#define QPIC_BAM_DATA_FIFO_SIZE 64
#define QPIC_BAM_CMD_FIFO_SIZE 64
@@ -97,17 +98,17 @@
static uint32_t
qpic_nand_read_reg(uint32_t reg_addr,
- uint8_t flags,
- struct cmd_element *cmd_list_ptr)
+ uint8_t flags)
{
uint32_t val;
+ struct cmd_element *cmd_list_read_ptr = ce_read_array;
- bam_add_cmd_element(cmd_list_ptr, reg_addr, (uint32_t)PA((addr_t)&val), CE_READ_TYPE);
+ bam_add_cmd_element(cmd_list_read_ptr, reg_addr, (uint32_t)PA((addr_t)&val), CE_READ_TYPE);
/* Enqueue the desc for the above command */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)PA((addr_t)cmd_list_ptr),
+ (unsigned char*)PA((addr_t)cmd_list_read_ptr),
BAM_CE_SIZE,
BAM_DESC_CMD_FLAG| BAM_DESC_INT_FLAG | flags);
@@ -165,7 +166,7 @@
/* Check if this is an ECC error on an erased page. */
if (status & NAND_FLASH_OP_ERR)
{
- erase_sts = qpic_nand_read_reg(NAND_ERASED_CW_DETECT_STATUS, 0, ce_array);
+ erase_sts = qpic_nand_read_reg(NAND_ERASED_CW_DETECT_STATUS, 0);
if ((erase_sts & (1 << NAND_ERASED_CW_DETECT_STATUS_PAGE_ALL_ERASED)))
{
/* Mask the OP ERROR. */
@@ -227,7 +228,7 @@
cmd_list_ptr = ce_array;
/* Read the status register */
- status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0, cmd_list_ptr);
+ status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0);
/* Check for errors */
nand_ret = qpic_nand_check_status(status);
@@ -238,7 +239,7 @@
}
/* Read the id */
- id = qpic_nand_read_reg(NAND_READ_ID, BAM_DESC_UNLOCK_FLAG, cmd_list_ptr);
+ id = qpic_nand_read_reg(NAND_READ_ID, BAM_DESC_UNLOCK_FLAG);
flash->id = id;
flash->vendor = id & 0xff;
@@ -433,7 +434,7 @@
qpic_nand_wait_for_cmd_exec(num_desc);
/* Read buffer status and check for errors. */
- status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0, cmd_list_ptr++);
+ status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0);
if (qpic_nand_check_status(status))
{
@@ -613,8 +614,8 @@
ASSERT(buffer != NULL);
/* Read the vld and dev_cmd1 registers before modifying */
- vld = qpic_nand_read_reg(NAND_DEV_CMD_VLD, 0, ce_array);
- dev_cmd1 = qpic_nand_read_reg(NAND_DEV_CMD1, 0, ce_array);
+ vld = qpic_nand_read_reg(NAND_DEV_CMD_VLD, 0);
+ dev_cmd1 = qpic_nand_read_reg(NAND_DEV_CMD1, 0);
/* Initialize flash cmd */
params.cfg.cmd = NAND_CMD_PAGE_READ;
@@ -724,11 +725,21 @@
return cmd_list_ptr;
}
-/* Reads nand_flash_status and resets nand_flash_status and nand_read_status */
+/* Reads nand_flash_status */
struct cmd_element*
-qpic_nand_add_read_n_reset_status_ce(struct cmd_element *start,
- uint32_t *flash_status_read,
- uint32_t read_status)
+qpic_nand_add_read_ce(struct cmd_element *start, uint32_t *flash_status_read)
+{
+ struct cmd_element *cmd_list_ptr = start;
+
+ bam_add_cmd_element(cmd_list_ptr, NAND_FLASH_STATUS, (uint32_t)PA((addr_t)flash_status_read), CE_READ_TYPE);
+ cmd_list_ptr++;
+
+ return cmd_list_ptr;
+}
+
+/* Resets nand_flash_status and nand_read_status */
+struct cmd_element*
+qpic_nand_reset_status_ce(struct cmd_element *start, uint32_t read_status)
{
struct cmd_element *cmd_list_ptr = start;
uint32_t flash_status_reset;
@@ -738,8 +749,6 @@
flash_status_reset = NAND_FLASH_STATUS_RESET;
read_status_reset = NAND_READ_STATUS_RESET;
- bam_add_cmd_element(cmd_list_ptr, NAND_FLASH_STATUS, (uint32_t)PA((addr_t)flash_status_read), CE_READ_TYPE);
- cmd_list_ptr++;
bam_add_cmd_element(cmd_list_ptr, NAND_FLASH_STATUS, (uint32_t)flash_status_reset, CE_WRITE_TYPE);
cmd_list_ptr++;
@@ -802,12 +811,12 @@
qpic_nand_wait_for_cmd_exec(num_desc);
- status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0, cmd_list_ptr);
+ status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0);
nand_ret = qpic_nand_check_status(status);
/* Dummy read to unlock pipe. */
- status = qpic_nand_read_reg(NAND_FLASH_STATUS, BAM_DESC_UNLOCK_FLAG, cmd_list_ptr);
+ status = qpic_nand_read_reg(NAND_FLASH_STATUS, BAM_DESC_UNLOCK_FLAG);
if (nand_ret)
return NANDC_RESULT_FAILURE;
@@ -891,7 +900,9 @@
{
struct cfg_params cfg;
struct cmd_element *cmd_list_ptr = ce_array;
+ struct cmd_element *cmd_list_read_ptr = ce_read_array;
struct cmd_element *cmd_list_ptr_start = ce_array;
+ struct cmd_element *cmd_list_read_ptr_start = ce_read_array;
uint32_t status;
int num_desc = 0;
uint32_t blk_addr = page / flash.num_pages_per_blk;
@@ -929,32 +940,40 @@
qpic_nand_wait_for_cmd_exec(num_desc);
- status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0, cmd_list_ptr);
+ status = qpic_nand_read_reg(NAND_FLASH_STATUS, 0);
- cmd_list_ptr++;
cmd_list_ptr_start = cmd_list_ptr;
+ cmd_list_read_ptr_start = cmd_list_read_ptr;
/* QPIC controller automatically sends
* GET_STATUS cmd to the nand card because
* of the configuration programmed.
* Read the result of GET_STATUS cmd.
*/
- cmd_list_ptr = qpic_nand_add_read_n_reset_status_ce(cmd_list_ptr, &status, 1);
+ cmd_list_read_ptr = qpic_nand_add_read_ce(cmd_list_read_ptr, &status);
- /* Enqueue the desc for the above commands */
+ /* Enqueue the desc for the NAND_FLASH_STATUS read command */
+ bam_add_one_desc(&bam,
+ CMD_PIPE_INDEX,
+ (unsigned char*)cmd_list_read_ptr_start,
+ PA((uint32_t)cmd_list_read_ptr - (uint32_t)cmd_list_read_ptr_start),
+ BAM_DESC_CMD_FLAG) ;
+
+ cmd_list_ptr = qpic_nand_reset_status_ce(cmd_list_ptr, 1);
+
+ /* Enqueue the desc for NAND_FLASH_STATUS and NAND_READ_STATUS write commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
(unsigned char*)cmd_list_ptr_start,
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_INT_FLAG | BAM_DESC_CMD_FLAG) ;
-
- num_desc = 1;
+ num_desc = 2;
qpic_nand_wait_for_cmd_exec(num_desc);
status = qpic_nand_check_status(status);
/* Dummy read to unlock pipe. */
- nand_ret = qpic_nand_read_reg(NAND_FLASH_STATUS, BAM_DESC_UNLOCK_FLAG, cmd_list_ptr);
+ nand_ret = qpic_nand_read_reg(NAND_FLASH_STATUS, BAM_DESC_UNLOCK_FLAG);
/* Check for status errors*/
if (status)
@@ -979,7 +998,9 @@
enum nand_cfg_value cfg_mode)
{
struct cmd_element *cmd_list_ptr = ce_array;
+ struct cmd_element *cmd_list_read_ptr = ce_read_array;
struct cmd_element *cmd_list_ptr_start = ce_array;
+ struct cmd_element *cmd_list_read_ptr_start = ce_read_array;
uint32_t ecc;
int num_desc = 0;
int int_flag = 0;
@@ -1026,26 +1047,29 @@
num_desc++;
cmd_list_ptr_start = cmd_list_ptr;
+ cmd_list_read_ptr_start = cmd_list_read_ptr;
+
+ cmd_list_read_ptr = qpic_nand_add_read_ce(cmd_list_read_ptr_start, &status[i]);
+ /* Enqueue the desc for the NAND_FLASH_STATUS read command */
+ bam_add_one_desc(&bam,
+ CMD_PIPE_INDEX,
+ (unsigned char*)cmd_list_read_ptr_start,
+ PA((uint32_t)cmd_list_read_ptr - (uint32_t)cmd_list_read_ptr_start),
+ BAM_DESC_CMD_FLAG);
/* Set interrupt bit only for the last CW */
if (i == flash.cws_per_page - 1)
- {
- cmd_list_ptr = qpic_nand_add_read_n_reset_status_ce(cmd_list_ptr,
- &status[i],
- 1);
- }
+ cmd_list_ptr = qpic_nand_reset_status_ce(cmd_list_ptr, 1);
else
- cmd_list_ptr = qpic_nand_add_read_n_reset_status_ce(cmd_list_ptr,
- &status[i],
- 0);
+ cmd_list_ptr = qpic_nand_reset_status_ce(cmd_list_ptr, 0);
- /* Enqueue the desc for the above commands */
+ /* Enqueue the desc for NAND_FLASH_STATUS and NAND_READ_STATUS write commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
(unsigned char*)cmd_list_ptr_start,
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
int_flag | BAM_DESC_CMD_FLAG);
- num_desc++;
+ num_desc += 2;
qpic_nand_wait_for_cmd_exec(num_desc);
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 7760e69..41d0dc0 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -184,10 +184,23 @@
unsigned fused_chip;
unsigned platform_subtype;
struct smem_pmic_info pmic_info[SMEM_V8_SMEM_MAX_PMIC_DEVICES];
- /*
- * Need for 8 bytes alignment
- * while reading from shared memory
- */
+};
+
+struct smem_board_info_v9 {
+ struct smem_board_info_v3 board_info_v3;
+ unsigned platform_version;
+ unsigned fused_chip;
+ unsigned platform_subtype;
+ struct smem_pmic_info pmic_info[SMEM_V8_SMEM_MAX_PMIC_DEVICES];
+ uint32_t foundry_id; /* Used as foundry_id only for v9 */
+};
+
+struct smem_board_info_v10 {
+ struct smem_board_info_v3 board_info_v3;
+ unsigned platform_version;
+ unsigned fused_chip;
+ unsigned platform_subtype;
+ struct smem_pmic_info pmic_info[SMEM_V8_SMEM_MAX_PMIC_DEVICES];
uint32_t foundry_id; /* Used as foundry_id only for v9 */
uint32_t chip_serial; /* Used as serial number for v10 */
};
diff --git a/platform/msmzirc/include/platform/iomap.h b/platform/msmzirc/include/platform/iomap.h
index 5aefde8..6cee378 100644
--- a/platform/msmzirc/include/platform/iomap.h
+++ b/platform/msmzirc/include/platform/iomap.h
@@ -190,4 +190,7 @@
#define BOOT_CONFIG_OFFSET 0x0000602C
#define BOOT_CONFIG_REG (SEC_CTRL_CORE_BASE + BOOT_CONFIG_OFFSET)
+/* QPIC DISPLAY */
+#define QPIC_BASE 0x7980000
+#define APCS_ALIAS0_IPC_INTERRUPT 0xB011008
#endif
diff --git a/platform/msmzirc/include/platform/irqs.h b/platform/msmzirc/include/platform/irqs.h
index c6740d0..a0efe05 100644
--- a/platform/msmzirc/include/platform/irqs.h
+++ b/platform/msmzirc/include/platform/irqs.h
@@ -58,5 +58,5 @@
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + \
NR_BOARD_IRQS)
-
+#define SMD_IRQ (GIC_SPI_START + 168)
#endif /* __IRQS_9635_H */
diff --git a/project/msmzirc.mk b/project/msmzirc.mk
index 1e46819..c88b6c1 100644
--- a/project/msmzirc.mk
+++ b/project/msmzirc.mk
@@ -39,3 +39,8 @@
#Override linker for mdm targets
LD := $(TOOLCHAIN_PREFIX)ld.bfd
+
+ENABLE_SMD_SUPPORT := 1
+ifeq ($(ENABLE_SMD_SUPPORT),1)
+DEFINES += SMD_SUPPORT=1
+endif
diff --git a/target/msm8909/include/target/display.h b/target/msm8909/include/target/display.h
index cc2b4c2..ecd825e 100644
--- a/target/msm8909/include/target/display.h
+++ b/target/msm8909/include/target/display.h
@@ -96,7 +96,7 @@
/*---------------------------------------------------------------------------*/
/* Other Configuration */
/*---------------------------------------------------------------------------*/
-#define DISPLAY_CMDLINE_PREFIX " mdss_mdp.panel="
+#define DISPLAY_CMDLINE_PREFIX " mdss_mdp3.panel="
#define MIPI_FB_ADDR 0x83200000
diff --git a/target/msm8909/oem_panel.c b/target/msm8909/oem_panel.c
index 6d5e586..8d69778 100644
--- a/target/msm8909/oem_panel.c
+++ b/target/msm8909/oem_panel.c
@@ -39,6 +39,7 @@
#include "include/panel_hx8394d_720p_video.h"
#include "include/panel_hx8379a_fwvga_skua_video.h"
+#include "include/panel_sharp_qhd_video.h"
#define DISPLAY_MAX_PANEL_DETECTION 0
@@ -56,6 +57,7 @@
enum {
HX8394D_720P_VIDEO_PANEL,
HX8379A_FWVGA_SKUA_VIDEO_PANEL,
+ SHARP_QHD_VIDEO_PANEL,
UNKNOWN_PANEL
};
@@ -66,6 +68,7 @@
static struct panel_list supp_panels[] = {
{"hx8394d_720p_video", HX8394D_720P_VIDEO_PANEL},
{"hx8379a_fwvga_skua_video", HX8379A_FWVGA_SKUA_VIDEO_PANEL},
+ {"sharp_qhd_video", SHARP_QHD_VIDEO_PANEL}
};
static uint32_t panel_id;
@@ -138,15 +141,41 @@
panelstruct->panelresetseq
= &hx8379a_fwvga_skua_video_reset_seq;
panelstruct->backlightinfo = &hx8379a_fwvga_skua_video_backlight;
- pinfo->mipi.panel_cmds
+ pinfo->mipi.panel_on_cmds
= hx8379a_fwvga_skua_video_on_command;
- pinfo->mipi.num_of_panel_cmds
+ pinfo->mipi.num_of_panel_on_cmds
= HX8379A_FWVGA_SKUA_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = hx8379a_fwvga_skua_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = HX8379A_FWVGA_SKUA_VIDEO_OFF_COMMAND;
memcpy(phy_db->timing,
hx8379a_fwvga_skua_video_timings, TIMING_SIZE);
pinfo->mipi.signature = HX8379A_FWVGA_SKUA_VIDEO_SIGNATURE;
break;
-
+ case SHARP_QHD_VIDEO_PANEL:
+ panelstruct->paneldata = &sharp_qhd_video_panel_data;
+ panelstruct->panelres = &sharp_qhd_video_panel_res;
+ panelstruct->color = &sharp_qhd_video_color;
+ panelstruct->videopanel = &sharp_qhd_video_video_panel;
+ panelstruct->commandpanel = &sharp_qhd_video_command_panel;
+ panelstruct->state = &sharp_qhd_video_state;
+ panelstruct->laneconfig = &sharp_qhd_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &sharp_qhd_video_timing_info;
+ panelstruct->panelresetseq
+ = &sharp_qhd_video_panel_reset_seq;
+ panelstruct->backlightinfo = &sharp_qhd_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = sharp_qhd_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = SHARP_QHD_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = sharp_qhd_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = SHARP_QHD_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing, sharp_qhd_video_timings, TIMING_SIZE);
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
diff --git a/target/msm8916/include/target/display.h b/target/msm8916/include/target/display.h
index 5b90130..1b6b775 100755
--- a/target/msm8916/include/target/display.h
+++ b/target/msm8916/include/target/display.h
@@ -49,6 +49,14 @@
"msmgpio", 98, 3, 1, 0, 1
};
+static struct gpio_pin bkl_gpio_1 = {
+ "msmgpio", 75, 3, 1, 0, 1
+};
+
+static struct gpio_pin bkl_gpio_2 = {
+ "msmgpio", 77, 3, 1, 0, 1
+};
+
static struct gpio_pin enp_gpio = {
"msmgpio", 97, 3, 1, 0, 1
};
@@ -133,10 +141,31 @@
enum qrd_subtype
{
HW_PLATFORM_SUBTYPE_DEFAULT = 0,
+ HW_PLATFORM_SUBTYPE_CDP_1 = 1,
+ HW_PLATFORM_SUBTYPE_MTP_3 = 3,
HW_PLATFORM_SUBTYPE_SKUH = 4,
HW_PLATFORM_SUBTYPE_SKUI = 5, /* msm8916 */
HW_PLATFORM_SUBTYPE_SKUK = 5, /* msm8939 */
HW_PLATFORM_SUBTYPE_SKUT1 = 0x40, /* msm8916 */
};
+
+enum {
+ JDI_1080P_VIDEO_PANEL,
+ NT35590_720P_VIDEO_PANEL,
+ NT35590_720P_CMD_PANEL,
+ INNOLUX_720P_VIDEO_PANEL,
+ OTM8019A_FWVGA_VIDEO_PANEL,
+ OTM1283A_720P_VIDEO_PANEL,
+ NT35596_1080P_VIDEO_PANEL,
+ SHARP_WQXGA_DUALDSI_VIDEO_PANEL,
+ JDI_FHD_VIDEO_PANEL,
+ HX8379A_FWVGA_VIDEO_PANEL,
+ HX8394D_720P_VIDEO_PANEL,
+ NT35521_WXGA_VIDEO_PANEL,
+ UNKNOWN_PANEL
+};
+
+uint32_t get_panel_id(void);
+
#endif
diff --git a/target/msm8916/oem_panel.c b/target/msm8916/oem_panel.c
index 44abdf7..5ab2079 100755
--- a/target/msm8916/oem_panel.c
+++ b/target/msm8916/oem_panel.c
@@ -67,22 +67,6 @@
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
-enum {
-JDI_1080P_VIDEO_PANEL,
-NT35590_720P_VIDEO_PANEL,
-NT35590_720P_CMD_PANEL,
-INNOLUX_720P_VIDEO_PANEL,
-OTM8019A_FWVGA_VIDEO_PANEL,
-OTM1283A_720P_VIDEO_PANEL,
-NT35596_1080P_VIDEO_PANEL,
-SHARP_WQXGA_DUALDSI_VIDEO_PANEL,
-JDI_FHD_VIDEO_PANEL,
-HX8379A_FWVGA_VIDEO_PANEL,
-HX8394D_720P_VIDEO_PANEL,
-NT35521_WXGA_VIDEO_PANEL,
-UNKNOWN_PANEL
-};
-
/*
* The list of panels that are supported on this target.
* Any panel in this list can be selected using fastboot oem command.
@@ -134,6 +118,11 @@
return NO_ERROR;
}
+uint32_t get_panel_id(void)
+{
+ return panel_id;
+}
+
static int init_panel_data(struct panel_struct *panelstruct,
struct msm_panel_info *pinfo,
struct mdss_dsi_phy_ctrl *phy_db)
@@ -485,22 +474,28 @@
switch (hw_id) {
case HW_PLATFORM_MTP:
panel_id = JDI_1080P_VIDEO_PANEL;
+ if (hw_subtype == HW_PLATFORM_SUBTYPE_MTP_3)
+ panel_id = JDI_FHD_VIDEO_PANEL;
break;
case HW_PLATFORM_SURF:
- panel_id = JDI_1080P_VIDEO_PANEL;
- switch (auto_pan_loop) {
- case 0:
+ if (hw_subtype == HW_PLATFORM_SUBTYPE_CDP_1) {
+ panel_id = JDI_FHD_VIDEO_PANEL;
+ } else {
panel_id = JDI_1080P_VIDEO_PANEL;
- break;
- case 1:
- panel_id = NT35590_720P_VIDEO_PANEL;
- break;
- default:
- panel_id = UNKNOWN_PANEL;
- dprintf(CRITICAL, "Unknown panel\n");
- return PANEL_TYPE_UNKNOWN;
+ switch (auto_pan_loop) {
+ case 0:
+ panel_id = JDI_1080P_VIDEO_PANEL;
+ break;
+ case 1:
+ panel_id = NT35590_720P_VIDEO_PANEL;
+ break;
+ default:
+ panel_id = UNKNOWN_PANEL;
+ dprintf(CRITICAL, "Unknown panel\n");
+ return PANEL_TYPE_UNKNOWN;
+ }
+ auto_pan_loop++;
}
- auto_pan_loop++;
break;
case HW_PLATFORM_QRD:
target_id = board_target_id();
diff --git a/target/msm8916/target_display.c b/target/msm8916/target_display.c
index ea69e86..539883d 100755
--- a/target/msm8916/target_display.c
+++ b/target/msm8916/target_display.c
@@ -290,6 +290,7 @@
int ret = NO_ERROR;
uint32_t hw_id = board_hardware_id();
uint32_t hw_subtype = board_hardware_subtype();
+ uint32_t panel_id = get_panel_id();
if (enable) {
if (pinfo->mipi.use_enable_gpio) {
@@ -317,10 +318,29 @@
if (hw_id == HW_PLATFORM_MTP || hw_id == HW_PLATFORM_SURF) {
/* configure backlight gpio for MTP & CDP */
- gpio_tlmm_config(bkl_gpio.pin_id, 0,
- bkl_gpio.pin_direction, bkl_gpio.pin_pull,
- bkl_gpio.pin_strength, bkl_gpio.pin_state);
- gpio_set_dir(bkl_gpio.pin_id, 2);
+ /*JDI incell panel requires two additional GPIO's in 75->98->77 order*/
+ if (panel_id == JDI_FHD_VIDEO_PANEL) {
+ dprintf(INFO, "panel_id = %d \n", panel_id);
+ gpio_tlmm_config(bkl_gpio_1.pin_id, 0,
+ bkl_gpio_1.pin_direction, bkl_gpio_1.pin_pull,
+ bkl_gpio_1.pin_strength, bkl_gpio_1.pin_state);
+ gpio_set_dir(bkl_gpio_1.pin_id, 2);
+
+ gpio_tlmm_config(bkl_gpio.pin_id, 0,
+ bkl_gpio.pin_direction, bkl_gpio.pin_pull,
+ bkl_gpio.pin_strength, bkl_gpio.pin_state);
+ gpio_set_dir(bkl_gpio.pin_id, 2);
+
+ gpio_tlmm_config(bkl_gpio_2.pin_id, 0,
+ bkl_gpio_2.pin_direction, bkl_gpio_2.pin_pull,
+ bkl_gpio_2.pin_strength, bkl_gpio_2.pin_state);
+ gpio_set_dir(bkl_gpio_2.pin_id, 2);
+ } else {
+ gpio_tlmm_config(bkl_gpio.pin_id, 0,
+ bkl_gpio.pin_direction, bkl_gpio.pin_pull,
+ bkl_gpio.pin_strength, bkl_gpio.pin_state);
+ gpio_set_dir(bkl_gpio.pin_id, 2);
+ }
}
gpio_tlmm_config(reset_gpio.pin_id, 0,
diff --git a/target/msmzirc/init.c b/target/msmzirc/init.c
index 542558c..9a4d870 100644
--- a/target/msmzirc/init.c
+++ b/target/msmzirc/init.c
@@ -46,6 +46,8 @@
#include <platform/clock.h>
#include <qmp_phy.h>
#include <qusb2_phy.h>
+#include <rpm-smd.h>
+#include <scm.h>
extern void smem_ptable_init(void);
extern void smem_add_modem_partitions(struct ptable *flash_ptable);
@@ -158,6 +160,7 @@
update_ptable_names();
flash_set_ptable(&flash_ptable);
+ rpm_smd_init();
}
}
@@ -326,6 +329,7 @@
void target_uninit(void)
{
+ rpm_smd_uninit();
if (platform_boot_dev_isemmc())
{
mmc_put_card_to_sleep(dev);