msm8930: Pmic changes to support splash screen on msm8930

This pmic change support splash screen functionality
for msm8930 EVT device for video mode panel.

Change-Id: I7ffdccef4089ea1013fb977ef3a6ddcd070d46ed
diff --git a/dev/pmic/pm8921/pm8921.c b/dev/pmic/pm8921/pm8921.c
index cafa6a8..9cf5e91 100644
--- a/dev/pmic/pm8921/pm8921.c
+++ b/dev/pmic/pm8921/pm8921.c
@@ -747,3 +747,23 @@
 
 	return 0;
 }
+
+int pm8921_configure_wled(void)
+{
+	pm8921_masked_write(WLED_BOOST_CFG_REG, 0xFF, 0x47);
+	pm8921_masked_write(WLED_HIGH_POLE_CAP_REG, 0xFF, 0x2c);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(2), 0xFF, 0x19);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(3), 0xFF, 0x59);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(4), 0xFF, 0x59);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(5), 0xFF, 0x66);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(6), 0xFF, 0x66);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(7), 0xFF, 0x0f);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(8), 0xFF, 0xff);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(9), 0xFF, 0x0f);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(10), 0xFF, 0xff);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(12), 0xFF, 0x16);
+	pm8921_masked_write(SSBI_REG_ADDR_WLED_CTRL(13), 0xFF, 0x55);
+	pm8921_masked_write(WLED_MOD_CTRL_REG, 0xFF, 0x7f);
+	pm8921_masked_write(WLED_SYNC_REG, WLED_SYNC_MASK,	WLED_SYNC_VAL);
+	pm8921_masked_write(WLED_SYNC_REG, WLED_SYNC_MASK,	WLED_SYNC_RESET_VAL);
+}
diff --git a/dev/pmic/pm8921/pm8921_hw.h b/dev/pmic/pm8921/pm8921_hw.h
index ea3046f..02771ce 100644
--- a/dev/pmic/pm8921/pm8921_hw.h
+++ b/dev/pmic/pm8921/pm8921_hw.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2012, Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2013, Linux Foundation. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
@@ -154,6 +154,18 @@
 #define PLDO_TYPE                             0
 #define NLDO_TYPE                             1
 
+#define SSBI_REG_ADDR_WLED_CTRL_BASE    0x25A
+#define SSBI_REG_ADDR_WLED_CTRL(n)      (SSBI_REG_ADDR_WLED_CTRL_BASE + (n) - 1)
+
+/* wled control registers */
+#define WLED_MOD_CTRL_REG              SSBI_REG_ADDR_WLED_CTRL(1)
+#define WLED_SYNC_REG                  SSBI_REG_ADDR_WLED_CTRL(11)
+#define WLED_BOOST_CFG_REG             SSBI_REG_ADDR_WLED_CTRL(14)
+#define WLED_HIGH_POLE_CAP_REG         SSBI_REG_ADDR_WLED_CTRL(16)
+#define WLED_SYNC_VAL                  0x07
+#define WLED_SYNC_RESET_VAL            0x00
+#define WLED_SYNC_MASK                 0xF8
+
 #define PM8921_MVS_5V_HDMI_SWITCH             0x70
 
 #define LDO(_name, _type, _test_reg, _ctrl_reg) \