Merge "platform: msm_shared: Ignore End Of Transfer(EOT) interrupt"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index a006ab1..d732a4e 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -102,6 +102,7 @@
static const char *loglevel = " quiet";
static const char *battchg_pause = " androidboot.mode=charger";
static const char *auth_kernel = " androidboot.authorized_kernel=true";
+static const char *secondary_gpt_enable = " gpt";
static const char *baseband_apq = " androidboot.baseband=apq";
static const char *baseband_msm = " androidboot.baseband=msm";
@@ -200,6 +201,7 @@
int have_cmdline = 0;
unsigned char *cmdline_final = NULL;
int pause_at_bootup = 0;
+ bool gpt_exists = partition_gpt_exists();
if (cmdline && cmdline[0]) {
cmdline_len = strlen(cmdline);
@@ -212,6 +214,9 @@
cmdline_len += strlen(usb_sn_cmdline);
cmdline_len += strlen(sn_buf);
+ if (boot_into_recovery && gpt_exists)
+ cmdline_len += strlen(secondary_gpt_enable);
+
if (boot_into_ffbm) {
cmdline_len += strlen(androidboot_mode);
cmdline_len += strlen(ffbm_mode_string);
@@ -293,6 +298,12 @@
have_cmdline = 1;
while ((*dst++ = *src++));
+ if (boot_into_recovery && gpt_exists) {
+ src = secondary_gpt_enable;
+ if (have_cmdline) --dst;
+ while ((*dst++ = *src++));
+ }
+
if (boot_into_ffbm) {
src = androidboot_mode;
if (have_cmdline) --dst;
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
new file mode 100755
index 0000000..5cbe292
--- /dev/null
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -0,0 +1,185 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+
+#include "gcdb_autopll.h"
+
+static struct mdss_dsi_pll_config pll_data;
+
+static uint32_t calculate_bitclock(struct msm_panel_info *pinfo)
+{
+ uint32_t ret = NO_ERROR;
+ uint32_t h_period = 0, v_period = 0;
+
+ h_period = pinfo->xres + pinfo->lcdc.h_back_porch +
+ pinfo->lcdc.h_front_porch + pinfo->lcdc.h_pulse_width +
+ pinfo->lcdc.xres_pad;
+
+ v_period = pinfo->yres + pinfo->lcdc.v_back_porch +
+ pinfo->lcdc.v_front_porch + pinfo->lcdc.v_pulse_width +
+ pinfo->lcdc.yres_pad;
+
+ /* Pixel clock rate */
+ pll_data.pixel_clock = h_period * v_period * pinfo->mipi.frame_rate;
+
+ /* Store all bit clock form data */
+ if (pinfo->mipi.bitclock == 0)
+ pll_data.bit_clock = (pll_data.pixel_clock * pinfo->bpp) /
+ pinfo->mipi.num_of_lanes;
+ else
+ pll_data.bit_clock = pinfo->mipi.bitclock;
+
+ pll_data.byte_clock = pll_data.bit_clock >> 3;
+
+ pll_data.halfbit_clock = pll_data.bit_clock >> 1;
+
+ return ret;
+}
+
+static uint32_t calculate_div1()
+{
+ uint32_t ret = NO_ERROR;
+
+ /* div1 - there is divide by 2 logic present */
+ if (pll_data.halfbit_clock > HALFBIT_CLOCK1) {
+ pll_data.posdiv1 = 0x0; /*div 1 */
+ pll_data.vco_clock = pll_data.halfbit_clock << 1;
+ } else if (pll_data.halfbit_clock > HALFBIT_CLOCK2) {
+ pll_data.posdiv1 = 0x1; /*div 2 */
+ pll_data.vco_clock = pll_data.halfbit_clock << 2;
+ } else if (pll_data.halfbit_clock > HALFBIT_CLOCK3) {
+ pll_data.posdiv1 = 0x3; /*div 4 */
+ pll_data.vco_clock = pll_data.halfbit_clock << 3;
+ } else if (pll_data.halfbit_clock > HALFBIT_CLOCK4) {
+ pll_data.posdiv1 = 0x4; /*div 5 */
+ pll_data.vco_clock = pll_data.halfbit_clock * 10;
+ } else {
+ dprintf(CRITICAL, "Not able to calculate posdiv1\n");
+ }
+
+ return ret;
+}
+
+static uint32_t calculate_div3(uint8_t bpp, uint8_t num_of_lanes)
+{
+ uint32_t ret = NO_ERROR;
+ pll_data.pclk_m = 0x1; /* M = 1, N= 1 */
+ pll_data.pclk_n = 0xFF; /* ~ (N-M) = 0xff */
+ pll_data.pclk_d = 0xFF; /* ~N = 0xFF */
+
+ /* formula is ( vco_clock / pdiv_digital) / mnd = pixel_clock */
+
+ /* div3 */
+ switch (bpp) {
+ case BITS_18:
+ if (num_of_lanes == 3) {
+ pll_data.posdiv3 = pll_data.vco_clock /
+ pll_data.pixel_clock;
+ } else {
+ pll_data.posdiv3 = (pll_data.pixel_clock * 2 / 9) /
+ pll_data.vco_clock;
+ pll_data.pclk_m = 0x2; /* M = 2,N = 9 */
+ pll_data.pclk_n = 0xF8;
+ pll_data.pclk_d = 0xF6;
+ }
+ break;
+ case BITS_16:
+ if (num_of_lanes == 3) {
+ pll_data.posdiv3 = (pll_data.pixel_clock * 3 / 8) /
+ pll_data.vco_clock;
+ pll_data.pclk_m = 0x3; /* M = 3, N = 9 */
+ pll_data.pclk_n = 0xFA;
+ pll_data.pclk_d = 0xF7;
+ } else {
+ pll_data.posdiv3 = pll_data.vco_clock /
+ pll_data.pixel_clock;
+ }
+ break;
+ case BITS_24:
+ default:
+ pll_data.posdiv3 = pll_data.vco_clock /
+ pll_data.pixel_clock;
+ break;
+ }
+
+ pll_data.posdiv3--; /* Register needs one value less */
+}
+
+static uint32_t calculate_vco(uint8_t bpp, uint8_t num_of_lanes)
+{
+ uint32_t ret = NO_ERROR;
+ uint8_t counter = 0;
+ uint32_t temprate = 0;
+
+ /* If half bitclock is more than VCO min value */
+ if (pll_data.halfbit_clock > VCO_MIN_CLOCK) {
+
+ /* Direct Mode */
+
+ /* support vco clock to max value only */
+ if (pll_data.halfbit_clock > VCO_MAX_CLOCK)
+ pll_data.vco_clock = VCO_MAX_CLOCK;
+ else
+ pll_data.vco_clock = pll_data.halfbit_clock;
+ pll_data.directpath = 0x0;
+ pll_data.posdiv1 = 0x0; /*DSI spec says 0 - div 1 */
+ /*1 - div 2 */
+ /*F - div 16 */
+ } else {
+ /* Indirect Mode */
+
+ pll_data.directpath = 0x02; /* set bit 1 to enable for
+ indirect path */
+
+ calculate_div1();
+ }
+
+ /* calculate mnd and div3 for direct and indirect path */
+ calculate_div3(bpp, num_of_lanes);
+
+ return ret;
+}
+
+uint32_t calculate_clock_config(struct msm_panel_info *pinfo)
+{
+ uint32_t ret = NO_ERROR;
+
+ calculate_bitclock(pinfo);
+
+ calculate_vco(pinfo->bpp, pinfo->mipi.num_of_lanes);
+
+ pinfo->mipi.dsi_pll_config = &pll_data;
+
+ return ret;
+}
diff --git a/dev/gcdb/display/gcdb_autopll.h b/dev/gcdb/display/gcdb_autopll.h
new file mode 100755
index 0000000..259abd6
--- /dev/null
+++ b/dev/gcdb/display/gcdb_autopll.h
@@ -0,0 +1,56 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _GCDB_AUTOPLL_H_
+#define _GCDB_AUTOPLL_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+
+#define VCO_MIN_CLOCK 350000000
+#define VCO_MAX_CLOCK 750000000
+
+#define HALFBIT_CLOCK1 175000000 /* VCO min clock div by 2 */
+#define HALFBIT_CLOCK2 88000000 /* VCO min clock div by 4 */
+#define HALFBIT_CLOCK3 44000000 /* VCO min clock div by 8 */
+#define HALFBIT_CLOCK4 40000000 /* VCO min clock div by 9 */
+
+#define BITS_24 24
+#define BITS_18 18
+#define BITS_16 16
+
+/*---------------------------------------------------------------------------*/
+/* Structure definition */
+/*---------------------------------------------------------------------------*/
+
+uint32_t calculate_clock_config(struct msm_panel_info *pinfo);
+
+#endif /*_GCDB_AUTOPLL_H_ */
diff --git a/dev/gcdb/display/gcdb_display.c b/dev/gcdb/display/gcdb_display.c
new file mode 100755
index 0000000..e117ba2
--- /dev/null
+++ b/dev/gcdb/display/gcdb_display.c
@@ -0,0 +1,200 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <board.h>
+#include <mdp5.h>
+#include <platform/gpio.h>
+#include <mipi_dsi.h>
+
+#include "include/display_resource.h"
+#include "include/panel.h"
+#include "panel_display.h"
+#include "gcdb_display.h"
+#include "target/display.h"
+#include "gcdb_autopll.h"
+
+/*---------------------------------------------------------------------------*/
+/* static */
+/*---------------------------------------------------------------------------*/
+static struct msm_fb_panel_data panel;
+struct panel_struct panelstruct;
+static uint8_t display_enable;
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db;
+
+
+/*---------------------------------------------------------------------------*/
+/* Extern */
+/*---------------------------------------------------------------------------*/
+extern int msm_display_init(struct msm_fb_panel_data *pdata);
+extern int msm_display_off();
+
+static uint32_t panel_backlight_ctrl(uint8_t enable)
+{
+ uint32_t ret = NO_ERROR;
+
+ ret = target_backlight_ctrl(enable);
+
+ return ret;
+}
+
+static uint32_t mdss_dsi_panel_reset(uint8_t enable)
+{
+ uint32_t ret = NO_ERROR;
+
+ ret = target_panel_reset(enable, &reset_gpio,
+ &enable_gpio, &reset_sequence);
+
+ return ret;
+}
+
+static uint32_t mdss_dsi_panel_clock(uint8_t enable,
+ struct msm_panel_info *pinfo)
+{
+ uint32_t ret = NO_ERROR;
+
+ ret = calculate_clock_config(pinfo);
+ if (ret) {
+ dprintf(CRITICAL, "Clock calculation failed \n");
+ /* should it stop here ? check with display team */
+ }
+
+ ret = target_panel_clock(enable, pinfo);
+
+ return ret;
+}
+
+static int mdss_dsi_panel_power(uint8_t enable)
+{
+ int ret = NO_ERROR;
+
+ if (enable) {
+
+ /* Enable backlight */
+ ret = panel_backlight_ctrl(enable);
+ if (ret) {
+ dprintf(CRITICAL, "Backlight enable failed \n");
+ return ret;
+ }
+ ret = target_ldo_ctrl(enable, ldo_entry_array,
+ TOTAL_LDO_DEFINED);
+ if (ret) {
+ dprintf(CRITICAL, "LDO control enable failed \n");
+ return ret;
+ }
+
+ /* Panel Reset */
+ ret = mdss_dsi_panel_reset(enable);
+ if (ret) {
+ dprintf(CRITICAL, "panel reset failed \n");
+ return ret;
+ }
+ dprintf(SPEW, "Panel power on done\n");
+ } else {
+ /* Disable panel, backlight and ldo */
+ ret = mdss_dsi_panel_reset(enable);
+ if (ret) {
+ dprintf(CRITICAL, "panel reset disable failed \n");
+ return ret;
+ }
+
+ ret = panel_backlight_ctrl(enable);
+ if (ret) {
+ dprintf(CRITICAL, "Backlight disable failed \n");
+ return ret;
+ }
+
+ ret = target_ldo_ctrl(enable, ldo_entry_array,
+ TOTAL_LDO_DEFINED);
+ if (ret) {
+ dprintf(CRITICAL, "ldo control disable failed \n");
+ return ret;
+ }
+ dprintf(SPEW, "Panel power off done\n");
+ }
+
+ return ret;
+}
+
+static void init_platform_data()
+{
+ memcpy(dsi_video_mode_phy_db.regulator, panel_regulator_settings,
+ REGULATOR_SIZE);
+ memcpy(dsi_video_mode_phy_db.ctrl, panel_physical_ctrl,
+ PHYSICAL_SIZE);
+ memcpy(dsi_video_mode_phy_db.strength, panel_strength_ctrl,
+ STRENGTH_SIZE);
+ memcpy(dsi_video_mode_phy_db.bistCtrl, panel_bist_ctrl, BIST_SIZE);
+ memcpy(dsi_video_mode_phy_db.laneCfg, panel_lane_config, LANE_SIZE);
+}
+
+void gcdb_display_init(uint32_t rev, void *base)
+{
+
+ if (!oem_panel_select(&panelstruct, &(panel.panel_info),
+ &dsi_video_mode_phy_db)) {
+ dprintf(CRITICAL, "Target panel init not found!\n");
+ return;
+ }
+
+ init_platform_data();
+
+ if (dsi_panel_init(&(panel.panel_info), &panelstruct)) {
+ dprintf(CRITICAL, "DSI panel init failed!\n");
+ return;
+ }
+
+ panel.panel_info.mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+
+ panel.pll_clk_func = mdss_dsi_panel_clock;
+ panel.power_func = mdss_dsi_panel_power;
+ panel.fb.base = base;
+ panel.fb.width = panel.panel_info.xres;
+ panel.fb.height = panel.panel_info.yres;
+ panel.fb.stride = panel.panel_info.xres;
+ panel.fb.bpp = panel.panel_info.bpp;
+ panel.fb.format = panel.panel_info.mipi.dst_format;
+ panel.mdp_rev = rev;
+
+ if (msm_display_init(&panel)) {
+ dprintf(CRITICAL, "Display init failed!\n");
+ return;
+ }
+
+ display_enable = 1;
+}
+
+void gcdb_display_shutdown(void)
+{
+ if (display_enable)
+ msm_display_off();
+}
diff --git a/dev/gcdb/display/gcdb_display.h b/dev/gcdb/display/gcdb_display.h
new file mode 100755
index 0000000..dd6a6a8
--- /dev/null
+++ b/dev/gcdb/display/gcdb_display.h
@@ -0,0 +1,62 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _GCDB_DISPLAY_H_
+#define _GCDB_DISPLAY_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+#include "include/display_resource.h"
+
+#define TIMING_SIZE 48
+#define REGULATOR_SIZE 28
+#define PHYSICAL_SIZE 16
+#define STRENGTH_SIZE 8
+#define BIST_SIZE 6
+#define LANE_SIZE 45
+
+/*---------------------------------------------------------------------------*/
+/* API */
+/*---------------------------------------------------------------------------*/
+
+int target_backlight_ctrl(uint8_t enable);
+int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo);
+int target_panel_reset(uint8_t enable,
+ struct gpio_pin *resetgpio,
+ struct gpio_pin *enablegpio,
+ struct panel_reset_sequence *resetseq);
+int target_ldo_ctrl(uint8_t enable, struct ldo_entry ldo_entry_array[],
+ uint8_t totalldo);
+
+void gcdb_display_init(unsigned int rev, void *base);
+void gcdb_display_shutdown();
+
+#endif /*_GCDB_DISPLAY_H_ */
diff --git a/dev/gcdb/display/include/display_resource.h b/dev/gcdb/display/include/display_resource.h
new file mode 100755
index 0000000..24a375d
--- /dev/null
+++ b/dev/gcdb/display/include/display_resource.h
@@ -0,0 +1,80 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _DISPLAY_RESOURCE_H_
+#define _DISPLAY_RESOURCE_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+#include <smem.h>
+#include <board.h>
+
+#define TOTAL_RESET_GPIO_CTRL 5
+
+#define TOTAL_LDO_CTRL 5
+
+/*---------------------------------------------------------------------------*/
+/* Structure definition */
+/*---------------------------------------------------------------------------*/
+
+/*GPIO pin structure to define reset pin, enable pin, te pin, etc. */
+typedef struct gpio_pin{
+
+ char *pin_source;
+ uint32_t pin_id;
+ uint32_t pin_strength;
+ uint32_t pin_direction;
+ uint32_t pin_pull;
+ uint32_t pin_state;
+};
+
+typedef struct panel_reset_sequence {
+
+ uint8_t pin_state[TOTAL_RESET_GPIO_CTRL];
+ uint32_t sleep[TOTAL_RESET_GPIO_CTRL];
+ uint8_t pin_direction;
+};
+
+/*LDO entry structure for different LDO entries. */
+typedef struct ldo_entry{
+ char *ldo_name;
+ uint32_t ldo_id;
+ uint32_t ldo_type;
+ uint32_t ldo_voltage;
+ uint32_t ldo_enable_load;
+ uint32_t ldo_disable_load;
+ uint32_t ldo_preon_sleep;
+ uint32_t ldo_poston_sleep;
+ uint32_t ldo_preoff_sleep;
+ uint32_t ldo_postoff_sleep;
+};
+
+#endif /*_DISPLAY_RESOURCE_H_ */
diff --git a/dev/gcdb/display/include/panel.h b/dev/gcdb/display/include/panel.h
new file mode 100755
index 0000000..726af88
--- /dev/null
+++ b/dev/gcdb/display/include/panel.h
@@ -0,0 +1,155 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_H_
+#define _PANEL_H_
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <debug.h>
+#include <smem.h>
+
+/*---------------------------------------------------------------------------*/
+/* Structure definition */
+/*---------------------------------------------------------------------------*/
+
+/*Panel Configuration */
+typedef struct panel_config{
+
+ char *panel_name;
+ char *panel_controller;
+ char *panel_compatible;
+ uint16_t panel_interface;
+ uint16_t panel_type;
+ char *panel_destination;
+ uint32_t panel_orientation;
+ uint32_t panel_clockrate;
+ uint16_t panel_framerate;
+ uint16_t panel_channelid;
+ uint16_t dsi_virtualchannel_id;
+ uint16_t panel_broadcast_mode;
+ uint16_t dsi_lp11_atinit;
+ uint16_t dsi_initmaster_time;
+ uint16_t dsi_stream;
+ uint8_t interleave_mode;
+ uint32_t panel_bitclock_freq;
+ uint32_t panel_operating_mode;
+ uint32_t panel_with_enable_gpio;
+};
+
+typedef struct panel_resolution{
+
+ uint16_t panel_width;
+ uint16_t panel_height;
+ uint16_t hfront_porch;
+ uint16_t hback_porch;
+ uint16_t hpulse_width;
+ uint16_t hsync_skew;
+ uint16_t vfront_porch;
+ uint16_t vback_porch;
+ uint16_t vpulse_width;
+ uint16_t hleft_border;
+ uint16_t hright_border;
+ uint16_t vtop_border;
+ uint16_t vbottom_border;
+ uint16_t hactive_res;
+ uint16_t vactive_res;
+ uint16_t invert_data_polarity;
+ uint16_t invert_vsync_polarity;
+ uint16_t invert_hsync_polarity;
+};
+
+typedef struct color_info{
+ uint8_t color_format;
+ uint8_t color_order;
+ uint8_t underflow_color;
+ uint8_t border_color;
+ uint8_t pixel_packing;
+ uint8_t pixel_alignment;
+};
+
+typedef struct command_state {
+ uint8_t oncommand_state;
+ uint8_t offcommand_state;
+};
+
+typedef struct videopanel_info {
+ uint8_t hsync_pulse;
+ uint8_t hfp_power_mode;
+ uint8_t hbp_power_mode;
+ uint8_t hsa_power_mode;
+ uint8_t bllp_eof_power_mode;
+ uint8_t bllp_power_mode;
+ uint8_t traffic_mode;
+ uint8_t dma_delayafter_vsync;
+ uint32_t bllp_eof_power;
+};
+
+typedef struct commandpanel_info {
+ uint8_t techeck_enable;
+ uint8_t tepin_select;
+ uint8_t teusing_tepin;
+ uint8_t autorefresh_enable;
+ uint32_t autorefresh_framenumdiv;
+ uint32_t tevsync_rdptr_irqline;
+ uint32_t tevsync_continue_lines;
+ uint32_t tevsync_startline_divisor;
+ uint32_t tepercent_variance;
+ uint8_t tedcs_command;
+ uint8_t disable_eotafter_hsxfer;
+ uint32_t cmdmode_idletime;
+};
+
+typedef struct lane_configuration {
+ uint8_t dsi_lanes;
+ uint8_t dsi_lanemap;
+ uint8_t lane0_state;
+ uint8_t lane1_state;
+ uint8_t lane2_state;
+ uint8_t lane3_state;
+};
+
+typedef struct panel_timing {
+ uint8_t dsi_mdp_trigger;
+ uint8_t dsi_dma_trigger;
+ uint8_t tclk_post;
+ uint8_t tclk_pre;
+};
+
+typedef struct backlight {
+ uint16_t bl_interface_type;
+ uint16_t bl_min_level;
+ uint16_t bl_max_level;
+ uint16_t bl_step;
+ uint16_t bl_pmic_controltype;
+ char *bl_pmic_model;
+};
+
+#endif /*_PANEL_H_ */
diff --git a/dev/gcdb/display/include/panel_hx8394a_720p_video.h b/dev/gcdb/display/include/panel_hx8394a_720p_video.h
new file mode 100644
index 0000000..fd62f1e
--- /dev/null
+++ b/dev/gcdb/display/include/panel_hx8394a_720p_video.h
@@ -0,0 +1,277 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_HX8394A_720P_VIDEO_H_
+
+#define _PANEL_HX8394A_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config hx8394a_720p_video_panel_data = {
+ "hx8394a 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution hx8394a_720p_video_panel_res = {
+ 720, 1280, 79, 59, 60, 0, 7, 10, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info hx8394a_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char hx8394a_720p_video_on_cmd0[] = {
+0x04, 0x00, 0x39, 0xC0,
+0xb9, 0xff, 0x83, 0x94,
+ };
+
+
+static char hx8394a_720p_video_on_cmd1[] = {
+0x05, 0x00, 0x39, 0xC0,
+0xc7, 0x00, 0x10, 0x00,
+0x10, 0xFF, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd2[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xbc, 0x07, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd3[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xba, 0x13, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd4[] = {
+0x10, 0x00, 0x39, 0xC0,
+0xb1, 0x01, 0x00, 0x07,
+0x83, 0x01, 0x12, 0x0f,
+0x32, 0x38, 0x29, 0x29,
+0x50, 0x02, 0x00, 0x00,
+ };
+
+
+static char hx8394a_720p_video_on_cmd5[] = {
+0x07, 0x00, 0x39, 0xC0,
+0xb2, 0x00, 0xc8, 0x09,
+0x05, 0x00, 0x71, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd6[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xcc, 0x05, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd7[] = {
+0x00, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_video_on_cmd8[] = {
+0x35, 0x00, 0x39, 0xC0,
+0xd5, 0x00, 0x00, 0x00,
+0x00, 0x0a, 0x00, 0x01,
+0x00, 0x00, 0x00, 0x33,
+0x00, 0x23, 0x45, 0x67,
+0x01, 0x01, 0x23, 0x88,
+0x88, 0x88, 0x88, 0x88,
+0x88, 0x88, 0x99, 0x99,
+0x99, 0x88, 0x88, 0x99,
+0x88, 0x54, 0x32, 0x10,
+0x76, 0x32, 0x10, 0x88,
+0x88, 0x88, 0x88, 0x88,
+0x88, 0x88, 0x99, 0x99,
+0x99, 0x88, 0x88, 0x88,
+0x99, 0xFF, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd9[] = {
+0x17, 0x00, 0x39, 0xC0,
+0xb4, 0x80, 0x08, 0x32,
+0x10, 0x00, 0x32, 0x15,
+0x08, 0x32, 0x12, 0x20,
+0x33, 0x05, 0x4c, 0x05,
+0x37, 0x05, 0x3f, 0x1e,
+0x5f, 0x5f, 0x06, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd10[] = {
+0x02, 0x00, 0x39, 0xC0,
+0xb6, 0x00, 0xFF, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd11[] = {
+0x23, 0x00, 0x39, 0xC0,
+0xe0, 0x01, 0x05, 0x07,
+0x25, 0x35, 0x3f, 0x0b,
+0x32, 0x04, 0x09, 0x0e,
+0x10, 0x13, 0x10, 0x14,
+0x16, 0x1b, 0x01, 0x05,
+0x07, 0x25, 0x35, 0x3f,
+0x0b, 0x32, 0x04, 0x09,
+0x0e, 0x10, 0x13, 0x10,
+0x14, 0x16, 0x1b, 0xFF, };
+
+
+static char hx8394a_720p_video_on_cmd12[] = {
+0x00, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_video_on_cmd13[] = {
+0x04, 0x00, 0x39, 0xC0,
+0xbf, 0x06, 0x00, 0x10,
+ };
+
+
+static char hx8394a_720p_video_on_cmd14[] = {
+0x11, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_video_on_cmd15[] = {
+0x29, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd hx8394a_720p_video_on_command[] = {
+{ 0x8 , hx8394a_720p_video_on_cmd0},
+{ 0xc , hx8394a_720p_video_on_cmd1},
+{ 0x8 , hx8394a_720p_video_on_cmd2},
+{ 0x8 , hx8394a_720p_video_on_cmd3},
+{ 0x14 , hx8394a_720p_video_on_cmd4},
+{ 0xc , hx8394a_720p_video_on_cmd5},
+{ 0x8 , hx8394a_720p_video_on_cmd6},
+{ 0x4 , hx8394a_720p_video_on_cmd7},
+{ 0x3c , hx8394a_720p_video_on_cmd8},
+{ 0x1c , hx8394a_720p_video_on_cmd9},
+{ 0x8 , hx8394a_720p_video_on_cmd10},
+{ 0x28 , hx8394a_720p_video_on_cmd11},
+{ 0x4 , hx8394a_720p_video_on_cmd12},
+{ 0x8 , hx8394a_720p_video_on_cmd13},
+{ 0x4 , hx8394a_720p_video_on_cmd14},
+{ 0x4 , hx8394a_720p_video_on_cmd15}
+};
+#define HX8394A_720P_VIDEO_ON_COMMAND 16
+
+
+static char hx8394a_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char hx8394a_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd hx8394a_720p_video_off_command[] = {
+{ 0x4 , hx8394a_720p_videooff_cmd0},
+{ 0x4 , hx8394a_720p_videooff_cmd1}
+};
+#define HX8394A_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state hx8394a_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info hx8394a_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info hx8394a_720p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration hx8394a_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t hx8394a_720p_video_timings[] = {
+ 0x8d, 0x24, 0x19, 0x00, 0x34, 0x34, 0x1d, 0x26, 0x2a, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd hx8394a_720p_video_rotation[] = {
+
+};
+#define HX8394A_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing hx8394a_720p_video_timing_info = {
+ 0, 4, 0x1f, 0x2d
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight hx8394a_720p_video_backlight = {
+ 1, 1, 4095, 100, 1, "bl_ctrl_wled"
+};
+
+
+#endif /*_HX8394A_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35521_720p_video.h b/dev/gcdb/display/include/panel_nt35521_720p_video.h
new file mode 100644
index 0000000..e9e4104
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35521_720p_video.h
@@ -0,0 +1,1474 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35521_720P_VIDEO_H_
+
+#define _PANEL_NT35521_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35521_720p_video_panel_data = {
+ "nt35521 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35521_720p_video_panel_res = {
+ 720, 1280, 44, 55, 11, 0, 14, 15, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35521_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35521_720p_video_on_cmd0[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd1[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x68, 0x21, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd2[] = {
+0xB5, 0xC8, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd4[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xB8, 0x00, 0x00, 0x0A,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd5[] = {
+0xB9, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd6[] = {
+0xBA, 0x02, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd7[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBB, 0x63, 0x63, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd8[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBC, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd9[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBD, 0x02, 0x7F, 0x0D,
+0x0B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd10[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xCC, 0x41, 0x36, 0x87,
+0x54, 0x46, 0x65, 0x10,
+0x12, 0x14, 0x10, 0x12,
+0x14, 0x40, 0x08, 0x15,
+0x05, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd11[] = {
+0xD0, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd12[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xD1, 0x00, 0x04, 0x08,
+0x0C, 0x10, 0x14, 0x18,
+0x1C, 0x20, 0x24, 0x28,
+0x2C, 0x30, 0x34, 0x38,
+0x3C, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd13[] = {
+0xD3, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd14[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD6, 0x44, 0x44, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd15[] = {
+0x0D, 0x00, 0x29, 0xC0,
+0xD7, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd16[] = {
+0x0E, 0x00, 0x29, 0xC0,
+0xD8, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd17[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD9, 0x00, 0x28, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd18[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd19[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xE6, 0xF3, 0xEC, 0xE7,
+0xDF, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd20[] = {
+0x0B, 0x00, 0x29, 0xC0,
+0xE7, 0xF3, 0xD9, 0xCC,
+0xCD, 0xB3, 0xA6, 0x99,
+0x99, 0x99, 0x95, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd21[] = {
+0x0B, 0x00, 0x29, 0xC0,
+0xE8, 0xF3, 0xD9, 0xCC,
+0xCD, 0xB3, 0xA6, 0x99,
+0x99, 0x99, 0x95, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd22[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE9, 0x00, 0x04, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd23[] = {
+0xEA, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd24[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xEE, 0x87, 0x78, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd25[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xEF, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd26[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd27[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x0D, 0x0D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd28[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x0D, 0x0D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd29[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB3, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd30[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB4, 0x19, 0x19, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd31[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB5, 0x06, 0x06, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd32[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB6, 0x05, 0x05, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd33[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB7, 0x05, 0x05, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd34[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB8, 0x05, 0x05, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd35[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB9, 0x44, 0x44, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd36[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBA, 0x36, 0x36, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd37[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBC, 0x50, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd38[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBD, 0x50, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd39[] = {
+0xBE, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd40[] = {
+0xBF, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd41[] = {
+0xC0, 0x0C, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd42[] = {
+0xC1, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd43[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC2, 0x19, 0x19, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd44[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC3, 0x0A, 0x0A, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd45[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC4, 0x23, 0x23, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd46[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xC7, 0x00, 0x80, 0x00,
+ };
+
+
+static char nt35521_720p_video_on_cmd47[] = {
+0x07, 0x00, 0x29, 0xC0,
+0xC9, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd48[] = {
+0xCA, 0x01, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd49[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCB, 0x0B, 0x53, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd50[] = {
+0xCC, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd51[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCD, 0x0B, 0x52, 0x53,
+ };
+
+
+static char nt35521_720p_video_on_cmd52[] = {
+0xCE, 0x44, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd53[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCF, 0x00, 0x50, 0x50,
+ };
+
+
+static char nt35521_720p_video_on_cmd54[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD0, 0x50, 0x50, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd55[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD1, 0x50, 0x50, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd56[] = {
+0xD2, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd57[] = {
+0xD3, 0x39, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd58[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd59[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB0, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd60[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB1, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd61[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB2, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd62[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xB3, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd63[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB4, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd64[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB5, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd65[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB6, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd66[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xB7, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd67[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB8, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd68[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xB9, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd69[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBA, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd70[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xBB, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd71[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBC, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd72[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBD, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd73[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xBE, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd74[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xBF, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd75[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC0, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd76[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd77[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC2, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd78[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC3, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd79[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC4, 0x00, 0xAC, 0x00,
+0xBA, 0x00, 0xD9, 0x00,
+0xED, 0x01, 0x01, 0x01,
+0x1E, 0x01, 0x3A, 0x01,
+0x62, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd80[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0x85, 0x01,
+0xB8, 0x01, 0xE4, 0x02,
+0x27, 0x02, 0x5B, 0x02,
+0x5D, 0x02, 0x8C, 0x02,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd81[] = {
+0x11, 0x00, 0x29, 0xC0,
+0xC6, 0x02, 0xDF, 0x03,
+0x0C, 0x03, 0x2A, 0x03,
+0x51, 0x03, 0x6D, 0x03,
+0x8D, 0x03, 0xA4, 0x03,
+0xBE, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd82[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC7, 0x03, 0xCC, 0x03,
+0xCC, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd83[] = {
+0xEE, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd84[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd85[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd86[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd87[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB2, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd88[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB3, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd89[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB4, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd90[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB5, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd91[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB6, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd92[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB7, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd93[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB8, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd94[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xB9, 0x03, 0x00, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd95[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBA, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd96[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBB, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd97[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBC, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd98[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBD, 0x35, 0x10, 0x00,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd99[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC0, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd100[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd101[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC2, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd102[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xC3, 0x00, 0x34, 0x00,
+0x00, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd103[] = {
+0xC4, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd104[] = {
+0xC5, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd105[] = {
+0xC6, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd106[] = {
+0xC7, 0x40, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd107[] = {
+0xEF, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd108[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd109[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd110[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd111[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB2, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd112[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB3, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd113[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB4, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd114[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB5, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd115[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB6, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd116[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB7, 0x1B, 0x10, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd117[] = {
+0xB8, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd118[] = {
+0xB9, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd119[] = {
+0xBA, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd120[] = {
+0xBB, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd121[] = {
+0xBC, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd122[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xBD, 0x03, 0x03, 0x03,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd123[] = {
+0xC0, 0x03, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd124[] = {
+0xC1, 0x05, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd125[] = {
+0xC2, 0x03, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd126[] = {
+0xC3, 0x05, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd127[] = {
+0xC4, 0x80, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd128[] = {
+0xC5, 0xA2, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd129[] = {
+0xC6, 0x80, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd130[] = {
+0xC7, 0xA2, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd131[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC8, 0x01, 0x20, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd132[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC9, 0x00, 0x20, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd133[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCA, 0x01, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd134[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCB, 0x00, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd135[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCC, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd136[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCD, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd137[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCE, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd138[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xCF, 0x00, 0x00, 0x01,
+ };
+
+
+static char nt35521_720p_video_on_cmd139[] = {
+0xD0, 0x00, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd140[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD1, 0x03, 0x00, 0x00,
+0x07, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd141[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD2, 0x13, 0x00, 0x00,
+0x07, 0x11, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd142[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD3, 0x23, 0x00, 0x00,
+0x07, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd143[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD4, 0x33, 0x00, 0x00,
+0x07, 0x11, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd144[] = {
+0xE5, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd145[] = {
+0xE6, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd146[] = {
+0xE7, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd147[] = {
+0xE8, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd148[] = {
+0xE9, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd149[] = {
+0xEA, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd150[] = {
+0xEB, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd151[] = {
+0xEC, 0x06, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd152[] = {
+0xED, 0x31, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd153[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd154[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB0, 0x10, 0x11, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd155[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB1, 0x12, 0x13, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd156[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB2, 0x08, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd157[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB3, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd158[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB4, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd159[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB5, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd160[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB6, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd161[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB7, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd162[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB8, 0x02, 0x0A, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd163[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0x08, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd164[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBA, 0x09, 0x01, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd165[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBB, 0x0B, 0x03, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd166[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBC, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd167[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBD, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd168[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBE, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd169[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xBF, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd170[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC0, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd171[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0x09, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd172[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC2, 0x19, 0x18, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd173[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC3, 0x17, 0x16, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd174[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC4, 0x19, 0x18, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd175[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC5, 0x17, 0x16, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd176[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC6, 0x01, 0x09, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd177[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC7, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd178[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC8, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd179[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xC9, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd180[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCA, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd181[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCB, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd182[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCC, 0x0B, 0x03, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd183[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCD, 0x09, 0x01, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd184[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCE, 0x00, 0x08, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd185[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0x0A, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd186[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD0, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd187[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD1, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd188[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD2, 0x2D, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd189[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD3, 0x34, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd190[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD4, 0x2D, 0x2D, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd191[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD5, 0x08, 0x00, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd192[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD6, 0x10, 0x11, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd193[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xD7, 0x12, 0x13, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd194[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD8, 0x55, 0x55, 0x55,
+0x55, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd195[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xD9, 0x55, 0x55, 0x55,
+0x55, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd196[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE5, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd197[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xE6, 0x34, 0x34, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd198[] = {
+0xE7, 0x05, 0x23, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd199[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd200[] = {
+0x11, 0x00, 0x05, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd201[] = {
+0x29, 0x00, 0x05, 0x80 };
+
+
+static char nt35521_720p_video_on_cmd202[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd203[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xF0, 0x55, 0xAA, 0x52,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35521_720p_video_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x2C, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35521_720p_video_on_command[] = {
+{ 0xc , nt35521_720p_video_on_cmd0},
+{ 0x8 , nt35521_720p_video_on_cmd1},
+{ 0x4 , nt35521_720p_video_on_cmd2},
+{ 0x8 , nt35521_720p_video_on_cmd3},
+{ 0xc , nt35521_720p_video_on_cmd4},
+{ 0x4 , nt35521_720p_video_on_cmd5},
+{ 0x4 , nt35521_720p_video_on_cmd6},
+{ 0x8 , nt35521_720p_video_on_cmd7},
+{ 0x8 , nt35521_720p_video_on_cmd8},
+{ 0xc , nt35521_720p_video_on_cmd9},
+{ 0x18 , nt35521_720p_video_on_cmd10},
+{ 0x4 , nt35521_720p_video_on_cmd11},
+{ 0x18 , nt35521_720p_video_on_cmd12},
+{ 0x4 , nt35521_720p_video_on_cmd13},
+{ 0x8 , nt35521_720p_video_on_cmd14},
+{ 0x14 , nt35521_720p_video_on_cmd15},
+{ 0x14 , nt35521_720p_video_on_cmd16},
+{ 0x8 , nt35521_720p_video_on_cmd17},
+{ 0x8 , nt35521_720p_video_on_cmd18},
+{ 0xc , nt35521_720p_video_on_cmd19},
+{ 0x10 , nt35521_720p_video_on_cmd20},
+{ 0x10 , nt35521_720p_video_on_cmd21},
+{ 0x8 , nt35521_720p_video_on_cmd22},
+{ 0x4 , nt35521_720p_video_on_cmd23},
+{ 0xc , nt35521_720p_video_on_cmd24},
+{ 0x8 , nt35521_720p_video_on_cmd25},
+{ 0xc , nt35521_720p_video_on_cmd26},
+{ 0x8 , nt35521_720p_video_on_cmd27},
+{ 0x8 , nt35521_720p_video_on_cmd28},
+{ 0x8 , nt35521_720p_video_on_cmd29},
+{ 0x8 , nt35521_720p_video_on_cmd30},
+{ 0x8 , nt35521_720p_video_on_cmd31},
+{ 0x8 , nt35521_720p_video_on_cmd32},
+{ 0x8 , nt35521_720p_video_on_cmd33},
+{ 0x8 , nt35521_720p_video_on_cmd34},
+{ 0x8 , nt35521_720p_video_on_cmd35},
+{ 0x8 , nt35521_720p_video_on_cmd36},
+{ 0x8 , nt35521_720p_video_on_cmd37},
+{ 0x8 , nt35521_720p_video_on_cmd38},
+{ 0x4 , nt35521_720p_video_on_cmd39},
+{ 0x4 , nt35521_720p_video_on_cmd40},
+{ 0x4 , nt35521_720p_video_on_cmd41},
+{ 0x4 , nt35521_720p_video_on_cmd42},
+{ 0x8 , nt35521_720p_video_on_cmd43},
+{ 0x8 , nt35521_720p_video_on_cmd44},
+{ 0x8 , nt35521_720p_video_on_cmd45},
+{ 0x8 , nt35521_720p_video_on_cmd46},
+{ 0xc , nt35521_720p_video_on_cmd47},
+{ 0x4 , nt35521_720p_video_on_cmd48},
+{ 0x8 , nt35521_720p_video_on_cmd49},
+{ 0x4 , nt35521_720p_video_on_cmd50},
+{ 0x8 , nt35521_720p_video_on_cmd51},
+{ 0x4 , nt35521_720p_video_on_cmd52},
+{ 0x8 , nt35521_720p_video_on_cmd53},
+{ 0x8 , nt35521_720p_video_on_cmd54},
+{ 0x8 , nt35521_720p_video_on_cmd55},
+{ 0x4 , nt35521_720p_video_on_cmd56},
+{ 0x4 , nt35521_720p_video_on_cmd57},
+{ 0xc , nt35521_720p_video_on_cmd58},
+{ 0x18 , nt35521_720p_video_on_cmd59},
+{ 0x18 , nt35521_720p_video_on_cmd60},
+{ 0x18 , nt35521_720p_video_on_cmd61},
+{ 0xc , nt35521_720p_video_on_cmd62},
+{ 0x18 , nt35521_720p_video_on_cmd63},
+{ 0x18 , nt35521_720p_video_on_cmd64},
+{ 0x18 , nt35521_720p_video_on_cmd65},
+{ 0xc , nt35521_720p_video_on_cmd66},
+{ 0x18 , nt35521_720p_video_on_cmd67},
+{ 0x18 , nt35521_720p_video_on_cmd68},
+{ 0x18 , nt35521_720p_video_on_cmd69},
+{ 0xc , nt35521_720p_video_on_cmd70},
+{ 0x18 , nt35521_720p_video_on_cmd71},
+{ 0x18 , nt35521_720p_video_on_cmd72},
+{ 0x18 , nt35521_720p_video_on_cmd73},
+{ 0xc , nt35521_720p_video_on_cmd74},
+{ 0x18 , nt35521_720p_video_on_cmd75},
+{ 0x18 , nt35521_720p_video_on_cmd76},
+{ 0x18 , nt35521_720p_video_on_cmd77},
+{ 0xc , nt35521_720p_video_on_cmd78},
+{ 0x18 , nt35521_720p_video_on_cmd79},
+{ 0x18 , nt35521_720p_video_on_cmd80},
+{ 0x18 , nt35521_720p_video_on_cmd81},
+{ 0xc , nt35521_720p_video_on_cmd82},
+{ 0x4 , nt35521_720p_video_on_cmd83},
+{ 0xc , nt35521_720p_video_on_cmd84},
+{ 0x8 , nt35521_720p_video_on_cmd85},
+{ 0x8 , nt35521_720p_video_on_cmd86},
+{ 0xc , nt35521_720p_video_on_cmd87},
+{ 0xc , nt35521_720p_video_on_cmd88},
+{ 0xc , nt35521_720p_video_on_cmd89},
+{ 0xc , nt35521_720p_video_on_cmd90},
+{ 0xc , nt35521_720p_video_on_cmd91},
+{ 0xc , nt35521_720p_video_on_cmd92},
+{ 0xc , nt35521_720p_video_on_cmd93},
+{ 0xc , nt35521_720p_video_on_cmd94},
+{ 0xc , nt35521_720p_video_on_cmd95},
+{ 0xc , nt35521_720p_video_on_cmd96},
+{ 0xc , nt35521_720p_video_on_cmd97},
+{ 0xc , nt35521_720p_video_on_cmd98},
+{ 0xc , nt35521_720p_video_on_cmd99},
+{ 0xc , nt35521_720p_video_on_cmd100},
+{ 0xc , nt35521_720p_video_on_cmd101},
+{ 0xc , nt35521_720p_video_on_cmd102},
+{ 0x4 , nt35521_720p_video_on_cmd103},
+{ 0x4 , nt35521_720p_video_on_cmd104},
+{ 0x4 , nt35521_720p_video_on_cmd105},
+{ 0x4 , nt35521_720p_video_on_cmd106},
+{ 0x4 , nt35521_720p_video_on_cmd107},
+{ 0xc , nt35521_720p_video_on_cmd108},
+{ 0x8 , nt35521_720p_video_on_cmd109},
+{ 0x8 , nt35521_720p_video_on_cmd110},
+{ 0x8 , nt35521_720p_video_on_cmd111},
+{ 0x8 , nt35521_720p_video_on_cmd112},
+{ 0x8 , nt35521_720p_video_on_cmd113},
+{ 0x8 , nt35521_720p_video_on_cmd114},
+{ 0x8 , nt35521_720p_video_on_cmd115},
+{ 0x8 , nt35521_720p_video_on_cmd116},
+{ 0x4 , nt35521_720p_video_on_cmd117},
+{ 0x4 , nt35521_720p_video_on_cmd118},
+{ 0x4 , nt35521_720p_video_on_cmd119},
+{ 0x4 , nt35521_720p_video_on_cmd120},
+{ 0x4 , nt35521_720p_video_on_cmd121},
+{ 0xc , nt35521_720p_video_on_cmd122},
+{ 0x4 , nt35521_720p_video_on_cmd123},
+{ 0x4 , nt35521_720p_video_on_cmd124},
+{ 0x4 , nt35521_720p_video_on_cmd125},
+{ 0x4 , nt35521_720p_video_on_cmd126},
+{ 0x4 , nt35521_720p_video_on_cmd127},
+{ 0x4 , nt35521_720p_video_on_cmd128},
+{ 0x4 , nt35521_720p_video_on_cmd129},
+{ 0x4 , nt35521_720p_video_on_cmd130},
+{ 0x8 , nt35521_720p_video_on_cmd131},
+{ 0x8 , nt35521_720p_video_on_cmd132},
+{ 0x8 , nt35521_720p_video_on_cmd133},
+{ 0x8 , nt35521_720p_video_on_cmd134},
+{ 0x8 , nt35521_720p_video_on_cmd135},
+{ 0x8 , nt35521_720p_video_on_cmd136},
+{ 0x8 , nt35521_720p_video_on_cmd137},
+{ 0x8 , nt35521_720p_video_on_cmd138},
+{ 0x4 , nt35521_720p_video_on_cmd139},
+{ 0xc , nt35521_720p_video_on_cmd140},
+{ 0xc , nt35521_720p_video_on_cmd141},
+{ 0xc , nt35521_720p_video_on_cmd142},
+{ 0xc , nt35521_720p_video_on_cmd143},
+{ 0x4 , nt35521_720p_video_on_cmd144},
+{ 0x4 , nt35521_720p_video_on_cmd145},
+{ 0x4 , nt35521_720p_video_on_cmd146},
+{ 0x4 , nt35521_720p_video_on_cmd147},
+{ 0x4 , nt35521_720p_video_on_cmd148},
+{ 0x4 , nt35521_720p_video_on_cmd149},
+{ 0x4 , nt35521_720p_video_on_cmd150},
+{ 0x4 , nt35521_720p_video_on_cmd151},
+{ 0x4 , nt35521_720p_video_on_cmd152},
+{ 0xc , nt35521_720p_video_on_cmd153},
+{ 0x8 , nt35521_720p_video_on_cmd154},
+{ 0x8 , nt35521_720p_video_on_cmd155},
+{ 0x8 , nt35521_720p_video_on_cmd156},
+{ 0x8 , nt35521_720p_video_on_cmd157},
+{ 0x8 , nt35521_720p_video_on_cmd158},
+{ 0x8 , nt35521_720p_video_on_cmd159},
+{ 0x8 , nt35521_720p_video_on_cmd160},
+{ 0x8 , nt35521_720p_video_on_cmd161},
+{ 0x8 , nt35521_720p_video_on_cmd162},
+{ 0x8 , nt35521_720p_video_on_cmd163},
+{ 0x8 , nt35521_720p_video_on_cmd164},
+{ 0x8 , nt35521_720p_video_on_cmd165},
+{ 0x8 , nt35521_720p_video_on_cmd166},
+{ 0x8 , nt35521_720p_video_on_cmd167},
+{ 0x8 , nt35521_720p_video_on_cmd168},
+{ 0x8 , nt35521_720p_video_on_cmd169},
+{ 0x8 , nt35521_720p_video_on_cmd170},
+{ 0x8 , nt35521_720p_video_on_cmd171},
+{ 0x8 , nt35521_720p_video_on_cmd172},
+{ 0x8 , nt35521_720p_video_on_cmd173},
+{ 0x8 , nt35521_720p_video_on_cmd174},
+{ 0x8 , nt35521_720p_video_on_cmd175},
+{ 0x8 , nt35521_720p_video_on_cmd176},
+{ 0x8 , nt35521_720p_video_on_cmd177},
+{ 0x8 , nt35521_720p_video_on_cmd178},
+{ 0x8 , nt35521_720p_video_on_cmd179},
+{ 0x8 , nt35521_720p_video_on_cmd180},
+{ 0x8 , nt35521_720p_video_on_cmd181},
+{ 0x8 , nt35521_720p_video_on_cmd182},
+{ 0x8 , nt35521_720p_video_on_cmd183},
+{ 0x8 , nt35521_720p_video_on_cmd184},
+{ 0x8 , nt35521_720p_video_on_cmd185},
+{ 0x8 , nt35521_720p_video_on_cmd186},
+{ 0x8 , nt35521_720p_video_on_cmd187},
+{ 0x8 , nt35521_720p_video_on_cmd188},
+{ 0x8 , nt35521_720p_video_on_cmd189},
+{ 0x8 , nt35521_720p_video_on_cmd190},
+{ 0x8 , nt35521_720p_video_on_cmd191},
+{ 0x8 , nt35521_720p_video_on_cmd192},
+{ 0x8 , nt35521_720p_video_on_cmd193},
+{ 0xc , nt35521_720p_video_on_cmd194},
+{ 0xc , nt35521_720p_video_on_cmd195},
+{ 0x8 , nt35521_720p_video_on_cmd196},
+{ 0x8 , nt35521_720p_video_on_cmd197},
+{ 0x4 , nt35521_720p_video_on_cmd198},
+{ 0xc , nt35521_720p_video_on_cmd199},
+{ 0x4 , nt35521_720p_video_on_cmd200},
+{ 0x4 , nt35521_720p_video_on_cmd201},
+{ 0xc , nt35521_720p_video_on_cmd202},
+{ 0xc , nt35521_720p_video_on_cmd203},
+{ 0x8 , nt35521_720p_video_on_cmd204}
+};
+#define NT35521_720P_VIDEO_ON_COMMAND 205
+
+
+static char nt35521_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35521_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35521_720p_video_off_command[] = {
+{ 0x4 , nt35521_720p_videooff_cmd0},
+{ 0x4 , nt35521_720p_videooff_cmd1}
+};
+#define NT35521_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state nt35521_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35521_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35521_720p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35521_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35521_720p_video_timings[] = {
+ 0x93, 0x1F, 0x17, 0x00, 0x2F, 0x2E, 0x1C, 0x21, 0x26, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd nt35521_720p_video_rotation[] = {
+
+};
+#define NT35521_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing nt35521_720p_video_timing_info = {
+ 0, 4, 0x20, 0x2D
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35521_720p_video_backlight = {
+ 1, 1, 255, 100, 2, "PMIC_8941"
+};
+
+
+#endif /*_NT35521_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35590_720p_cmd.h b/dev/gcdb/display/include/panel_nt35590_720p_cmd.h
new file mode 100755
index 0000000..59fe531
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35590_720p_cmd.h
@@ -0,0 +1,2935 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35590_720P_CMD_H_
+
+#define _PANEL_NT35590_720P_CMD_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35590_720p_cmd_panel_data = {
+ "nt25590 720p command mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 1, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35590_720p_cmd_panel_res = {
+ 720, 1280, 140, 164, 8, 0, 6, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35590_720p_cmd_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35590_720p_cmd_on_cmd0[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd1[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd2[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd4[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd5[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd6[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd7[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd8[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd9[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd10[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd11[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd12[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd13[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd14[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x22, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd15[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd16[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd17[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x73, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd18[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd19[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd20[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd21[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x24, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd22[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd23[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd24[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x2C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd25[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd26[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd27[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd28[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd29[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd30[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x8B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd31[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd32[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd33[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd34[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd35[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd36[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd37[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd38[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd39[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd40[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd41[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd42[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd43[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd44[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd45[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd46[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd47[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd48[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd49[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x7F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd50[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd51[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd52[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd53[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd54[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd55[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd56[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd57[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd58[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd59[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x4D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd60[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd61[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd62[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd63[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd64[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x58, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd65[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x6A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd66[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd67[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd68[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd69[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd70[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd71[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd72[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd73[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd74[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd75[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd76[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd77[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd78[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd79[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd80[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd81[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd82[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd83[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd84[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd85[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd86[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd87[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd88[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd89[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd90[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd91[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd92[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd93[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd94[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd95[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd96[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd97[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd98[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd99[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd100[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd101[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd102[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd103[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd104[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd105[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd106[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd107[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd108[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd109[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd110[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd111[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd112[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd113[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd114[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd115[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd116[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd117[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd118[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd119[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd120[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd121[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd122[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd123[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd124[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd125[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd126[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd127[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd128[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd129[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd130[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd131[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd132[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd133[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd134[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd135[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd136[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd137[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd138[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd139[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd140[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd141[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd142[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd143[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd144[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd145[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd146[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd147[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd148[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd149[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd150[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd151[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd152[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd153[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd154[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd155[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd156[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd157[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd158[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd159[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd160[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd161[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd162[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd163[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd164[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd165[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd166[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd167[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd168[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd169[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd170[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd171[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd172[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd173[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd174[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd175[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd176[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd177[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd178[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd179[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd180[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd181[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd182[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd183[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd184[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd185[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd186[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd187[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd188[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd189[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd190[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd191[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd192[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd193[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd194[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd195[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd196[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd197[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd198[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd199[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd200[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd201[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd202[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd203[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd206[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xED, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd207[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd208[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd209[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF0, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd210[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd211[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF2, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd212[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd213[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF4, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd214[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd215[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF6, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd216[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd217[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF8, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd218[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd219[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFA, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd220[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd221[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd222[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd223[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd224[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd225[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd226[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd227[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd228[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd229[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd230[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd231[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd232[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd233[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd234[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd235[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd236[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd237[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd238[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd239[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd240[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd241[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd242[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd243[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd244[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd245[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd246[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd247[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd248[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd249[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd250[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd251[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd252[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd253[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd254[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd255[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd256[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd257[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd258[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd259[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd260[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd261[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd262[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd263[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd264[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd265[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd266[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd267[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd268[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x30, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd269[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x31, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd270[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd271[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd272[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x34, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd273[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd274[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd275[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd276[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd277[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd278[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd279[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3B, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd280[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd281[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3F, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd282[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x40, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd283[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x41, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd284[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x42, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd285[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd286[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x44, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd287[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x45, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd288[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x46, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd289[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x47, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd290[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x48, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd291[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x49, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd292[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd293[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd294[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd295[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd296[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd297[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd298[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd299[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd300[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd301[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd302[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd303[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd304[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x56, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd305[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd306[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd307[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd308[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd309[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd310[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd311[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd312[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd313[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd314[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd315[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd316[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd317[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd318[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd319[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd320[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd321[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd322[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd323[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd324[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd325[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd326[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd327[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6E, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd328[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd329[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x70, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd330[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd331[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd332[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x73, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd333[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x74, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd334[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd335[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd336[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd337[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd338[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd339[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd340[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd341[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd342[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd343[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd344[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd345[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd346[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd347[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd348[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd349[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd350[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd351[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd352[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd353[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd354[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd355[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd356[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd357[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd358[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd359[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd360[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd361[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd362[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd363[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd364[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd365[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd366[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd367[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd368[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd369[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd370[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd371[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd372[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd373[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd374[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd375[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd376[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd377[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd378[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd379[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd380[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd381[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd382[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd383[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd384[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd385[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd386[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd387[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd388[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd389[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd390[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd391[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd392[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd393[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd394[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd395[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd396[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd397[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd398[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd399[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd400[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd401[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd402[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd403[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd404[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd405[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd406[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd407[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd408[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd409[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd410[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd411[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd412[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd413[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd414[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd415[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd416[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd417[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd418[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd419[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd420[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd421[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd422[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd423[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd424[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd425[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd426[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd427[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd428[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd429[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd430[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd431[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd432[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd433[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd434[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd435[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd436[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd437[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd438[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd439[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd440[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd441[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd442[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd443[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd444[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd445[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd446[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd447[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd448[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd449[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd450[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd451[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd452[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd453[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd454[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd455[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd456[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd457[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd458[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd459[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd460[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd461[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd462[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_cmd_on_cmd463[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x00, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_cmd_on_command[] = {
+{ 0x8 , nt35590_720p_cmd_on_cmd0},
+{ 0x8 , nt35590_720p_cmd_on_cmd1},
+{ 0x8 , nt35590_720p_cmd_on_cmd2},
+{ 0x8 , nt35590_720p_cmd_on_cmd3},
+{ 0x8 , nt35590_720p_cmd_on_cmd4},
+{ 0x8 , nt35590_720p_cmd_on_cmd5},
+{ 0x8 , nt35590_720p_cmd_on_cmd6},
+{ 0x8 , nt35590_720p_cmd_on_cmd7},
+{ 0x8 , nt35590_720p_cmd_on_cmd8},
+{ 0x8 , nt35590_720p_cmd_on_cmd9},
+{ 0x8 , nt35590_720p_cmd_on_cmd10},
+{ 0x8 , nt35590_720p_cmd_on_cmd11},
+{ 0x8 , nt35590_720p_cmd_on_cmd12},
+{ 0x8 , nt35590_720p_cmd_on_cmd13},
+{ 0x8 , nt35590_720p_cmd_on_cmd14},
+{ 0x8 , nt35590_720p_cmd_on_cmd15},
+{ 0x8 , nt35590_720p_cmd_on_cmd16},
+{ 0x8 , nt35590_720p_cmd_on_cmd17},
+{ 0x8 , nt35590_720p_cmd_on_cmd18},
+{ 0x8 , nt35590_720p_cmd_on_cmd19},
+{ 0x8 , nt35590_720p_cmd_on_cmd20},
+{ 0x8 , nt35590_720p_cmd_on_cmd21},
+{ 0x8 , nt35590_720p_cmd_on_cmd22},
+{ 0x8 , nt35590_720p_cmd_on_cmd23},
+{ 0x8 , nt35590_720p_cmd_on_cmd24},
+{ 0x8 , nt35590_720p_cmd_on_cmd25},
+{ 0x8 , nt35590_720p_cmd_on_cmd26},
+{ 0x8 , nt35590_720p_cmd_on_cmd27},
+{ 0x8 , nt35590_720p_cmd_on_cmd28},
+{ 0x8 , nt35590_720p_cmd_on_cmd29},
+{ 0x8 , nt35590_720p_cmd_on_cmd30},
+{ 0x8 , nt35590_720p_cmd_on_cmd31},
+{ 0x8 , nt35590_720p_cmd_on_cmd32},
+{ 0x8 , nt35590_720p_cmd_on_cmd33},
+{ 0x8 , nt35590_720p_cmd_on_cmd34},
+{ 0x8 , nt35590_720p_cmd_on_cmd35},
+{ 0x8 , nt35590_720p_cmd_on_cmd36},
+{ 0x8 , nt35590_720p_cmd_on_cmd37},
+{ 0x8 , nt35590_720p_cmd_on_cmd38},
+{ 0x8 , nt35590_720p_cmd_on_cmd39},
+{ 0x8 , nt35590_720p_cmd_on_cmd40},
+{ 0x8 , nt35590_720p_cmd_on_cmd41},
+{ 0x8 , nt35590_720p_cmd_on_cmd42},
+{ 0x8 , nt35590_720p_cmd_on_cmd43},
+{ 0x8 , nt35590_720p_cmd_on_cmd44},
+{ 0x8 , nt35590_720p_cmd_on_cmd45},
+{ 0x8 , nt35590_720p_cmd_on_cmd46},
+{ 0x8 , nt35590_720p_cmd_on_cmd47},
+{ 0x8 , nt35590_720p_cmd_on_cmd48},
+{ 0x8 , nt35590_720p_cmd_on_cmd49},
+{ 0x8 , nt35590_720p_cmd_on_cmd50},
+{ 0x8 , nt35590_720p_cmd_on_cmd51},
+{ 0x8 , nt35590_720p_cmd_on_cmd52},
+{ 0x8 , nt35590_720p_cmd_on_cmd53},
+{ 0x8 , nt35590_720p_cmd_on_cmd54},
+{ 0x8 , nt35590_720p_cmd_on_cmd55},
+{ 0x8 , nt35590_720p_cmd_on_cmd56},
+{ 0x8 , nt35590_720p_cmd_on_cmd57},
+{ 0x8 , nt35590_720p_cmd_on_cmd58},
+{ 0x8 , nt35590_720p_cmd_on_cmd59},
+{ 0x8 , nt35590_720p_cmd_on_cmd60},
+{ 0x8 , nt35590_720p_cmd_on_cmd61},
+{ 0x8 , nt35590_720p_cmd_on_cmd62},
+{ 0x8 , nt35590_720p_cmd_on_cmd63},
+{ 0x8 , nt35590_720p_cmd_on_cmd64},
+{ 0x8 , nt35590_720p_cmd_on_cmd65},
+{ 0x8 , nt35590_720p_cmd_on_cmd66},
+{ 0x8 , nt35590_720p_cmd_on_cmd67},
+{ 0x8 , nt35590_720p_cmd_on_cmd68},
+{ 0x8 , nt35590_720p_cmd_on_cmd69},
+{ 0x8 , nt35590_720p_cmd_on_cmd70},
+{ 0x8 , nt35590_720p_cmd_on_cmd71},
+{ 0x8 , nt35590_720p_cmd_on_cmd72},
+{ 0x8 , nt35590_720p_cmd_on_cmd73},
+{ 0x8 , nt35590_720p_cmd_on_cmd74},
+{ 0x8 , nt35590_720p_cmd_on_cmd75},
+{ 0x8 , nt35590_720p_cmd_on_cmd76},
+{ 0x8 , nt35590_720p_cmd_on_cmd77},
+{ 0x8 , nt35590_720p_cmd_on_cmd78},
+{ 0x8 , nt35590_720p_cmd_on_cmd79},
+{ 0x8 , nt35590_720p_cmd_on_cmd80},
+{ 0x8 , nt35590_720p_cmd_on_cmd81},
+{ 0x8 , nt35590_720p_cmd_on_cmd82},
+{ 0x8 , nt35590_720p_cmd_on_cmd83},
+{ 0x8 , nt35590_720p_cmd_on_cmd84},
+{ 0x8 , nt35590_720p_cmd_on_cmd85},
+{ 0x8 , nt35590_720p_cmd_on_cmd86},
+{ 0x8 , nt35590_720p_cmd_on_cmd87},
+{ 0x8 , nt35590_720p_cmd_on_cmd88},
+{ 0x8 , nt35590_720p_cmd_on_cmd89},
+{ 0x8 , nt35590_720p_cmd_on_cmd90},
+{ 0x8 , nt35590_720p_cmd_on_cmd91},
+{ 0x8 , nt35590_720p_cmd_on_cmd92},
+{ 0x8 , nt35590_720p_cmd_on_cmd93},
+{ 0x8 , nt35590_720p_cmd_on_cmd94},
+{ 0x8 , nt35590_720p_cmd_on_cmd95},
+{ 0x8 , nt35590_720p_cmd_on_cmd96},
+{ 0x8 , nt35590_720p_cmd_on_cmd97},
+{ 0x8 , nt35590_720p_cmd_on_cmd98},
+{ 0x8 , nt35590_720p_cmd_on_cmd99},
+{ 0x8 , nt35590_720p_cmd_on_cmd100},
+{ 0x8 , nt35590_720p_cmd_on_cmd101},
+{ 0x8 , nt35590_720p_cmd_on_cmd102},
+{ 0x8 , nt35590_720p_cmd_on_cmd103},
+{ 0x8 , nt35590_720p_cmd_on_cmd104},
+{ 0x8 , nt35590_720p_cmd_on_cmd105},
+{ 0x8 , nt35590_720p_cmd_on_cmd106},
+{ 0x8 , nt35590_720p_cmd_on_cmd107},
+{ 0x8 , nt35590_720p_cmd_on_cmd108},
+{ 0x8 , nt35590_720p_cmd_on_cmd109},
+{ 0x8 , nt35590_720p_cmd_on_cmd110},
+{ 0x8 , nt35590_720p_cmd_on_cmd111},
+{ 0x8 , nt35590_720p_cmd_on_cmd112},
+{ 0x8 , nt35590_720p_cmd_on_cmd113},
+{ 0x8 , nt35590_720p_cmd_on_cmd114},
+{ 0x8 , nt35590_720p_cmd_on_cmd115},
+{ 0x8 , nt35590_720p_cmd_on_cmd116},
+{ 0x8 , nt35590_720p_cmd_on_cmd117},
+{ 0x8 , nt35590_720p_cmd_on_cmd118},
+{ 0x8 , nt35590_720p_cmd_on_cmd119},
+{ 0x8 , nt35590_720p_cmd_on_cmd120},
+{ 0x8 , nt35590_720p_cmd_on_cmd121},
+{ 0x8 , nt35590_720p_cmd_on_cmd122},
+{ 0x8 , nt35590_720p_cmd_on_cmd123},
+{ 0x8 , nt35590_720p_cmd_on_cmd124},
+{ 0x8 , nt35590_720p_cmd_on_cmd125},
+{ 0x8 , nt35590_720p_cmd_on_cmd126},
+{ 0x8 , nt35590_720p_cmd_on_cmd127},
+{ 0x8 , nt35590_720p_cmd_on_cmd128},
+{ 0x8 , nt35590_720p_cmd_on_cmd129},
+{ 0x8 , nt35590_720p_cmd_on_cmd130},
+{ 0x8 , nt35590_720p_cmd_on_cmd131},
+{ 0x8 , nt35590_720p_cmd_on_cmd132},
+{ 0x8 , nt35590_720p_cmd_on_cmd133},
+{ 0x8 , nt35590_720p_cmd_on_cmd134},
+{ 0x8 , nt35590_720p_cmd_on_cmd135},
+{ 0x8 , nt35590_720p_cmd_on_cmd136},
+{ 0x8 , nt35590_720p_cmd_on_cmd137},
+{ 0x8 , nt35590_720p_cmd_on_cmd138},
+{ 0x8 , nt35590_720p_cmd_on_cmd139},
+{ 0x8 , nt35590_720p_cmd_on_cmd140},
+{ 0x8 , nt35590_720p_cmd_on_cmd141},
+{ 0x8 , nt35590_720p_cmd_on_cmd142},
+{ 0x8 , nt35590_720p_cmd_on_cmd143},
+{ 0x8 , nt35590_720p_cmd_on_cmd144},
+{ 0x8 , nt35590_720p_cmd_on_cmd145},
+{ 0x8 , nt35590_720p_cmd_on_cmd146},
+{ 0x8 , nt35590_720p_cmd_on_cmd147},
+{ 0x8 , nt35590_720p_cmd_on_cmd148},
+{ 0x8 , nt35590_720p_cmd_on_cmd149},
+{ 0x8 , nt35590_720p_cmd_on_cmd150},
+{ 0x8 , nt35590_720p_cmd_on_cmd151},
+{ 0x8 , nt35590_720p_cmd_on_cmd152},
+{ 0x8 , nt35590_720p_cmd_on_cmd153},
+{ 0x8 , nt35590_720p_cmd_on_cmd154},
+{ 0x8 , nt35590_720p_cmd_on_cmd155},
+{ 0x8 , nt35590_720p_cmd_on_cmd156},
+{ 0x8 , nt35590_720p_cmd_on_cmd157},
+{ 0x8 , nt35590_720p_cmd_on_cmd158},
+{ 0x8 , nt35590_720p_cmd_on_cmd159},
+{ 0x8 , nt35590_720p_cmd_on_cmd160},
+{ 0x8 , nt35590_720p_cmd_on_cmd161},
+{ 0x8 , nt35590_720p_cmd_on_cmd162},
+{ 0x8 , nt35590_720p_cmd_on_cmd163},
+{ 0x8 , nt35590_720p_cmd_on_cmd164},
+{ 0x8 , nt35590_720p_cmd_on_cmd165},
+{ 0x8 , nt35590_720p_cmd_on_cmd166},
+{ 0x8 , nt35590_720p_cmd_on_cmd167},
+{ 0x8 , nt35590_720p_cmd_on_cmd168},
+{ 0x8 , nt35590_720p_cmd_on_cmd169},
+{ 0x8 , nt35590_720p_cmd_on_cmd170},
+{ 0x8 , nt35590_720p_cmd_on_cmd171},
+{ 0x8 , nt35590_720p_cmd_on_cmd172},
+{ 0x8 , nt35590_720p_cmd_on_cmd173},
+{ 0x8 , nt35590_720p_cmd_on_cmd174},
+{ 0x8 , nt35590_720p_cmd_on_cmd175},
+{ 0x8 , nt35590_720p_cmd_on_cmd176},
+{ 0x8 , nt35590_720p_cmd_on_cmd177},
+{ 0x8 , nt35590_720p_cmd_on_cmd178},
+{ 0x8 , nt35590_720p_cmd_on_cmd179},
+{ 0x8 , nt35590_720p_cmd_on_cmd180},
+{ 0x8 , nt35590_720p_cmd_on_cmd181},
+{ 0x8 , nt35590_720p_cmd_on_cmd182},
+{ 0x8 , nt35590_720p_cmd_on_cmd183},
+{ 0x8 , nt35590_720p_cmd_on_cmd184},
+{ 0x8 , nt35590_720p_cmd_on_cmd185},
+{ 0x8 , nt35590_720p_cmd_on_cmd186},
+{ 0x8 , nt35590_720p_cmd_on_cmd187},
+{ 0x8 , nt35590_720p_cmd_on_cmd188},
+{ 0x8 , nt35590_720p_cmd_on_cmd189},
+{ 0x8 , nt35590_720p_cmd_on_cmd190},
+{ 0x8 , nt35590_720p_cmd_on_cmd191},
+{ 0x8 , nt35590_720p_cmd_on_cmd192},
+{ 0x8 , nt35590_720p_cmd_on_cmd193},
+{ 0x8 , nt35590_720p_cmd_on_cmd194},
+{ 0x8 , nt35590_720p_cmd_on_cmd195},
+{ 0x8 , nt35590_720p_cmd_on_cmd196},
+{ 0x8 , nt35590_720p_cmd_on_cmd197},
+{ 0x8 , nt35590_720p_cmd_on_cmd198},
+{ 0x8 , nt35590_720p_cmd_on_cmd199},
+{ 0x8 , nt35590_720p_cmd_on_cmd200},
+{ 0x8 , nt35590_720p_cmd_on_cmd201},
+{ 0x8 , nt35590_720p_cmd_on_cmd202},
+{ 0x8 , nt35590_720p_cmd_on_cmd203},
+{ 0x8 , nt35590_720p_cmd_on_cmd204},
+{ 0x8 , nt35590_720p_cmd_on_cmd205},
+{ 0x8 , nt35590_720p_cmd_on_cmd206},
+{ 0x8 , nt35590_720p_cmd_on_cmd207},
+{ 0x8 , nt35590_720p_cmd_on_cmd208},
+{ 0x8 , nt35590_720p_cmd_on_cmd209},
+{ 0x8 , nt35590_720p_cmd_on_cmd210},
+{ 0x8 , nt35590_720p_cmd_on_cmd211},
+{ 0x8 , nt35590_720p_cmd_on_cmd212},
+{ 0x8 , nt35590_720p_cmd_on_cmd213},
+{ 0x8 , nt35590_720p_cmd_on_cmd214},
+{ 0x8 , nt35590_720p_cmd_on_cmd215},
+{ 0x8 , nt35590_720p_cmd_on_cmd216},
+{ 0x8 , nt35590_720p_cmd_on_cmd217},
+{ 0x8 , nt35590_720p_cmd_on_cmd218},
+{ 0x8 , nt35590_720p_cmd_on_cmd219},
+{ 0x8 , nt35590_720p_cmd_on_cmd220},
+{ 0x8 , nt35590_720p_cmd_on_cmd221},
+{ 0x8 , nt35590_720p_cmd_on_cmd222},
+{ 0x8 , nt35590_720p_cmd_on_cmd223},
+{ 0x8 , nt35590_720p_cmd_on_cmd224},
+{ 0x8 , nt35590_720p_cmd_on_cmd225},
+{ 0x8 , nt35590_720p_cmd_on_cmd226},
+{ 0x8 , nt35590_720p_cmd_on_cmd227},
+{ 0x8 , nt35590_720p_cmd_on_cmd228},
+{ 0x8 , nt35590_720p_cmd_on_cmd229},
+{ 0x8 , nt35590_720p_cmd_on_cmd230},
+{ 0x8 , nt35590_720p_cmd_on_cmd231},
+{ 0x8 , nt35590_720p_cmd_on_cmd232},
+{ 0x8 , nt35590_720p_cmd_on_cmd233},
+{ 0x8 , nt35590_720p_cmd_on_cmd234},
+{ 0x8 , nt35590_720p_cmd_on_cmd235},
+{ 0x8 , nt35590_720p_cmd_on_cmd236},
+{ 0x8 , nt35590_720p_cmd_on_cmd237},
+{ 0x8 , nt35590_720p_cmd_on_cmd238},
+{ 0x8 , nt35590_720p_cmd_on_cmd239},
+{ 0x8 , nt35590_720p_cmd_on_cmd240},
+{ 0x8 , nt35590_720p_cmd_on_cmd241},
+{ 0x8 , nt35590_720p_cmd_on_cmd242},
+{ 0x8 , nt35590_720p_cmd_on_cmd243},
+{ 0x8 , nt35590_720p_cmd_on_cmd244},
+{ 0x8 , nt35590_720p_cmd_on_cmd245},
+{ 0x8 , nt35590_720p_cmd_on_cmd246},
+{ 0x8 , nt35590_720p_cmd_on_cmd247},
+{ 0x8 , nt35590_720p_cmd_on_cmd248},
+{ 0x8 , nt35590_720p_cmd_on_cmd249},
+{ 0x8 , nt35590_720p_cmd_on_cmd250},
+{ 0x8 , nt35590_720p_cmd_on_cmd251},
+{ 0x8 , nt35590_720p_cmd_on_cmd252},
+{ 0x8 , nt35590_720p_cmd_on_cmd253},
+{ 0x8 , nt35590_720p_cmd_on_cmd254},
+{ 0x8 , nt35590_720p_cmd_on_cmd255},
+{ 0x8 , nt35590_720p_cmd_on_cmd256},
+{ 0x8 , nt35590_720p_cmd_on_cmd257},
+{ 0x8 , nt35590_720p_cmd_on_cmd258},
+{ 0x8 , nt35590_720p_cmd_on_cmd259},
+{ 0x8 , nt35590_720p_cmd_on_cmd260},
+{ 0x8 , nt35590_720p_cmd_on_cmd261},
+{ 0x8 , nt35590_720p_cmd_on_cmd262},
+{ 0x8 , nt35590_720p_cmd_on_cmd263},
+{ 0x8 , nt35590_720p_cmd_on_cmd264},
+{ 0x8 , nt35590_720p_cmd_on_cmd265},
+{ 0x8 , nt35590_720p_cmd_on_cmd266},
+{ 0x8 , nt35590_720p_cmd_on_cmd267},
+{ 0x8 , nt35590_720p_cmd_on_cmd268},
+{ 0x8 , nt35590_720p_cmd_on_cmd269},
+{ 0x8 , nt35590_720p_cmd_on_cmd270},
+{ 0x8 , nt35590_720p_cmd_on_cmd271},
+{ 0x8 , nt35590_720p_cmd_on_cmd272},
+{ 0x8 , nt35590_720p_cmd_on_cmd273},
+{ 0x8 , nt35590_720p_cmd_on_cmd274},
+{ 0x8 , nt35590_720p_cmd_on_cmd275},
+{ 0x8 , nt35590_720p_cmd_on_cmd276},
+{ 0x8 , nt35590_720p_cmd_on_cmd277},
+{ 0x8 , nt35590_720p_cmd_on_cmd278},
+{ 0x8 , nt35590_720p_cmd_on_cmd279},
+{ 0x8 , nt35590_720p_cmd_on_cmd280},
+{ 0x8 , nt35590_720p_cmd_on_cmd281},
+{ 0x8 , nt35590_720p_cmd_on_cmd282},
+{ 0x8 , nt35590_720p_cmd_on_cmd283},
+{ 0x8 , nt35590_720p_cmd_on_cmd284},
+{ 0x8 , nt35590_720p_cmd_on_cmd285},
+{ 0x8 , nt35590_720p_cmd_on_cmd286},
+{ 0x8 , nt35590_720p_cmd_on_cmd287},
+{ 0x8 , nt35590_720p_cmd_on_cmd288},
+{ 0x8 , nt35590_720p_cmd_on_cmd289},
+{ 0x8 , nt35590_720p_cmd_on_cmd290},
+{ 0x8 , nt35590_720p_cmd_on_cmd291},
+{ 0x8 , nt35590_720p_cmd_on_cmd292},
+{ 0x8 , nt35590_720p_cmd_on_cmd293},
+{ 0x8 , nt35590_720p_cmd_on_cmd294},
+{ 0x8 , nt35590_720p_cmd_on_cmd295},
+{ 0x8 , nt35590_720p_cmd_on_cmd296},
+{ 0x8 , nt35590_720p_cmd_on_cmd297},
+{ 0x8 , nt35590_720p_cmd_on_cmd298},
+{ 0x8 , nt35590_720p_cmd_on_cmd299},
+{ 0x8 , nt35590_720p_cmd_on_cmd300},
+{ 0x8 , nt35590_720p_cmd_on_cmd301},
+{ 0x8 , nt35590_720p_cmd_on_cmd302},
+{ 0x8 , nt35590_720p_cmd_on_cmd303},
+{ 0x8 , nt35590_720p_cmd_on_cmd304},
+{ 0x8 , nt35590_720p_cmd_on_cmd305},
+{ 0x8 , nt35590_720p_cmd_on_cmd306},
+{ 0x8 , nt35590_720p_cmd_on_cmd307},
+{ 0x8 , nt35590_720p_cmd_on_cmd308},
+{ 0x8 , nt35590_720p_cmd_on_cmd309},
+{ 0x8 , nt35590_720p_cmd_on_cmd310},
+{ 0x8 , nt35590_720p_cmd_on_cmd311},
+{ 0x8 , nt35590_720p_cmd_on_cmd312},
+{ 0x8 , nt35590_720p_cmd_on_cmd313},
+{ 0x8 , nt35590_720p_cmd_on_cmd314},
+{ 0x8 , nt35590_720p_cmd_on_cmd315},
+{ 0x8 , nt35590_720p_cmd_on_cmd316},
+{ 0x8 , nt35590_720p_cmd_on_cmd317},
+{ 0x8 , nt35590_720p_cmd_on_cmd318},
+{ 0x8 , nt35590_720p_cmd_on_cmd319},
+{ 0x8 , nt35590_720p_cmd_on_cmd320},
+{ 0x8 , nt35590_720p_cmd_on_cmd321},
+{ 0x8 , nt35590_720p_cmd_on_cmd322},
+{ 0x8 , nt35590_720p_cmd_on_cmd323},
+{ 0x8 , nt35590_720p_cmd_on_cmd324},
+{ 0x8 , nt35590_720p_cmd_on_cmd325},
+{ 0x8 , nt35590_720p_cmd_on_cmd326},
+{ 0x8 , nt35590_720p_cmd_on_cmd327},
+{ 0x8 , nt35590_720p_cmd_on_cmd328},
+{ 0x8 , nt35590_720p_cmd_on_cmd329},
+{ 0x8 , nt35590_720p_cmd_on_cmd330},
+{ 0x8 , nt35590_720p_cmd_on_cmd331},
+{ 0x8 , nt35590_720p_cmd_on_cmd332},
+{ 0x8 , nt35590_720p_cmd_on_cmd333},
+{ 0x8 , nt35590_720p_cmd_on_cmd334},
+{ 0x8 , nt35590_720p_cmd_on_cmd335},
+{ 0x8 , nt35590_720p_cmd_on_cmd336},
+{ 0x8 , nt35590_720p_cmd_on_cmd337},
+{ 0x8 , nt35590_720p_cmd_on_cmd338},
+{ 0x8 , nt35590_720p_cmd_on_cmd339},
+{ 0x8 , nt35590_720p_cmd_on_cmd340},
+{ 0x8 , nt35590_720p_cmd_on_cmd341},
+{ 0x8 , nt35590_720p_cmd_on_cmd342},
+{ 0x8 , nt35590_720p_cmd_on_cmd343},
+{ 0x8 , nt35590_720p_cmd_on_cmd344},
+{ 0x8 , nt35590_720p_cmd_on_cmd345},
+{ 0x8 , nt35590_720p_cmd_on_cmd346},
+{ 0x8 , nt35590_720p_cmd_on_cmd347},
+{ 0x8 , nt35590_720p_cmd_on_cmd348},
+{ 0x8 , nt35590_720p_cmd_on_cmd349},
+{ 0x8 , nt35590_720p_cmd_on_cmd350},
+{ 0x8 , nt35590_720p_cmd_on_cmd351},
+{ 0x8 , nt35590_720p_cmd_on_cmd352},
+{ 0x8 , nt35590_720p_cmd_on_cmd353},
+{ 0x8 , nt35590_720p_cmd_on_cmd354},
+{ 0x8 , nt35590_720p_cmd_on_cmd355},
+{ 0x8 , nt35590_720p_cmd_on_cmd356},
+{ 0x8 , nt35590_720p_cmd_on_cmd357},
+{ 0x8 , nt35590_720p_cmd_on_cmd358},
+{ 0x8 , nt35590_720p_cmd_on_cmd359},
+{ 0x8 , nt35590_720p_cmd_on_cmd360},
+{ 0x8 , nt35590_720p_cmd_on_cmd361},
+{ 0x8 , nt35590_720p_cmd_on_cmd362},
+{ 0x8 , nt35590_720p_cmd_on_cmd363},
+{ 0x8 , nt35590_720p_cmd_on_cmd364},
+{ 0x8 , nt35590_720p_cmd_on_cmd365},
+{ 0x8 , nt35590_720p_cmd_on_cmd366},
+{ 0x8 , nt35590_720p_cmd_on_cmd367},
+{ 0x8 , nt35590_720p_cmd_on_cmd368},
+{ 0x8 , nt35590_720p_cmd_on_cmd369},
+{ 0x8 , nt35590_720p_cmd_on_cmd370},
+{ 0x8 , nt35590_720p_cmd_on_cmd371},
+{ 0x8 , nt35590_720p_cmd_on_cmd372},
+{ 0x8 , nt35590_720p_cmd_on_cmd373},
+{ 0x8 , nt35590_720p_cmd_on_cmd374},
+{ 0x8 , nt35590_720p_cmd_on_cmd375},
+{ 0x8 , nt35590_720p_cmd_on_cmd376},
+{ 0x8 , nt35590_720p_cmd_on_cmd377},
+{ 0x8 , nt35590_720p_cmd_on_cmd378},
+{ 0x8 , nt35590_720p_cmd_on_cmd379},
+{ 0x8 , nt35590_720p_cmd_on_cmd380},
+{ 0x8 , nt35590_720p_cmd_on_cmd381},
+{ 0x8 , nt35590_720p_cmd_on_cmd382},
+{ 0x8 , nt35590_720p_cmd_on_cmd383},
+{ 0x8 , nt35590_720p_cmd_on_cmd384},
+{ 0x8 , nt35590_720p_cmd_on_cmd385},
+{ 0x8 , nt35590_720p_cmd_on_cmd386},
+{ 0x8 , nt35590_720p_cmd_on_cmd387},
+{ 0x8 , nt35590_720p_cmd_on_cmd388},
+{ 0x8 , nt35590_720p_cmd_on_cmd389},
+{ 0x8 , nt35590_720p_cmd_on_cmd390},
+{ 0x8 , nt35590_720p_cmd_on_cmd391},
+{ 0x8 , nt35590_720p_cmd_on_cmd392},
+{ 0x8 , nt35590_720p_cmd_on_cmd393},
+{ 0x8 , nt35590_720p_cmd_on_cmd394},
+{ 0x8 , nt35590_720p_cmd_on_cmd395},
+{ 0x8 , nt35590_720p_cmd_on_cmd396},
+{ 0x8 , nt35590_720p_cmd_on_cmd397},
+{ 0x8 , nt35590_720p_cmd_on_cmd398},
+{ 0x8 , nt35590_720p_cmd_on_cmd399},
+{ 0x8 , nt35590_720p_cmd_on_cmd400},
+{ 0x8 , nt35590_720p_cmd_on_cmd401},
+{ 0x8 , nt35590_720p_cmd_on_cmd402},
+{ 0x8 , nt35590_720p_cmd_on_cmd403},
+{ 0x8 , nt35590_720p_cmd_on_cmd404},
+{ 0x8 , nt35590_720p_cmd_on_cmd405},
+{ 0x8 , nt35590_720p_cmd_on_cmd406},
+{ 0x8 , nt35590_720p_cmd_on_cmd407},
+{ 0x8 , nt35590_720p_cmd_on_cmd408},
+{ 0x8 , nt35590_720p_cmd_on_cmd409},
+{ 0x8 , nt35590_720p_cmd_on_cmd410},
+{ 0x8 , nt35590_720p_cmd_on_cmd411},
+{ 0x8 , nt35590_720p_cmd_on_cmd412},
+{ 0x8 , nt35590_720p_cmd_on_cmd413},
+{ 0x8 , nt35590_720p_cmd_on_cmd414},
+{ 0x8 , nt35590_720p_cmd_on_cmd415},
+{ 0x8 , nt35590_720p_cmd_on_cmd416},
+{ 0x8 , nt35590_720p_cmd_on_cmd417},
+{ 0x8 , nt35590_720p_cmd_on_cmd418},
+{ 0x8 , nt35590_720p_cmd_on_cmd419},
+{ 0x8 , nt35590_720p_cmd_on_cmd420},
+{ 0x8 , nt35590_720p_cmd_on_cmd421},
+{ 0x8 , nt35590_720p_cmd_on_cmd422},
+{ 0x8 , nt35590_720p_cmd_on_cmd423},
+{ 0x8 , nt35590_720p_cmd_on_cmd424},
+{ 0x8 , nt35590_720p_cmd_on_cmd425},
+{ 0x8 , nt35590_720p_cmd_on_cmd426},
+{ 0x8 , nt35590_720p_cmd_on_cmd427},
+{ 0x8 , nt35590_720p_cmd_on_cmd428},
+{ 0x8 , nt35590_720p_cmd_on_cmd429},
+{ 0x8 , nt35590_720p_cmd_on_cmd430},
+{ 0x8 , nt35590_720p_cmd_on_cmd431},
+{ 0x8 , nt35590_720p_cmd_on_cmd432},
+{ 0x8 , nt35590_720p_cmd_on_cmd433},
+{ 0x8 , nt35590_720p_cmd_on_cmd434},
+{ 0x8 , nt35590_720p_cmd_on_cmd435},
+{ 0x8 , nt35590_720p_cmd_on_cmd436},
+{ 0x8 , nt35590_720p_cmd_on_cmd437},
+{ 0x8 , nt35590_720p_cmd_on_cmd438},
+{ 0x8 , nt35590_720p_cmd_on_cmd439},
+{ 0x8 , nt35590_720p_cmd_on_cmd440},
+{ 0x8 , nt35590_720p_cmd_on_cmd441},
+{ 0x8 , nt35590_720p_cmd_on_cmd442},
+{ 0x8 , nt35590_720p_cmd_on_cmd443},
+{ 0x8 , nt35590_720p_cmd_on_cmd444},
+{ 0x8 , nt35590_720p_cmd_on_cmd445},
+{ 0x8 , nt35590_720p_cmd_on_cmd446},
+{ 0x8 , nt35590_720p_cmd_on_cmd447},
+{ 0x8 , nt35590_720p_cmd_on_cmd448},
+{ 0x8 , nt35590_720p_cmd_on_cmd449},
+{ 0x8 , nt35590_720p_cmd_on_cmd450},
+{ 0x8 , nt35590_720p_cmd_on_cmd451},
+{ 0x8 , nt35590_720p_cmd_on_cmd452},
+{ 0x8 , nt35590_720p_cmd_on_cmd453},
+{ 0x8 , nt35590_720p_cmd_on_cmd454},
+{ 0x8 , nt35590_720p_cmd_on_cmd455},
+{ 0x8 , nt35590_720p_cmd_on_cmd456},
+{ 0x8 , nt35590_720p_cmd_on_cmd457},
+{ 0x8 , nt35590_720p_cmd_on_cmd458},
+{ 0x8 , nt35590_720p_cmd_on_cmd459},
+{ 0x8 , nt35590_720p_cmd_on_cmd460},
+{ 0x8 , nt35590_720p_cmd_on_cmd461},
+{ 0x8 , nt35590_720p_cmd_on_cmd462},
+{ 0x8 , nt35590_720p_cmd_on_cmd463}
+};
+#define NT35590_720P_CMD_ON_COMMAND 464
+
+
+static char nt35590_720p_cmdoff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35590_720p_cmdoff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_cmd_off_command[] = {
+{ 0x4 , nt35590_720p_cmdoff_cmd0},
+{ 0x4 , nt35590_720p_cmdoff_cmd1}
+};
+#define NT35590_720P_CMD_OFF_COMMAND 2
+
+
+static struct command_state nt35590_720p_cmd_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35590_720p_cmd_command_panel = {
+ 1, 1, 1, 0, 0, 0x2c, 0, 0, 0, 1, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35590_720p_cmd_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35590_720p_cmd_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35590_720p_cmd_timings[] = {
+ 0x7d, 0x25, 0x1d, 0x00, 0x37, 0x33, 0x22, 0x27, 0x1e, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_cmd_rotation[] = {
+
+};
+#define NT35590_720P_CMD_ROTATION 0
+
+
+static struct panel_timing nt35590_720p_cmd_timing_info = {
+ 0, 4, 0x20, 0x2c
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35590_720p_cmd_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_NT35590_720P_CMD_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35590_720p_video.h b/dev/gcdb/display/include/panel_nt35590_720p_video.h
new file mode 100755
index 0000000..c144f14
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35590_720p_video.h
@@ -0,0 +1,2935 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35590_720P_VIDEO_H_
+
+#define _PANEL_NT35590_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35590_720p_video_panel_data = {
+ "nt25590 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35590_720p_video_panel_res = {
+ 720, 1280, 140, 164, 8, 0, 6, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35590_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35590_720p_video_on_cmd0[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd1[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd2[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd4[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd5[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd6[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd7[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd8[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd9[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd10[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd11[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd12[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd13[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd14[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x22, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd15[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd16[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd17[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x73, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd18[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd19[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x9F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd20[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd21[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x24, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd22[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd23[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd24[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x2C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd25[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd26[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd27[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd28[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd29[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd30[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x8B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd31[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd32[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd33[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd34[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x33, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd35[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd36[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd37[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd38[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd39[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd40[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd41[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd42[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd43[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd44[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd45[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd46[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd47[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd48[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd49[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x7F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd50[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd51[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd52[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd53[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd54[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd55[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd56[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd57[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd58[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd59[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x4D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd60[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd61[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd62[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd63[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd64[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x58, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd65[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x6A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd66[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd67[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd68[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd69[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd70[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd71[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd72[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd73[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd74[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd75[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd76[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd77[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd78[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd79[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd80[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd81[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x21, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd82[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd83[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd84[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd85[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd86[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd87[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd88[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd89[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd90[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd91[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd92[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd93[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd94[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd95[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd96[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd97[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd98[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd99[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd100[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd101[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd102[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd103[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd104[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd105[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd106[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd107[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd108[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd109[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd110[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd111[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd112[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd113[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd114[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd115[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd116[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd117[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd118[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd119[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd120[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd121[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd122[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd123[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd124[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd125[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd126[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd127[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd128[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd129[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd130[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd131[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd132[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd133[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd134[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd135[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd136[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd137[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd138[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd139[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd140[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd141[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd142[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd143[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd144[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd145[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd146[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd147[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd148[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd149[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x7D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd150[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd151[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x8A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd152[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd153[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x9C, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd154[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd155[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd156[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd157[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xBF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd158[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd159[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xCF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd160[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd161[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xDD, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd162[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd163[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xE8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd164[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd165[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0xF2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd166[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd167[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd168[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd169[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x41, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd170[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd171[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x78, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd172[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd173[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0xA5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd174[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd175[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd176[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd177[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd178[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd179[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x2A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd180[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd181[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd182[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd183[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd184[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd185[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0xB8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd186[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd187[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0xE7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd188[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd189[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x07, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd190[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd191[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd192[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd193[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x46, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd194[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd195[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd196[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd197[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x66, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd198[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd199[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x7A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd200[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd201[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x93, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd202[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd203[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xA3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd206[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xED, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd207[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd208[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd209[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF0, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd210[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd211[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF2, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd212[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd213[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF4, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd214[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd215[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF6, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd216[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd217[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF8, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd218[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd219[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFA, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd220[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd221[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd222[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd223[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd224[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd225[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd226[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd227[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd228[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd229[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd230[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd231[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd232[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd233[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd234[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd235[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd236[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd237[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd238[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd239[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd240[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd241[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd242[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd243[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd244[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd245[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd246[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd247[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd248[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd249[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd250[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd251[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd252[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd253[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd254[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd255[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd256[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd257[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd258[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd259[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd260[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd261[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd262[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd263[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd264[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd265[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd266[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd267[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd268[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x30, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd269[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x31, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd270[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd271[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd272[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x34, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd273[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0xF3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd274[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd275[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd276[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd277[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd278[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd279[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3B, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd280[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd281[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3F, 0x1D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd282[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x40, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd283[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x41, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd284[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x42, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd285[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0x2F, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd286[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x44, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd287[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x45, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd288[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x46, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd289[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x47, 0x56, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd290[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x48, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd291[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x49, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd292[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd293[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x9D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd294[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd295[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0xC2, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd296[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd297[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd298[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd299[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd300[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd301[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd302[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd303[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd304[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x56, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd305[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd306[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd307[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0xB5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd308[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd309[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0xE3, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd310[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd311[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd312[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd313[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x2D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd314[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd315[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd316[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd317[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd318[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd319[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x57, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd320[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd321[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x68, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd322[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd323[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x7B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd324[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd325[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd326[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd327[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6E, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd328[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd329[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x70, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd330[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd331[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd332[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x73, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd333[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x74, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd334[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd335[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd336[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd337[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd338[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd339[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd340[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd341[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd342[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd343[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd344[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd345[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd346[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd347[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd348[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd349[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd350[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd351[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd352[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd353[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd354[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd355[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd356[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd357[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd358[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd359[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd360[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd361[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd362[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd363[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd364[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd365[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd366[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd367[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd368[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd369[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd370[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd371[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd372[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd373[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd374[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd375[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd376[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd377[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd378[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd379[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd380[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd381[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd382[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd383[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd384[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd385[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd386[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd387[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd388[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd389[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd390[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd391[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0x19, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd392[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd393[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd394[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd395[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd396[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd397[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x70, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd398[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd399[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x83, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd400[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd401[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x99, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd402[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd403[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xA8, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd404[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd405[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xB7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd406[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd407[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd408[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd409[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0xF7, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd410[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd411[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x1E, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd412[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd413[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd414[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd415[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd416[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd417[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd418[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd419[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd420[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd421[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x23, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd422[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd423[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x59, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd424[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd425[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd426[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd427[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0xB4, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd428[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd429[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xE1, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd430[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd431[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd432[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd433[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd434[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd435[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x30, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd436[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd437[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd438[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd439[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x3B, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd440[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd441[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd442[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd443[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd444[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd445[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd446[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd447[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd448[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd449[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xCB, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd450[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd451[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd452[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd453[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd454[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd455[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd456[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd457[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd458[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd459[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x50, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd460[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd461[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd462[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35590_720p_video_on_cmd463[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x00, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_video_on_command[] = {
+{ 0x8 , nt35590_720p_video_on_cmd0},
+{ 0x8 , nt35590_720p_video_on_cmd1},
+{ 0x8 , nt35590_720p_video_on_cmd2},
+{ 0x8 , nt35590_720p_video_on_cmd3},
+{ 0x8 , nt35590_720p_video_on_cmd4},
+{ 0x8 , nt35590_720p_video_on_cmd5},
+{ 0x8 , nt35590_720p_video_on_cmd6},
+{ 0x8 , nt35590_720p_video_on_cmd7},
+{ 0x8 , nt35590_720p_video_on_cmd8},
+{ 0x8 , nt35590_720p_video_on_cmd9},
+{ 0x8 , nt35590_720p_video_on_cmd10},
+{ 0x8 , nt35590_720p_video_on_cmd11},
+{ 0x8 , nt35590_720p_video_on_cmd12},
+{ 0x8 , nt35590_720p_video_on_cmd13},
+{ 0x8 , nt35590_720p_video_on_cmd14},
+{ 0x8 , nt35590_720p_video_on_cmd15},
+{ 0x8 , nt35590_720p_video_on_cmd16},
+{ 0x8 , nt35590_720p_video_on_cmd17},
+{ 0x8 , nt35590_720p_video_on_cmd18},
+{ 0x8 , nt35590_720p_video_on_cmd19},
+{ 0x8 , nt35590_720p_video_on_cmd20},
+{ 0x8 , nt35590_720p_video_on_cmd21},
+{ 0x8 , nt35590_720p_video_on_cmd22},
+{ 0x8 , nt35590_720p_video_on_cmd23},
+{ 0x8 , nt35590_720p_video_on_cmd24},
+{ 0x8 , nt35590_720p_video_on_cmd25},
+{ 0x8 , nt35590_720p_video_on_cmd26},
+{ 0x8 , nt35590_720p_video_on_cmd27},
+{ 0x8 , nt35590_720p_video_on_cmd28},
+{ 0x8 , nt35590_720p_video_on_cmd29},
+{ 0x8 , nt35590_720p_video_on_cmd30},
+{ 0x8 , nt35590_720p_video_on_cmd31},
+{ 0x8 , nt35590_720p_video_on_cmd32},
+{ 0x8 , nt35590_720p_video_on_cmd33},
+{ 0x8 , nt35590_720p_video_on_cmd34},
+{ 0x8 , nt35590_720p_video_on_cmd35},
+{ 0x8 , nt35590_720p_video_on_cmd36},
+{ 0x8 , nt35590_720p_video_on_cmd37},
+{ 0x8 , nt35590_720p_video_on_cmd38},
+{ 0x8 , nt35590_720p_video_on_cmd39},
+{ 0x8 , nt35590_720p_video_on_cmd40},
+{ 0x8 , nt35590_720p_video_on_cmd41},
+{ 0x8 , nt35590_720p_video_on_cmd42},
+{ 0x8 , nt35590_720p_video_on_cmd43},
+{ 0x8 , nt35590_720p_video_on_cmd44},
+{ 0x8 , nt35590_720p_video_on_cmd45},
+{ 0x8 , nt35590_720p_video_on_cmd46},
+{ 0x8 , nt35590_720p_video_on_cmd47},
+{ 0x8 , nt35590_720p_video_on_cmd48},
+{ 0x8 , nt35590_720p_video_on_cmd49},
+{ 0x8 , nt35590_720p_video_on_cmd50},
+{ 0x8 , nt35590_720p_video_on_cmd51},
+{ 0x8 , nt35590_720p_video_on_cmd52},
+{ 0x8 , nt35590_720p_video_on_cmd53},
+{ 0x8 , nt35590_720p_video_on_cmd54},
+{ 0x8 , nt35590_720p_video_on_cmd55},
+{ 0x8 , nt35590_720p_video_on_cmd56},
+{ 0x8 , nt35590_720p_video_on_cmd57},
+{ 0x8 , nt35590_720p_video_on_cmd58},
+{ 0x8 , nt35590_720p_video_on_cmd59},
+{ 0x8 , nt35590_720p_video_on_cmd60},
+{ 0x8 , nt35590_720p_video_on_cmd61},
+{ 0x8 , nt35590_720p_video_on_cmd62},
+{ 0x8 , nt35590_720p_video_on_cmd63},
+{ 0x8 , nt35590_720p_video_on_cmd64},
+{ 0x8 , nt35590_720p_video_on_cmd65},
+{ 0x8 , nt35590_720p_video_on_cmd66},
+{ 0x8 , nt35590_720p_video_on_cmd67},
+{ 0x8 , nt35590_720p_video_on_cmd68},
+{ 0x8 , nt35590_720p_video_on_cmd69},
+{ 0x8 , nt35590_720p_video_on_cmd70},
+{ 0x8 , nt35590_720p_video_on_cmd71},
+{ 0x8 , nt35590_720p_video_on_cmd72},
+{ 0x8 , nt35590_720p_video_on_cmd73},
+{ 0x8 , nt35590_720p_video_on_cmd74},
+{ 0x8 , nt35590_720p_video_on_cmd75},
+{ 0x8 , nt35590_720p_video_on_cmd76},
+{ 0x8 , nt35590_720p_video_on_cmd77},
+{ 0x8 , nt35590_720p_video_on_cmd78},
+{ 0x8 , nt35590_720p_video_on_cmd79},
+{ 0x8 , nt35590_720p_video_on_cmd80},
+{ 0x8 , nt35590_720p_video_on_cmd81},
+{ 0x8 , nt35590_720p_video_on_cmd82},
+{ 0x8 , nt35590_720p_video_on_cmd83},
+{ 0x8 , nt35590_720p_video_on_cmd84},
+{ 0x8 , nt35590_720p_video_on_cmd85},
+{ 0x8 , nt35590_720p_video_on_cmd86},
+{ 0x8 , nt35590_720p_video_on_cmd87},
+{ 0x8 , nt35590_720p_video_on_cmd88},
+{ 0x8 , nt35590_720p_video_on_cmd89},
+{ 0x8 , nt35590_720p_video_on_cmd90},
+{ 0x8 , nt35590_720p_video_on_cmd91},
+{ 0x8 , nt35590_720p_video_on_cmd92},
+{ 0x8 , nt35590_720p_video_on_cmd93},
+{ 0x8 , nt35590_720p_video_on_cmd94},
+{ 0x8 , nt35590_720p_video_on_cmd95},
+{ 0x8 , nt35590_720p_video_on_cmd96},
+{ 0x8 , nt35590_720p_video_on_cmd97},
+{ 0x8 , nt35590_720p_video_on_cmd98},
+{ 0x8 , nt35590_720p_video_on_cmd99},
+{ 0x8 , nt35590_720p_video_on_cmd100},
+{ 0x8 , nt35590_720p_video_on_cmd101},
+{ 0x8 , nt35590_720p_video_on_cmd102},
+{ 0x8 , nt35590_720p_video_on_cmd103},
+{ 0x8 , nt35590_720p_video_on_cmd104},
+{ 0x8 , nt35590_720p_video_on_cmd105},
+{ 0x8 , nt35590_720p_video_on_cmd106},
+{ 0x8 , nt35590_720p_video_on_cmd107},
+{ 0x8 , nt35590_720p_video_on_cmd108},
+{ 0x8 , nt35590_720p_video_on_cmd109},
+{ 0x8 , nt35590_720p_video_on_cmd110},
+{ 0x8 , nt35590_720p_video_on_cmd111},
+{ 0x8 , nt35590_720p_video_on_cmd112},
+{ 0x8 , nt35590_720p_video_on_cmd113},
+{ 0x8 , nt35590_720p_video_on_cmd114},
+{ 0x8 , nt35590_720p_video_on_cmd115},
+{ 0x8 , nt35590_720p_video_on_cmd116},
+{ 0x8 , nt35590_720p_video_on_cmd117},
+{ 0x8 , nt35590_720p_video_on_cmd118},
+{ 0x8 , nt35590_720p_video_on_cmd119},
+{ 0x8 , nt35590_720p_video_on_cmd120},
+{ 0x8 , nt35590_720p_video_on_cmd121},
+{ 0x8 , nt35590_720p_video_on_cmd122},
+{ 0x8 , nt35590_720p_video_on_cmd123},
+{ 0x8 , nt35590_720p_video_on_cmd124},
+{ 0x8 , nt35590_720p_video_on_cmd125},
+{ 0x8 , nt35590_720p_video_on_cmd126},
+{ 0x8 , nt35590_720p_video_on_cmd127},
+{ 0x8 , nt35590_720p_video_on_cmd128},
+{ 0x8 , nt35590_720p_video_on_cmd129},
+{ 0x8 , nt35590_720p_video_on_cmd130},
+{ 0x8 , nt35590_720p_video_on_cmd131},
+{ 0x8 , nt35590_720p_video_on_cmd132},
+{ 0x8 , nt35590_720p_video_on_cmd133},
+{ 0x8 , nt35590_720p_video_on_cmd134},
+{ 0x8 , nt35590_720p_video_on_cmd135},
+{ 0x8 , nt35590_720p_video_on_cmd136},
+{ 0x8 , nt35590_720p_video_on_cmd137},
+{ 0x8 , nt35590_720p_video_on_cmd138},
+{ 0x8 , nt35590_720p_video_on_cmd139},
+{ 0x8 , nt35590_720p_video_on_cmd140},
+{ 0x8 , nt35590_720p_video_on_cmd141},
+{ 0x8 , nt35590_720p_video_on_cmd142},
+{ 0x8 , nt35590_720p_video_on_cmd143},
+{ 0x8 , nt35590_720p_video_on_cmd144},
+{ 0x8 , nt35590_720p_video_on_cmd145},
+{ 0x8 , nt35590_720p_video_on_cmd146},
+{ 0x8 , nt35590_720p_video_on_cmd147},
+{ 0x8 , nt35590_720p_video_on_cmd148},
+{ 0x8 , nt35590_720p_video_on_cmd149},
+{ 0x8 , nt35590_720p_video_on_cmd150},
+{ 0x8 , nt35590_720p_video_on_cmd151},
+{ 0x8 , nt35590_720p_video_on_cmd152},
+{ 0x8 , nt35590_720p_video_on_cmd153},
+{ 0x8 , nt35590_720p_video_on_cmd154},
+{ 0x8 , nt35590_720p_video_on_cmd155},
+{ 0x8 , nt35590_720p_video_on_cmd156},
+{ 0x8 , nt35590_720p_video_on_cmd157},
+{ 0x8 , nt35590_720p_video_on_cmd158},
+{ 0x8 , nt35590_720p_video_on_cmd159},
+{ 0x8 , nt35590_720p_video_on_cmd160},
+{ 0x8 , nt35590_720p_video_on_cmd161},
+{ 0x8 , nt35590_720p_video_on_cmd162},
+{ 0x8 , nt35590_720p_video_on_cmd163},
+{ 0x8 , nt35590_720p_video_on_cmd164},
+{ 0x8 , nt35590_720p_video_on_cmd165},
+{ 0x8 , nt35590_720p_video_on_cmd166},
+{ 0x8 , nt35590_720p_video_on_cmd167},
+{ 0x8 , nt35590_720p_video_on_cmd168},
+{ 0x8 , nt35590_720p_video_on_cmd169},
+{ 0x8 , nt35590_720p_video_on_cmd170},
+{ 0x8 , nt35590_720p_video_on_cmd171},
+{ 0x8 , nt35590_720p_video_on_cmd172},
+{ 0x8 , nt35590_720p_video_on_cmd173},
+{ 0x8 , nt35590_720p_video_on_cmd174},
+{ 0x8 , nt35590_720p_video_on_cmd175},
+{ 0x8 , nt35590_720p_video_on_cmd176},
+{ 0x8 , nt35590_720p_video_on_cmd177},
+{ 0x8 , nt35590_720p_video_on_cmd178},
+{ 0x8 , nt35590_720p_video_on_cmd179},
+{ 0x8 , nt35590_720p_video_on_cmd180},
+{ 0x8 , nt35590_720p_video_on_cmd181},
+{ 0x8 , nt35590_720p_video_on_cmd182},
+{ 0x8 , nt35590_720p_video_on_cmd183},
+{ 0x8 , nt35590_720p_video_on_cmd184},
+{ 0x8 , nt35590_720p_video_on_cmd185},
+{ 0x8 , nt35590_720p_video_on_cmd186},
+{ 0x8 , nt35590_720p_video_on_cmd187},
+{ 0x8 , nt35590_720p_video_on_cmd188},
+{ 0x8 , nt35590_720p_video_on_cmd189},
+{ 0x8 , nt35590_720p_video_on_cmd190},
+{ 0x8 , nt35590_720p_video_on_cmd191},
+{ 0x8 , nt35590_720p_video_on_cmd192},
+{ 0x8 , nt35590_720p_video_on_cmd193},
+{ 0x8 , nt35590_720p_video_on_cmd194},
+{ 0x8 , nt35590_720p_video_on_cmd195},
+{ 0x8 , nt35590_720p_video_on_cmd196},
+{ 0x8 , nt35590_720p_video_on_cmd197},
+{ 0x8 , nt35590_720p_video_on_cmd198},
+{ 0x8 , nt35590_720p_video_on_cmd199},
+{ 0x8 , nt35590_720p_video_on_cmd200},
+{ 0x8 , nt35590_720p_video_on_cmd201},
+{ 0x8 , nt35590_720p_video_on_cmd202},
+{ 0x8 , nt35590_720p_video_on_cmd203},
+{ 0x8 , nt35590_720p_video_on_cmd204},
+{ 0x8 , nt35590_720p_video_on_cmd205},
+{ 0x8 , nt35590_720p_video_on_cmd206},
+{ 0x8 , nt35590_720p_video_on_cmd207},
+{ 0x8 , nt35590_720p_video_on_cmd208},
+{ 0x8 , nt35590_720p_video_on_cmd209},
+{ 0x8 , nt35590_720p_video_on_cmd210},
+{ 0x8 , nt35590_720p_video_on_cmd211},
+{ 0x8 , nt35590_720p_video_on_cmd212},
+{ 0x8 , nt35590_720p_video_on_cmd213},
+{ 0x8 , nt35590_720p_video_on_cmd214},
+{ 0x8 , nt35590_720p_video_on_cmd215},
+{ 0x8 , nt35590_720p_video_on_cmd216},
+{ 0x8 , nt35590_720p_video_on_cmd217},
+{ 0x8 , nt35590_720p_video_on_cmd218},
+{ 0x8 , nt35590_720p_video_on_cmd219},
+{ 0x8 , nt35590_720p_video_on_cmd220},
+{ 0x8 , nt35590_720p_video_on_cmd221},
+{ 0x8 , nt35590_720p_video_on_cmd222},
+{ 0x8 , nt35590_720p_video_on_cmd223},
+{ 0x8 , nt35590_720p_video_on_cmd224},
+{ 0x8 , nt35590_720p_video_on_cmd225},
+{ 0x8 , nt35590_720p_video_on_cmd226},
+{ 0x8 , nt35590_720p_video_on_cmd227},
+{ 0x8 , nt35590_720p_video_on_cmd228},
+{ 0x8 , nt35590_720p_video_on_cmd229},
+{ 0x8 , nt35590_720p_video_on_cmd230},
+{ 0x8 , nt35590_720p_video_on_cmd231},
+{ 0x8 , nt35590_720p_video_on_cmd232},
+{ 0x8 , nt35590_720p_video_on_cmd233},
+{ 0x8 , nt35590_720p_video_on_cmd234},
+{ 0x8 , nt35590_720p_video_on_cmd235},
+{ 0x8 , nt35590_720p_video_on_cmd236},
+{ 0x8 , nt35590_720p_video_on_cmd237},
+{ 0x8 , nt35590_720p_video_on_cmd238},
+{ 0x8 , nt35590_720p_video_on_cmd239},
+{ 0x8 , nt35590_720p_video_on_cmd240},
+{ 0x8 , nt35590_720p_video_on_cmd241},
+{ 0x8 , nt35590_720p_video_on_cmd242},
+{ 0x8 , nt35590_720p_video_on_cmd243},
+{ 0x8 , nt35590_720p_video_on_cmd244},
+{ 0x8 , nt35590_720p_video_on_cmd245},
+{ 0x8 , nt35590_720p_video_on_cmd246},
+{ 0x8 , nt35590_720p_video_on_cmd247},
+{ 0x8 , nt35590_720p_video_on_cmd248},
+{ 0x8 , nt35590_720p_video_on_cmd249},
+{ 0x8 , nt35590_720p_video_on_cmd250},
+{ 0x8 , nt35590_720p_video_on_cmd251},
+{ 0x8 , nt35590_720p_video_on_cmd252},
+{ 0x8 , nt35590_720p_video_on_cmd253},
+{ 0x8 , nt35590_720p_video_on_cmd254},
+{ 0x8 , nt35590_720p_video_on_cmd255},
+{ 0x8 , nt35590_720p_video_on_cmd256},
+{ 0x8 , nt35590_720p_video_on_cmd257},
+{ 0x8 , nt35590_720p_video_on_cmd258},
+{ 0x8 , nt35590_720p_video_on_cmd259},
+{ 0x8 , nt35590_720p_video_on_cmd260},
+{ 0x8 , nt35590_720p_video_on_cmd261},
+{ 0x8 , nt35590_720p_video_on_cmd262},
+{ 0x8 , nt35590_720p_video_on_cmd263},
+{ 0x8 , nt35590_720p_video_on_cmd264},
+{ 0x8 , nt35590_720p_video_on_cmd265},
+{ 0x8 , nt35590_720p_video_on_cmd266},
+{ 0x8 , nt35590_720p_video_on_cmd267},
+{ 0x8 , nt35590_720p_video_on_cmd268},
+{ 0x8 , nt35590_720p_video_on_cmd269},
+{ 0x8 , nt35590_720p_video_on_cmd270},
+{ 0x8 , nt35590_720p_video_on_cmd271},
+{ 0x8 , nt35590_720p_video_on_cmd272},
+{ 0x8 , nt35590_720p_video_on_cmd273},
+{ 0x8 , nt35590_720p_video_on_cmd274},
+{ 0x8 , nt35590_720p_video_on_cmd275},
+{ 0x8 , nt35590_720p_video_on_cmd276},
+{ 0x8 , nt35590_720p_video_on_cmd277},
+{ 0x8 , nt35590_720p_video_on_cmd278},
+{ 0x8 , nt35590_720p_video_on_cmd279},
+{ 0x8 , nt35590_720p_video_on_cmd280},
+{ 0x8 , nt35590_720p_video_on_cmd281},
+{ 0x8 , nt35590_720p_video_on_cmd282},
+{ 0x8 , nt35590_720p_video_on_cmd283},
+{ 0x8 , nt35590_720p_video_on_cmd284},
+{ 0x8 , nt35590_720p_video_on_cmd285},
+{ 0x8 , nt35590_720p_video_on_cmd286},
+{ 0x8 , nt35590_720p_video_on_cmd287},
+{ 0x8 , nt35590_720p_video_on_cmd288},
+{ 0x8 , nt35590_720p_video_on_cmd289},
+{ 0x8 , nt35590_720p_video_on_cmd290},
+{ 0x8 , nt35590_720p_video_on_cmd291},
+{ 0x8 , nt35590_720p_video_on_cmd292},
+{ 0x8 , nt35590_720p_video_on_cmd293},
+{ 0x8 , nt35590_720p_video_on_cmd294},
+{ 0x8 , nt35590_720p_video_on_cmd295},
+{ 0x8 , nt35590_720p_video_on_cmd296},
+{ 0x8 , nt35590_720p_video_on_cmd297},
+{ 0x8 , nt35590_720p_video_on_cmd298},
+{ 0x8 , nt35590_720p_video_on_cmd299},
+{ 0x8 , nt35590_720p_video_on_cmd300},
+{ 0x8 , nt35590_720p_video_on_cmd301},
+{ 0x8 , nt35590_720p_video_on_cmd302},
+{ 0x8 , nt35590_720p_video_on_cmd303},
+{ 0x8 , nt35590_720p_video_on_cmd304},
+{ 0x8 , nt35590_720p_video_on_cmd305},
+{ 0x8 , nt35590_720p_video_on_cmd306},
+{ 0x8 , nt35590_720p_video_on_cmd307},
+{ 0x8 , nt35590_720p_video_on_cmd308},
+{ 0x8 , nt35590_720p_video_on_cmd309},
+{ 0x8 , nt35590_720p_video_on_cmd310},
+{ 0x8 , nt35590_720p_video_on_cmd311},
+{ 0x8 , nt35590_720p_video_on_cmd312},
+{ 0x8 , nt35590_720p_video_on_cmd313},
+{ 0x8 , nt35590_720p_video_on_cmd314},
+{ 0x8 , nt35590_720p_video_on_cmd315},
+{ 0x8 , nt35590_720p_video_on_cmd316},
+{ 0x8 , nt35590_720p_video_on_cmd317},
+{ 0x8 , nt35590_720p_video_on_cmd318},
+{ 0x8 , nt35590_720p_video_on_cmd319},
+{ 0x8 , nt35590_720p_video_on_cmd320},
+{ 0x8 , nt35590_720p_video_on_cmd321},
+{ 0x8 , nt35590_720p_video_on_cmd322},
+{ 0x8 , nt35590_720p_video_on_cmd323},
+{ 0x8 , nt35590_720p_video_on_cmd324},
+{ 0x8 , nt35590_720p_video_on_cmd325},
+{ 0x8 , nt35590_720p_video_on_cmd326},
+{ 0x8 , nt35590_720p_video_on_cmd327},
+{ 0x8 , nt35590_720p_video_on_cmd328},
+{ 0x8 , nt35590_720p_video_on_cmd329},
+{ 0x8 , nt35590_720p_video_on_cmd330},
+{ 0x8 , nt35590_720p_video_on_cmd331},
+{ 0x8 , nt35590_720p_video_on_cmd332},
+{ 0x8 , nt35590_720p_video_on_cmd333},
+{ 0x8 , nt35590_720p_video_on_cmd334},
+{ 0x8 , nt35590_720p_video_on_cmd335},
+{ 0x8 , nt35590_720p_video_on_cmd336},
+{ 0x8 , nt35590_720p_video_on_cmd337},
+{ 0x8 , nt35590_720p_video_on_cmd338},
+{ 0x8 , nt35590_720p_video_on_cmd339},
+{ 0x8 , nt35590_720p_video_on_cmd340},
+{ 0x8 , nt35590_720p_video_on_cmd341},
+{ 0x8 , nt35590_720p_video_on_cmd342},
+{ 0x8 , nt35590_720p_video_on_cmd343},
+{ 0x8 , nt35590_720p_video_on_cmd344},
+{ 0x8 , nt35590_720p_video_on_cmd345},
+{ 0x8 , nt35590_720p_video_on_cmd346},
+{ 0x8 , nt35590_720p_video_on_cmd347},
+{ 0x8 , nt35590_720p_video_on_cmd348},
+{ 0x8 , nt35590_720p_video_on_cmd349},
+{ 0x8 , nt35590_720p_video_on_cmd350},
+{ 0x8 , nt35590_720p_video_on_cmd351},
+{ 0x8 , nt35590_720p_video_on_cmd352},
+{ 0x8 , nt35590_720p_video_on_cmd353},
+{ 0x8 , nt35590_720p_video_on_cmd354},
+{ 0x8 , nt35590_720p_video_on_cmd355},
+{ 0x8 , nt35590_720p_video_on_cmd356},
+{ 0x8 , nt35590_720p_video_on_cmd357},
+{ 0x8 , nt35590_720p_video_on_cmd358},
+{ 0x8 , nt35590_720p_video_on_cmd359},
+{ 0x8 , nt35590_720p_video_on_cmd360},
+{ 0x8 , nt35590_720p_video_on_cmd361},
+{ 0x8 , nt35590_720p_video_on_cmd362},
+{ 0x8 , nt35590_720p_video_on_cmd363},
+{ 0x8 , nt35590_720p_video_on_cmd364},
+{ 0x8 , nt35590_720p_video_on_cmd365},
+{ 0x8 , nt35590_720p_video_on_cmd366},
+{ 0x8 , nt35590_720p_video_on_cmd367},
+{ 0x8 , nt35590_720p_video_on_cmd368},
+{ 0x8 , nt35590_720p_video_on_cmd369},
+{ 0x8 , nt35590_720p_video_on_cmd370},
+{ 0x8 , nt35590_720p_video_on_cmd371},
+{ 0x8 , nt35590_720p_video_on_cmd372},
+{ 0x8 , nt35590_720p_video_on_cmd373},
+{ 0x8 , nt35590_720p_video_on_cmd374},
+{ 0x8 , nt35590_720p_video_on_cmd375},
+{ 0x8 , nt35590_720p_video_on_cmd376},
+{ 0x8 , nt35590_720p_video_on_cmd377},
+{ 0x8 , nt35590_720p_video_on_cmd378},
+{ 0x8 , nt35590_720p_video_on_cmd379},
+{ 0x8 , nt35590_720p_video_on_cmd380},
+{ 0x8 , nt35590_720p_video_on_cmd381},
+{ 0x8 , nt35590_720p_video_on_cmd382},
+{ 0x8 , nt35590_720p_video_on_cmd383},
+{ 0x8 , nt35590_720p_video_on_cmd384},
+{ 0x8 , nt35590_720p_video_on_cmd385},
+{ 0x8 , nt35590_720p_video_on_cmd386},
+{ 0x8 , nt35590_720p_video_on_cmd387},
+{ 0x8 , nt35590_720p_video_on_cmd388},
+{ 0x8 , nt35590_720p_video_on_cmd389},
+{ 0x8 , nt35590_720p_video_on_cmd390},
+{ 0x8 , nt35590_720p_video_on_cmd391},
+{ 0x8 , nt35590_720p_video_on_cmd392},
+{ 0x8 , nt35590_720p_video_on_cmd393},
+{ 0x8 , nt35590_720p_video_on_cmd394},
+{ 0x8 , nt35590_720p_video_on_cmd395},
+{ 0x8 , nt35590_720p_video_on_cmd396},
+{ 0x8 , nt35590_720p_video_on_cmd397},
+{ 0x8 , nt35590_720p_video_on_cmd398},
+{ 0x8 , nt35590_720p_video_on_cmd399},
+{ 0x8 , nt35590_720p_video_on_cmd400},
+{ 0x8 , nt35590_720p_video_on_cmd401},
+{ 0x8 , nt35590_720p_video_on_cmd402},
+{ 0x8 , nt35590_720p_video_on_cmd403},
+{ 0x8 , nt35590_720p_video_on_cmd404},
+{ 0x8 , nt35590_720p_video_on_cmd405},
+{ 0x8 , nt35590_720p_video_on_cmd406},
+{ 0x8 , nt35590_720p_video_on_cmd407},
+{ 0x8 , nt35590_720p_video_on_cmd408},
+{ 0x8 , nt35590_720p_video_on_cmd409},
+{ 0x8 , nt35590_720p_video_on_cmd410},
+{ 0x8 , nt35590_720p_video_on_cmd411},
+{ 0x8 , nt35590_720p_video_on_cmd412},
+{ 0x8 , nt35590_720p_video_on_cmd413},
+{ 0x8 , nt35590_720p_video_on_cmd414},
+{ 0x8 , nt35590_720p_video_on_cmd415},
+{ 0x8 , nt35590_720p_video_on_cmd416},
+{ 0x8 , nt35590_720p_video_on_cmd417},
+{ 0x8 , nt35590_720p_video_on_cmd418},
+{ 0x8 , nt35590_720p_video_on_cmd419},
+{ 0x8 , nt35590_720p_video_on_cmd420},
+{ 0x8 , nt35590_720p_video_on_cmd421},
+{ 0x8 , nt35590_720p_video_on_cmd422},
+{ 0x8 , nt35590_720p_video_on_cmd423},
+{ 0x8 , nt35590_720p_video_on_cmd424},
+{ 0x8 , nt35590_720p_video_on_cmd425},
+{ 0x8 , nt35590_720p_video_on_cmd426},
+{ 0x8 , nt35590_720p_video_on_cmd427},
+{ 0x8 , nt35590_720p_video_on_cmd428},
+{ 0x8 , nt35590_720p_video_on_cmd429},
+{ 0x8 , nt35590_720p_video_on_cmd430},
+{ 0x8 , nt35590_720p_video_on_cmd431},
+{ 0x8 , nt35590_720p_video_on_cmd432},
+{ 0x8 , nt35590_720p_video_on_cmd433},
+{ 0x8 , nt35590_720p_video_on_cmd434},
+{ 0x8 , nt35590_720p_video_on_cmd435},
+{ 0x8 , nt35590_720p_video_on_cmd436},
+{ 0x8 , nt35590_720p_video_on_cmd437},
+{ 0x8 , nt35590_720p_video_on_cmd438},
+{ 0x8 , nt35590_720p_video_on_cmd439},
+{ 0x8 , nt35590_720p_video_on_cmd440},
+{ 0x8 , nt35590_720p_video_on_cmd441},
+{ 0x8 , nt35590_720p_video_on_cmd442},
+{ 0x8 , nt35590_720p_video_on_cmd443},
+{ 0x8 , nt35590_720p_video_on_cmd444},
+{ 0x8 , nt35590_720p_video_on_cmd445},
+{ 0x8 , nt35590_720p_video_on_cmd446},
+{ 0x8 , nt35590_720p_video_on_cmd447},
+{ 0x8 , nt35590_720p_video_on_cmd448},
+{ 0x8 , nt35590_720p_video_on_cmd449},
+{ 0x8 , nt35590_720p_video_on_cmd450},
+{ 0x8 , nt35590_720p_video_on_cmd451},
+{ 0x8 , nt35590_720p_video_on_cmd452},
+{ 0x8 , nt35590_720p_video_on_cmd453},
+{ 0x8 , nt35590_720p_video_on_cmd454},
+{ 0x8 , nt35590_720p_video_on_cmd455},
+{ 0x8 , nt35590_720p_video_on_cmd456},
+{ 0x8 , nt35590_720p_video_on_cmd457},
+{ 0x8 , nt35590_720p_video_on_cmd458},
+{ 0x8 , nt35590_720p_video_on_cmd459},
+{ 0x8 , nt35590_720p_video_on_cmd460},
+{ 0x8 , nt35590_720p_video_on_cmd461},
+{ 0x8 , nt35590_720p_video_on_cmd462},
+{ 0x8 , nt35590_720p_video_on_cmd463}
+};
+#define NT35590_720P_VIDEO_ON_COMMAND 464
+
+
+static char nt35590_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35590_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_video_off_command[] = {
+{ 0x4 , nt35590_720p_videooff_cmd0},
+{ 0x4 , nt35590_720p_videooff_cmd1}
+};
+#define NT35590_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state nt35590_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35590_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35590_720p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35590_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35590_720p_video_timings[] = {
+ 0x7d, 0x25, 0x1d, 0x00, 0x37, 0x33, 0x22, 0x27, 0x1e, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd nt35590_720p_video_rotation[] = {
+
+};
+#define NT35590_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing nt35590_720p_video_timing_info = {
+ 0, 4, 0x20, 0x2c
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35590_720p_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_NT35590_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_nt35596_1080p_video.h b/dev/gcdb/display/include/panel_nt35596_1080p_video.h
new file mode 100644
index 0000000..d90dff9
--- /dev/null
+++ b/dev/gcdb/display/include/panel_nt35596_1080p_video.h
@@ -0,0 +1,3263 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_NT35596_1080P_VIDEO_H_
+
+#define _PANEL_NT35596_1080P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config nt35596_1080p_video_panel_data = {
+ "nt35596 1080p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution nt35596_1080p_video_panel_res = {
+ 1080, 1920, 32, 32, 8, 0, 2, 18, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info nt35596_1080p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char nt35596_1080p_video_on_cmd0[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0xEE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd1[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd2[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x45, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd3[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x4F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd4[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0xC8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd5[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x2C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd6[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0xBB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd7[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd8[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xB1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd9[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd10[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd11[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd12[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd13[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd14[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd15[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd16[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd17[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd18[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd19[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x1B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd20[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x24, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd21[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd22[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x87, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd23[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x87, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd24[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0xB0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd25[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xB3, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd26[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd27[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd28[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd29[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd30[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x18, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd31[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x18, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd32[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd33[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x77, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd34[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x55, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd35[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd36[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd37[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd38[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd39[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd40[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd41[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd42[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd43[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd44[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd45[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd46[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd47[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd48[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd49[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd50[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd51[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd52[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd53[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x82, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd54[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd55[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd56[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0x31, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd57[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd58[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd59[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd60[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd61[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd62[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd63[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd64[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd65[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd66[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd67[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd68[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd69[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd70[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd71[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd72[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd73[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x15, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd74[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd75[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd76[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd77[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd78[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x09, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd79[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x0A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd80[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd81[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd82[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd83[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd84[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd85[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd86[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd87[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd88[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x13, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd89[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x15, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd90[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd91[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd92[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd93[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd94[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd95[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd96[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd97[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x58, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd98[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x12, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd99[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd100[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x06, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd101[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x11, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd102[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd103[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd104[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd105[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd106[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x61, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd107[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd108[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x63, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd109[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x77, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd110[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0xED, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd111[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd112[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd113[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd114[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd115[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x15, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd116[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x75, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd117[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd118[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd119[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd120[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd121[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd122[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd123[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd124[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd125[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd126[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd127[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x40, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd128[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd129[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd130[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd131[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0xC5, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd132[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xD8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd133[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x60, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd134[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd135[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0x81, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd136[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd137[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x08, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd138[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x10, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd139[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd140[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x0F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd141[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd142[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd143[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd144[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd145[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd146[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x8E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd147[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd148[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd149[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd150[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0xB2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd151[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd152[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd153[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd154[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0xD7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd155[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd156[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0xE9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd157[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd158[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd159[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd160[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd161[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd162[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd163[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd164[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd165[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd166[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd167[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd168[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd169[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd170[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0xBC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd171[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd172[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd173[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd174[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x39, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd175[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd176[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd177[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd178[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd179[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd180[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xA2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd181[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd182[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd183[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd184[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd185[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd186[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd187[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd188[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0x54, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd189[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd190[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd191[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd192[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd193[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd194[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0x81, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd195[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd196[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd197[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd198[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0xF0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd199[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd200[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd201[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd202[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd203[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd204[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd206[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x8E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd207[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd208[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x90, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd209[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd210[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0xB2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd211[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd212[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd213[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd214[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0xD7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd215[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd216[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0xE9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd217[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd218[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd219[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd220[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd221[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd222[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd223[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd224[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd225[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd226[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0x5D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd227[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd228[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x94, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd229[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd230[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0xBC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd231[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd232[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd233[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd234[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x39, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd235[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd236[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0x3A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd237[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd238[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd239[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd240[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xA2, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd241[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd242[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd243[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd244[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd245[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd246[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x20, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd247[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd248[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0x54, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd249[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd250[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0x6D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd251[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd252[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0x80, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd253[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd254[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0x81, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd255[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd256[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0xC7, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd257[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd258[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0xF0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd259[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd260[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd261[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd262[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEC, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd263[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xED, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd264[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEE, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd265[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd266[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF0, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd267[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd268[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF2, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd269[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF3, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd270[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF4, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd271[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF5, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd272[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF6, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd273[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF7, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd274[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF8, 0x71, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd275[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xF9, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd276[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFA, 0x8C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd277[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd278[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd279[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd280[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x01, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd281[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x02, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd282[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x03, 0xB6, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd283[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x04, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd284[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x05, 0xC9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd285[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x06, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd286[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x07, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd287[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x08, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd288[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x09, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd289[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd290[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0B, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd291[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd292[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0D, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd293[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd294[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x0F, 0xEB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd295[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x10, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd296[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x25, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd297[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x12, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd298[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x13, 0x27, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd299[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x14, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd300[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x15, 0x5C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd301[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x16, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd302[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x17, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd303[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x18, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd304[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x19, 0xBA, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd305[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1A, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd306[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1B, 0xEC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd307[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1C, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd308[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1D, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd309[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1E, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd310[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x1F, 0x34, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd311[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x20, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd312[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x21, 0x3F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd313[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x22, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd314[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x23, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd315[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x24, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd316[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x25, 0x49, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd317[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x26, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd318[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x27, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd319[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x28, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd320[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x7E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd321[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2A, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd322[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2B, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd323[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd324[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x2F, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd325[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x30, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd326[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x31, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd327[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x32, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd328[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x33, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd329[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x34, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd330[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x0B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd331[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x36, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd332[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x37, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd333[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x38, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd334[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x39, 0x4A, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd335[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3A, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd336[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3B, 0x71, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd337[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3D, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd338[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x3F, 0x8C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd339[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x40, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd340[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x41, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd341[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x42, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd342[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x43, 0xB6, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd343[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x44, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd344[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x45, 0xC9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd345[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x46, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd346[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x47, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd347[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x48, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd348[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x49, 0x29, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd349[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4A, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd350[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4B, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd351[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd352[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4D, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd353[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4E, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd354[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x4F, 0xEB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd355[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x50, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd356[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0x25, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd357[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x52, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd358[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x53, 0x27, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd359[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x54, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd360[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x55, 0x5C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd361[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x56, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd362[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x58, 0x95, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd363[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x59, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd364[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5A, 0xBA, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd365[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd366[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5C, 0xEC, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd367[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd368[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5E, 0x0C, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd369[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x5F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd370[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x60, 0x34, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd371[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x61, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd372[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x62, 0x3F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd373[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x63, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd374[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x64, 0x48, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd375[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x65, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd376[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x66, 0x49, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd377[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x67, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd378[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x68, 0x6B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd379[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x69, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd380[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6A, 0x7E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd381[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd382[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6C, 0x8F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd383[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd384[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6E, 0x9E, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd385[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x6F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd386[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x70, 0xA0, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd387[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x71, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd388[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x72, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd389[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x73, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd390[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x74, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd391[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x75, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd392[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x76, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd393[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x77, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd394[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x78, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd395[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x79, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd396[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7A, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd397[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7B, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd398[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7C, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd399[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7D, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd400[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7E, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd401[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x7F, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd402[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x80, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd403[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x81, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd404[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x82, 0x38, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd405[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x83, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd406[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x84, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd407[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x85, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd408[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x86, 0x72, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd409[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x87, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd410[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x88, 0x9B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd411[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x89, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd412[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8A, 0xC3, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd413[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8B, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd414[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8C, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd415[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8D, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd416[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8E, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd417[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x8F, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd418[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x90, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd419[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x91, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd420[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x92, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd421[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x93, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd422[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x94, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd423[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x95, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd424[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x96, 0xC8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd425[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x97, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd426[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x98, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd427[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x99, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd428[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9A, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd429[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9B, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd430[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9C, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd431[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9D, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd432[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9E, 0x88, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd433[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x9F, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd434[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA0, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd435[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA2, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd436[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA3, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd437[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA4, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd438[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA5, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd439[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA6, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd440[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA7, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd441[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xA9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd442[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAA, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd443[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd444[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAC, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd445[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd446[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAE, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd447[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xAF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd448[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB0, 0xFB, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd449[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB1, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd450[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB2, 0xFD, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd451[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd452[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB4, 0x05, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd453[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd454[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB6, 0x0D, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd455[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd456[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB8, 0x17, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd457[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xB9, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd458[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBA, 0x1F, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd459[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd460[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBC, 0x28, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd461[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBD, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd462[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBE, 0x32, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd463[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xBF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd464[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC0, 0x38, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd465[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC1, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd466[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC2, 0x53, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd467[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC3, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd468[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC4, 0x72, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd469[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC5, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd470[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC6, 0x9B, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd471[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC7, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd472[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC8, 0xC3, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd473[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xC9, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd474[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCA, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd475[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCB, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd476[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCC, 0x36, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd477[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCD, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd478[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCE, 0x37, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd479[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xCF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd480[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD0, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd481[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD1, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd482[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD2, 0xA1, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd483[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd484[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0xC8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd485[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD5, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd486[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD6, 0xFF, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd487[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd488[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD8, 0x26, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd489[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd490[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDA, 0x69, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd491[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDB, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd492[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDC, 0x88, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd493[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDD, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd494[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDE, 0xF8, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd495[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xDF, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd496[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE0, 0xF9, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd497[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE1, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd498[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE2, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd499[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE3, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd500[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE4, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd501[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE5, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd502[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE6, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd503[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE7, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd504[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE8, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd505[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xE9, 0x03, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd506[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xEA, 0xFE, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd507[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd508[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd509[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x02, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd510[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd511[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x04, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd512[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFB, 0x01, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd513[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd514[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD3, 0x14, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd515[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xD4, 0x14, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd516[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x11, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd517[] = {
+0x02, 0x00, 0x29, 0xC0,
+0xFF, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd518[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x35, 0x00, 0xFF, 0xFF, };
+
+
+static char nt35596_1080p_video_on_cmd519[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x29, 0x00, 0xFF, 0xFF, };
+
+
+
+
+static struct mipi_dsi_cmd nt35596_1080p_video_on_command[] = {
+{ 0x8 , nt35596_1080p_video_on_cmd0},
+{ 0x8 , nt35596_1080p_video_on_cmd1},
+{ 0x8 , nt35596_1080p_video_on_cmd2},
+{ 0x8 , nt35596_1080p_video_on_cmd3},
+{ 0x8 , nt35596_1080p_video_on_cmd4},
+{ 0x8 , nt35596_1080p_video_on_cmd5},
+{ 0x8 , nt35596_1080p_video_on_cmd6},
+{ 0x8 , nt35596_1080p_video_on_cmd7},
+{ 0x8 , nt35596_1080p_video_on_cmd8},
+{ 0x8 , nt35596_1080p_video_on_cmd9},
+{ 0x8 , nt35596_1080p_video_on_cmd10},
+{ 0x8 , nt35596_1080p_video_on_cmd11},
+{ 0x8 , nt35596_1080p_video_on_cmd12},
+{ 0x8 , nt35596_1080p_video_on_cmd13},
+{ 0x8 , nt35596_1080p_video_on_cmd14},
+{ 0x8 , nt35596_1080p_video_on_cmd15},
+{ 0x8 , nt35596_1080p_video_on_cmd16},
+{ 0x8 , nt35596_1080p_video_on_cmd17},
+{ 0x8 , nt35596_1080p_video_on_cmd18},
+{ 0x8 , nt35596_1080p_video_on_cmd19},
+{ 0x8 , nt35596_1080p_video_on_cmd20},
+{ 0x8 , nt35596_1080p_video_on_cmd21},
+{ 0x8 , nt35596_1080p_video_on_cmd22},
+{ 0x8 , nt35596_1080p_video_on_cmd23},
+{ 0x8 , nt35596_1080p_video_on_cmd24},
+{ 0x8 , nt35596_1080p_video_on_cmd25},
+{ 0x8 , nt35596_1080p_video_on_cmd26},
+{ 0x8 , nt35596_1080p_video_on_cmd27},
+{ 0x8 , nt35596_1080p_video_on_cmd28},
+{ 0x8 , nt35596_1080p_video_on_cmd29},
+{ 0x8 , nt35596_1080p_video_on_cmd30},
+{ 0x8 , nt35596_1080p_video_on_cmd31},
+{ 0x8 , nt35596_1080p_video_on_cmd32},
+{ 0x8 , nt35596_1080p_video_on_cmd33},
+{ 0x8 , nt35596_1080p_video_on_cmd34},
+{ 0x8 , nt35596_1080p_video_on_cmd35},
+{ 0x8 , nt35596_1080p_video_on_cmd36},
+{ 0x8 , nt35596_1080p_video_on_cmd37},
+{ 0x8 , nt35596_1080p_video_on_cmd38},
+{ 0x8 , nt35596_1080p_video_on_cmd39},
+{ 0x8 , nt35596_1080p_video_on_cmd40},
+{ 0x8 , nt35596_1080p_video_on_cmd41},
+{ 0x8 , nt35596_1080p_video_on_cmd42},
+{ 0x8 , nt35596_1080p_video_on_cmd43},
+{ 0x8 , nt35596_1080p_video_on_cmd44},
+{ 0x8 , nt35596_1080p_video_on_cmd45},
+{ 0x8 , nt35596_1080p_video_on_cmd46},
+{ 0x8 , nt35596_1080p_video_on_cmd47},
+{ 0x8 , nt35596_1080p_video_on_cmd48},
+{ 0x8 , nt35596_1080p_video_on_cmd49},
+{ 0x8 , nt35596_1080p_video_on_cmd50},
+{ 0x8 , nt35596_1080p_video_on_cmd51},
+{ 0x8 , nt35596_1080p_video_on_cmd52},
+{ 0x8 , nt35596_1080p_video_on_cmd53},
+{ 0x8 , nt35596_1080p_video_on_cmd54},
+{ 0x8 , nt35596_1080p_video_on_cmd55},
+{ 0x8 , nt35596_1080p_video_on_cmd56},
+{ 0x8 , nt35596_1080p_video_on_cmd57},
+{ 0x8 , nt35596_1080p_video_on_cmd58},
+{ 0x8 , nt35596_1080p_video_on_cmd59},
+{ 0x8 , nt35596_1080p_video_on_cmd60},
+{ 0x8 , nt35596_1080p_video_on_cmd61},
+{ 0x8 , nt35596_1080p_video_on_cmd62},
+{ 0x8 , nt35596_1080p_video_on_cmd63},
+{ 0x8 , nt35596_1080p_video_on_cmd64},
+{ 0x8 , nt35596_1080p_video_on_cmd65},
+{ 0x8 , nt35596_1080p_video_on_cmd66},
+{ 0x8 , nt35596_1080p_video_on_cmd67},
+{ 0x8 , nt35596_1080p_video_on_cmd68},
+{ 0x8 , nt35596_1080p_video_on_cmd69},
+{ 0x8 , nt35596_1080p_video_on_cmd70},
+{ 0x8 , nt35596_1080p_video_on_cmd71},
+{ 0x8 , nt35596_1080p_video_on_cmd72},
+{ 0x8 , nt35596_1080p_video_on_cmd73},
+{ 0x8 , nt35596_1080p_video_on_cmd74},
+{ 0x8 , nt35596_1080p_video_on_cmd75},
+{ 0x8 , nt35596_1080p_video_on_cmd76},
+{ 0x8 , nt35596_1080p_video_on_cmd77},
+{ 0x8 , nt35596_1080p_video_on_cmd78},
+{ 0x8 , nt35596_1080p_video_on_cmd79},
+{ 0x8 , nt35596_1080p_video_on_cmd80},
+{ 0x8 , nt35596_1080p_video_on_cmd81},
+{ 0x8 , nt35596_1080p_video_on_cmd82},
+{ 0x8 , nt35596_1080p_video_on_cmd83},
+{ 0x8 , nt35596_1080p_video_on_cmd84},
+{ 0x8 , nt35596_1080p_video_on_cmd85},
+{ 0x8 , nt35596_1080p_video_on_cmd86},
+{ 0x8 , nt35596_1080p_video_on_cmd87},
+{ 0x8 , nt35596_1080p_video_on_cmd88},
+{ 0x8 , nt35596_1080p_video_on_cmd89},
+{ 0x8 , nt35596_1080p_video_on_cmd90},
+{ 0x8 , nt35596_1080p_video_on_cmd91},
+{ 0x8 , nt35596_1080p_video_on_cmd92},
+{ 0x8 , nt35596_1080p_video_on_cmd93},
+{ 0x8 , nt35596_1080p_video_on_cmd94},
+{ 0x8 , nt35596_1080p_video_on_cmd95},
+{ 0x8 , nt35596_1080p_video_on_cmd96},
+{ 0x8 , nt35596_1080p_video_on_cmd97},
+{ 0x8 , nt35596_1080p_video_on_cmd98},
+{ 0x8 , nt35596_1080p_video_on_cmd99},
+{ 0x8 , nt35596_1080p_video_on_cmd100},
+{ 0x8 , nt35596_1080p_video_on_cmd101},
+{ 0x8 , nt35596_1080p_video_on_cmd102},
+{ 0x8 , nt35596_1080p_video_on_cmd103},
+{ 0x8 , nt35596_1080p_video_on_cmd104},
+{ 0x8 , nt35596_1080p_video_on_cmd105},
+{ 0x8 , nt35596_1080p_video_on_cmd106},
+{ 0x8 , nt35596_1080p_video_on_cmd107},
+{ 0x8 , nt35596_1080p_video_on_cmd108},
+{ 0x8 , nt35596_1080p_video_on_cmd109},
+{ 0x8 , nt35596_1080p_video_on_cmd110},
+{ 0x8 , nt35596_1080p_video_on_cmd111},
+{ 0x8 , nt35596_1080p_video_on_cmd112},
+{ 0x8 , nt35596_1080p_video_on_cmd113},
+{ 0x8 , nt35596_1080p_video_on_cmd114},
+{ 0x8 , nt35596_1080p_video_on_cmd115},
+{ 0x8 , nt35596_1080p_video_on_cmd116},
+{ 0x8 , nt35596_1080p_video_on_cmd117},
+{ 0x8 , nt35596_1080p_video_on_cmd118},
+{ 0x8 , nt35596_1080p_video_on_cmd119},
+{ 0x8 , nt35596_1080p_video_on_cmd120},
+{ 0x8 , nt35596_1080p_video_on_cmd121},
+{ 0x8 , nt35596_1080p_video_on_cmd122},
+{ 0x8 , nt35596_1080p_video_on_cmd123},
+{ 0x8 , nt35596_1080p_video_on_cmd124},
+{ 0x8 , nt35596_1080p_video_on_cmd125},
+{ 0x8 , nt35596_1080p_video_on_cmd126},
+{ 0x8 , nt35596_1080p_video_on_cmd127},
+{ 0x8 , nt35596_1080p_video_on_cmd128},
+{ 0x8 , nt35596_1080p_video_on_cmd129},
+{ 0x8 , nt35596_1080p_video_on_cmd130},
+{ 0x8 , nt35596_1080p_video_on_cmd131},
+{ 0x8 , nt35596_1080p_video_on_cmd132},
+{ 0x8 , nt35596_1080p_video_on_cmd133},
+{ 0x8 , nt35596_1080p_video_on_cmd134},
+{ 0x8 , nt35596_1080p_video_on_cmd135},
+{ 0x8 , nt35596_1080p_video_on_cmd136},
+{ 0x8 , nt35596_1080p_video_on_cmd137},
+{ 0x8 , nt35596_1080p_video_on_cmd138},
+{ 0x8 , nt35596_1080p_video_on_cmd139},
+{ 0x8 , nt35596_1080p_video_on_cmd140},
+{ 0x8 , nt35596_1080p_video_on_cmd141},
+{ 0x8 , nt35596_1080p_video_on_cmd142},
+{ 0x8 , nt35596_1080p_video_on_cmd143},
+{ 0x8 , nt35596_1080p_video_on_cmd144},
+{ 0x8 , nt35596_1080p_video_on_cmd145},
+{ 0x8 , nt35596_1080p_video_on_cmd146},
+{ 0x8 , nt35596_1080p_video_on_cmd147},
+{ 0x8 , nt35596_1080p_video_on_cmd148},
+{ 0x8 , nt35596_1080p_video_on_cmd149},
+{ 0x8 , nt35596_1080p_video_on_cmd150},
+{ 0x8 , nt35596_1080p_video_on_cmd151},
+{ 0x8 , nt35596_1080p_video_on_cmd152},
+{ 0x8 , nt35596_1080p_video_on_cmd153},
+{ 0x8 , nt35596_1080p_video_on_cmd154},
+{ 0x8 , nt35596_1080p_video_on_cmd155},
+{ 0x8 , nt35596_1080p_video_on_cmd156},
+{ 0x8 , nt35596_1080p_video_on_cmd157},
+{ 0x8 , nt35596_1080p_video_on_cmd158},
+{ 0x8 , nt35596_1080p_video_on_cmd159},
+{ 0x8 , nt35596_1080p_video_on_cmd160},
+{ 0x8 , nt35596_1080p_video_on_cmd161},
+{ 0x8 , nt35596_1080p_video_on_cmd162},
+{ 0x8 , nt35596_1080p_video_on_cmd163},
+{ 0x8 , nt35596_1080p_video_on_cmd164},
+{ 0x8 , nt35596_1080p_video_on_cmd165},
+{ 0x8 , nt35596_1080p_video_on_cmd166},
+{ 0x8 , nt35596_1080p_video_on_cmd167},
+{ 0x8 , nt35596_1080p_video_on_cmd168},
+{ 0x8 , nt35596_1080p_video_on_cmd169},
+{ 0x8 , nt35596_1080p_video_on_cmd170},
+{ 0x8 , nt35596_1080p_video_on_cmd171},
+{ 0x8 , nt35596_1080p_video_on_cmd172},
+{ 0x8 , nt35596_1080p_video_on_cmd173},
+{ 0x8 , nt35596_1080p_video_on_cmd174},
+{ 0x8 , nt35596_1080p_video_on_cmd175},
+{ 0x8 , nt35596_1080p_video_on_cmd176},
+{ 0x8 , nt35596_1080p_video_on_cmd177},
+{ 0x8 , nt35596_1080p_video_on_cmd178},
+{ 0x8 , nt35596_1080p_video_on_cmd179},
+{ 0x8 , nt35596_1080p_video_on_cmd180},
+{ 0x8 , nt35596_1080p_video_on_cmd181},
+{ 0x8 , nt35596_1080p_video_on_cmd182},
+{ 0x8 , nt35596_1080p_video_on_cmd183},
+{ 0x8 , nt35596_1080p_video_on_cmd184},
+{ 0x8 , nt35596_1080p_video_on_cmd185},
+{ 0x8 , nt35596_1080p_video_on_cmd186},
+{ 0x8 , nt35596_1080p_video_on_cmd187},
+{ 0x8 , nt35596_1080p_video_on_cmd188},
+{ 0x8 , nt35596_1080p_video_on_cmd189},
+{ 0x8 , nt35596_1080p_video_on_cmd190},
+{ 0x8 , nt35596_1080p_video_on_cmd191},
+{ 0x8 , nt35596_1080p_video_on_cmd192},
+{ 0x8 , nt35596_1080p_video_on_cmd193},
+{ 0x8 , nt35596_1080p_video_on_cmd194},
+{ 0x8 , nt35596_1080p_video_on_cmd195},
+{ 0x8 , nt35596_1080p_video_on_cmd196},
+{ 0x8 , nt35596_1080p_video_on_cmd197},
+{ 0x8 , nt35596_1080p_video_on_cmd198},
+{ 0x8 , nt35596_1080p_video_on_cmd199},
+{ 0x8 , nt35596_1080p_video_on_cmd200},
+{ 0x8 , nt35596_1080p_video_on_cmd201},
+{ 0x8 , nt35596_1080p_video_on_cmd202},
+{ 0x8 , nt35596_1080p_video_on_cmd203},
+{ 0x8 , nt35596_1080p_video_on_cmd204},
+{ 0x8 , nt35596_1080p_video_on_cmd205},
+{ 0x8 , nt35596_1080p_video_on_cmd206},
+{ 0x8 , nt35596_1080p_video_on_cmd207},
+{ 0x8 , nt35596_1080p_video_on_cmd208},
+{ 0x8 , nt35596_1080p_video_on_cmd209},
+{ 0x8 , nt35596_1080p_video_on_cmd210},
+{ 0x8 , nt35596_1080p_video_on_cmd211},
+{ 0x8 , nt35596_1080p_video_on_cmd212},
+{ 0x8 , nt35596_1080p_video_on_cmd213},
+{ 0x8 , nt35596_1080p_video_on_cmd214},
+{ 0x8 , nt35596_1080p_video_on_cmd215},
+{ 0x8 , nt35596_1080p_video_on_cmd216},
+{ 0x8 , nt35596_1080p_video_on_cmd217},
+{ 0x8 , nt35596_1080p_video_on_cmd218},
+{ 0x8 , nt35596_1080p_video_on_cmd219},
+{ 0x8 , nt35596_1080p_video_on_cmd220},
+{ 0x8 , nt35596_1080p_video_on_cmd221},
+{ 0x8 , nt35596_1080p_video_on_cmd222},
+{ 0x8 , nt35596_1080p_video_on_cmd223},
+{ 0x8 , nt35596_1080p_video_on_cmd224},
+{ 0x8 , nt35596_1080p_video_on_cmd225},
+{ 0x8 , nt35596_1080p_video_on_cmd226},
+{ 0x8 , nt35596_1080p_video_on_cmd227},
+{ 0x8 , nt35596_1080p_video_on_cmd228},
+{ 0x8 , nt35596_1080p_video_on_cmd229},
+{ 0x8 , nt35596_1080p_video_on_cmd230},
+{ 0x8 , nt35596_1080p_video_on_cmd231},
+{ 0x8 , nt35596_1080p_video_on_cmd232},
+{ 0x8 , nt35596_1080p_video_on_cmd233},
+{ 0x8 , nt35596_1080p_video_on_cmd234},
+{ 0x8 , nt35596_1080p_video_on_cmd235},
+{ 0x8 , nt35596_1080p_video_on_cmd236},
+{ 0x8 , nt35596_1080p_video_on_cmd237},
+{ 0x8 , nt35596_1080p_video_on_cmd238},
+{ 0x8 , nt35596_1080p_video_on_cmd239},
+{ 0x8 , nt35596_1080p_video_on_cmd240},
+{ 0x8 , nt35596_1080p_video_on_cmd241},
+{ 0x8 , nt35596_1080p_video_on_cmd242},
+{ 0x8 , nt35596_1080p_video_on_cmd243},
+{ 0x8 , nt35596_1080p_video_on_cmd244},
+{ 0x8 , nt35596_1080p_video_on_cmd245},
+{ 0x8 , nt35596_1080p_video_on_cmd246},
+{ 0x8 , nt35596_1080p_video_on_cmd247},
+{ 0x8 , nt35596_1080p_video_on_cmd248},
+{ 0x8 , nt35596_1080p_video_on_cmd249},
+{ 0x8 , nt35596_1080p_video_on_cmd250},
+{ 0x8 , nt35596_1080p_video_on_cmd251},
+{ 0x8 , nt35596_1080p_video_on_cmd252},
+{ 0x8 , nt35596_1080p_video_on_cmd253},
+{ 0x8 , nt35596_1080p_video_on_cmd254},
+{ 0x8 , nt35596_1080p_video_on_cmd255},
+{ 0x8 , nt35596_1080p_video_on_cmd256},
+{ 0x8 , nt35596_1080p_video_on_cmd257},
+{ 0x8 , nt35596_1080p_video_on_cmd258},
+{ 0x8 , nt35596_1080p_video_on_cmd259},
+{ 0x8 , nt35596_1080p_video_on_cmd260},
+{ 0x8 , nt35596_1080p_video_on_cmd261},
+{ 0x8 , nt35596_1080p_video_on_cmd262},
+{ 0x8 , nt35596_1080p_video_on_cmd263},
+{ 0x8 , nt35596_1080p_video_on_cmd264},
+{ 0x8 , nt35596_1080p_video_on_cmd265},
+{ 0x8 , nt35596_1080p_video_on_cmd266},
+{ 0x8 , nt35596_1080p_video_on_cmd267},
+{ 0x8 , nt35596_1080p_video_on_cmd268},
+{ 0x8 , nt35596_1080p_video_on_cmd269},
+{ 0x8 , nt35596_1080p_video_on_cmd270},
+{ 0x8 , nt35596_1080p_video_on_cmd271},
+{ 0x8 , nt35596_1080p_video_on_cmd272},
+{ 0x8 , nt35596_1080p_video_on_cmd273},
+{ 0x8 , nt35596_1080p_video_on_cmd274},
+{ 0x8 , nt35596_1080p_video_on_cmd275},
+{ 0x8 , nt35596_1080p_video_on_cmd276},
+{ 0x8 , nt35596_1080p_video_on_cmd277},
+{ 0x8 , nt35596_1080p_video_on_cmd278},
+{ 0x8 , nt35596_1080p_video_on_cmd279},
+{ 0x8 , nt35596_1080p_video_on_cmd280},
+{ 0x8 , nt35596_1080p_video_on_cmd281},
+{ 0x8 , nt35596_1080p_video_on_cmd282},
+{ 0x8 , nt35596_1080p_video_on_cmd283},
+{ 0x8 , nt35596_1080p_video_on_cmd284},
+{ 0x8 , nt35596_1080p_video_on_cmd285},
+{ 0x8 , nt35596_1080p_video_on_cmd286},
+{ 0x8 , nt35596_1080p_video_on_cmd287},
+{ 0x8 , nt35596_1080p_video_on_cmd288},
+{ 0x8 , nt35596_1080p_video_on_cmd289},
+{ 0x8 , nt35596_1080p_video_on_cmd290},
+{ 0x8 , nt35596_1080p_video_on_cmd291},
+{ 0x8 , nt35596_1080p_video_on_cmd292},
+{ 0x8 , nt35596_1080p_video_on_cmd293},
+{ 0x8 , nt35596_1080p_video_on_cmd294},
+{ 0x8 , nt35596_1080p_video_on_cmd295},
+{ 0x8 , nt35596_1080p_video_on_cmd296},
+{ 0x8 , nt35596_1080p_video_on_cmd297},
+{ 0x8 , nt35596_1080p_video_on_cmd298},
+{ 0x8 , nt35596_1080p_video_on_cmd299},
+{ 0x8 , nt35596_1080p_video_on_cmd300},
+{ 0x8 , nt35596_1080p_video_on_cmd301},
+{ 0x8 , nt35596_1080p_video_on_cmd302},
+{ 0x8 , nt35596_1080p_video_on_cmd303},
+{ 0x8 , nt35596_1080p_video_on_cmd304},
+{ 0x8 , nt35596_1080p_video_on_cmd305},
+{ 0x8 , nt35596_1080p_video_on_cmd306},
+{ 0x8 , nt35596_1080p_video_on_cmd307},
+{ 0x8 , nt35596_1080p_video_on_cmd308},
+{ 0x8 , nt35596_1080p_video_on_cmd309},
+{ 0x8 , nt35596_1080p_video_on_cmd310},
+{ 0x8 , nt35596_1080p_video_on_cmd311},
+{ 0x8 , nt35596_1080p_video_on_cmd312},
+{ 0x8 , nt35596_1080p_video_on_cmd313},
+{ 0x8 , nt35596_1080p_video_on_cmd314},
+{ 0x8 , nt35596_1080p_video_on_cmd315},
+{ 0x8 , nt35596_1080p_video_on_cmd316},
+{ 0x8 , nt35596_1080p_video_on_cmd317},
+{ 0x8 , nt35596_1080p_video_on_cmd318},
+{ 0x8 , nt35596_1080p_video_on_cmd319},
+{ 0x8 , nt35596_1080p_video_on_cmd320},
+{ 0x8 , nt35596_1080p_video_on_cmd321},
+{ 0x8 , nt35596_1080p_video_on_cmd322},
+{ 0x8 , nt35596_1080p_video_on_cmd323},
+{ 0x8 , nt35596_1080p_video_on_cmd324},
+{ 0x8 , nt35596_1080p_video_on_cmd325},
+{ 0x8 , nt35596_1080p_video_on_cmd326},
+{ 0x8 , nt35596_1080p_video_on_cmd327},
+{ 0x8 , nt35596_1080p_video_on_cmd328},
+{ 0x8 , nt35596_1080p_video_on_cmd329},
+{ 0x8 , nt35596_1080p_video_on_cmd330},
+{ 0x8 , nt35596_1080p_video_on_cmd331},
+{ 0x8 , nt35596_1080p_video_on_cmd332},
+{ 0x8 , nt35596_1080p_video_on_cmd333},
+{ 0x8 , nt35596_1080p_video_on_cmd334},
+{ 0x8 , nt35596_1080p_video_on_cmd335},
+{ 0x8 , nt35596_1080p_video_on_cmd336},
+{ 0x8 , nt35596_1080p_video_on_cmd337},
+{ 0x8 , nt35596_1080p_video_on_cmd338},
+{ 0x8 , nt35596_1080p_video_on_cmd339},
+{ 0x8 , nt35596_1080p_video_on_cmd340},
+{ 0x8 , nt35596_1080p_video_on_cmd341},
+{ 0x8 , nt35596_1080p_video_on_cmd342},
+{ 0x8 , nt35596_1080p_video_on_cmd343},
+{ 0x8 , nt35596_1080p_video_on_cmd344},
+{ 0x8 , nt35596_1080p_video_on_cmd345},
+{ 0x8 , nt35596_1080p_video_on_cmd346},
+{ 0x8 , nt35596_1080p_video_on_cmd347},
+{ 0x8 , nt35596_1080p_video_on_cmd348},
+{ 0x8 , nt35596_1080p_video_on_cmd349},
+{ 0x8 , nt35596_1080p_video_on_cmd350},
+{ 0x8 , nt35596_1080p_video_on_cmd351},
+{ 0x8 , nt35596_1080p_video_on_cmd352},
+{ 0x8 , nt35596_1080p_video_on_cmd353},
+{ 0x8 , nt35596_1080p_video_on_cmd354},
+{ 0x8 , nt35596_1080p_video_on_cmd355},
+{ 0x8 , nt35596_1080p_video_on_cmd356},
+{ 0x8 , nt35596_1080p_video_on_cmd357},
+{ 0x8 , nt35596_1080p_video_on_cmd358},
+{ 0x8 , nt35596_1080p_video_on_cmd359},
+{ 0x8 , nt35596_1080p_video_on_cmd360},
+{ 0x8 , nt35596_1080p_video_on_cmd361},
+{ 0x8 , nt35596_1080p_video_on_cmd362},
+{ 0x8 , nt35596_1080p_video_on_cmd363},
+{ 0x8 , nt35596_1080p_video_on_cmd364},
+{ 0x8 , nt35596_1080p_video_on_cmd365},
+{ 0x8 , nt35596_1080p_video_on_cmd366},
+{ 0x8 , nt35596_1080p_video_on_cmd367},
+{ 0x8 , nt35596_1080p_video_on_cmd368},
+{ 0x8 , nt35596_1080p_video_on_cmd369},
+{ 0x8 , nt35596_1080p_video_on_cmd370},
+{ 0x8 , nt35596_1080p_video_on_cmd371},
+{ 0x8 , nt35596_1080p_video_on_cmd372},
+{ 0x8 , nt35596_1080p_video_on_cmd373},
+{ 0x8 , nt35596_1080p_video_on_cmd374},
+{ 0x8 , nt35596_1080p_video_on_cmd375},
+{ 0x8 , nt35596_1080p_video_on_cmd376},
+{ 0x8 , nt35596_1080p_video_on_cmd377},
+{ 0x8 , nt35596_1080p_video_on_cmd378},
+{ 0x8 , nt35596_1080p_video_on_cmd379},
+{ 0x8 , nt35596_1080p_video_on_cmd380},
+{ 0x8 , nt35596_1080p_video_on_cmd381},
+{ 0x8 , nt35596_1080p_video_on_cmd382},
+{ 0x8 , nt35596_1080p_video_on_cmd383},
+{ 0x8 , nt35596_1080p_video_on_cmd384},
+{ 0x8 , nt35596_1080p_video_on_cmd385},
+{ 0x8 , nt35596_1080p_video_on_cmd386},
+{ 0x8 , nt35596_1080p_video_on_cmd387},
+{ 0x8 , nt35596_1080p_video_on_cmd388},
+{ 0x8 , nt35596_1080p_video_on_cmd389},
+{ 0x8 , nt35596_1080p_video_on_cmd390},
+{ 0x8 , nt35596_1080p_video_on_cmd391},
+{ 0x8 , nt35596_1080p_video_on_cmd392},
+{ 0x8 , nt35596_1080p_video_on_cmd393},
+{ 0x8 , nt35596_1080p_video_on_cmd394},
+{ 0x8 , nt35596_1080p_video_on_cmd395},
+{ 0x8 , nt35596_1080p_video_on_cmd396},
+{ 0x8 , nt35596_1080p_video_on_cmd397},
+{ 0x8 , nt35596_1080p_video_on_cmd398},
+{ 0x8 , nt35596_1080p_video_on_cmd399},
+{ 0x8 , nt35596_1080p_video_on_cmd400},
+{ 0x8 , nt35596_1080p_video_on_cmd401},
+{ 0x8 , nt35596_1080p_video_on_cmd402},
+{ 0x8 , nt35596_1080p_video_on_cmd403},
+{ 0x8 , nt35596_1080p_video_on_cmd404},
+{ 0x8 , nt35596_1080p_video_on_cmd405},
+{ 0x8 , nt35596_1080p_video_on_cmd406},
+{ 0x8 , nt35596_1080p_video_on_cmd407},
+{ 0x8 , nt35596_1080p_video_on_cmd408},
+{ 0x8 , nt35596_1080p_video_on_cmd409},
+{ 0x8 , nt35596_1080p_video_on_cmd410},
+{ 0x8 , nt35596_1080p_video_on_cmd411},
+{ 0x8 , nt35596_1080p_video_on_cmd412},
+{ 0x8 , nt35596_1080p_video_on_cmd413},
+{ 0x8 , nt35596_1080p_video_on_cmd414},
+{ 0x8 , nt35596_1080p_video_on_cmd415},
+{ 0x8 , nt35596_1080p_video_on_cmd416},
+{ 0x8 , nt35596_1080p_video_on_cmd417},
+{ 0x8 , nt35596_1080p_video_on_cmd418},
+{ 0x8 , nt35596_1080p_video_on_cmd419},
+{ 0x8 , nt35596_1080p_video_on_cmd420},
+{ 0x8 , nt35596_1080p_video_on_cmd421},
+{ 0x8 , nt35596_1080p_video_on_cmd422},
+{ 0x8 , nt35596_1080p_video_on_cmd423},
+{ 0x8 , nt35596_1080p_video_on_cmd424},
+{ 0x8 , nt35596_1080p_video_on_cmd425},
+{ 0x8 , nt35596_1080p_video_on_cmd426},
+{ 0x8 , nt35596_1080p_video_on_cmd427},
+{ 0x8 , nt35596_1080p_video_on_cmd428},
+{ 0x8 , nt35596_1080p_video_on_cmd429},
+{ 0x8 , nt35596_1080p_video_on_cmd430},
+{ 0x8 , nt35596_1080p_video_on_cmd431},
+{ 0x8 , nt35596_1080p_video_on_cmd432},
+{ 0x8 , nt35596_1080p_video_on_cmd433},
+{ 0x8 , nt35596_1080p_video_on_cmd434},
+{ 0x8 , nt35596_1080p_video_on_cmd435},
+{ 0x8 , nt35596_1080p_video_on_cmd436},
+{ 0x8 , nt35596_1080p_video_on_cmd437},
+{ 0x8 , nt35596_1080p_video_on_cmd438},
+{ 0x8 , nt35596_1080p_video_on_cmd439},
+{ 0x8 , nt35596_1080p_video_on_cmd440},
+{ 0x8 , nt35596_1080p_video_on_cmd441},
+{ 0x8 , nt35596_1080p_video_on_cmd442},
+{ 0x8 , nt35596_1080p_video_on_cmd443},
+{ 0x8 , nt35596_1080p_video_on_cmd444},
+{ 0x8 , nt35596_1080p_video_on_cmd445},
+{ 0x8 , nt35596_1080p_video_on_cmd446},
+{ 0x8 , nt35596_1080p_video_on_cmd447},
+{ 0x8 , nt35596_1080p_video_on_cmd448},
+{ 0x8 , nt35596_1080p_video_on_cmd449},
+{ 0x8 , nt35596_1080p_video_on_cmd450},
+{ 0x8 , nt35596_1080p_video_on_cmd451},
+{ 0x8 , nt35596_1080p_video_on_cmd452},
+{ 0x8 , nt35596_1080p_video_on_cmd453},
+{ 0x8 , nt35596_1080p_video_on_cmd454},
+{ 0x8 , nt35596_1080p_video_on_cmd455},
+{ 0x8 , nt35596_1080p_video_on_cmd456},
+{ 0x8 , nt35596_1080p_video_on_cmd457},
+{ 0x8 , nt35596_1080p_video_on_cmd458},
+{ 0x8 , nt35596_1080p_video_on_cmd459},
+{ 0x8 , nt35596_1080p_video_on_cmd460},
+{ 0x8 , nt35596_1080p_video_on_cmd461},
+{ 0x8 , nt35596_1080p_video_on_cmd462},
+{ 0x8 , nt35596_1080p_video_on_cmd463},
+{ 0x8 , nt35596_1080p_video_on_cmd464},
+{ 0x8 , nt35596_1080p_video_on_cmd465},
+{ 0x8 , nt35596_1080p_video_on_cmd466},
+{ 0x8 , nt35596_1080p_video_on_cmd467},
+{ 0x8 , nt35596_1080p_video_on_cmd468},
+{ 0x8 , nt35596_1080p_video_on_cmd469},
+{ 0x8 , nt35596_1080p_video_on_cmd470},
+{ 0x8 , nt35596_1080p_video_on_cmd471},
+{ 0x8 , nt35596_1080p_video_on_cmd472},
+{ 0x8 , nt35596_1080p_video_on_cmd473},
+{ 0x8 , nt35596_1080p_video_on_cmd474},
+{ 0x8 , nt35596_1080p_video_on_cmd475},
+{ 0x8 , nt35596_1080p_video_on_cmd476},
+{ 0x8 , nt35596_1080p_video_on_cmd477},
+{ 0x8 , nt35596_1080p_video_on_cmd478},
+{ 0x8 , nt35596_1080p_video_on_cmd479},
+{ 0x8 , nt35596_1080p_video_on_cmd480},
+{ 0x8 , nt35596_1080p_video_on_cmd481},
+{ 0x8 , nt35596_1080p_video_on_cmd482},
+{ 0x8 , nt35596_1080p_video_on_cmd483},
+{ 0x8 , nt35596_1080p_video_on_cmd484},
+{ 0x8 , nt35596_1080p_video_on_cmd485},
+{ 0x8 , nt35596_1080p_video_on_cmd486},
+{ 0x8 , nt35596_1080p_video_on_cmd487},
+{ 0x8 , nt35596_1080p_video_on_cmd488},
+{ 0x8 , nt35596_1080p_video_on_cmd489},
+{ 0x8 , nt35596_1080p_video_on_cmd490},
+{ 0x8 , nt35596_1080p_video_on_cmd491},
+{ 0x8 , nt35596_1080p_video_on_cmd492},
+{ 0x8 , nt35596_1080p_video_on_cmd493},
+{ 0x8 , nt35596_1080p_video_on_cmd494},
+{ 0x8 , nt35596_1080p_video_on_cmd495},
+{ 0x8 , nt35596_1080p_video_on_cmd496},
+{ 0x8 , nt35596_1080p_video_on_cmd497},
+{ 0x8 , nt35596_1080p_video_on_cmd498},
+{ 0x8 , nt35596_1080p_video_on_cmd499},
+{ 0x8 , nt35596_1080p_video_on_cmd500},
+{ 0x8 , nt35596_1080p_video_on_cmd501},
+{ 0x8 , nt35596_1080p_video_on_cmd502},
+{ 0x8 , nt35596_1080p_video_on_cmd503},
+{ 0x8 , nt35596_1080p_video_on_cmd504},
+{ 0x8 , nt35596_1080p_video_on_cmd505},
+{ 0x8 , nt35596_1080p_video_on_cmd506},
+{ 0x8 , nt35596_1080p_video_on_cmd507},
+{ 0x8 , nt35596_1080p_video_on_cmd508},
+{ 0x8 , nt35596_1080p_video_on_cmd509},
+{ 0x8 , nt35596_1080p_video_on_cmd510},
+{ 0x8 , nt35596_1080p_video_on_cmd511},
+{ 0x8 , nt35596_1080p_video_on_cmd512},
+{ 0x8 , nt35596_1080p_video_on_cmd513},
+{ 0x8 , nt35596_1080p_video_on_cmd514},
+{ 0x8 , nt35596_1080p_video_on_cmd515},
+{ 0x8 , nt35596_1080p_video_on_cmd516},
+{ 0x8 , nt35596_1080p_video_on_cmd517},
+{ 0x8 , nt35596_1080p_video_on_cmd518},
+{ 0x8 , nt35596_1080p_video_on_cmd519}
+};
+#define NT35596_1080P_VIDEO_ON_COMMAND 520
+
+
+static char nt35596_1080p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char nt35596_1080p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd nt35596_1080p_video_off_command[] = {
+{ 0x4 , nt35596_1080p_videooff_cmd0},
+{ 0x4 , nt35596_1080p_videooff_cmd1}
+};
+#define NT35596_1080P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state nt35596_1080p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info nt35596_1080p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info nt35596_1080p_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration nt35596_1080p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t nt35596_1080p_video_timings[] = {
+ 0xf9, 0x3d, 0x34, 0x00, 0x58, 0x4d, 0x36, 0x3f, 0x53, 0x03, 0x04, 0x00
+};
+
+static struct panel_timing nt35596_1080p_video_timing_info = {
+ 0, 4, 0x1e, 0x38
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight nt35596_1080p_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_NT35596_1080P_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_toshiba_720p_video.h b/dev/gcdb/display/include/panel_toshiba_720p_video.h
new file mode 100755
index 0000000..8f3cd68
--- /dev/null
+++ b/dev/gcdb/display/include/panel_toshiba_720p_video.h
@@ -0,0 +1,344 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_TOSHIBA_720P_VIDEO_H_
+
+#define _PANEL_TOSHIBA_720P_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct panel_config toshiba_720p_video_panel_data = {
+ "toshiba 720p video mode dsi panel", "mdss_dsi0", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 424000000, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution toshiba_720p_video_panel_res = {
+ 720, 1280, 144, 32, 12, 0, 9, 3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Color Information */
+/*---------------------------------------------------------------------------*/
+static struct color_info toshiba_720p_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel Command information */
+/*---------------------------------------------------------------------------*/
+static char toshiba_720p_video_on_cmd0[] = {
+0xb0, 0x00, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd1[] = {
+0xb2, 0x00, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd2[] = {
+0xb3, 0x0c, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd3[] = {
+0xb4, 0x02, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd4[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xc0, 0x40, 0x02, 0x7f,
+0xc8, 0x08, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd5[] = {
+0x10, 0x00, 0x29, 0xC0,
+0xc1, 0x00, 0xa8, 0x00,
+0x00, 0x00, 0x00, 0x00,
+0x9d, 0x08, 0x27, 0x00,
+0x00, 0x00, 0x00, 0x00,
+ };
+
+
+static char toshiba_720p_video_on_cmd6[] = {
+0x06, 0x00, 0x29, 0xC0,
+0xc2, 0x00, 0x00, 0x09,
+0x00, 0x00, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd7[] = {
+0xc3, 0x04, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd8[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xc4, 0x4d, 0x83, 0x00,
+ };
+
+
+static char toshiba_720p_video_on_cmd9[] = {
+0x0b, 0x00, 0x29, 0xC0,
+0xc6, 0x12, 0x00, 0x08,
+0x71, 0x00, 0x00, 0x00,
+0x80, 0x00, 0x04, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd10[] = {
+0xc7, 0x22, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd11[] = {
+0x05, 0x00, 0x29, 0xC0,
+0xc8, 0x4c, 0x0c, 0x0c,
+0x0c, 0xFF, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd12[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xc9, 0x00, 0x40, 0x00,
+0x16, 0x32, 0x2e, 0x3a,
+0x43, 0x3e, 0x3c, 0x45,
+0x79, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd13[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xca, 0x00, 0x46, 0x1a,
+0x23, 0x21, 0x1c, 0x25,
+0x31, 0x2d, 0x49, 0x5f,
+0x7f, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd14[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xcb, 0x00, 0x4c, 0x20,
+0x3a, 0x42, 0x40, 0x47,
+0x4b, 0x42, 0x3e, 0x46,
+0x7e, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd15[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xcc, 0x00, 0x41, 0x19,
+0x21, 0x1d, 0x14, 0x18,
+0x1f, 0x1d, 0x25, 0x3f,
+0x73, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd16[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xcd, 0x23, 0x79, 0x5a,
+0x5f, 0x57, 0x4c, 0x51,
+0x51, 0x45, 0x3f, 0x4b,
+0x7f, 0x3f, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd17[] = {
+0x0e, 0x00, 0x29, 0xC0,
+0xce, 0x00, 0x40, 0x14,
+0x20, 0x1a, 0x0e, 0x0e,
+0x13, 0x08, 0x00, 0x05,
+0x46, 0x1c, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd18[] = {
+0x04, 0x00, 0x29, 0xC0,
+0xd0, 0x6a, 0x64, 0x01,
+ };
+
+
+static char toshiba_720p_video_on_cmd19[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xd1, 0x77, 0xd4, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd20[] = {
+0xd3, 0x33, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd21[] = {
+0x03, 0x00, 0x29, 0xC0,
+0xd5, 0x0f, 0x0f, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd22[] = {
+0x07, 0x00, 0x29, 0xC0,
+0xd8, 0x34, 0x64, 0x23,
+0x25, 0x62, 0x32, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd23[] = {
+0x0c, 0x00, 0x29, 0xC0,
+0xde, 0x10, 0x7b, 0x11,
+0x0a, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+ };
+
+
+static char toshiba_720p_video_on_cmd24[] = {
+0x09, 0x00, 0x29, 0xC0,
+0xfd, 0x04, 0x55, 0x53,
+0x00, 0x70, 0xff, 0x10,
+0x73, 0xFF, 0xFF, 0xFF, };
+
+
+static char toshiba_720p_video_on_cmd25[] = {
+0xe2, 0x00, 0x23, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd26[] = {
+0x11, 0x00, 0x05, 0x80 };
+
+
+static char toshiba_720p_video_on_cmd27[] = {
+0x29, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd toshiba_720p_video_on_command[] = {
+{ 0x4 , toshiba_720p_video_on_cmd0},
+{ 0x4 , toshiba_720p_video_on_cmd1},
+{ 0x4 , toshiba_720p_video_on_cmd2},
+{ 0x4 , toshiba_720p_video_on_cmd3},
+{ 0xc , toshiba_720p_video_on_cmd4},
+{ 0x14 , toshiba_720p_video_on_cmd5},
+{ 0xc , toshiba_720p_video_on_cmd6},
+{ 0x4 , toshiba_720p_video_on_cmd7},
+{ 0x8 , toshiba_720p_video_on_cmd8},
+{ 0x10 , toshiba_720p_video_on_cmd9},
+{ 0x4 , toshiba_720p_video_on_cmd10},
+{ 0xc , toshiba_720p_video_on_cmd11},
+{ 0x14 , toshiba_720p_video_on_cmd12},
+{ 0x14 , toshiba_720p_video_on_cmd13},
+{ 0x14 , toshiba_720p_video_on_cmd14},
+{ 0x14 , toshiba_720p_video_on_cmd15},
+{ 0x14 , toshiba_720p_video_on_cmd16},
+{ 0x14 , toshiba_720p_video_on_cmd17},
+{ 0x8 , toshiba_720p_video_on_cmd18},
+{ 0x8 , toshiba_720p_video_on_cmd19},
+{ 0x4 , toshiba_720p_video_on_cmd20},
+{ 0x8 , toshiba_720p_video_on_cmd21},
+{ 0xc , toshiba_720p_video_on_cmd22},
+{ 0x10 , toshiba_720p_video_on_cmd23},
+{ 0x10 , toshiba_720p_video_on_cmd24},
+{ 0x4 , toshiba_720p_video_on_cmd25},
+{ 0x4 , toshiba_720p_video_on_cmd26},
+{ 0x4 , toshiba_720p_video_on_cmd27}
+};
+#define TOSHIBA_720P_VIDEO_ON_COMMAND 28
+
+
+static char toshiba_720p_videooff_cmd0[] = {
+0x28, 0x00, 0x05, 0x80 };
+
+
+static char toshiba_720p_videooff_cmd1[] = {
+0x10, 0x00, 0x05, 0x80 };
+
+
+
+
+static struct mipi_dsi_cmd toshiba_720p_video_off_command[] = {
+{ 0x4 , toshiba_720p_videooff_cmd0},
+{ 0x4 , toshiba_720p_videooff_cmd1}
+};
+#define TOSHIBA_720P_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state toshiba_720p_video_state = {
+ 0, 1
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct commandpanel_info toshiba_720p_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+
+static struct videopanel_info toshiba_720p_video_video_panel = {
+ 0, 0, 0, 0, 1, 1, 1, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane Configuration */
+/*---------------------------------------------------------------------------*/
+
+static struct lane_configuration toshiba_720p_video_lane_config = {
+ 4, 0, 1, 1, 1, 1
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Timing */
+/*---------------------------------------------------------------------------*/
+const uint32_t toshiba_720p_video_timings[] = {
+ 0xb0, 0x23, 0x1b, 0x00, 0x94, 0x93, 0x1e, 0x25, 0x15, 0x03, 0x04, 0x00
+};
+
+
+
+static struct mipi_dsi_cmd toshiba_720p_video_rotation[] = {
+
+};
+#define TOSHIBA_720P_VIDEO_ROTATION 0
+
+
+static struct panel_timing toshiba_720p_video_timing_info = {
+ 0x0, 0x04, 0x04, 0x1b
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight Settings */
+/*---------------------------------------------------------------------------*/
+
+static struct backlight toshiba_720p_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+
+#endif /*_PANEL_TOSHIBA_720P_VIDEO_H_*/
diff --git a/dev/gcdb/display/oem_panel.c b/dev/gcdb/display/oem_panel.c
new file mode 100755
index 0000000..b1e19e9
--- /dev/null
+++ b/dev/gcdb/display/oem_panel.c
@@ -0,0 +1,281 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <board.h>
+#include <mipi_dsi.h>
+
+#include "include/panel.h"
+#include "panel_display.h"
+
+/*---------------------------------------------------------------------------*/
+/* GCDB Panel Database */
+/*---------------------------------------------------------------------------*/
+#include "include/panel_toshiba_720p_video.h"
+#include "include/panel_nt35590_720p_video.h"
+#include "include/panel_nt35590_720p_cmd.h"
+#include "include/panel_hx8394a_720p_video.h"
+#include "include/panel_nt35596_1080p_video.h"
+#include "include/panel_nt35521_720p_video.h"
+
+/*---------------------------------------------------------------------------*/
+/* static panel selection variable */
+/*---------------------------------------------------------------------------*/
+enum {
+TOSHIBA_720P_VIDEO_PANEL,
+NT35590_720P_CMD_PANEL,
+NT35590_720P_VIDEO_PANEL,
+NT35596_1080P_VIDEO_PANEL,
+HX8394A_720P_VIDEO_PANEL,
+NT35521_720P_VIDEO_PANEL
+};
+
+static uint32_t panel_id;
+
+int oem_panel_rotation()
+{
+ int ret = NO_ERROR;
+ switch (panel_id) {
+ case TOSHIBA_720P_VIDEO_PANEL:
+ ret = mipi_dsi_cmds_tx(toshiba_720p_video_rotation,
+ TOSHIBA_720P_VIDEO_ROTATION);
+ break;
+ case NT35590_720P_CMD_PANEL:
+ ret = mipi_dsi_cmds_tx(nt35590_720p_cmd_rotation,
+ NT35590_720P_CMD_ROTATION);
+ break;
+ case NT35590_720P_VIDEO_PANEL:
+ ret = mipi_dsi_cmds_tx(nt35590_720p_video_rotation,
+ NT35590_720P_VIDEO_ROTATION);
+ break;
+ }
+
+ return ret;
+}
+
+
+int oem_panel_on()
+{
+ /* OEM can keep there panel spefic on instructions in this
+ function */
+ return NO_ERROR;
+}
+
+int oem_panel_off()
+{
+ /* OEM can keep there panel spefic off instructions in this
+ function */
+ return NO_ERROR;
+}
+
+static void init_panel_data(struct panel_struct *panelstruct,
+ struct msm_panel_info *pinfo,
+ struct mdss_dsi_phy_ctrl *phy_db)
+{
+ switch (panel_id) {
+ case TOSHIBA_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &toshiba_720p_video_panel_data;
+ panelstruct->panelres = &toshiba_720p_video_panel_res;
+ panelstruct->color = &toshiba_720p_video_color;
+ panelstruct->videopanel = &toshiba_720p_video_video_panel;
+ panelstruct->commandpanel = &toshiba_720p_video_command_panel;
+ panelstruct->state = &toshiba_720p_video_state;
+ panelstruct->laneconfig = &toshiba_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &toshiba_720p_video_timing_info;
+ panelstruct->backlightinfo = &toshiba_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = toshiba_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = TOSHIBA_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ toshiba_720p_video_timings, TIMING_SIZE);
+ break;
+ case NT35590_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35590_720p_video_panel_data;
+ panelstruct->panelres = &nt35590_720p_video_panel_res;
+ panelstruct->color = &nt35590_720p_video_color;
+ panelstruct->videopanel = &nt35590_720p_video_video_panel;
+ panelstruct->commandpanel = &nt35590_720p_video_command_panel;
+ panelstruct->state = &nt35590_720p_video_state;
+ panelstruct->laneconfig = &nt35590_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35590_720p_video_timing_info;
+ panelstruct->backlightinfo = &nt35590_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35590_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35590_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35590_720p_video_timings, TIMING_SIZE);
+ break;
+ case NT35521_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35521_720p_video_panel_data;
+ panelstruct->panelres = &nt35521_720p_video_panel_res;
+ panelstruct->color = &nt35521_720p_video_color;
+ panelstruct->videopanel = &nt35521_720p_video_video_panel;
+ panelstruct->commandpanel = &nt35521_720p_video_command_panel;
+ panelstruct->state = &nt35521_720p_video_state;
+ panelstruct->laneconfig = &nt35521_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35521_720p_video_timing_info;
+ panelstruct->backlightinfo = &nt35521_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35521_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35521_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35521_720p_video_timings, TIMING_SIZE);
+ break;
+ case HX8394A_720P_VIDEO_PANEL:
+ panelstruct->paneldata = &hx8394a_720p_video_panel_data;
+ panelstruct->panelres = &hx8394a_720p_video_panel_res;
+ panelstruct->color = &hx8394a_720p_video_color;
+ panelstruct->videopanel = &hx8394a_720p_video_video_panel;
+ panelstruct->commandpanel = &hx8394a_720p_video_command_panel;
+ panelstruct->state = &hx8394a_720p_video_state;
+ panelstruct->laneconfig = &hx8394a_720p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &hx8394a_720p_video_timing_info;
+ panelstruct->backlightinfo = &hx8394a_720p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = hx8394a_720p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = HX8394A_720P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ hx8394a_720p_video_timings, TIMING_SIZE);
+ break;
+
+ case NT35590_720P_CMD_PANEL:
+ panelstruct->paneldata = &nt35590_720p_cmd_panel_data;
+ panelstruct->panelres = &nt35590_720p_cmd_panel_res;
+ panelstruct->color = &nt35590_720p_cmd_color;
+ panelstruct->videopanel = &nt35590_720p_cmd_video_panel;
+ panelstruct->commandpanel = &nt35590_720p_cmd_command_panel;
+ panelstruct->state = &nt35590_720p_cmd_state;
+ panelstruct->laneconfig = &nt35590_720p_cmd_lane_config;
+ panelstruct->paneltiminginfo = &nt35590_720p_cmd_timing_info;
+ panelstruct->backlightinfo = &nt35590_720p_cmd_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35590_720p_cmd_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35590_720P_CMD_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35590_720p_cmd_timings, TIMING_SIZE);
+ break;
+ case NT35596_1080P_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35596_1080p_video_panel_data;
+ panelstruct->panelres = &nt35596_1080p_video_panel_res;
+ panelstruct->color = &nt35596_1080p_video_color;
+ panelstruct->videopanel = &nt35596_1080p_video_video_panel;
+ panelstruct->commandpanel = &nt35596_1080p_video_command_panel;
+ panelstruct->state = &nt35596_1080p_video_state;
+ panelstruct->laneconfig = &nt35596_1080p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35596_1080p_video_timing_info;
+ panelstruct->backlightinfo
+ = &nt35596_1080p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = nt35596_1080p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = NT35596_1080P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ nt35596_1080p_video_timings, TIMING_SIZE);
+ break;
+ }
+}
+
+bool oem_panel_select(struct panel_struct *panelstruct,
+ struct msm_panel_info *pinfo,
+ struct mdss_dsi_phy_ctrl *phy_db)
+{
+ uint32_t hw_id = board_hardware_id();
+ uint32_t platformid = board_platform_id();
+ uint32_t target_id = board_target_id();
+
+ switch (platformid) {
+ case MSM8974:
+ switch (hw_id) {
+ case HW_PLATFORM_FLUID:
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ panel_id = TOSHIBA_720P_VIDEO_PANEL;
+ break;
+ default:
+ dprintf(CRITICAL, "Display not enabled for %d HW type\n"
+ , hw_id);
+ return false;
+ }
+ break;
+ case MSM8826:
+ case MSM8626:
+ case MSM8226:
+ case MSM8926:
+ case MSM8126:
+ case MSM8326:
+ case APQ8026:
+ switch (hw_id) {
+ case HW_PLATFORM_QRD:
+ if (board_hardware_subtype() == 2) {
+ panel_id = NT35521_720P_VIDEO_PANEL;
+ } else {
+ if (((target_id >> 16) & 0xFF) == 0x1) //EVT
+ panel_id = NT35590_720P_VIDEO_PANEL;
+ else if (((target_id >> 16) & 0xFF) == 0x2) //DVT
+ panel_id = HX8394A_720P_VIDEO_PANEL;
+ else {
+ dprintf(CRITICAL, "Not supported device, target_id=%x\n"
+ , target_id);
+ return false;
+ }
+ }
+ break;
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ panel_id = NT35590_720P_VIDEO_PANEL;
+ break;
+ default:
+ dprintf(CRITICAL, "Display not enabled for %d HW type\n"
+ , hw_id);
+ return false;
+ }
+ break;
+ default:
+ dprintf(CRITICAL, "GCDB:Display: Platform id:%d not supported\n"
+ , platformid);
+ return false;
+ }
+
+ init_panel_data(panelstruct, pinfo, phy_db);
+
+ return true;
+}
diff --git a/dev/gcdb/display/panel_display.c b/dev/gcdb/display/panel_display.c
new file mode 100755
index 0000000..7f78122
--- /dev/null
+++ b/dev/gcdb/display/panel_display.c
@@ -0,0 +1,279 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <platform/iomap.h>
+#include <err.h>
+#include <reg.h>
+#include <mdp5.h>
+
+
+/*---------------------------------------------------------------------------*/
+/* Panel Header */
+/*---------------------------------------------------------------------------*/
+#include "panel_display.h"
+#include "include/panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel Init */
+/*---------------------------------------------------------------------------*/
+int dsi_panel_init(struct msm_panel_info *pinfo,
+ struct panel_struct *pstruct)
+{
+ /* Resolution setting*/
+ pinfo->xres = pstruct->panelres->panel_width;
+ pinfo->yres = pstruct->panelres->panel_height;
+ pinfo->lcdc.h_back_porch = pstruct->panelres->hback_porch;
+ pinfo->lcdc.h_front_porch = pstruct->panelres->hfront_porch;
+ pinfo->lcdc.h_pulse_width = pstruct->panelres->hpulse_width;
+ pinfo->lcdc.v_back_porch = pstruct->panelres->vback_porch;
+ pinfo->lcdc.v_front_porch = pstruct->panelres->vfront_porch;
+ pinfo->lcdc.v_pulse_width = pstruct->panelres->vpulse_width;
+ pinfo->lcdc.hsync_skew = pstruct->panelres->hsync_skew;
+ pinfo->lcdc.xres_pad = pstruct->panelres->hleft_border +
+ pstruct->panelres->hright_border;
+ pinfo->lcdc.yres_pad = pstruct->panelres->vtop_border +
+ pstruct->panelres->vbottom_border;
+
+ pinfo->lcdc.dual_pipe = (pstruct->paneldata->panel_operating_mode
+ & 0x2);
+ pinfo->lcdc.pipe_swap = (pstruct->paneldata->panel_operating_mode
+ & 0x4);
+
+ /* Color setting*/
+ pinfo->lcdc.border_clr = pstruct->color->border_color;
+ pinfo->lcdc.underflow_clr = pstruct->color->underflow_color;
+ pinfo->mipi.rgb_swap = pstruct->color->color_order;
+ switch (pinfo->bpp) {
+ case BPP_16:
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB565;
+ break;
+ case BPP_18:
+ if (pstruct->color->pixel_packing)
+ pinfo->mipi.dst_format
+ = DSI_VIDEO_DST_FORMAT_RGB666_LOOSE;
+ else
+ pinfo->mipi.dst_format
+ = DSI_VIDEO_DST_FORMAT_RGB666;
+ break;
+ case BPP_24:
+ default:
+ pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+ break;
+ }
+
+ /* Panel generic info */
+ pinfo->mipi.mode = pstruct->paneldata->panel_type;
+ if (pinfo->mipi.mode) {
+ pinfo->type = MIPI_CMD_PANEL;
+ } else {
+ pinfo->type = MIPI_VIDEO_PANEL;
+ }
+ pinfo->bpp = pstruct->color->color_format;
+ pinfo->clk_rate = pstruct->paneldata->panel_clockrate;
+ pinfo->rotation = pstruct->paneldata->panel_orientation;
+ pinfo->mipi.interleave_mode = pstruct->paneldata->interleave_mode;
+ pinfo->broadcastmode = pstruct->paneldata->panel_broadcast_mode;
+ pinfo->lowpowerstop = pstruct->paneldata->dsi_lp11_atinit;
+ pinfo->mipi.vc = pstruct->paneldata->dsi_virtualchannel_id;
+ pinfo->mipi.frame_rate = pstruct->paneldata->panel_framerate;
+ pinfo->mipi.stream = pstruct->paneldata->dsi_stream;
+ pinfo->mipi.dual_dsi = (pstruct->paneldata->panel_operating_mode
+ & 0x1);
+ pinfo->mipi.bitclock = pstruct->paneldata->panel_bitclock_freq;
+
+ /* Video Panel configuration */
+ pinfo->mipi.pulse_mode_hsa_he = pstruct->videopanel->hsync_pulse;
+ pinfo->mipi.hfp_power_stop = pstruct->videopanel->hfp_power_mode;
+ pinfo->mipi.hbp_power_stop = pstruct->videopanel->hbp_power_mode;
+ pinfo->mipi.hsa_power_stop = pstruct->videopanel->hsa_power_mode;
+ pinfo->mipi.eof_bllp_power_stop
+ = pstruct->videopanel->bllp_eof_power_mode;
+ pinfo->mipi.bllp_power_stop = pstruct->videopanel->bllp_power_mode;
+ pinfo->mipi.traffic_mode = pstruct->videopanel->traffic_mode;
+ pinfo->mipi.eof_bllp_power = pstruct->videopanel->bllp_eof_power;
+
+ /* Command Panel configuratoin */
+ pinfo->mipi.insert_dcs_cmd = pstruct->commandpanel->tedcs_command;
+ pinfo->mipi.wr_mem_continue
+ = pstruct->commandpanel->tevsync_continue_lines;
+ pinfo->mipi.wr_mem_start
+ = pstruct->commandpanel->tevsync_rdptr_irqline;
+ pinfo->mipi.te_sel = pstruct->commandpanel->tepin_select;
+
+ /* Data lane configuraiton */
+ pinfo->mipi.num_of_lanes = pstruct->laneconfig->dsi_lanes;
+ pinfo->mipi.data_lane0 = pstruct->laneconfig->lane0_state;
+ pinfo->mipi.data_lane1 = pstruct->laneconfig->lane1_state;
+ pinfo->mipi.data_lane2 = pstruct->laneconfig->lane2_state;
+ pinfo->mipi.data_lane3 = pstruct->laneconfig->lane3_state;
+ pinfo->mipi.lane_swap = pstruct->laneconfig->dsi_lanemap;
+
+ pinfo->mipi.t_clk_post = pstruct->paneltiminginfo->tclk_post;
+ pinfo->mipi.t_clk_pre = pstruct->paneltiminginfo->tclk_pre;
+ pinfo->mipi.mdp_trigger = pstruct->paneltiminginfo->dsi_mdp_trigger;
+ pinfo->mipi.dma_trigger = pstruct->paneltiminginfo->dsi_dma_trigger;
+
+ pinfo->on = dsi_panel_on;
+ pinfo->off = dsi_panel_off;
+ pinfo->rotate = dsi_panel_rotation;
+ pinfo->config = dsi_panel_config;
+
+ return NO_ERROR;
+}
+
+/*---------------------------------------------------------------------------*/
+/* Panel Callbacks */
+/*---------------------------------------------------------------------------*/
+
+int dsi_panel_on()
+{
+ return oem_panel_on();
+}
+
+int dsi_panel_off()
+{
+ return oem_panel_off();
+}
+
+int dsi_panel_rotation()
+{
+ return oem_panel_rotation();
+}
+
+int dsi_video_panel_config(struct msm_panel_info *pinfo,
+ struct lcdc_panel_info *plcdc
+ )
+{
+ int ret = NO_ERROR;
+ uint8_t lane_enable = 0;
+ uint32_t panel_width = pinfo->xres;
+
+ if (pinfo->mipi.dual_dsi)
+ panel_width = panel_width / 2;
+
+ switch (pinfo->mipi.num_of_lanes) {
+ case 1:
+ lane_enable = 0x1; /*1 lane only */
+ break;
+ case 2:
+ lane_enable = 0x3; /* 2 lanes only */
+ break;
+ case 3:
+ lane_enable = 0x7; /* 3 lanes only */
+ break;
+ case 4:
+ default:
+ lane_enable = 0xf; /* 4 lanes */
+ break;
+ }
+
+ ret = mdss_dsi_video_mode_config((panel_width + plcdc->xres_pad),
+ (pinfo->yres + plcdc->yres_pad),
+ (panel_width),
+ (pinfo->yres),
+ (plcdc->h_front_porch),
+ (plcdc->h_back_porch + plcdc->h_pulse_width),
+ (plcdc->v_front_porch),
+ (plcdc->v_back_porch + plcdc->v_pulse_width),
+ (plcdc->h_pulse_width),
+ (plcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_enable,
+ pinfo->lowpowerstop,
+ pinfo->mipi.eof_bllp_power,
+ pinfo->mipi.interleave_mode,
+ MIPI_DSI0_BASE);
+
+ if (pinfo->mipi.dual_dsi)
+ ret = mdss_dsi_video_mode_config(
+ (panel_width + plcdc->xres_pad),
+ (pinfo->yres + plcdc->yres_pad),
+ (panel_width),
+ (pinfo->yres),
+ (plcdc->h_front_porch),
+ (plcdc->h_back_porch + plcdc->h_pulse_width),
+ (plcdc->v_front_porch),
+ (plcdc->v_back_porch + plcdc->v_pulse_width),
+ (plcdc->h_pulse_width),
+ (plcdc->v_pulse_width),
+ pinfo->mipi.dst_format,
+ pinfo->mipi.traffic_mode,
+ lane_enable,
+ pinfo->lowpowerstop,
+ pinfo->mipi.eof_bllp_power,
+ pinfo->mipi.interleave_mode,
+ MIPI_DSI1_BASE);
+
+ return ret;
+}
+
+int dsi_cmd_panel_config (struct msm_panel_info *pinfo,
+ struct lcdc_panel_info *plcdc)
+{
+ int ret = NO_ERROR;
+
+ ret = mdss_dsi_cmd_mode_config((pinfo->xres + plcdc->xres_pad),
+ (pinfo->yres + plcdc->yres_pad),
+ (pinfo->xres), (pinfo->yres),
+ pinfo->mipi.dst_format, pinfo->mipi.traffic_mode);
+
+ return ret;
+}
+
+
+int dsi_panel_config(void *pdata)
+{
+ int ret = NO_ERROR;
+ struct msm_panel_info *pinfo = (struct msm_panel_info *)pdata;
+ struct lcdc_panel_info *plcdc = NULL;
+
+ if (pinfo == NULL)
+ return ERR_INVALID_ARGS;
+
+ plcdc = &(pinfo->lcdc);
+ if (plcdc == NULL)
+ return ERR_INVALID_ARGS;
+
+
+ if (pinfo->mipi.mode == DSI_VIDEO_MODE) {
+ ret = dsi_video_panel_config(pinfo, plcdc);
+ } else {
+ ret = dsi_cmd_panel_config(pinfo, plcdc);
+ }
+
+ return ret;
+}
diff --git a/dev/gcdb/display/panel_display.h b/dev/gcdb/display/panel_display.h
new file mode 100755
index 0000000..195a82c
--- /dev/null
+++ b/dev/gcdb/display/panel_display.h
@@ -0,0 +1,74 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PANEL_DISPLAY_H_
+#define _PANEL_DISPLAY_H_
+
+/*---------------------------------------------------------------------------*/
+/* MACRO definition */
+/*---------------------------------------------------------------------------*/
+
+#define BPP_16 16
+#define BPP_18 18
+#define BPP_24 24
+
+#define TIMING_SIZE 48
+/*---------------------------------------------------------------------------*/
+/* struct definition */
+/*---------------------------------------------------------------------------*/
+typedef struct panel_struct{
+ struct panel_config *paneldata;
+ struct panel_resolution *panelres;
+ struct color_info *color;
+ struct videopanel_info *videopanel;
+ struct commandpanel_info *commandpanel;
+ struct command_state *state;
+ struct lane_configuration *laneconfig;
+ struct panel_timing *paneltiminginfo;
+ struct backlight *backlightinfo;
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* API */
+/*---------------------------------------------------------------------------*/
+int dsi_panel_init(struct msm_panel_info *pinfo,
+ struct panel_struct *pstruct);
+
+int dsi_panel_on();
+int dsi_panel_off();
+int dsi_panel_rotation();
+int dsi_panel_config(void *);
+
+/* This should be implemented by oem */
+int oem_panel_rotation();
+int oem_panel_on();
+int oem_panel_off();
+
+#endif /*_PLATFORM_DISPLAY_H_ */
diff --git a/dev/gcdb/display/rules.mk b/dev/gcdb/display/rules.mk
new file mode 100755
index 0000000..438c6c7
--- /dev/null
+++ b/dev/gcdb/display/rules.mk
@@ -0,0 +1,9 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include
+
+OBJS += \
+ $(LOCAL_DIR)/gcdb_display.o \
+ $(LOCAL_DIR)/panel_display.o \
+ $(LOCAL_DIR)/oem_panel.o \
+ $(LOCAL_DIR)/gcdb_autopll.o
diff --git a/dev/panel/msm/mipi_truly_video_wvga.c b/dev/panel/msm/mipi_truly_video_wvga.c
index 4e6f416..fa757fe 100644
--- a/dev/panel/msm/mipi_truly_video_wvga.c
+++ b/dev/panel/msm/mipi_truly_video_wvga.c
@@ -74,7 +74,7 @@
};
static char disp_on6[12] = {
0x07, 0x00, 0x29, 0xC0,
- 0xC2, 0x10, 0x06, 0x06,
+ 0xC2, 0x00, 0x06, 0x06,
0x01, 0x03, 0x00, 0xFF
};
static char disp_on7[32] = {
@@ -129,7 +129,7 @@
};
static char disp_on14[8] = {
0x03, 0x00, 0x29, 0xC0,
- 0xDE, 0x01, 0x41, 0xFF
+ 0xDE, 0x01, 0x51, 0xFF
};
static char disp_on15[4] = {
0xE6, 0x51, 0x23, 0x80
@@ -254,7 +254,7 @@
static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
/* regulator */
- {0x09, 0x08, 0x05, 0x00, 0x20, 0x03},
+ {0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
/* timing */
{0x5d, 0x12, 0x0c, 0x00, 0x33, 0x38,
0x10, 0x16, 0x1e, 0x03, 0x04, 0x00},
diff --git a/dev/pmic/pm8x41/include/pm8x41.h b/dev/pmic/pm8x41/include/pm8x41.h
index e70f448..b230549 100644
--- a/dev/pmic/pm8x41/include/pm8x41.h
+++ b/dev/pmic/pm8x41/include/pm8x41.h
@@ -61,6 +61,7 @@
#define PON_PSHOLD_WARM_RESET 0x1
#define PON_PSHOLD_SHUTDOWN 0x4
+#define PON_PSHOLD_HARD_RESET 0x7
enum PM8X41_VERSIONS
{
@@ -70,6 +71,7 @@
/*Target power on reasons*/
+#define HARD_RST 1
#define DC_CHG 8
#define USB_CHG 16
#define PON1 32
@@ -199,5 +201,6 @@
uint8_t pm8x41_get_pon_reason();
void pm8x41_config_output_mpp(struct pm8x41_mpp *mpp);
void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable);
+uint8_t pm8x41_get_is_cold_boot();
#endif
diff --git a/dev/pmic/pm8x41/include/pm8x41_adc.h b/dev/pmic/pm8x41/include/pm8x41_adc.h
index e2d6c65..3180899 100644
--- a/dev/pmic/pm8x41/include/pm8x41_adc.h
+++ b/dev/pmic/pm8x41/include/pm8x41_adc.h
@@ -103,6 +103,7 @@
#define VREF_125_CHAN_ID 10
#define GND_REF_CHAN_ID 14
#define VDD_VADC_CHAN_ID 15
+#define MPP_8_CHAN_ID 39
#define VADC_BAT_CHAN_ID 49
/* Calibration type */
@@ -155,6 +156,43 @@
#define BOOT_DONE 1
#define BOOT_DONE_BIT 7
+
+/* MPP defines */
+#define MPP_REG_BASE 0xA000
+#define MPP_REG_RANGE 0x100
+#define MPP_MAX_NUM 0x7
+
+#define MPP_MODE_AIN 0x4
+#define MPP_MASTER_ENABLE 0x1
+#define MPP_AIN_ROUTE_AMUX3 0x3
+
+/* control register base address offsets */
+#define Q_REG_MODE_CTL 0x40
+#define Q_REG_DIG_VIN_CTL 0x41
+#define Q_REG_DIG_PULL_CTL 0x42
+#define Q_REG_DIG_IN_CTL 0x43
+#define Q_REG_DIG_OUT_CTL 0x45
+#define Q_REG_EN_CTL 0x46
+#define Q_REG_AOUT_CTL 0x48
+#define Q_REG_AIN_CTL 0x4A
+#define Q_REG_SINK_CTL 0x4C
+
+/* control reg: mode */
+#define Q_REG_OUT_INVERT_SHIFT 0
+#define Q_REG_OUT_INVERT_MASK 0x1
+#define Q_REG_SRC_SEL_SHIFT 1
+#define Q_REG_SRC_SEL_MASK 0xE
+#define Q_REG_MODE_SEL_SHIFT 4
+#define Q_REG_MODE_SEL_MASK 0x70
+
+/* control reg: en */
+#define Q_REG_MASTER_EN_SHIFT 7
+#define Q_REG_MASTER_EN_MASK 0x80
+
+/* control reg: ana_in */
+#define Q_REG_AIN_ROUTE_SHIFT 0
+#define Q_REG_AIN_ROUTE_MASK 0x7
+
/* Function declations */
uint32_t pm8x41_adc_channel_read(uint16_t ch_num);
int pm8x41_iusb_max_config(uint32_t current);
@@ -167,4 +205,7 @@
uint32_t pm8x41_get_batt_voltage();
/* API: Get Voltage based State of Charge */
uint32_t pm8x41_get_voltage_based_soc(uint32_t cutoff_vol, uint32_t vdd_max);
+/* API: Set the MMP pin as ADC */
+void pm8x41_enable_mpp_as_adc(uint16_t mpp_num);
+
#endif /* _PM8X41_ADC_H_ */
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index 8a275ad..9c10ab8 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -57,6 +57,8 @@
/* PON Peripheral registers */
#define PON_PON_REASON1 0x808
+#define PON_WARMBOOT_STATUS1 0x80A
+#define PON_WARMBOOT_STATUS2 0x80B
#define PON_INT_RT_STS 0x810
#define PON_INT_SET_TYPE 0x811
#define PON_INT_POLARITY_HIGH 0x812
diff --git a/dev/pmic/pm8x41/include/pm8x41_wled.h b/dev/pmic/pm8x41/include/pm8x41_wled.h
index b357794..0ef9091 100644
--- a/dev/pmic/pm8x41/include/pm8x41_wled.h
+++ b/dev/pmic/pm8x41/include/pm8x41_wled.h
@@ -30,7 +30,7 @@
#include <debug.h>
#include <reg.h>
-#define PM_WLED_BASE 0x1D800
+#define PM_WLED_BASE 0x0D800
#define PM_WLED_CTNL_REG(n) (PM_WLED_BASE + n)
#define PM_WLED_LED_CTNL_REG(n) (PM_WLED_BASE + 0x60 + (n-1)*10)
@@ -57,7 +57,7 @@
#define PM_WLED_LED3_ILED_SYNC_MASK BIT(0)
#define PM_WLED_ENABLE_MODULE_MASK BIT(7)
-
+#define DEFAULT_SLAVE_ID 0x1
struct pm8x41_wled_data{
uint8_t mod_scheme;
uint16_t led1_brightness;
@@ -72,3 +72,4 @@
void pm8x41_wled_iled_sync_control(uint8_t enable);
void pm8x41_wled_sink_control(uint8_t enable);
void pm8x41_wled_enable(uint8_t enable);
+void pm8x41_wled_config_slave_id(uint8_t slave_id);
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index e5f05e5..0e1109b 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -372,3 +372,13 @@
REG_WRITE(mpp->base + MPP_MODE_CTL, mpp->mode | (MPP_DIGITAL_OUTPUT << MPP_MODE_CTL_MODE_SHIFT));
}
+
+uint8_t pm8x41_get_is_cold_boot()
+{
+ if (REG_READ(PON_WARMBOOT_STATUS1) || REG_READ(PON_WARMBOOT_STATUS2)) {
+ dprintf(INFO,"%s: Warm boot\n", __func__);
+ return 0;
+ }
+ dprintf(INFO,"%s: cold boot\n", __func__);
+ return 1;
+}
diff --git a/dev/pmic/pm8x41/pm8x41_adc.c b/dev/pmic/pm8x41/pm8x41_adc.c
index cf6dfa9..6e4aa29 100644
--- a/dev/pmic/pm8x41/pm8x41_adc.c
+++ b/dev/pmic/pm8x41/pm8x41_adc.c
@@ -41,6 +41,7 @@
static struct adc_conf adc_data[] = {
CHAN_INIT(VADC_USR1_BASE, VADC_BAT_CHAN_ID, VADC_MODE_NORMAL, VADC_DECIM_RATIO_VAL, HW_SET_DELAY_100US, FAST_AVG_SAMP_1, CALIB_RATIO),
CHAN_INIT(VADC_USR1_BASE, VADC_BAT_VOL_CHAN_ID, VADC_MODE_NORMAL, VADC_DECIM_RATIO_VAL, HW_SET_DELAY_100US, FAST_AVG_SAMP_1, CALIB_ABS),
+ CHAN_INIT(VADC_USR1_BASE, MPP_8_CHAN_ID, VADC_MODE_NORMAL, VADC_DECIM_RATIO_VAL, HW_SET_DELAY_100US, FAST_AVG_SAMP_1, CALIB_ABS),
};
@@ -383,3 +384,31 @@
return vol_soc;
}
+
+/*
+ * API: pm8x41_enable_mpp_as_adc
+ * Configurate the MPP pin as the ADC feature.
+ */
+void pm8x41_enable_mpp_as_adc(uint16_t mpp_num)
+{
+ uint32_t val;
+ if(mpp_num > MPP_MAX_NUM)
+ {
+ dprintf(CRITICAL, "Error: The MPP pin number is unavailable\n");
+ return;
+ }
+ /* set the MPP mode as AIN */
+ val = (MPP_MODE_AIN << Q_REG_MODE_SEL_SHIFT) \
+ | (0x1 << Q_REG_OUT_INVERT_SHIFT) \
+ | (0x0 << Q_REG_SRC_SEL_SHIFT);
+ REG_WRITE((MPP_REG_BASE + mpp_num * MPP_REG_RANGE + Q_REG_MODE_CTL), val);
+
+ /* Enable the MPP */
+ val = (MPP_MASTER_ENABLE << Q_REG_MASTER_EN_SHIFT);
+ REG_WRITE((MPP_REG_BASE + mpp_num * MPP_REG_RANGE + Q_REG_EN_CTL), val);
+
+ /* AIN route to AMUX8 */
+ val = (MPP_AIN_ROUTE_AMUX3 << Q_REG_AIN_ROUTE_SHIFT);
+ REG_WRITE((MPP_REG_BASE + mpp_num * MPP_REG_RANGE + Q_REG_AIN_CTL), val);
+
+}
diff --git a/dev/pmic/pm8x41/pm8x41_wled.c b/dev/pmic/pm8x41/pm8x41_wled.c
index fd8b48f..8c37e12 100644
--- a/dev/pmic/pm8x41/pm8x41_wled.c
+++ b/dev/pmic/pm8x41/pm8x41_wled.c
@@ -31,6 +31,25 @@
#include <pm8x41_hw.h>
#include <pm8x41_wled.h>
+static uint8_t wled_slave_id;
+
+static void wled_reg_write(uint32_t addr, uint8_t val)
+{
+ uint32_t new_addr;
+ if (wled_slave_id) {
+ new_addr = addr + (wled_slave_id << 16);
+ REG_WRITE(new_addr, val);
+ } else {
+ new_addr = addr + (DEFAULT_SLAVE_ID << 16);
+ REG_WRITE(new_addr, val);
+ }
+}
+
+void pm8x41_wled_config_slave_id(uint8_t slave_id)
+{
+ wled_slave_id = slave_id;
+}
+
void pm8x41_wled_config(struct pm8x41_wled_data *wled_ctrl) {
if (!wled_ctrl) {
@@ -38,20 +57,20 @@
return;
}
- REG_WRITE(PM_WLED_MODULATION_SCHEME, wled_ctrl->mod_scheme);
+ wled_reg_write(PM_WLED_MODULATION_SCHEME, wled_ctrl->mod_scheme);
- REG_WRITE(PM_WLED_LED1_BRIGHTNESS_LSB, (wled_ctrl->led1_brightness & 0xFF));
- REG_WRITE(PM_WLED_LED1_BRIGHTNESS_MSB, ((wled_ctrl->led1_brightness >> 8) & 0xFF));
- REG_WRITE(PM_WLED_LED2_BRIGHTNESS_LSB, (wled_ctrl->led2_brightness & 0xFF));
- REG_WRITE(PM_WLED_LED2_BRIGHTNESS_MSB, ((wled_ctrl->led2_brightness >> 8) & 0xFF));
- REG_WRITE(PM_WLED_LED3_BRIGHTNESS_LSB, (wled_ctrl->led3_brightness & 0xFF));
- REG_WRITE(PM_WLED_LED3_BRIGHTNESS_MSB, ((wled_ctrl->led3_brightness >> 8) & 0xFF));
+ wled_reg_write(PM_WLED_LED1_BRIGHTNESS_LSB, (wled_ctrl->led1_brightness & 0xFF));
+ wled_reg_write(PM_WLED_LED1_BRIGHTNESS_MSB, ((wled_ctrl->led1_brightness >> 8) & 0xFF));
+ wled_reg_write(PM_WLED_LED2_BRIGHTNESS_LSB, (wled_ctrl->led2_brightness & 0xFF));
+ wled_reg_write(PM_WLED_LED2_BRIGHTNESS_MSB, ((wled_ctrl->led2_brightness >> 8) & 0xFF));
+ wled_reg_write(PM_WLED_LED3_BRIGHTNESS_LSB, (wled_ctrl->led3_brightness & 0xFF));
+ wled_reg_write(PM_WLED_LED3_BRIGHTNESS_MSB, ((wled_ctrl->led3_brightness >> 8) & 0xFF));
- REG_WRITE(PM_WLED_MAX_DUTY_CYCLE, wled_ctrl->max_duty_cycle);
- REG_WRITE(PM_WLED_OVP, wled_ctrl->ovp);
- REG_WRITE(LEDn_FULL_SCALE_CURRENT(1), wled_ctrl->full_current_scale);
- REG_WRITE(LEDn_FULL_SCALE_CURRENT(2), wled_ctrl->full_current_scale);
- REG_WRITE(LEDn_FULL_SCALE_CURRENT(3), wled_ctrl->full_current_scale);
+ wled_reg_write(PM_WLED_MAX_DUTY_CYCLE, wled_ctrl->max_duty_cycle);
+ wled_reg_write(PM_WLED_OVP, wled_ctrl->ovp);
+ wled_reg_write(LEDn_FULL_SCALE_CURRENT(1), wled_ctrl->full_current_scale);
+ wled_reg_write(LEDn_FULL_SCALE_CURRENT(2), wled_ctrl->full_current_scale);
+ wled_reg_write(LEDn_FULL_SCALE_CURRENT(3), wled_ctrl->full_current_scale);
dprintf(SPEW, "WLED Configuration Success.\n");
@@ -67,7 +86,7 @@
PM_WLED_LED3_SINK_MASK;
}
- REG_WRITE(PM_WLED_CURRENT_SINK, value);
+ wled_reg_write(PM_WLED_CURRENT_SINK, value);
dprintf(SPEW, "WLED Sink Success\n");
@@ -83,7 +102,7 @@
PM_WLED_LED1_ILED_SYNC_MASK;
}
- REG_WRITE(PM_WLED_ILED_SYNC_BIT, value);
+ wled_reg_write(PM_WLED_ILED_SYNC_BIT, value);
dprintf(SPEW, "WLED ILED Sync Success\n");
@@ -96,7 +115,7 @@
if (enable)
value = PM_WLED_ENABLE_MODULE_MASK;
- REG_WRITE(PM_WLED_ENABLE, value);
+ wled_reg_write(PM_WLED_ENABLE, value);
dprintf(SPEW, "WLED Enable Success\n");
diff --git a/include/dev/fbcon.h b/include/dev/fbcon.h
index e8b047b..7ab5ca1 100644
--- a/include/dev/fbcon.h
+++ b/include/dev/fbcon.h
@@ -2,7 +2,7 @@
* Copyright (c) 2008, Google Inc.
* All rights reserved.
*
- * Copyright (c) 2009-2010, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -32,7 +32,9 @@
#define __DEV_FBCON_H
#define FB_FORMAT_RGB565 0
-#define FB_FORMAT_RGB888 1
+#define FB_FORMAT_RGB666 1
+#define FB_FORMAT_RGB666_LOOSE 2
+#define FB_FORMAT_RGB888 3
struct fbcon_config {
void *base;
diff --git a/platform/msm8226/acpuclock.c b/platform/msm8226/acpuclock.c
old mode 100644
new mode 100755
index 855b77b..82e56a3
--- a/platform/msm8226/acpuclock.c
+++ b/platform/msm8226/acpuclock.c
@@ -399,6 +399,54 @@
writel(0x1, DSI_PIXEL0_CBCR);
}
+void mmss_clock_auto_pll_init(uint8_t pclk0_m, uint8_t pclk0_n, uint8_t pclk0_d)
+{
+ int ret;
+
+ /* Configure Byte clock -autopll- This will not change becasue
+ byte clock does not need any divider*/
+ writel(0x100, DSI_BYTE0_CFG_RCGR);
+ writel(0x1, DSI_BYTE0_CMD_RCGR);
+ writel(0x1, DSI_BYTE0_CBCR);
+
+ /* Configure ESC clock */
+ ret = clk_get_set_enable("mdss_esc0_clk", 0, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set esc0_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_mmssnoc_axi_clk", 100000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set mmssnoc_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure MMSSNOC AXI clock */
+ ret = clk_get_set_enable("mmss_s0_axi_clk", 100000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set mmss_s0_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure AXI clock */
+ ret = clk_get_set_enable("mdss_axi_clk", 100000000, 1);
+ if (ret) {
+ dprintf(CRITICAL, "failed to set mdss_axi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ /* Configure Pixel clock */
+ writel(0x100, DSI_PIXEL0_CFG_RCGR);
+ writel(0x1, DSI_PIXEL0_CMD_RCGR);
+ writel(0x1, DSI_PIXEL0_CBCR);
+
+ writel(pclk0_m, DSI_PIXEL0_M);
+ writel(pclk0_n, DSI_PIXEL0_N);
+ writel(pclk0_d, DSI_PIXEL0_D);
+}
+
void mmss_clock_disable(void)
{
diff --git a/platform/msm8226/include/platform/clock.h b/platform/msm8226/include/platform/clock.h
old mode 100644
new mode 100755
index ca655e8..fbbd77a
--- a/platform/msm8226/include/platform/clock.h
+++ b/platform/msm8226/include/platform/clock.h
@@ -68,6 +68,9 @@
#define DSI_PIXEL0_CMD_RCGR REG_MM(0x2000)
#define DSI_PIXEL0_CFG_RCGR REG_MM(0x2004)
#define DSI_PIXEL0_CBCR REG_MM(0x2314)
+#define DSI_PIXEL0_M REG_MM(0x2008)
+#define DSI_PIXEL0_N REG_MM(0x200C)
+#define DSI_PIXEL0_D REG_MM(0x2010)
void platform_clock_init(void);
diff --git a/platform/msm8226/include/platform/iomap.h b/platform/msm8226/include/platform/iomap.h
index ea8bbeb..5418229 100644
--- a/platform/msm8226/include/platform/iomap.h
+++ b/platform/msm8226/include/platform/iomap.h
@@ -128,6 +128,17 @@
#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+/* SDCC2 */
+#define SDCC2_BCR (CLK_CTL_BASE + 0x500) /* block reset */
+#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x504) /* branch control */
+#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x508)
+#define SDCC2_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x50C)
+#define SDCC2_CMD_RCGR (CLK_CTL_BASE + 0x510) /* cmd */
+#define SDCC2_CFG_RCGR (CLK_CTL_BASE + 0x514) /* cfg */
+#define SDCC2_M (CLK_CTL_BASE + 0x518) /* m */
+#define SDCC2_N (CLK_CTL_BASE + 0x51C) /* n */
+#define SDCC2_D (CLK_CTL_BASE + 0x520) /* d */
+
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP1_UART3_APPS_CBCR (CLK_CTL_BASE + 0x784)
@@ -144,9 +155,11 @@
#define USB_HS_SYSTEM_CFG_RCGR (CLK_CTL_BASE + 0x494)
/* SDHCI */
-#define SDCC_MCI_HC_MODE (PERIPH_SS_BASE + 0x00024078)
-#define SDCC_HC_PWRCTL_MASK_REG (PERIPH_SS_BASE + 0x000240E0)
-#define SDCC_HC_PWRCTL_CTL_REG (PERIPH_SS_BASE + 0x000240E8)
+#define SDCC_MCI_HC_MODE (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)
/* DRV strength for sdcc */
#define SDC1_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x00002044)
diff --git a/platform/msm8226/include/platform/irqs.h b/platform/msm8226/include/platform/irqs.h
index 2e29d3a..c3abd2f 100644
--- a/platform/msm8226/include/platform/irqs.h
+++ b/platform/msm8226/include/platform/irqs.h
@@ -47,7 +47,9 @@
#define USB1_HS_BAM_IRQ (GIC_SPI_START + 135)
#define USB1_HS_IRQ (GIC_SPI_START + 134)
-#define SDCC_PWRCTRL_IRQ (GIC_SPI_START + 138)
+#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
+#define SDCC3_PWRCTL_IRQ (GIC_SPI_START + 224)
/* Retrofit universal macro names */
#define INT_USB_HS USB1_HS_IRQ
diff --git a/platform/msm8226/msm8226-clock.c b/platform/msm8226/msm8226-clock.c
index bd0a265..4c4758d 100644
--- a/platform/msm8226/msm8226-clock.c
+++ b/platform/msm8226/msm8226-clock.c
@@ -166,6 +166,46 @@
},
};
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+ .cmd_reg = (uint32_t *) SDCC2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC2_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC2_M,
+ .n_reg = (uint32_t *) SDCC2_N,
+ .d_reg = (uint32_t *) SDCC2_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc2_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_APPS_CBCR,
+ .parent = &sdcc2_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* UART Clocks */
static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
{
@@ -487,6 +527,9 @@
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+ CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
+
CLK_LOOKUP("uart3_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart3_core_clk", gcc_blsp1_uart3_apps_clk.c),
diff --git a/platform/msm8610/acpuclock.c b/platform/msm8610/acpuclock.c
index f1dcba7..4376e68 100644
--- a/platform/msm8610/acpuclock.c
+++ b/platform/msm8610/acpuclock.c
@@ -121,9 +121,6 @@
snprintf(clk_name, 64, "sdc%u_core_clk", interface);
- /* Disalbe MCI_CLK before changing the sdcc clock */
- mmc_boot_mci_clk_disable();
-
if(freq == MMC_CLK_400KHZ)
{
ret = clk_get_set_enable(clk_name, 400000, 1);
@@ -132,6 +129,10 @@
{
ret = clk_get_set_enable(clk_name, 50000000, 1);
}
+ else if(freq == MMC_CLK_200MHZ)
+ {
+ ret = clk_get_set_enable(clk_name, 200000000, 1);
+ }
else
{
dprintf(CRITICAL, "sdc frequency (%d) is not supported\n", freq);
@@ -143,9 +144,6 @@
dprintf(CRITICAL, "failed to set sdc1_core_clk ret = %d\n", ret);
ASSERT(0);
}
-
- /* Enable MCI CLK */
- mmc_boot_mci_clk_enable();
}
/* Configure UART clock based on the UART block id*/
diff --git a/platform/msm8610/include/platform/gpio.h b/platform/msm8610/include/platform/gpio.h
index 02bc2e7..fe7cb8a 100644
--- a/platform/msm8610/include/platform/gpio.h
+++ b/platform/msm8610/include/platform/gpio.h
@@ -30,6 +30,7 @@
#define __PLATFORM_MSM8610_GPIO_H
#include <bits.h>
+#include <gpio.h>
/* GPIO TLMM: Direction */
#define GPIO_INPUT 0
diff --git a/platform/msm8610/include/platform/iomap.h b/platform/msm8610/include/platform/iomap.h
index 79344d7..f9f1c27 100644
--- a/platform/msm8610/include/platform/iomap.h
+++ b/platform/msm8610/include/platform/iomap.h
@@ -60,9 +60,11 @@
#define MSM_SDC1_BAM_BASE (PERIPH_SS_BASE + 0x00004000)
#define MSM_SDC1_BASE (PERIPH_SS_BASE + 0x00024000)
#define MSM_SDC1_DML_BASE (PERIPH_SS_BASE + 0x00024800)
+#define MSM_SDC1_SDHCI_BASE (PERIPH_SS_BASE + 0x00024900)
#define MSM_SDC2_BAM_BASE (PERIPH_SS_BASE + 0x00084000)
#define MSM_SDC2_BASE (PERIPH_SS_BASE + 0x000A4000)
#define MSM_SDC2_DML_BASE (PERIPH_SS_BASE + 0x000A4800)
+#define MSM_SDC2_SDHCI_BASE (PERIPH_SS_BASE + 0x000A4900)
#define BLSP1_UART0_BASE (PERIPH_SS_BASE + 0x0011D000)
#define BLSP1_UART1_BASE (PERIPH_SS_BASE + 0x0011E000)
@@ -209,6 +211,17 @@
#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+/* SDCC2 */
+#define SDCC2_BCR (CLK_CTL_BASE + 0x500) /* block reset */
+#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x504) /* branch control */
+#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x508)
+#define SDCC2_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x50C)
+#define SDCC2_CMD_RCGR (CLK_CTL_BASE + 0x510) /* cmd */
+#define SDCC2_CFG_RCGR (CLK_CTL_BASE + 0x514) /* cfg */
+#define SDCC2_M (CLK_CTL_BASE + 0x518) /* m */
+#define SDCC2_N (CLK_CTL_BASE + 0x51C) /* n */
+#define SDCC2_D (CLK_CTL_BASE + 0x520) /* d */
+
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP1_UART2_APPS_CBCR (CLK_CTL_BASE + 0x704)
@@ -224,4 +237,13 @@
#define USB_HS_SYSTEM_CMD_RCGR (CLK_CTL_BASE + 0x490)
#define USB_HS_SYSTEM_CFG_RCGR (CLK_CTL_BASE + 0x494)
+/* DRV strength for sdcc */
+#define SDC1_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x00002044)
+
+/* SDHCI */
+#define SDCC_MCI_HC_MODE (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)
#endif
diff --git a/platform/msm8610/include/platform/irqs.h b/platform/msm8610/include/platform/irqs.h
index 6cecf4e..9c96345 100644
--- a/platform/msm8610/include/platform/irqs.h
+++ b/platform/msm8610/include/platform/irqs.h
@@ -47,6 +47,9 @@
#define USB1_HS_BAM_IRQ (GIC_SPI_START + 135)
#define USB1_HS_IRQ (GIC_SPI_START + 134)
+#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
+
/* Retrofit universal macro names */
#define INT_USB_HS USB1_HS_IRQ
diff --git a/platform/msm8610/msm8610-clock.c b/platform/msm8610/msm8610-clock.c
index a9b13b8..95cb4d3 100644
--- a/platform/msm8610/msm8610-clock.c
+++ b/platform/msm8610/msm8610-clock.c
@@ -166,6 +166,48 @@
},
};
+/* SDCC2 clocks */
+
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+ .cmd_reg = (uint32_t *) SDCC2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC2_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC2_M,
+ .n_reg = (uint32_t *) SDCC2_N,
+ .d_reg = (uint32_t *) SDCC2_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc2_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_APPS_CBCR,
+ .parent = &sdcc2_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* UART Clocks */
static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
{
@@ -413,6 +455,9 @@
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+ CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
+
CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
diff --git a/platform/msm8974/acpuclock.c b/platform/msm8974/acpuclock.c
index 4b1798f..6131e61 100644
--- a/platform/msm8974/acpuclock.c
+++ b/platform/msm8974/acpuclock.c
@@ -340,17 +340,18 @@
uint32_t reg = 0;
reg = readl(MDP_GDSCR);
if (enable) {
- if (reg & 0x1) {
+ if (!(reg & GDSC_POWER_ON_BIT)) {
reg &= ~(BIT(0) | GDSC_EN_FEW_WAIT_MASK);
reg |= GDSC_EN_FEW_WAIT_256_MASK;
writel(reg, MDP_GDSCR);
+ while(!(readl(MDP_GDSCR) & (GDSC_POWER_ON_BIT)));
+ } else {
+ dprintf(INFO, "MDP GDSC already enabled\n");
}
-
- while(readl(MDP_GDSCR) & ((GDSC_POWER_ON_BIT) | (GDSC_POWER_ON_STATUS_BIT)));
} else {
- reg &= ~BIT(0);
+ reg |= BIT(0);
writel(reg, MDP_GDSCR);
- while(!(readl(MDP_GDSCR) & ((GDSC_POWER_ON_BIT))));
+ while(readl(MDP_GDSCR) & (GDSC_POWER_ON_BIT));
}
}
diff --git a/platform/msm8974/include/platform/iomap.h b/platform/msm8974/include/platform/iomap.h
index 799fc86..3e27c3b 100644
--- a/platform/msm8974/include/platform/iomap.h
+++ b/platform/msm8974/include/platform/iomap.h
@@ -139,6 +139,17 @@
#define SDCC1_N (CLK_CTL_BASE + 0x4DC) /* n */
#define SDCC1_D (CLK_CTL_BASE + 0x4E0) /* d */
+/* SDCC2 */
+#define SDCC2_BCR (CLK_CTL_BASE + 0x500) /* block reset */
+#define SDCC2_APPS_CBCR (CLK_CTL_BASE + 0x504) /* branch control */
+#define SDCC2_AHB_CBCR (CLK_CTL_BASE + 0x508)
+#define SDCC2_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x50C)
+#define SDCC2_CMD_RCGR (CLK_CTL_BASE + 0x510) /* cmd */
+#define SDCC2_CFG_RCGR (CLK_CTL_BASE + 0x514) /* cfg */
+#define SDCC2_M (CLK_CTL_BASE + 0x518) /* m */
+#define SDCC2_N (CLK_CTL_BASE + 0x51C) /* n */
+#define SDCC2_D (CLK_CTL_BASE + 0x520) /* d */
+
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP2_AHB_CBCR (CLK_CTL_BASE + 0x944)
@@ -206,7 +217,9 @@
#define SDC1_HDRV_PULL_CTL (TLMM_BASE_ADDR + 0x00002044)
/* SDHCI */
-#define SDCC_MCI_HC_MODE (PERIPH_SS_BASE + 0x00024078)
-#define SDCC_HC_PWRCTL_MASK_REG (PERIPH_SS_BASE + 0x000240E0)
-#define SDCC_HC_PWRCTL_CTL_REG (PERIPH_SS_BASE + 0x000240E8)
+#define SDCC_MCI_HC_MODE (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG (0x000000E8)
#endif
diff --git a/platform/msm8974/include/platform/irqs.h b/platform/msm8974/include/platform/irqs.h
index 56ef1cb..e9b2d06 100644
--- a/platform/msm8974/include/platform/irqs.h
+++ b/platform/msm8974/include/platform/irqs.h
@@ -66,5 +66,8 @@
((GIC_SPI_START + 95) + qup_id):\
((GIC_SPI_START + 101) + qup_id))
-#define SDCC_PWRCTRL_IRQ (GIC_SPI_START + 138)
+#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
+#define SDCC3_PWRCTL_IRQ (GIC_SPI_START + 224)
+#define SDCC4_PWRCTL_IRQ (GIC_SPI_START + 227)
#endif /* __IRQS_COPPER_H */
diff --git a/platform/msm8974/msm8974-clock.c b/platform/msm8974/msm8974-clock.c
index 6c88589..dbba8c4 100644
--- a/platform/msm8974/msm8974-clock.c
+++ b/platform/msm8974/msm8974-clock.c
@@ -166,6 +166,46 @@
},
};
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+ .cmd_reg = (uint32_t *) SDCC2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC2_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC2_M,
+ .n_reg = (uint32_t *) SDCC2_N,
+ .d_reg = (uint32_t *) SDCC2_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc2_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_APPS_CBCR,
+ .parent = &sdcc2_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+ .cbcr_reg = (uint32_t *) SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* UART Clocks */
static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
{
@@ -590,6 +630,9 @@
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+ CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
+
CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
diff --git a/platform/msm_shared/bam.c b/platform/msm_shared/bam.c
index b2b9e22..5deaecf 100644
--- a/platform/msm_shared/bam.c
+++ b/platform/msm_shared/bam.c
@@ -222,6 +222,9 @@
/* Initialize FIFO offset for the first read */
bam->pipe[pipe_num].fifo.offset = BAM_DESC_SIZE;
+ writel(P_ENABLE | readl(BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base)),
+ BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base));
+
/* Everything is set.
* Flag pipe init done.
*/
@@ -242,9 +245,9 @@
/* Pipe event threshold register is not relevant in sys modes */
/* Enable pipe in system mode and set the direction */
- writel(P_SYS_MODE_MASK | P_ENABLE |
- (bam->pipe[pipe_num].trans_type << P_DIRECTION_SHIFT),
- BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base));
+ writel(P_SYS_MODE_MASK | bam->pipe[pipe_num].lock_grp << P_LOCK_GRP_SHIFT |
+ (bam->pipe[pipe_num].trans_type << P_DIRECTION_SHIFT),
+ BAM_P_CTRLn(bam->pipe[pipe_num].pipe_num, bam->base));
/* Mark the pipe FIFO as uninitialized. */
bam->pipe[pipe_num].initialized = 0;
diff --git a/platform/msm_shared/crypto5_eng.c b/platform/msm_shared/crypto5_eng.c
index 669d6ac..ed5c8ad 100644
--- a/platform/msm_shared/crypto5_eng.c
+++ b/platform/msm_shared/crypto5_eng.c
@@ -256,6 +256,7 @@
dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].trans_type = BAM2SYS;
dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].fifo.size = params->read_fifo_size;
dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].fifo.head = crypto_allocate_fifo(params->read_fifo_size);
+ dev->bam.pipe[CRYPTO_READ_PIPE_INDEX].lock_grp = params->pipes.read_pipe_grp;
/* Set Write pipe params. */
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].pipe_num = params->pipes.write_pipe;
@@ -263,6 +264,7 @@
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].trans_type = SYS2BAM;
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].fifo.size = params->write_fifo_size;
dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].fifo.head = crypto_allocate_fifo(params->write_fifo_size);
+ dev->bam.pipe[CRYPTO_WRITE_PIPE_INDEX].lock_grp = params->pipes.write_pipe_grp;
dev->bam.threshold = CRYPTO_MAX_THRESHOLD;
diff --git a/platform/msm_shared/display.c b/platform/msm_shared/display.c
old mode 100644
new mode 100755
index 7061b1a..9254a78
--- a/platform/msm_shared/display.c
+++ b/platform/msm_shared/display.c
@@ -238,6 +238,10 @@
if (pdata->clk_func)
ret = pdata->clk_func(1);
+ /* Only enabled for auto PLL calculation */
+ if (pdata->pll_clk_func)
+ ret = pdata->pll_clk_func(1, &(panel->panel_info));
+
if (ret)
goto msm_display_init_out;
@@ -279,7 +283,7 @@
ret = mdp_dsi_video_off();
if (ret)
goto msm_display_off_out;
- ret = mipi_dsi_off();
+ ret = mipi_dsi_off(pinfo);
if (ret)
goto msm_display_off_out;
break;
@@ -288,7 +292,7 @@
ret = mdp_dsi_cmd_off();
if (ret)
goto msm_display_off_out;
- ret = mipi_dsi_off();
+ ret = mipi_dsi_off(pinfo);
if (ret)
goto msm_display_off_out;
break;
@@ -312,6 +316,10 @@
if (panel->clk_func)
ret = panel->clk_func(0);
+ /* Only for AUTO PLL calculation */
+ if (panel->pll_clk_func)
+ ret = panel->pll_clk_func(0, pinfo);
+
if (ret)
goto msm_display_off_out;
diff --git a/platform/msm_shared/include/bam.h b/platform/msm_shared/include/bam.h
index 099b1b6..ae673ab 100644
--- a/platform/msm_shared/include/bam.h
+++ b/platform/msm_shared/include/bam.h
@@ -81,6 +81,7 @@
#define P_SYS_MODE_MASK (1 << 5)
/* 1: Producer mode 0: Consumer mode */
#define P_DIRECTION_SHIFT 3
+#define P_LOCK_GRP_SHIFT 16
#define P_ENABLE (1 << 1)
#define BAM_P_RSTn(n, x) (0x00001000 + 0x4 + 0x1000 * (n) + (x))
@@ -198,6 +199,7 @@
uint8_t spi_num;
uint8_t int_mode;
uint8_t initialized;
+ uint8_t lock_grp;
};
/* Structure to define a BAM instance being used
diff --git a/platform/msm_shared/include/crypto5_eng.h b/platform/msm_shared/include/crypto5_eng.h
index 958fa1a..872f46e 100644
--- a/platform/msm_shared/include/crypto5_eng.h
+++ b/platform/msm_shared/include/crypto5_eng.h
@@ -103,6 +103,8 @@
{
uint8_t read_pipe;
uint8_t write_pipe;
+ uint8_t read_pipe_grp;
+ uint8_t write_pipe_grp;
};
struct output_dump
diff --git a/platform/msm_shared/include/mipi_dsi.h b/platform/msm_shared/include/mipi_dsi.h
old mode 100644
new mode 100755
index c930cc5..4f90f96
--- a/platform/msm_shared/include/mipi_dsi.h
+++ b/platform/msm_shared/include/mipi_dsi.h
@@ -641,6 +641,21 @@
char laneCfg[45];
};
+typedef struct mdss_dsi_pll_config {
+ uint32_t pixel_clock;
+ uint32_t pixel_clock_mhz;
+ uint32_t byte_clock;
+ uint32_t bit_clock;
+ uint32_t halfbit_clock;
+ uint32_t vco_clock;
+ uint8_t directpath;
+ uint8_t posdiv1;
+ uint8_t posdiv3;
+ uint8_t pclk_m;
+ uint8_t pclk_n;
+ uint8_t pclk_d;
+};
+
struct mipi_dsi_cmd {
int size;
char *payload;
@@ -938,6 +953,15 @@
#define DSI_CMD_TRIGGER_SW_SEOF 0x05 /* cmd dma only */
#define DSI_CMD_TRIGGER_SW_TE 0x06
+#define DSI_DATALANE_SWAP_0123 0
+#define DSI_DATALANE_SWAP_3012 1
+#define DSI_DATALANE_SWAP_2301 2
+#define DSI_DATALANE_SWAP_1230 3
+#define DSI_DATALANE_SWAP_0321 4
+#define DSI_DATALANE_SWAP_1032 5
+#define DSI_DATALANE_SWAP_2103 6
+#define DSI_DATALANE_SWAP_3210 7
+
int mipi_config(struct msm_fb_panel_data *panel);
int mdss_dsi_config(struct msm_fb_panel_data *panel);
@@ -976,7 +1000,7 @@
unsigned char eof_bllp_pwr,
unsigned char interleav);
int mipi_dsi_on();
-int mipi_dsi_off();
+int mipi_dsi_off(struct msm_panel_info *pinfo);
int mipi_dsi_cmds_tx(struct mipi_dsi_cmd *cmds, int count);
int mipi_dsi_cmds_rx(char **rp, int len);
#endif
diff --git a/platform/msm_shared/include/mmc_sdhci.h b/platform/msm_shared/include/mmc_sdhci.h
index 6aa323d..79d3965 100644
--- a/platform/msm_shared/include/mmc_sdhci.h
+++ b/platform/msm_shared/include/mmc_sdhci.h
@@ -143,6 +143,44 @@
#define MMC_ADDR_OUT_OF_RANGE(resp) ((resp >> 31) & 0x01)
+/* SD card related Macros */
+/* Arguments for commands */
+#define MMC_SD_HC_VOLT_SUPPLIED 0x000001AA
+#define MMC_SD_OCR 0x00FF8000
+#define MMC_SD_HC_HCS 0x40000000
+#define MMC_SD_DEV_READY 0x80000000
+#define MMC_CARD_TYPE_SDHC 0x1
+#define MMC_CARD_TYPE_STD_SD 0x0
+#define SD_CARD_RCA 0x0
+#define MMC_SD_SWITCH_HS 0x80FFFFF1
+
+#define SD_CMD8_MAX_RETRY 0x3
+#define SD_ACMD41_MAX_RETRY 0x14
+
+/* SCR(SD Card Register) related */
+#define SD_SCR_BUS_WIDTH 16
+#define SD_SCR_SD_SPEC 24
+#define SD_SCR_SD_SPEC3 15
+#define SD_SCR_BUS_WIDTH_MASK 0xf0000
+#define SD_SCR_SD_SPEC_MASK 0x0f000000
+#define SD_SCR_SD_SPEC3_MASK 0x8000
+#define SD_SCR_CMD23_SUPPORT BIT(1)
+#define SD_SCR_WIDTH_4BIT BIT(2)
+
+/* SSR related macros */
+#define MMC_SD_AU_SIZE_BIT 428
+#define MMC_SD_AU_SIZE_LEN 4
+#define MMC_SD_ERASE_SIZE_BIT 408
+#define MMC_SD_ERASE_SIZE_LEN 16
+
+/* Commands for SD card */
+#define CMD8_SEND_IF_COND 8
+#define ACMD6_SET_BUS_WIDTH 6
+#define ACMD13_SEND_SD_STATUS 13
+#define ACMD41_SEND_OP_COND 41
+#define ACMD51_READ_CARD_SCR 51
+#define CMD55_APP_CMD 55
+
/* Can be used to unpack array of upto 32 bits data */
#define UNPACK_BITS(array, start, len, size_of) \
({ \
@@ -156,6 +194,20 @@
unpck & mask; \
})
+#define swap_endian32(x) \
+ ((uint32_t)( \
+ (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
+ (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
+ (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
+ (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24) ))
+
+
+#define MMC_CARD_SD(card) ((card->type == MMC_CARD_TYPE_SDHC) || \
+ (card->type == MMC_CARD_TYPE_STD_SD))
+
+#define MMC_CARD_MMC(card) ((card->type == MMC_TYPE_STD_MMC) || \
+ (card->type == MMC_TYPE_MMCHC))
+
/* CSD Register.
* Note: not all the fields have been defined here
*/
@@ -196,6 +248,20 @@
uint32_t year; /* 4 bits manufacturing year */
};
+/* SCR register for SD card */
+struct mmc_sd_scr {
+ uint32_t bus_widths; /* Bus width support, 8 or 1 bit */
+ uint32_t sd_spec; /* sd spec version */
+ uint32_t sd3_spec; /* sd spec 3 version */
+ uint32_t cmd23_support; /* cmd23 supported or not */
+};
+
+/* SD Status Register */
+struct mmc_sd_ssr {
+ uint32_t au_size; /* Allocation unit (AU) size */
+ uint32_t num_aus; /* Number of AUs */
+};
+
/* mmc card register */
struct mmc_card {
uint32_t rca; /* Relative addres of the card*/
@@ -205,14 +271,19 @@
uint32_t status; /* Card status */
uint8_t *ext_csd; /* Ext CSD for the card info */
uint32_t raw_csd[4]; /* Raw CSD for the card */
+ uint32_t raw_scr[2]; /* SCR for SD card */
struct mmc_cid cid; /* CID structure */
struct mmc_csd csd; /* CSD structure */
+ struct mmc_sd_scr scr; /* SCR structure */
+ struct mmc_sd_ssr ssr; /* SSR Register */
};
/* mmc device config data */
struct mmc_config_data {
uint8_t slot; /* Sdcc slot used */
- uint32_t base; /* Based address for the sdcc */
+ uint8_t pwr_irq; /* Power Irq from card to host */
+ uint32_t sdhc_base; /* Base address for the sdhc */
+ uint32_t pwrctl_base; /* Base address for power control registers */
uint16_t bus_width; /* Bus width used */
uint32_t max_clk_rate; /* Max clock rate supported */
};
diff --git a/platform/msm_shared/include/msm_panel.h b/platform/msm_shared/include/msm_panel.h
old mode 100644
new mode 100755
index bed28ce..22a47ad
--- a/platform/msm_shared/include/msm_panel.h
+++ b/platform/msm_shared/include/msm_panel.h
@@ -107,6 +107,8 @@
struct mipi_panel_info {
char mode; /* video/cmd */
char interleave_mode;
+ int eof_bllp_power;
+ uint32_t bitclock;
char crc_check;
char ecc_check;
char dst_format; /* shared by video and command */
@@ -127,6 +129,7 @@
char vc; /* virtual channel */
struct mipi_dsi_phy_ctrl *dsi_phy_db;
struct mdss_dsi_phy_ctrl *mdss_dsi_phy_db;
+ struct mdss_dsi_pll_config *dsi_pll_config;
struct mipi_dsi_cmd *panel_cmds;
int num_of_panel_cmds;
/* video mode */
@@ -175,6 +178,9 @@
uint32_t type;
uint32_t wait_cycle;
uint32_t clk_rate;
+ uint32_t rotation;
+ uint32_t broadcastmode;
+ char lowpowerstop;
struct lcd_panel_info lcd;
struct lcdc_panel_info lcdc;
@@ -198,6 +204,7 @@
/* function entry chain */
int (*power_func) (int enable);
int (*clk_func) (int enable);
+ int (*pll_clk_func) (int enable, struct msm_panel_info *);
};
diff --git a/platform/msm_shared/include/partition_parser.h b/platform/msm_shared/include/partition_parser.h
index 0508e00..25a73ca 100644
--- a/platform/msm_shared/include/partition_parser.h
+++ b/platform/msm_shared/include/partition_parser.h
@@ -162,6 +162,7 @@
unsigned long long partition_get_offset(int index);
unsigned int partition_read_table();
unsigned int write_partition(unsigned size, unsigned char *partition);
+bool partition_gpt_exists();
/* For Debugging */
void partition_dump(void);
diff --git a/platform/msm_shared/include/qpic_nand.h b/platform/msm_shared/include/qpic_nand.h
index abc2bb9..0676301 100644
--- a/platform/msm_shared/include/qpic_nand.h
+++ b/platform/msm_shared/include/qpic_nand.h
@@ -325,6 +325,9 @@
unsigned read_pipe;
unsigned write_pipe;
unsigned cmd_pipe;
+ uint8_t read_pipe_grp;
+ uint8_t write_pipe_grp;
+ uint8_t cmd_pipe_grp;
};
/* Structure to define the initial nand config */
diff --git a/platform/msm_shared/include/sdhci.h b/platform/msm_shared/include/sdhci.h
index 20861fc..ef48d1d 100644
--- a/platform/msm_shared/include/sdhci.h
+++ b/platform/msm_shared/include/sdhci.h
@@ -31,6 +31,7 @@
#include <reg.h>
#include <bits.h>
+#include <kernel/event.h>
/*
* Capabilities for the host controller
@@ -55,6 +56,7 @@
struct sdhci_host {
uint32_t base; /* Base address for the host */
uint32_t cur_clk_rate; /* Running clock rate */
+ event_t* sdhc_event; /* Event for power control irqs */
struct host_caps caps; /* Host capabilities */
};
@@ -79,6 +81,7 @@
uint32_t resp[4]; /* 128 bit response value */
uint32_t trans_mode; /* Transfer mode, read/write */
uint32_t cmd_retry; /* Retry the command, if card is busy */
+ uint32_t cmd23_support; /* If card supports cmd23 */
struct mmc_data data; /* Data pointer */
};
@@ -239,6 +242,7 @@
#define SDHCI_BLK_CNT_EN BIT(1)
#define SDHCI_DMA_EN BIT(0)
#define SDHCI_AUTO_CMD23_EN BIT(3)
+#define SDHCI_AUTO_CMD12_EN BIT(2)
#define SDHCI_ADMA_32BIT BIT(4)
/*
diff --git a/platform/msm_shared/include/sdhci_msm.h b/platform/msm_shared/include/sdhci_msm.h
new file mode 100644
index 0000000..1d77823
--- /dev/null
+++ b/platform/msm_shared/include/sdhci_msm.h
@@ -0,0 +1,43 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __SDHCI_MSM_H__
+#define __SDHCI_MSM_H__
+
+#include <kernel/event.h>
+
+struct sdhci_msm_data
+{
+ uint32_t pwrctl_base;
+ uint32_t pwr_irq;
+ event_t* sdhc_event;
+};
+
+void sdhci_msm_init(struct sdhci_msm_data *data);
+
+#endif
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index bbda314..43559eb 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -1175,7 +1175,7 @@
return ret;
}
-int mipi_dsi_off()
+int mipi_dsi_off(struct msm_panel_info *pinfo)
{
if(!target_cont_splash_screen())
{
@@ -1189,6 +1189,8 @@
}
writel(0x1115501, DSI_INT_CTRL);
+ if (pinfo->mipi.broadcast)
+ writel(0x1115501, DSI_INT_CTRL + 0x600);
return NO_ERROR;
}
diff --git a/platform/msm_shared/mipi_dsi_autopll.c b/platform/msm_shared/mipi_dsi_autopll.c
new file mode 100755
index 0000000..5616956
--- /dev/null
+++ b/platform/msm_shared/mipi_dsi_autopll.c
@@ -0,0 +1,387 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <debug.h>
+#include <reg.h>
+#include <err.h>
+#include <smem.h>
+#include <mipi_dsi.h>
+#include <platform/iomap.h>
+
+#define LPFR_LUT_SIZE 10
+
+#define VCO_REF_CLOCK_RATE 19200000
+
+#define FRAC_DIVIDER 10000
+
+typedef struct lpfr_cfg {
+ uint32_t vco_rate;
+ uint8_t resistance;
+};
+
+static struct lpfr_cfg lpfr_lut[LPFR_LUT_SIZE] = {
+ {479500000, 8},
+ {480000000, 11},
+ {575500000, 8},
+ {576000000, 12},
+ {610500000, 8},
+ {659500000, 9},
+ {671500000, 10},
+ {672000000, 14},
+ {708500000, 10},
+ {750000000, 11},
+ };
+
+uint64_t div_s64(uint64_t dividend, uint32_t divisor, uint32_t *remainder)
+{
+ *remainder = dividend % divisor;
+
+ return dividend / divisor;
+}
+
+static uint32_t dsi_pll_enable_seq_m(void)
+{
+ uint32_t i = 0;
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+ for (i = 0; (i < 4) && !pll_locked; i++) {
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ if (i != 0)
+ writel(0x34, MIPI_DSI_BASE + 0x00270); /* CAL CFG1*/
+ udelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+ }
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_d(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_f1(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0d, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_c(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+static uint32_t dsi_pll_enable_seq_e(void)
+{
+ uint32_t pll_locked = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(200);
+ writel(0x0d, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ udelay(1000);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ pll_locked = readl(MIPI_DSI_BASE + 0x02c0) & 0x01;
+
+ return pll_locked;
+}
+
+
+
+static uint32_t dsi_pll_enable_seq_8974(void)
+{
+ uint32_t rc = 0;
+
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+
+ while (!(readl(MIPI_DSI_BASE + 0x02c0) & 0x01)) {
+ mdss_dsi_uniphy_pll_sw_reset(MIPI_DSI_BASE);
+ writel(0x01, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x05, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x07, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(1);
+ writel(0x0f, MIPI_DSI_BASE + 0x0220); /* GLB CFG */
+ mdelay(2);
+ mdss_dsi_uniphy_pll_lock_detect_setting(MIPI_DSI_BASE);
+ }
+ return rc;
+}
+
+static uint32_t dsi_pll_enable_seq(void)
+{
+ uint32_t platformid = board_platform_id();
+
+ /* Only one enable seq for 8974 target */
+ if (platformid == MSM8974) {
+ dsi_pll_enable_seq_8974();
+ }
+
+ /* 6 enable seq for 8226 target */
+ else if (platformid == MSM8826 ||
+ platformid == MSM8626 ||
+ platformid == MSM8226 ||
+ platformid == MSM8926 ||
+ platformid == MSM8126 ||
+ platformid == MSM8326 ||
+ platformid == APQ8026) {
+ if (dsi_pll_enable_seq_m()) {
+ } else if (dsi_pll_enable_seq_d()) {
+ } else if (dsi_pll_enable_seq_d()) {
+ } else if (dsi_pll_enable_seq_f1()) {
+ } else if (dsi_pll_enable_seq_c()) {
+ } else if (dsi_pll_enable_seq_e()) {
+ } else {
+ dprintf(CRITICAL, "Not able to enable the pll\n");
+ }
+ } else {
+ dprintf(CRITICAL, "Target not supported in auto PLL\n");
+ }
+
+}
+
+int32_t mdss_dsi_auto_pll_config(struct mdss_dsi_pll_config *pd)
+{
+ uint32_t rem, divider;
+ uint32_t refclk_cfg = 0, frac_n_mode = 0, ref_doubler_en_b = 0;
+ uint64_t vco_clock, div_fbx;
+ uint32_t ref_clk_to_pll = 0, frac_n_value = 0;
+ uint32_t sdm_cfg0, sdm_cfg1, sdm_cfg2, sdm_cfg3;
+ uint32_t gen_vco_clk, cal_cfg10, cal_cfg11;
+ uint32_t res;
+ uint8_t i, rc = NO_ERROR;
+
+ /* Configure the Loop filter resistance */
+ for (i = 0; i < LPFR_LUT_SIZE; i++)
+ if (pd->vco_clock <= lpfr_lut[i].vco_rate)
+ break;
+ if (i == LPFR_LUT_SIZE) {
+ dprintf(INFO, "unable to get loop filter resistance. vco=%d\n"
+ , lpfr_lut[i].vco_rate);
+ rc = ERROR;
+ return rc;
+ }
+
+ mdss_dsi_phy_sw_reset(MIPI_DSI_BASE);
+
+ /* Loop filter resistance value */
+ writel(lpfr_lut[i].resistance, MIPI_DSI_BASE + 0x022c);
+ /* Loop filter capacitance values : c1 and c2 */
+ writel(0x70, MIPI_DSI_BASE + 0x0230);
+ writel(0x15, MIPI_DSI_BASE + 0x0234);
+
+ writel(0x02, MIPI_DSI_BASE + 0x0208); /* ChgPump */
+ /* postDiv1 - calculated in pll config*/
+ writel(pd->posdiv1, MIPI_DSI_BASE + 0x0204);
+ /* postDiv2 - fixed devision 4 */
+ writel(0x03, MIPI_DSI_BASE + 0x0224);
+ /* postDiv3 - calculated in pll config */
+ writel(pd->posdiv3, MIPI_DSI_BASE + 0x0228); /* postDiv3 */
+
+ writel(0x2b, MIPI_DSI_BASE + 0x0278); /* Cal CFG3 */
+ writel(0x66, MIPI_DSI_BASE + 0x027c); /* Cal CFG4 */
+ writel(0x05, MIPI_DSI_BASE + 0x0264); /* LKDetect CFG2 */
+
+ rem = pd->vco_clock % VCO_REF_CLOCK_RATE;
+ if (rem) {
+ refclk_cfg = 0x1;
+ frac_n_mode = 1;
+ ref_doubler_en_b = 0;
+ } else {
+ refclk_cfg = 0x0;
+ frac_n_mode = 0;
+ ref_doubler_en_b = 1;
+ }
+
+ ref_clk_to_pll = (VCO_REF_CLOCK_RATE * 2 * refclk_cfg)
+ + (ref_doubler_en_b * VCO_REF_CLOCK_RATE);
+
+ vco_clock = ((uint64_t) pd->vco_clock) * FRAC_DIVIDER;
+
+ div_fbx = vco_clock / ref_clk_to_pll;
+
+ rem = (uint32_t) (div_fbx % FRAC_DIVIDER);
+ rem = rem * (1 << 16);
+ frac_n_value = rem / FRAC_DIVIDER;
+
+ divider = pd->vco_clock / ref_clk_to_pll;
+ div_fbx *= ref_clk_to_pll;
+ gen_vco_clk = div_fbx / FRAC_DIVIDER;
+
+ if (frac_n_mode) {
+ sdm_cfg0 = 0x0;
+ sdm_cfg1 = (divider & 0x3f) - 1;
+ sdm_cfg3 = frac_n_value / 256;
+ sdm_cfg2 = frac_n_value % 256;
+ } else {
+ sdm_cfg0 = (0x1 << 5);
+ sdm_cfg0 |= (divider & 0x3f) - 1;
+ sdm_cfg1 = 0x0;
+ sdm_cfg2 = 0;
+ sdm_cfg3 = 0;
+ }
+
+ cal_cfg11 = gen_vco_clk / 256000000;
+ cal_cfg10 = (gen_vco_clk % 256000000) / 1000000;
+
+ writel(sdm_cfg1 , MIPI_DSI_BASE + 0x023c); /* SDM CFG1 */
+ writel(sdm_cfg2 , MIPI_DSI_BASE + 0x0240); /* SDM CFG2 */
+ writel(sdm_cfg3 , MIPI_DSI_BASE + 0x0244); /* SDM CFG3 */
+ writel(0x00, MIPI_DSI_BASE + 0x0248); /* SDM CFG4 */
+
+ udelay(10);
+
+ writel(refclk_cfg, MIPI_DSI_BASE + 0x0200); /* REFCLK CFG */
+ writel(0x00, MIPI_DSI_BASE + 0x0214); /* PWRGEN CFG */
+ writel(0x71, MIPI_DSI_BASE + 0x020c); /* VCOLPF CFG */
+ writel(pd->directpath, MIPI_DSI_BASE + 0x0210); /* VREG CFG */
+ writel(sdm_cfg0, MIPI_DSI_BASE + 0x0238); /* SDM CFG0 */
+
+ writel(0x0a, MIPI_DSI_BASE + 0x026c); /* CAL CFG0 */
+ writel(0x30, MIPI_DSI_BASE + 0x0284); /* CAL CFG6 */
+ writel(0x00, MIPI_DSI_BASE + 0x0288); /* CAL CFG7 */
+ writel(0x60, MIPI_DSI_BASE + 0x028c); /* CAL CFG8 */
+ writel(0x00, MIPI_DSI_BASE + 0x0290); /* CAL CFG9 */
+ writel(cal_cfg10, MIPI_DSI_BASE + 0x0294); /* CAL CFG10 */
+ writel(cal_cfg11, MIPI_DSI_BASE + 0x0298); /* CAL CFG11 */
+ writel(0x20, MIPI_DSI_BASE + 0x029c); /* EFUSE CFG */
+
+ dsi_pll_enable_seq();
+}
diff --git a/platform/msm_shared/mipi_dsi_phy.c b/platform/msm_shared/mipi_dsi_phy.c
index ff7b443..e3a4527 100644
--- a/platform/msm_shared/mipi_dsi_phy.c
+++ b/platform/msm_shared/mipi_dsi_phy.c
@@ -408,6 +408,8 @@
writel(0x5F, ctl_base + off + (4 * 0));
off = 0x500;
+ /* use LDO mode */
+ writel(0x25, ctl_base + 0x4B0);
for (i = 0; i < 5; i++)
writel(pd->regulator[i], ctl_base + off + (4 * i));
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index d4b0bd4..cb00a3c 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -32,6 +32,7 @@
#include <reg.h>
#include <mmc_sdhci.h>
#include <sdhci.h>
+#include <sdhci_msm.h>
#include <partition_parser.h>
#include <platform/iomap.h>
#include <platform/timer.h>
@@ -85,8 +86,7 @@
mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
- if ((card->type == MMC_TYPE_SDHC)
- || (card->type == MMC_TYPE_STD_SD)) {
+ if (MMC_CARD_SD(card)) {
/* Parse CSD according to SD card spec. */
/* CSD register is little bit differnet for CSD version 2.0 High
@@ -133,7 +133,7 @@
mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
/* Calculate the card capcity */
- card->capacity = (1 + mmc_csd.c_size) * 512 * 1024;
+ card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
} else {
/* CSD Version 1.0 */
mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
@@ -177,7 +177,7 @@
/* Calculate the card capacity */
mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
- card->capacity = mmc_temp * mmc_csd.read_blk_len;
+ card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
}
} else {
/* Parse CSD according to MMC card spec. */
@@ -213,7 +213,7 @@
if (mmc_csd.c_size != 0xFFF) {
/* For cards less than or equal to 2GB */
mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
- card->capacity = mmc_temp * mmc_csd.read_blk_len;
+ card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
} else {
/* For cards greater than 2GB, Ext CSD register's SEC_COUNT
* is used to calculate the size.
@@ -224,7 +224,6 @@
| (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
| (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
| card->ext_csd[MMC_SEC_COUNT1];
-
card->capacity = sec_count * MMC_BLK_SZ;
}
}
@@ -234,22 +233,22 @@
sizeof(struct mmc_csd));
dprintf(SPEW, "Decoded CSD fields:\n");
- dprintf(SPEW, "cmmc_structure: %d\n", mmc_csd.cmmc_structure);
+ dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
- dprintf(SPEW, "write_blk_len: %d\n", mmc_csd.write_blk_len);
- dprintf(SPEW, "read_blk_len: %d\n", mmc_csd.read_blk_len);
- dprintf(SPEW, "r2w_factor: %d\n", mmc_csd.r2w_factor);
- dprintf(SPEW, "sector_size: %d\n", mmc_csd.sector_size);
- dprintf(SPEW, "c_size_mult:%d\n", mmc_csd.c_size_mult);
- dprintf(SPEW, "c_size: %d\n", mmc_csd.c_size);
- dprintf(SPEW, "nsac_clk_cycle: %d\n", mmc_csd.nsac_clk_cycle);
- dprintf(SPEW, "taac_ns: %d\n", mmc_csd.taac_ns);
- dprintf(SPEW, "tran_speed: %d kbps\n", mmc_csd.tran_speed);
- dprintf(SPEW, "erase_blk_len: %d\n", mmc_csd.erase_blk_len);
- dprintf(SPEW, "read_blk_misalign: %d\n", mmc_csd.read_blk_misalign);
- dprintf(SPEW, "write_blk_misalign: %d\n", mmc_csd.write_blk_misalign);
- dprintf(SPEW, "read_blk_partial: %d\n", mmc_csd.read_blk_partial);
- dprintf(SPEW, "write_blk_partial: %d\n", mmc_csd.write_blk_partial);
+ dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
+ dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
+ dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
+ dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
+ dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
+ dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
+ dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
+ dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
+ dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
+ dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
+ dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
+ dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
+ dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
+ dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
return 0;
@@ -274,8 +273,7 @@
mmc_sizeof = sizeof(uint32_t) * 8;
- if ((card->type == MMC_TYPE_SDHC) ||
- (card->type == MMC_TYPE_STD_SD)) {
+ if (MMC_CARD_SD(card)) {
mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
@@ -467,8 +465,7 @@
/* CMD3 Format:
* [31:0] stuff bits
*/
- if (card->type == MMC_TYPE_SDHC ||
- card->type == MMC_TYPE_STD_SD) {
+ if (MMC_CARD_SD(card)) {
cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
cmd.argument = 0;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
@@ -535,14 +532,13 @@
/*
* Function: mmc select card
- * Arg : host, card structure & RCA
+ * Arg : host, card structure
* Return : 0 on Success, 1 on Failure
* Flow : Selects a card by sending CMD7 to the card with its RCA.
* If RCA field is set as 0 ( or any other address ),
* the card will be de-selected. (CMD7)
*/
-static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card,
- uint32_t rca)
+static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
{
struct mmc_command cmd;
uint32_t mmc_arg = 0;
@@ -554,16 +550,15 @@
* [31:16] RCA
* [15:0] stuff bits
*/
- mmc_arg |= rca << 16;
+ mmc_arg |= card->rca << 16;
cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
cmd.argument = mmc_arg;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
/* If we are deselecting card, we do not get response */
- if (rca == card->rca && rca) {
- if (card->type == MMC_TYPE_SDHC ||
- card->type == MMC_TYPE_STD_SD)
+ if (card->rca) {
+ if (MMC_CARD_SD(card))
cmd.resp_type = SDHCI_CMD_RESP_R1B;
else
cmd.resp_type = SDHCI_CMD_RESP_R1;
@@ -896,10 +891,27 @@
struct sdhci_host *host;
struct mmc_config_data *cfg;
+ struct sdhci_msm_data data;
+
+ event_t sdhc_event;
host = &dev->host;
cfg = &dev->config;
+ event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
+
+ host->base = cfg->sdhc_base;
+ host->sdhc_event = &sdhc_event;
+
+ data.sdhc_event = &sdhc_event;
+ data.pwrctl_base = cfg->pwrctl_base;
+ data.pwr_irq = cfg->pwr_irq;
+
+ /*
+ * MSM specific sdhc init
+ */
+ sdhci_msm_init(&data);
+
/*
* Initialize the controller, read the host capabilities
* set power on mode
@@ -953,7 +965,7 @@
}
/* Select the card (CMD7) */
- mmc_return = mmc_select_card(host, card, card->rca);
+ mmc_return = mmc_select_card(host, card);
if (mmc_return) {
dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
return mmc_return;
@@ -989,6 +1001,7 @@
* Send CMD1 to identify and reject cards that do not match host's VDD range
* profile. Cards sends its OCR register in response.
*/
+
mmc_return = mmc_send_op_cond(host, card);
/* OCR is not received, init could not complete */
@@ -1000,6 +1013,257 @@
return 0;
}
+static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
+{
+ struct mmc_command cmd = {0};
+
+ cmd.cmd_index = CMD55_APP_CMD;
+ cmd.argument = (card->rca << 16);
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+
+ if (sdhci_send_command(host, &cmd))
+ {
+ dprintf(CRITICAL, "Failed Sending CMD55\n");
+ return 1;
+ }
+ return 0;
+}
+
+uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
+{
+ uint8_t i;
+ uint32_t mmc_ret;
+ struct mmc_command cmd;
+
+ memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
+
+ /* Use the SD card RCA 0x0 during init */
+ card->rca = SD_CARD_RCA;
+
+ /* Send CMD8 for voltage check*/
+ for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
+ {
+ cmd.cmd_index = CMD8_SEND_IF_COND;
+ cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R7;
+
+ if (sdhci_send_command(host, &cmd))
+ {
+ dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
+ return 1;
+ }
+ else
+ {
+ /* If the command response echos the voltage back */
+ if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
+ break;
+ }
+ /* As per SDCC the spec try for max three times with
+ * 1 ms delay
+ */
+ mdelay(1);
+ }
+
+ if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
+ {
+ dprintf(CRITICAL, "Error: CMD8 response timed out\n");
+ return 1;
+ }
+
+ /* Send ACMD41 for OCR */
+ for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
+ {
+ /* Send APP_CMD before ACMD41*/
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ /* APP_CMD is successful, send ACMD41 now */
+ cmd.cmd_index = ACMD41_SEND_OP_COND;
+ cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R3;
+
+ if (sdhci_send_command(host, &cmd))
+ {
+ dprintf(CRITICAL, "Failure sending ACMD41\n");
+ return 1;
+ }
+ else
+ {
+ if (cmd.resp[0] & MMC_SD_DEV_READY)
+ {
+ if (cmd.resp[0] & (1 << 30))
+ card->type = MMC_CARD_TYPE_SDHC;
+ else
+ card->type = MMC_CARD_TYPE_STD_SD;
+
+ break;
+ }
+ }
+ /*
+ * As per SDCC spec try for max 1 second
+ */
+ mdelay(50);
+ }
+
+ if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
+ {
+ dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+/*
+ * Function to read SD card information from SD status
+ */
+static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
+{
+ BUF_DMA_ALIGN(raw_sd_status, 64);
+ struct mmc_command cmd = {0};
+ uint32_t sd_status[16];
+ uint32_t *status = sd_status;
+ uint32_t au_size;
+ int i;
+ int j;
+
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ cmd.cmd_index = ACMD13_SEND_SD_STATUS;
+ cmd.argument = 0x0;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R2;
+ cmd.trans_mode = SDHCI_MMC_READ;
+ cmd.data_present = 0x1;
+ cmd.data.data_ptr = raw_sd_status;
+ cmd.data.num_blocks = 0x1;
+ cmd.data.blk_sz = 0x40;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ memcpy(sd_status, raw_sd_status, sizeof(sd_status));
+
+ for (i = 15, j = 0; i >=0 ; i--, j++)
+ sd_status[i] = swap_endian32(sd_status[j]);
+
+ au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
+ /* Card AU size in sectors */
+ card->ssr.au_size = 1 << (au_size + 4);
+ card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
+
+ return 0;
+}
+
+/*
+ * Function to read the SD CARD configuration register
+ */
+static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
+{
+ BUF_DMA_ALIGN(scr_resp, 8);
+ struct mmc_command cmd = {0};
+ uint32_t raw_scr[2];
+
+ /* Now read the SCR register */
+ /* Send APP_CMD before ACMD51*/
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ cmd.cmd_index = ACMD51_READ_CARD_SCR;
+ cmd.argument = 0x0;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+ cmd.trans_mode = SDHCI_MMC_READ;
+ cmd.data_present = 0x1;
+ cmd.data.data_ptr = scr_resp;
+ cmd.data.num_blocks = 0x1;
+ cmd.data.blk_sz = 0x8;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ memcpy(raw_scr, scr_resp, sizeof(raw_scr));
+
+ card->raw_scr[0] = swap_endian32(raw_scr[0]);
+ card->raw_scr[1] = swap_endian32(raw_scr[1]);
+
+ /*
+ * Parse & Populate the SCR data as per sdcc spec
+ */
+ card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
+ card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
+ card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
+ card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
+
+ return 0;
+}
+
+/*
+ * Function: mmc_set_sd_bus_width
+ * Arg : host, device structure & width
+ * Return : 0 on Success, 1 on Failure
+ * Flow : Set the bus width for the card
+ */
+uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
+{
+ struct mmc_command cmd = {0};
+
+ /* Send APP_CMD before ACMD6*/
+ if (mmc_send_app_cmd(host, card))
+ {
+ dprintf(CRITICAL, "Failed sending App command\n");
+ return 1;
+ }
+
+ cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
+ cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ return 0;
+}
+
+uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
+{
+ struct mmc_command cmd = {0};
+ BUF_DMA_ALIGN(switch_resp, 64);
+
+ cmd.cmd_index = CMD6_SWITCH_FUNC;
+ cmd.argument = MMC_SD_SWITCH_HS;
+ cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
+ cmd.resp_type = SDHCI_CMD_RESP_R1;
+ cmd.trans_mode = SDHCI_MMC_READ;
+ cmd.data_present = 0x1;
+ cmd.data.data_ptr = switch_resp;
+ cmd.data.num_blocks = 0x1;
+ cmd.data.blk_sz = 0x40;
+
+ /* send command */
+ if (sdhci_send_command(host, &cmd))
+ return 1;
+
+ return 0;
+}
+
/*
* Function: mmc_init_card
* Arg : mmc device structure
@@ -1028,10 +1292,19 @@
/* TODO: Get the OCR params from target */
card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
- /* Reset the card & get the OCR */
+ /* Initialize the internal MMC */
mmc_return = mmc_reset_card_and_send_op(host, card);
if (mmc_return)
- return mmc_return;
+ {
+ dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
+ /* Reset the card & get the OCR */
+ mmc_return = mmc_sd_card_init(host, card);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to initialize SD card\n");
+ return mmc_return;
+ }
+ }
/* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
mmc_return = mmc_identify_card(host, card);
@@ -1039,18 +1312,30 @@
return mmc_return;
/* set interface speed */
- mmc_return = mmc_set_hs_interface(host, card);
- if (mmc_return) {
- dprintf(CRITICAL, "Error adjusting interface speed!\n");
- return mmc_return;
+ if (MMC_CARD_SD(card))
+ {
+ mmc_return = mmc_sd_set_hs(host, card);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to set HS for SD card\n");
+ return mmc_return;
+ }
+ }
+ else
+ {
+ mmc_return = mmc_set_hs_interface(host, card);
+ if (mmc_return) {
+ dprintf(CRITICAL, "Error adjusting interface speed!\n");
+ return mmc_return;
+ }
}
/* Set the sdcc clock to 50 MHZ */
sdhci_clk_supply(host, SDHCI_CLK_50MHZ);
/* Now get the extended CSD for the card */
- if ((card->type == MMC_TYPE_STD_MMC) ||
- (card->type == MMC_TYPE_MMCHC)) {
+ if (MMC_CARD_MMC(card))
+ {
/* For MMC cards, also get the extended csd */
mmc_return = mmc_get_ext_csd(host, card);
@@ -1059,6 +1344,21 @@
return mmc_return;
}
}
+ else
+ {
+ /*Read SCR for sd card */
+ if (mmc_sd_get_card_scr(host, card))
+ {
+ dprintf(CRITICAL, "Failure getting card's SCR register\n");
+ return 1;
+ }
+ /* Read SSR for the SD card */
+ if (mmc_sd_get_card_ssr(host, card))
+ {
+ dprintf(CRITICAL, "Failed to get SSR from the card\n");
+ return 1;
+ }
+ }
/* Decode and save the CSD register */
mmc_return = mmc_decode_and_save_csd(card);
@@ -1068,53 +1368,79 @@
}
- /* Set the bus width based on host, target capbilities */
- if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
- bus_width = DATA_BUS_WIDTH_8BIT;
- /*
- * Host contoller by default supports 4 bit & 1 bit mode.
- * No need to check for host support here
- */
- else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
- bus_width = DATA_BUS_WIDTH_4BIT;
+ if (MMC_CARD_MMC(card))
+ {
+ /* Set the bus width based on host, target capbilities */
+ if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
+ bus_width = DATA_BUS_WIDTH_8BIT;
+ /*
+ * Host contoller by default supports 4 bit & 1 bit mode.
+ * No need to check for host support here
+ */
+ else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
+ bus_width = DATA_BUS_WIDTH_4BIT;
+ else
+ bus_width = DATA_BUS_WIDTH_1BIT;
+
+ /* Set 4/8 bit SDR bus width in controller */
+ mmc_return = sdhci_set_bus_width(host, bus_width);
+
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failed to set bus width for host controller\n");
+ return 1;
+ }
+
+ /* Enable high speed mode in the follwing order:
+ * 1. HS200 mode if supported by host & card
+ * 2. DDR mode host, if supported by host & card
+ * 3. Use normal speed mode with supported bus width
+ */
+ if (mmc_card_supports_hs200_mode(card) && host->caps.sdr50_support) {
+ mmc_return = mmc_set_hs200_mode(host, card, bus_width);
+
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
+ card->rca);
+ return mmc_return;
+ }
+ } else if (mmc_card_supports_ddr_mode(card) && host->caps.ddr_support) {
+ mmc_return = mmc_set_ddr_mode(host, card);
+
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
+ card->rca);
+ return mmc_return;
+ }
+ } else {
+ /* Set 4/8 bit bus width for the card */
+ mmc_return = mmc_set_bus_width(host, card, bus_width);
+ if (mmc_return) {
+ dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
+ card->rca);
+ return mmc_return;
+ }
+ }
+ }
else
+ {
+ /* Check the supported bus width for the card from SCR register */
+ if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
+ bus_width = DATA_BUS_WIDTH_4BIT;
+ else
bus_width = DATA_BUS_WIDTH_1BIT;
- /* Set 4/8 bit SDR bus width in controller */
- mmc_return = sdhci_set_bus_width(host, bus_width);
-
- if (mmc_return) {
- dprintf(CRITICAL, "Failed to set bus width for host controller\n");
- return 1;
- }
-
- /* Enable high speed mode in the follwing order:
- * 1. HS200 mode if supported by host & card
- * 2. DDR mode host, if supported by host & card
- * 3. Use normal speed mode with supported bus width
- */
- if (mmc_card_supports_hs200_mode(card) && host->caps.sdr50_support) {
- mmc_return = mmc_set_hs200_mode(host, card, bus_width);
-
- if (mmc_return) {
- dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
- card->rca);
+ mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to set bus width for the card\n");
return mmc_return;
}
- } else if (mmc_card_supports_ddr_mode(card) && host->caps.ddr_support) {
- mmc_return = mmc_set_ddr_mode(host, card);
- if (mmc_return) {
- dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
- card->rca);
- return mmc_return;
- }
- } else {
- /* Set 4/8 bit bus width for the card */
- mmc_return = mmc_set_bus_width(host, card, bus_width);
- if (mmc_return) {
- dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
- card->rca);
+ /* Set bit SDR bus width in controller */
+ mmc_return = sdhci_set_bus_width(host, bus_width);
+ if (mmc_return)
+ {
+ dprintf(CRITICAL, "Failed to set bus width for host controller\n");
return mmc_return;
}
}
@@ -1174,8 +1500,6 @@
memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
- dev->host.base = data->base;
-
/* Initialize the host & clock */
dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
@@ -1227,6 +1551,8 @@
cmd.resp_type = SDHCI_CMD_RESP_R1;
cmd.trans_mode = SDHCI_MMC_READ;
cmd.data_present = 0x1;
+ /* Use CMD23 If card supports cMD23 */
+ cmd.cmd23_support = dev->card.scr.cmd23_support;
cmd.data.data_ptr = dest;
cmd.data.num_blocks = num_blocks;
@@ -1284,6 +1610,8 @@
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
cmd.resp_type = SDHCI_CMD_RESP_R1;
cmd.trans_mode = SDHCI_MMC_WRITE;
+ /* Use CMD23 If card supports cMD23 */
+ cmd.cmd23_support = dev->card.scr.cmd23_support;
cmd.data_present = 0x1;
cmd.data.data_ptr = src;
cmd.data.num_blocks = num_blocks;
@@ -1320,10 +1648,15 @@
static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
{
struct mmc_command cmd;
+ struct mmc_card *card = &dev->card;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
- cmd.cmd_index = CMD35_ERASE_GROUP_START;
+ if (MMC_CARD_MMC(card))
+ cmd.cmd_index = CMD35_ERASE_GROUP_START;
+ else
+ cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
+
cmd.argument = erase_start;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
cmd.resp_type = SDHCI_CMD_RESP_R1;
@@ -1350,10 +1683,15 @@
static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
{
struct mmc_command cmd;
+ struct mmc_card *card = &dev->card;
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
- cmd.cmd_index = CMD36_ERASE_GROUP_END;
+ if (MMC_CARD_MMC(card))
+ cmd.cmd_index = CMD36_ERASE_GROUP_END;
+ else
+ cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
+
cmd.argument = erase_end;
cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
cmd.resp_type = SDHCI_CMD_RESP_R1;
@@ -1433,14 +1771,29 @@
uint32_t blk_end;
uint32_t num_erase_grps;
uint32_t *out;
+ struct mmc_card *card;
+
+
+ card = &dev->card;
/*
- * Calculate the erase unit size as per the emmc specification v4.5
+ * Calculate the erase unit size,
+ * 1. Based on emmc 4.5 spec for emmc card
+ * 2. Use SD Card Status info for SD cards
*/
- if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
- erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
+ if (MMC_CARD_MMC(card))
+ {
+ /*
+ * Calculate the erase unit size as per the emmc specification v4.5
+ */
+ if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
+ erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
+ else
+ erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
+ }
else
- erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
+ erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
+
/* Convert length in blocks */
len = len / MMC_BLK_SZ;
diff --git a/platform/msm_shared/partition_parser.c b/platform/msm_shared/partition_parser.c
index 881d2a0..5cca931 100644
--- a/platform/msm_shared/partition_parser.c
+++ b/platform/msm_shared/partition_parser.c
@@ -59,7 +59,7 @@
unsigned int vfat_count = 0;
struct partition_entry partition_entries[NUM_PARTITIONS];
-unsigned gpt_partitions_exist = 0;
+static unsigned gpt_partitions_exist = 0;
unsigned partition_count = 0;
unsigned int partition_read_table()
@@ -957,3 +957,8 @@
return 0;
}
+
+bool partition_gpt_exists()
+{
+ return (gpt_partitions_exist != 0);
+}
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index 6a386ce..16a498b 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -259,6 +259,7 @@
bam.pipe[DATA_PRODUCER_PIPE_INDEX].trans_type = BAM2SYS;
bam.pipe[DATA_PRODUCER_PIPE_INDEX].fifo.size = QPIC_BAM_DATA_FIFO_SIZE;
bam.pipe[DATA_PRODUCER_PIPE_INDEX].fifo.head = data_desc_fifo;
+ bam.pipe[DATA_PRODUCER_PIPE_INDEX].lock_grp = config->pipes.read_pipe_grp;
/* Set Write pipe params. */
bam.pipe[DATA_CONSUMER_PIPE_INDEX].pipe_num = config->pipes.write_pipe;
@@ -266,6 +267,7 @@
bam.pipe[DATA_CONSUMER_PIPE_INDEX].trans_type = SYS2BAM;
bam.pipe[DATA_CONSUMER_PIPE_INDEX].fifo.size = QPIC_BAM_DATA_FIFO_SIZE;
bam.pipe[DATA_CONSUMER_PIPE_INDEX].fifo.head = data_desc_fifo;
+ bam.pipe[DATA_CONSUMER_PIPE_INDEX].lock_grp = config->pipes.write_pipe_grp;
/* Set Cmd pipe params. */
bam.pipe[CMD_PIPE_INDEX].pipe_num = config->pipes.cmd_pipe;
@@ -273,6 +275,7 @@
bam.pipe[CMD_PIPE_INDEX].trans_type = BAM2SYS;
bam.pipe[CMD_PIPE_INDEX].fifo.size = QPIC_BAM_CMD_FIFO_SIZE;
bam.pipe[CMD_PIPE_INDEX].fifo.head = cmd_desc_fifo;
+ bam.pipe[CMD_PIPE_INDEX].lock_grp = config->pipes.cmd_pipe_grp;
/* Programs the threshold for BAM transfer
* When this threshold is reached, BAM signals the peripheral via the pipe_bytes_available
diff --git a/platform/msm_shared/qtimer.c b/platform/msm_shared/qtimer.c
index bf9de81..c8d6bd7 100644
--- a/platform/msm_shared/qtimer.c
+++ b/platform/msm_shared/qtimer.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -93,7 +93,7 @@
{
uint64_t ticks;
- ticks = (msecs * ticks_per_sec) / 1000;
+ ticks = ((uint64_t) msecs * ticks_per_sec) / 1000;
delay(ticks);
}
@@ -102,7 +102,7 @@
{
uint64_t ticks;
- ticks = (usecs * ticks_per_sec) / 1000000;
+ ticks = ((uint64_t) usecs * ticks_per_sec) / 1000000;
delay(ticks);
}
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
old mode 100644
new mode 100755
index 174ff38..f43f1f6
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -19,6 +19,7 @@
ifeq ($(ENABLE_SDHCI_SUPPORT),1)
OBJS += \
$(LOCAL_DIR)/sdhci.o \
+ $(LOCAL_DIR)/sdhci_msm.o \
$(LOCAL_DIR)/mmc_sdhci.o \
$(LOCAL_DIR)/mmc_wrapper.o
else
@@ -116,6 +117,7 @@
$(LOCAL_DIR)/display.o \
$(LOCAL_DIR)/mipi_dsi.o \
$(LOCAL_DIR)/mipi_dsi_phy.o \
+ $(LOCAL_DIR)/mipi_dsi_autopll.o \
$(LOCAL_DIR)/spmi.o \
$(LOCAL_DIR)/bam.o \
$(LOCAL_DIR)/qpic_nand.o \
@@ -163,7 +165,8 @@
$(LOCAL_DIR)/spmi.o \
$(LOCAL_DIR)/bam.o \
$(LOCAL_DIR)/qpic_nand.o \
- $(LOCAL_DIR)/dev_tree.o
+ $(LOCAL_DIR)/dev_tree.o \
+ $(LOCAL_DIR)/gpio.o
endif
ifeq ($(PLATFORM),msm7x27a)
diff --git a/platform/msm_shared/sdhci.c b/platform/msm_shared/sdhci.c
index 417e0eb..ce54433 100644
--- a/platform/msm_shared/sdhci.c
+++ b/platform/msm_shared/sdhci.c
@@ -40,41 +40,6 @@
/*
- * Function: sdhci int handler
- * Arg : Event argument
- * Return : 0
- * Flow: : 1. Read the power control mask register
- * 2. Check if bus is ON
- * 3. Write success to ack regiser
- * Details : This is power control interrupt handler.
- * Once we receive the interrupt, we will ack the power control
- * register that we have successfully completed pmic transactions
- */
-enum handler_return sdhci_int_handler(void *arg)
-{
- uint32_t ack;
- uint32_t status;
-
- /*
- * Read the mask register to check if BUS & IO level
- * interrupts are enabled
- */
- status = readl(SDCC_HC_PWRCTL_MASK_REG);
-
- if (status & (SDCC_HC_BUS_ON | SDCC_HC_BUS_OFF))
- ack = SDCC_HC_BUS_ON_OFF_SUCC;
- if (status & (SDCC_HC_IO_SIG_LOW | SDCC_HC_IO_SIG_HIGH))
- ack |= SDCC_HC_IO_SIG_SUCC;
-
- /* Write success to power control register */
- writel(ack, SDCC_HC_PWRCTL_CTL_REG);
-
- event_signal((event_t *)arg, false);
-
- return 0;
-}
-
-/*
* Function: sdhci error status enable
* Arg : Host structure
* Return : None
@@ -207,7 +172,7 @@
voltage = host->caps.voltage;
voltage <<= SDHCI_BUS_VOL_SEL;
- REG_WRITE8(host, voltage, SDHCI_BUS_PWR_EN);
+ REG_WRITE8(host, voltage, SDHCI_PWR_CTRL_REG);
voltage |= SDHCI_BUS_PWR_EN;
@@ -458,6 +423,8 @@
if (int_status & SDHCI_ERR_INT_STAT_MASK) {
if (sdhci_cmd_err_status(host)) {
dprintf(CRITICAL, "Error: Command completed with errors\n");
+ /* Reset the command & Data line */
+ REG_WRITE8(host, (SOFT_RESET_CMD | SOFT_RESET_DATA), SDHCI_RESET_REG);
return 1;
}
}
@@ -712,10 +679,16 @@
if (cmd->trans_mode == SDHCI_MMC_READ)
trans_mode |= SDHCI_READ_MODE;
- /* Enable auto cmd 23 for multi block transfer */
+ /* Enable auto cmd23 or cmd12 for multi block transfer
+ * based on what command card supports
+ */
if (cmd->data.num_blocks > 1) {
- trans_mode |= SDHCI_TRANS_MULTI | SDHCI_AUTO_CMD23_EN | SDHCI_BLK_CNT_EN;
- REG_WRITE32(host, cmd->data.num_blocks, SDHCI_ARG2_REG);
+ if (cmd->cmd23_support) {
+ trans_mode |= SDHCI_TRANS_MULTI | SDHCI_AUTO_CMD23_EN | SDHCI_BLK_CNT_EN;
+ REG_WRITE32(host, cmd->data.num_blocks, SDHCI_ARG2_REG);
+ }
+ else
+ trans_mode |= SDHCI_TRANS_MULTI | SDHCI_AUTO_CMD12_EN | SDHCI_BLK_CNT_EN;
}
}
@@ -763,20 +736,6 @@
}
/*
- * Function: sdhci mode enable
- * Arg : Flag (0/1)
- * Return : None
- * Flow: : Enable/Disable Sdhci mode
- */
-void sdhci_mode_enable(uint8_t enable)
-{
- if (enable)
- writel(SDHCI_HC_MODE_EN, SDCC_MCI_HC_MODE);
- else
- writel(SDHCI_HC_MODE_DIS, SDCC_MCI_HC_MODE);
-}
-
-/*
* Function: sdhci init
* Arg : Host structure
* Return : None
@@ -791,9 +750,6 @@
void sdhci_init(struct sdhci_host *host)
{
uint32_t caps[2];
- event_t sdhc_event;
-
- event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
/*
* Reset the controller
@@ -832,20 +788,11 @@
/* SDR50 mode support */
host->caps.sdr50_support = (caps[1] & SDHCI_SDR50_MODE_MASK) ? 1 : 0;
- /*
- * Register the interrupt handler for pwr irq
- */
- register_int_handler(SDCC_PWRCTRL_IRQ, sdhci_int_handler, &sdhc_event);
- unmask_interrupt(SDCC_PWRCTRL_IRQ);
-
- /* Enable pwr control interrupt */
- writel(SDCC_HC_PWR_CTRL_INT, SDCC_HC_PWRCTL_MASK_REG);
-
/* Set bus power on */
sdhci_set_bus_power_on(host);
/* Wait for power interrupt to be handled */
- event_wait(&sdhc_event);
+ event_wait(host->sdhc_event);
/* Set bus width */
sdhci_set_bus_width(host, SDHCI_BUS_WITDH_1BIT);
diff --git a/platform/msm_shared/sdhci_msm.c b/platform/msm_shared/sdhci_msm.c
new file mode 100644
index 0000000..1b6c8b0
--- /dev/null
+++ b/platform/msm_shared/sdhci_msm.c
@@ -0,0 +1,139 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <platform/iomap.h>
+#include <platform/irqs.h>
+#include <platform/interrupts.h>
+#include <platform/timer.h>
+#include <target.h>
+#include <string.h>
+#include <stdlib.h>
+#include <bits.h>
+#include <debug.h>
+#include <sdhci.h>
+#include <sdhci_msm.h>
+
+
+/*
+ * Function: sdhci int handler
+ * Arg : MSM specific data for sdhci
+ * Return : 0
+ * Flow: : 1. Read the power control mask register
+ * 2. Check if bus is ON
+ * 3. Write success to ack regiser
+ * Details : This is power control interrupt handler.
+ * Once we receive the interrupt, we will ack the power control
+ * register that we have successfully completed pmic transactions
+ */
+static enum handler_return sdhci_int_handler(struct sdhci_msm_data *data)
+{
+ uint32_t ack;
+ uint32_t status;
+
+ /*
+ * Read the mask register to check if BUS & IO level
+ * interrupts are enabled
+ */
+ status = readl(data->pwrctl_base + SDCC_HC_PWRCTL_MASK_REG);
+
+ if (status & (SDCC_HC_BUS_ON | SDCC_HC_BUS_OFF))
+ ack = SDCC_HC_BUS_ON_OFF_SUCC;
+ if (status & (SDCC_HC_IO_SIG_LOW | SDCC_HC_IO_SIG_HIGH))
+ ack |= SDCC_HC_IO_SIG_SUCC;
+
+ /* Write success to power control register */
+ writel(ack, (data->pwrctl_base + SDCC_HC_PWRCTL_CTL_REG));
+
+ event_signal(data->sdhc_event, false);
+
+ return 0;
+}
+
+/*
+ * Function: sdhci clear pending interrupts
+ * Arg : MSM specific data for sdhci
+ * Return : None
+ * Flow: : Clear pending interrupts
+ */
+static void sdhci_clear_power_ctrl_irq(struct sdhci_msm_data *data)
+{
+ uint32_t irq_ctl;
+ uint32_t irq_stat;
+
+ /*
+ * Read the power control status register to know
+ * the status of BUS & IO_HIGH_V
+ */
+ irq_stat = readl(data->pwrctl_base + SDCC_HC_PWRCTL_STATUS_REG);
+
+ /* Clear the power control status */
+ writel(irq_stat, (data->pwrctl_base + SDCC_HC_PWRCTL_CLEAR_REG));
+
+ /*
+ * Handle the pending irq by ack'ing the bus & IO switch
+ */
+ irq_ctl = readl(data->pwrctl_base + SDCC_HC_PWRCTL_CTL_REG);
+
+ if (irq_stat & (SDCC_HC_BUS_ON | SDCC_HC_BUS_OFF))
+ irq_ctl |= SDCC_HC_BUS_ON_OFF_SUCC;
+ if (irq_stat & (SDCC_HC_IO_SIG_LOW | SDCC_HC_IO_SIG_HIGH))
+ irq_ctl |= SDCC_HC_IO_SIG_SUCC;
+
+ writel(irq_ctl, (data->pwrctl_base + SDCC_HC_PWRCTL_CTL_REG));
+}
+
+/*
+ * Function: sdhci msm init
+ * Arg : MSM specific config data for sdhci
+ * Return : None
+ * Flow: : Enable sdhci mode & do msm specific init
+ */
+void sdhci_msm_init(struct sdhci_msm_data *config)
+{
+ /* Enable sdhc mode */
+ writel(SDHCI_HC_MODE_EN, (config->pwrctl_base + SDCC_MCI_HC_MODE));
+
+ /*
+ * CORE_SW_RST may trigger power irq if previous status of PWRCTL
+ * was either BUS_ON or IO_HIGH. So before we enable the power irq
+ * interrupt in GIC (by registering the interrupt handler), we need to
+ * ensure that any pending power irq interrupt status is acknowledged
+ * otherwise power irq interrupt handler would be fired prematurely.
+ */
+ sdhci_clear_power_ctrl_irq(config);
+
+ /*
+ * Register the interrupt handler for pwr irq
+ */
+ register_int_handler(config->pwr_irq, sdhci_int_handler, (void *)config);
+
+ unmask_interrupt(config->pwr_irq);
+
+ /* Enable pwr control interrupt */
+ writel(SDCC_HC_PWR_CTRL_INT, (config->pwrctl_base + SDCC_HC_PWRCTL_MASK_REG));
+}
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 3782c12..8ebbce8 100755
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -342,6 +342,7 @@
enum platform_subtype {
HW_PLATFORM_SUBTYPE_UNKNOWN = 0,
HW_PLATFORM_SUBTYPE_MDM = 1,
+ HW_PLATFORM_SUBTYPE_8974PRO_PM8084 = 1,
HW_PLATFORM_SUBTYPE_CSFB = 1,
HW_PLATFORM_SUBTYPE_SVLTE1 = 2,
HW_PLATFORM_SUBTYPE_SVLTE2A = 3,
diff --git a/project/msm8610.mk b/project/msm8610.mk
index 8d68d0a..02676ef 100644
--- a/project/msm8610.mk
+++ b/project/msm8610.mk
@@ -7,6 +7,7 @@
MODULES += app/aboot
DEBUG := 1
+ENABLE_SDHCI_SUPPORT := 1
#DEFINES += WITH_DEBUG_DCC=1
DEFINES += WITH_DEBUG_UART=1
@@ -20,3 +21,7 @@
#thumb interworking code for LK. Confirm that the issue
#is with the linker and file a bug report.
ENABLE_THUMB := false
+
+ifeq ($(ENABLE_SDHCI_SUPPORT),1)
+DEFINES += MMC_SDHCI_SUPPORT=1
+endif
diff --git a/target/mdm9625/init.c b/target/mdm9625/init.c
index ab9fd90..77f7331 100644
--- a/target/mdm9625/init.c
+++ b/target/mdm9625/init.c
@@ -54,6 +54,11 @@
#define DATA_PRODUCER_PIPE 1
#define CMD_PIPE 2
+/* NANDc BAM pipe groups */
+#define DATA_PRODUCER_PIPE_GRP 0
+#define DATA_CONSUMER_PIPE_GRP 0
+#define CMD_PIPE_GRP 1
+
/* NANDc EE */
#define QPIC_NAND_EE 0
@@ -122,6 +127,10 @@
config.pipes.write_pipe = DATA_CONSUMER_PIPE;
config.pipes.cmd_pipe = CMD_PIPE;
+ config.pipes.read_pipe_grp = DATA_PRODUCER_PIPE_GRP;
+ config.pipes.write_pipe_grp = DATA_CONSUMER_PIPE_GRP;
+ config.pipes.cmd_pipe_grp = CMD_PIPE_GRP;
+
config.bam_base = MSM_NAND_BAM_BASE;
config.nand_base = MSM_NAND_BASE;
config.ee = QPIC_NAND_EE;
diff --git a/target/msm8226/include/target/display.h b/target/msm8226/include/target/display.h
old mode 100644
new mode 100755
index d1d6932..bce13b8
--- a/target/msm8226/include/target/display.h
+++ b/target/msm8226/include/target/display.h
@@ -29,6 +29,80 @@
#ifndef _TARGET_MSM8226_DISPLAY_H
#define _TARGET_MSM8226_DISPLAY_H
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include <display_resource.h>
+
+/*---------------------------------------------------------------------------*/
+/* GPIO configuration */
+/*---------------------------------------------------------------------------*/
+static struct gpio_pin reset_gpio = {
+ "msmgpio", 25, 3, 1, 0, 1
+};
+
+static struct gpio_pin enable_gpio = {
+ 0, 0, 0, 0, 0, 0
+};
+
+static struct gpio_pin te_gpio = {
+ 0, 0, 0, 0, 0, 0
+};
+
+static struct gpio_pin pwm_gpio = {
+ 0, 0, 0, 0, 0, 0
+};
+
+static struct panel_reset_sequence reset_sequence = {
+ { 1, 0, 1, }, { 20, 20, 20, }, 2
+};
+
+
+/*---------------------------------------------------------------------------*/
+/* LDO configuration */
+/*---------------------------------------------------------------------------*/
+static struct ldo_entry ldo_entry_array[] = {
+ { "vdd", 15, 0, 2800000, 100000, 100, 0, 20, 0, 20},
+{ "vddio", 8, 0, 1800000, 100000, 100, 0, 30, 0, 30},
+{ "vdda", 4, 1, 1200000, 100000, 100, 0, 20, 0, 30},
+};
+
+#define TOTAL_LDO_DEFINED 3
+
+/*---------------------------------------------------------------------------*/
+/* Target Physical configuration */
+/*---------------------------------------------------------------------------*/
+
+static const uint32_t panel_strength_ctrl[] = {
+ 0xff, 0x06
+};
+
+static const char panel_bist_ctrl[] = {
+ 0x00, 0x00, 0xb1, 0xff, 0x00, 0x00
+};
+
+static const uint32_t panel_regulator_settings[] = {
+ 0x07, 0x09, 0x03, 0x00, 0x20, 0x00, 0x01
+};
+
+static const char panel_lane_config[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x01, 0x97,
+ 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb
+};
+
+static const uint32_t panel_physical_ctrl[] = {
+ 0x5f, 0x00, 0x00, 0x10
+};
+
+/*---------------------------------------------------------------------------*/
+/* Other Configuration */
+/*---------------------------------------------------------------------------*/
+
+#define msm8226_DSI_FEATURE_ENABLE 0
+
#define MIPI_FB_ADDR 0x0D200000
#define MIPI_HSYNC_PULSE_WIDTH 12
@@ -41,4 +115,5 @@
extern int mdss_dsi_phy_init(struct mipi_dsi_panel_config *, uint32_t ctl_base);
extern int mdss_dsi_uniphy_pll_config(uint32_t ctl_base);
+int mdss_dsi_auto_pll_config(struct mipi_dsi_panel_config *);
#endif
diff --git a/target/msm8226/init.c b/target/msm8226/init.c
index 641a16f..dbd12d3 100644
--- a/target/msm8226/init.c
+++ b/target/msm8226/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <reg.h>
#include <target.h>
#include <platform.h>
@@ -55,6 +56,8 @@
#define CRYPTO_ENGINE_FIFO_SIZE 64
#define CRYPTO_ENGINE_READ_PIPE 3
#define CRYPTO_ENGINE_WRITE_PIPE 2
+#define CRYPTO_READ_PIPE_LOCK_GRP 0
+#define CRYPTO_WRITE_PIPE_LOCK_GRP 0
#define CRYPTO_ENGINE_CMD_ARRAY_SIZE 20
#define TLMM_VOL_UP_BTN_GPIO 106
@@ -65,9 +68,15 @@
HW_PLATFORM_SUBTYPE_SKUAB = 3,
};
+static uint32_t mmc_pwrctl_base[] =
+ { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE };
+
static uint32_t mmc_sdhci_base[] =
{ MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE, MSM_SDC3_SDHCI_BASE };
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ, SDCC3_PWRCTL_IRQ };
+
struct mmc_device *dev;
void target_early_init(void)
@@ -122,9 +131,11 @@
ce_params.bam_base = MSM_CE1_BAM_BASE;
/* Set up BAM config. */
- ce_params.bam_ee = CRYPTO_ENGINE_EE;
- ce_params.pipes.read_pipe = CRYPTO_ENGINE_READ_PIPE;
- ce_params.pipes.write_pipe = CRYPTO_ENGINE_WRITE_PIPE;
+ ce_params.bam_ee = CRYPTO_ENGINE_EE;
+ ce_params.pipes.read_pipe = CRYPTO_ENGINE_READ_PIPE;
+ ce_params.pipes.write_pipe = CRYPTO_ENGINE_WRITE_PIPE;
+ ce_params.pipes.read_pipe_grp = CRYPTO_READ_PIPE_LOCK_GRP;
+ ce_params.pipes.write_pipe_grp = CRYPTO_WRITE_PIPE_LOCK_GRP;
/* Assign buffer sizes. */
ce_params.num_ce = CRYPTO_ENGINE_CMD_ARRAY_SIZE;
@@ -136,27 +147,30 @@
void target_sdc_init()
{
- struct mmc_config_data config;
+ struct mmc_config_data config = {0};
/*
* Set drive strength & pull ctrl for emmc
*/
set_sdc_power_ctrl();
- /* Enable sdhci mode */
- sdhci_mode_enable(1);
-
config.bus_width = DATA_BUS_WIDTH_8BIT;
config.max_clk_rate = MMC_CLK_200MHZ;
/* Trying Slot 1*/
config.slot = 1;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
if (!(dev = mmc_init(&config)))
{
/* Trying Slot 2 next */
config.slot = 2;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
if (!(dev = mmc_init(&config))) {
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
@@ -348,17 +362,24 @@
unsigned target_pause_for_battery_charge(void)
{
+#if 0
uint8_t pon_reason = pm8x41_get_pon_reason();
-
- /* This function will always return 0 to facilitate
- * automated testing/reboot with usb connected.
- * uncomment if this feature is needed.
+ uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
+ dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
+ pon_reason, is_cold_boot);
+ /* In case of fastboot reboot,adb reboot or if we see the power key
+ * pressed we do not want go into charger mode.
+ * fastboot reboot is warm boot with PON hard reset bit not set
+ * adb reboot is a cold boot with PON hard reset bit set
*/
- /* if ((pon_reason == USB_CHG) || (pon_reason == DC_CHG))
- * return 1;
- */
-
- return 0;
+ if (is_cold_boot &&
+ (!(pon_reason & HARD_RST)) &&
+ (!(pon_reason & KPDPWR_N)) &&
+ ((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
+ return 1;
+ else
+#endif
+ return 0;
}
unsigned target_baseband()
diff --git a/target/msm8226/rules.mk b/target/msm8226/rules.mk
old mode 100644
new mode 100755
index 3b24362..0d338c8
--- a/target/msm8226/rules.mk
+++ b/target/msm8226/rules.mk
@@ -1,6 +1,7 @@
LOCAL_DIR := $(GET_LOCAL_DIR)
INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
+INCLUDES += -I$(LK_TOP_DIR)/dev/gcdb/display -I$(LK_TOP_DIR)/dev/gcdb/display/include
PLATFORM := msm8226
@@ -24,6 +25,7 @@
lib/ptable \
dev/pmic/pm8x41 \
dev/panel/msm \
+ dev/gcdb/display \
lib/libfdt
DEFINES += \
diff --git a/target/msm8226/target_display.c b/target/msm8226/target_display.c
old mode 100644
new mode 100755
index 5997291..2da792e
--- a/target/msm8226/target_display.c
+++ b/target/msm8226/target_display.c
@@ -29,7 +29,9 @@
#include <debug.h>
#include <smem.h>
+#include <err.h>
#include <msm_panel.h>
+#include <mipi_dsi.h>
#include <pm8x41.h>
#include <pm8x41_wled.h>
#include <board.h>
@@ -38,12 +40,7 @@
#include <platform/iomap.h>
#include <target/display.h>
-static struct msm_fb_panel_data panel;
-static uint8_t display_enable;
-
-extern int msm_display_init(struct msm_fb_panel_data *pdata);
-extern int msm_display_off();
-extern int mdss_dsi_uniphy_pll_config(uint32_t ctl_base);
+#include "include/display_resource.h"
static struct pm8x41_wled_data wled_ctrl = {
.mod_scheme = 0xC3,
@@ -55,8 +52,10 @@
.full_current_scale = 0x19
};
-static int msm8226_backlight_on()
+int target_backlight_ctrl(uint8_t enable)
{
+ dprintf(SPEW, "target_backlight_ctrl\n");
+
pm8x41_wled_config(&wled_ctrl);
pm8x41_wled_sink_control(1);
pm8x41_wled_iled_sync_control(1);
@@ -65,15 +64,20 @@
return 0;
}
-static int msm8226_mdss_dsi_panel_clock(uint8_t enable)
+int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
{
- dprintf(SPEW, "msm8226_mdss_dsi_panel_clock, enable = %d\n", enable);
+ struct mdss_dsi_pll_config *pll_data;
+ dprintf(SPEW, "target_panel_clock\n");
+
+ pll_data = pinfo->mipi.dsi_pll_config;
if (enable) {
mdp_gdsc_ctrl(enable);
mdp_clock_init();
- mdss_dsi_uniphy_pll_config(MIPI_DSI0_BASE);
- mmss_clock_init(0x100);
+ mdss_dsi_auto_pll_config(pll_data);
+ mmss_clock_auto_pll_init(pll_data->pclk_m,
+ pll_data->pclk_n,
+ pll_data->pclk_d);
} else if(!target_cont_splash_screen()) {
/* Add here for non-continuous splash */
/* FIXME:Need to disable the clocks.
@@ -85,100 +89,65 @@
return 0;
}
-static void msm8226_mdss_mipi_panel_reset(int enable)
+int target_panel_reset(uint8_t enable,
+ struct gpio_pin *resetgpio,
+ struct gpio_pin *enablegpio,
+ struct panel_reset_sequence *resetseq)
{
- dprintf(SPEW, "msm8226_mdss_mipi_panel_reset, enable = %d\n", enable);
-
+ int ret = NO_ERROR;
if (enable) {
- gpio_tlmm_config(25, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
- gpio_set_dir(25, 2); //output
+ gpio_tlmm_config(resetgpio->pin_id, 0,
+ resetgpio->pin_direction, resetgpio->pin_pull,
+ resetgpio->pin_strength, resetgpio->pin_state);
- /* reset */
- gpio_set_value(25, 1);
- mdelay(20);
- gpio_set_value(25, 0);
- mdelay(20);
- gpio_set_value(25, 1);
- mdelay(20);
+ gpio_set_dir(resetgpio->pin_id, 2);
+
+ gpio_set_value(resetgpio->pin_id, resetseq->pin_state[0]);
+ mdelay(resetseq->sleep[0]);
+ gpio_set_value(resetgpio->pin_id, resetseq->pin_state[1]);
+ mdelay(resetseq->sleep[1]);
+ gpio_set_value(resetgpio->pin_id, resetseq->pin_state[2]);
+ mdelay(resetseq->sleep[2]);
} else if(!target_cont_splash_screen()) {
- gpio_set_value(25, 0);
+ gpio_set_value(resetgpio->pin_id, 0);
}
- return;
+ return ret;
}
-static int msm8226_mipi_panel_power(uint8_t enable)
+int target_ldo_ctrl(uint8_t enable, struct ldo_entry ldo_entry_array[],
+ uint8_t ldo_array_size)
{
- struct pm8x41_ldo ldo4 = LDO(PM8x41_LDO4, NLDO_TYPE);
- struct pm8x41_ldo ldo8 = LDO(PM8x41_LDO8, PLDO_TYPE);
- struct pm8x41_ldo ldo15 = LDO(PM8x41_LDO15, PLDO_TYPE);
+ uint32_t ret = NO_ERROR;
+ uint32_t ldocounter = 0;
+ uint32_t pm8x41_ldo_base = 0x13F00;
- dprintf(SPEW, "msm8226_mipi_panel_power, enable = %d\n", enable);
+ while (ldocounter < ldo_array_size) {
+ struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
+ 0x100 * ldo_entry_array[ldocounter].ldo_id),
+ ldo_entry_array[ldocounter].ldo_type);
- if (enable) {
- /* backlight */
- msm8226_backlight_on();
+ dprintf(SPEW, "Setting %s\n",
+ ldo_entry_array[ldocounter].ldo_id);
- pm8x41_ldo_set_voltage(&ldo15, 2800000);
- pm8x41_ldo_control(&ldo15, enable);
-
- pm8x41_ldo_set_voltage(&ldo8, 1800000);
- pm8x41_ldo_control(&ldo8, enable);
-
- pm8x41_ldo_set_voltage(&ldo4, 1200000);
- pm8x41_ldo_control(&ldo4, enable);
-
- /* reset */
- msm8226_mdss_mipi_panel_reset(enable);
- } else if(!target_cont_splash_screen()) {
- msm8226_mdss_mipi_panel_reset(enable);
- pm8x41_wled_enable(enable);
- pm8x41_ldo_control(&ldo4, enable);
- pm8x41_ldo_control(&ldo15, enable);
+ /* Set voltage during power on */
+ if (enable == 1) {
+ pm8x41_ldo_set_voltage(&ldo_entry,
+ ldo_entry_array[ldocounter].ldo_voltage);
+ }
+ pm8x41_ldo_control(&ldo_entry, enable);
+ ldocounter++;
}
- return 0;
+ return ret;
}
void display_init(void)
{
- uint32_t hw_id = board_hardware_id();
-
- dprintf(SPEW, "display_init(),target_id=%d.\n", hw_id);
-
- switch (hw_id) {
- case HW_PLATFORM_QRD:
- case HW_PLATFORM_MTP:
- case HW_PLATFORM_SURF:
-#if DISPLAY_TYPE_CMD_MODE
- mipi_nt35590_cmd_720p_init(&(panel.panel_info));
-#else
- mipi_nt35590_video_720p_init(&(panel.panel_info));
-#endif
- panel.clk_func = msm8226_mdss_dsi_panel_clock;
- panel.power_func = msm8226_mipi_panel_power;
- panel.fb.base = MIPI_FB_ADDR;
- panel.fb.width = panel.panel_info.xres;
- panel.fb.height = panel.panel_info.yres;
- panel.fb.stride = panel.panel_info.xres;
- panel.fb.bpp = panel.panel_info.bpp;
- panel.fb.format = FB_FORMAT_RGB888;
- panel.mdp_rev = MDP_REV_50;
- break;
- default:
- return;
- };
-
- if (msm_display_init(&panel)) {
- dprintf(CRITICAL, "Display init failed!\n");
- return;
- }
-
- display_enable = 1;
+ gcdb_display_init(MDP_REV_50, MIPI_FB_ADDR);
}
void display_shutdown(void)
{
- if (display_enable)
- msm_display_off();
+ gcdb_display_shutdown();
}
diff --git a/target/msm8610/init.c b/target/msm8610/init.c
index da32049..92c9855 100644
--- a/target/msm8610/init.c
+++ b/target/msm8610/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <reg.h>
#include <target.h>
#include <platform.h>
@@ -54,9 +55,19 @@
HW_PLATFORM_SUBTYPE_SKUAB = 3,
};
-static uint32_t mmc_sdc_base[] =
+static void set_sdc_power_ctrl(void);
+
+static uint32_t mmc_pwrctl_base[] =
{ MSM_SDC1_BASE, MSM_SDC2_BASE };
+static uint32_t mmc_sdhci_base[] =
+ { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
+
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
+
+struct mmc_device *dev;
+
void target_early_init(void)
{
#if WITH_DEBUG_UART
@@ -98,38 +109,60 @@
keys_post_event(KEY_VOLUMEUP, 1);
}
-void target_init(void)
+void target_sdc_init()
{
- uint32_t base_addr;
- uint8_t slot;
+ struct mmc_config_data config;
- dprintf(INFO, "target_init()\n");
-
- spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
-
- target_keystatus();
+ /* Set drive strength & pull ctrl values */
+ set_sdc_power_ctrl();
/* Display splash screen if enabled */
dprintf(SPEW, "Display Init: Start\n");
display_init();
dprintf(SPEW, "Display Init: Done\n");
- /* Trying Slot 1*/
- slot = 1;
- base_addr = mmc_sdc_base[slot - 1];
- if (mmc_boot_main(slot, base_addr))
+ config.bus_width = DATA_BUS_WIDTH_8BIT;
+ config.max_clk_rate = MMC_CLK_200MHZ;
+
+ /* Try slot 1*/
+ config.slot = 1;
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
+ if (!(dev = mmc_init(&config)))
{
- /* Trying Slot 2 next */
- slot = 2;
- base_addr = mmc_sdc_base[slot - 1];
+ /* Try slot 2 */
+ config.slot = 2;
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
- if (mmc_boot_main(slot, base_addr))
+ if (!(dev = mmc_init(&config)))
{
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
}
}
+
+ /* MMC initialization is complete, read the partition table info */
+ if (partition_read_table())
+ {
+ dprintf(CRITICAL, "Error reading the partition table info\n");
+ ASSERT(0);
+ }
+}
+
+void target_init(void)
+{
+ dprintf(INFO, "target_init()\n");
+
+ spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
+
+ target_keystatus();
+
+ target_sdc_init();
}
/* Do any target specific intialization needed before entering fastboot mode */
@@ -295,13 +328,30 @@
return 0;
}
-/*
- * Function to set the capabilities for the host
- */
-void target_mmc_caps(struct mmc_host *host)
+static void set_sdc_power_ctrl()
{
- host->caps.ddr_mode = 0;
- host->caps.hs200_mode = 0;
- host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
- host->caps.hs_clk_rate = MMC_CLK_50MHZ;
+ /* Drive strength configs for sdc pins */
+ struct tlmm_cfgs sdc1_hdrv_cfg[] =
+ {
+ { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK },
+ { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+ { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+ };
+
+ /* Pull configs for sdc pins */
+ struct tlmm_cfgs sdc1_pull_cfg[] =
+ {
+ { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK },
+ { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+ { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+ };
+
+ /* Set the drive strength & pull control values */
+ tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
+ tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
+}
+
+struct mmc_device *target_mmc_device()
+{
+ return dev;
}
diff --git a/target/msm8610/target_display.c b/target/msm8610/target_display.c
index 4904848..6316fa8 100644
--- a/target/msm8610/target_display.c
+++ b/target/msm8610/target_display.c
@@ -136,7 +136,6 @@
static int msm8610_mipi_panel_power(uint8_t enable)
{
int ret;
- struct pm8x41_ldo ldo4 = LDO(PM8x41_LDO4, NLDO_TYPE);
struct pm8x41_ldo ldo14 = LDO(PM8x41_LDO14, PLDO_TYPE);
struct pm8x41_ldo ldo19 = LDO(PM8x41_LDO19, PLDO_TYPE);
@@ -151,8 +150,6 @@
pm8x41_ldo_control(&ldo14, enable);
pm8x41_ldo_set_voltage(&ldo19, 2850000);
pm8x41_ldo_control(&ldo19, enable);
- pm8x41_ldo_set_voltage(&ldo4, 1200000);
- pm8x41_ldo_control(&ldo4, enable);
/* reset */
msm8610_mdss_mipi_panel_reset(enable);
@@ -162,7 +159,6 @@
pm8x41_ldo_control(&ldo19, enable);
pm8x41_ldo_control(&ldo14, enable);
- pm8x41_ldo_control(&ldo4, enable);
}
return 0;
}
diff --git a/target/msm8974/init.c b/target/msm8974/init.c
index 11a9967..b5fbf82 100644
--- a/target/msm8974/init.c
+++ b/target/msm8974/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <platform/gpio.h>
#include <reg.h>
#include <target.h>
@@ -70,6 +71,8 @@
#define CE_FIFO_SIZE 64
#define CE_READ_PIPE 3
#define CE_WRITE_PIPE 2
+#define CE_READ_PIPE_LOCK_GRP 0
+#define CE_WRITE_PIPE_LOCK_GRP 0
#define CE_ARRAY_SIZE 20
#ifdef SSD_ENABLE
@@ -77,6 +80,8 @@
#define SSD_PARTITION_SIZE 8192
#endif
+#define FASTBOOT_MODE 0x77665500
+
#define BOARD_SOC_VERSION1(soc_rev) (soc_rev >= 0x10000 && soc_rev < 0x20000)
#if MMC_SDHCI_SUPPORT
@@ -87,6 +92,9 @@
static uint32_t mmc_sdc_base[] =
{ MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE };
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ, SDCC3_PWRCTL_IRQ, SDCC4_PWRCTL_IRQ };
+
void target_early_init(void)
{
#if WITH_DEBUG_UART
@@ -174,9 +182,11 @@
ce_params.bam_base = MSM_CE2_BAM_BASE;
/* Set up BAM config. */
- ce_params.bam_ee = CE_EE;
- ce_params.pipes.read_pipe = CE_READ_PIPE;
- ce_params.pipes.write_pipe = CE_WRITE_PIPE;
+ ce_params.bam_ee = CE_EE;
+ ce_params.pipes.read_pipe = CE_READ_PIPE;
+ ce_params.pipes.write_pipe = CE_WRITE_PIPE;
+ ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
+ ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
/* Assign buffer sizes. */
ce_params.num_ce = CE_ARRAY_SIZE;
@@ -198,14 +208,11 @@
}
#if MMC_SDHCI_SUPPORT
-static target_mmc_sdhci_init()
+static void target_mmc_sdhci_init()
{
- struct mmc_config_data config;
+ struct mmc_config_data config = {0};
uint32_t soc_ver = 0;
- /* Enable sdhci mode */
- sdhci_mode_enable(1);
-
soc_ver = board_soc_version();
/*
@@ -228,12 +235,17 @@
/* Trying Slot 1*/
config.slot = 1;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_sdc_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
if (!(dev = mmc_init(&config))) {
/* Trying Slot 2 next */
config.slot = 2;
- config.base = mmc_sdhci_base[config.slot - 1];
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_sdc_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
if (!(dev = mmc_init(&config))) {
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
@@ -253,8 +265,9 @@
{
return dev;
}
+
#else
-static target_mmc_mci_init()
+static void target_mmc_mci_init()
{
uint32_t base_addr;
uint8_t slot;
@@ -416,10 +429,8 @@
*/
switch(platform_subtype) {
case HW_PLATFORM_SUBTYPE_UNKNOWN:
+ case HW_PLATFORM_SUBTYPE_8974PRO_PM8084:
break;
- case HW_PLATFORM_SUBTYPE_MDM:
- board->baseband = BASEBAND_MDM;
- return;
default:
dprintf(CRITICAL, "Platform Subtype : %u is not supported\n",platform_subtype);
ASSERT(0);
@@ -489,6 +500,7 @@
void reboot_device(unsigned reboot_reason)
{
uint32_t soc_ver = 0;
+ uint8_t reset_type = 0;
soc_ver = board_soc_version();
@@ -498,11 +510,16 @@
else
writel(reboot_reason, RESTART_REASON_ADDR_V2);
+ if(reboot_reason == FASTBOOT_MODE)
+ reset_type = PON_PSHOLD_WARM_RESET;
+ else
+ reset_type = PON_PSHOLD_HARD_RESET;
+
/* Configure PMIC for warm reset */
if (target_is_8974() && (pmic_ver == PM8X41_VERSION_V2))
- pm8x41_v2_reset_configure(PON_PSHOLD_WARM_RESET);
+ pm8x41_v2_reset_configure(reset_type);
else
- pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
+ pm8x41_reset_configure(reset_type);
/* Disable Watchdog Debug.
* Required becuase of a H/W bug which causes the system to
diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index 34650cc..d612015 100644
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -59,6 +59,18 @@
static int msm8974_backlight_on()
{
+ uint32_t platform_id = board_platform_id();
+ uint32_t hardware_id = board_hardware_id();
+ uint8_t slave_id = 1, i;
+ struct board_pmic_data *pmic_info;
+
+ if (platform_id == MSM8974AC)
+ if ((hardware_id == HW_PLATFORM_SURF)
+ || (hardware_id == HW_PLATFORM_MTP)
+ || (hardware_id == HW_PLATFORM_LIQUID))
+ slave_id = 3;
+
+ pm8x41_wled_config_slave_id(slave_id);
pm8x41_wled_config(&wled_ctrl);
pm8x41_wled_sink_control(1);
pm8x41_wled_iled_sync_control(1);
@@ -108,27 +120,40 @@
/* Pull DISP_RST_N high to get panel out of reset */
static void msm8974_mdss_mipi_panel_reset(uint8_t enable)
{
- struct pm8x41_gpio gpio19_param = {
+ uint32_t rst_gpio = 19;
+ uint32_t platform_id = board_platform_id();
+ uint32_t hardware_id = board_hardware_id();
+
+ struct pm8x41_gpio gpio_param = {
.direction = PM_GPIO_DIR_OUT,
.output_buffer = PM_GPIO_OUT_CMOS,
.out_strength = PM_GPIO_OUT_DRIVE_MED,
};
- pm8x41_gpio_config(19, &gpio19_param);
+ if (platform_id == MSM8974AC)
+ if ((hardware_id == HW_PLATFORM_SURF)
+ || (hardware_id == HW_PLATFORM_MTP)
+ || (hardware_id == HW_PLATFORM_LIQUID))
+ rst_gpio = 20;
+
+ dprintf(SPEW, "platform_id: %u, rst_gpio: %u\n",
+ platform_id, rst_gpio);
+
+ pm8x41_gpio_config(rst_gpio, &gpio_param);
if (enable) {
gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_HIGH);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_HIGH);
mdelay(2);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_LOW);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
mdelay(5);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_HIGH);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_HIGH);
mdelay(2);
gpio_set(58, 2);
} else {
- gpio19_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
- pm8x41_gpio_config(19, &gpio19_param);
- pm8x41_gpio_set(19, PM_GPIO_FUNC_LOW);
+ gpio_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
+ pm8x41_gpio_config(rst_gpio, &gpio_param);
+ pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
gpio_set(58, 2);
}
}