commit 6feb476eefc29d964752ba349b7677c320d6bc4a
author Linux Build Service Account <lnxbuild@localhost> Thu Apr 24 14:25:43 2014 -0700
committer Gerrit - the friendly Code Review server <code-review@localhost> Thu Apr 24 14:25:43 2014 -0700
tree f56a098e125543dc4f102165547fb1a2ab8a7142
parent bdbdff507da7aabfdb8c902f12120164c7313b2d
parent 7e9ce93dad4450cda462679359f0699c2a599aa3

Merge "target: Remove pll configuration for DSI1 PHY"

target/msm8974/target_display.c

diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index b8dc850..c89c483 100755
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -221,11 +221,6 @@
 		mdp_clock_init();
 		mdss_dsi_auto_pll_config(MIPI_DSI0_BASE, pll_data);
 		dsi_pll_enable_seq(MIPI_DSI0_BASE);
-		if (panel.panel_info.mipi.dual_dsi &&
-				!(panel.panel_info.mipi.broadcast)) {
-			mdss_dsi_auto_pll_config(MIPI_DSI1_BASE, pll_data);
-			dsi_pll_enable_seq(MIPI_DSI1_BASE);
-		}
 		mmss_clock_auto_pll_init(DSI0_PHY_PLL_OUT, dual_dsi,
 					pll_data->pclk_m,
 					pll_data->pclk_n,