Merge "platform: msm_shared: correct size check in menu detect" into lk.lnx.1.0-dev.1.0
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 5ef7764..c9a1bb6 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -1151,7 +1151,7 @@
* We would never reach this point if device is in fastboot mode, even if we did
* that means we are in test mode, so execute kernel authentication part for the
* tests */
- if((target_use_signed_kernel() && (!device.is_unlocked)) || boot_into_fastboot)
+ if((target_use_signed_kernel() && (!device.is_unlocked)) || is_test_mode_enabled())
{
offset = imagesize_actual;
if (check_aboot_addr_range_overlap((uint32_t)image_addr + offset, page_size))
@@ -1169,7 +1169,7 @@
verify_signed_bootimg((uint32_t)image_addr, imagesize_actual);
/* The purpose of our test is done here */
- if (boot_into_fastboot && auth_kernel_img)
+ if(is_test_mode_enabled() && auth_kernel_img)
return 0;
} else {
second_actual = ROUND_TO_PAGE(hdr->second_size, page_mask);
@@ -1468,6 +1468,12 @@
#if DEVICE_TREE
dt_actual = ROUND_TO_PAGE(hdr->dt_size, page_mask);
+
+ if (UINT_MAX < ((uint64_t)kernel_actual + (uint64_t)ramdisk_actual+ (uint64_t)dt_actual + page_size)) {
+ dprintf(CRITICAL, "Integer overflow detected in bootimage header fields\n");
+ return -1;
+ }
+
imagesize_actual = (page_size + kernel_actual + ramdisk_actual + dt_actual);
if (check_aboot_addr_range_overlap(hdr->tags_addr, hdr->dt_size))
@@ -1476,6 +1482,10 @@
return -1;
}
#else
+ if (UINT_MAX < ((uint64_t)kernel_actual + (uint64_t)ramdisk_actual+ page_size)) {
+ dprintf(CRITICAL, "Integer overflow detected in bootimage header fields\n");
+ return -1;
+ }
imagesize_actual = (page_size + kernel_actual + ramdisk_actual);
#endif
diff --git a/app/aboot/fastboot_test.c b/app/aboot/fastboot_test.c
index 5cad0b5..7941f61 100644
--- a/app/aboot/fastboot_test.c
+++ b/app/aboot/fastboot_test.c
@@ -45,11 +45,17 @@
extern int ufs_get_boot_lun();
extern int ufs_set_boot_lun(uint32_t bootlunid);
extern int fastboot_init();
+static bool enable_test_mode = false;
+
+bool is_test_mode_enabled(void)
+{
+ return enable_test_mode;
+}
void cmd_oem_runtests()
{
dprintf(INFO, "Running LK tests ... \n");
-
+ enable_test_mode = true;
// Test boot lun enable for UFS
if (!platform_boot_dev_isemmc())
{
@@ -118,4 +124,5 @@
printf_tests();
fastboot_okay("");
+ enable_test_mode = false;
}
diff --git a/app/aboot/fastboot_test.h b/app/aboot/fastboot_test.h
index 005bfa7..d20c01b 100644
--- a/app/aboot/fastboot_test.h
+++ b/app/aboot/fastboot_test.h
@@ -32,5 +32,14 @@
#include <sys/types.h>
extern void ramdump_table_map();
void cmd_oem_runtests();
+
+#if UNITTEST_FW_SUPPORT
+bool is_test_mode_enabled();
+#else
+bool is_test_mode_enabled()
+{
+ return false;
+}
+#endif
extern int boot_linux_from_mmc();
#endif
diff --git a/dev/gcdb/display/include/panel_adv7533_1080p60.h b/dev/gcdb/display/include/panel_adv7533_1080p60.h
old mode 100755
new mode 100644
index b5504c1..3e23ced
--- a/dev/gcdb/display/include/panel_adv7533_1080p60.h
+++ b/dev/gcdb/display/include/panel_adv7533_1080p60.h
@@ -38,7 +38,7 @@
/*---------------------------------------------------------------------------*/
static struct panel_config adv7533_1080p_video_panel_data = {
"qcom,mdss_dsi_adv7533_1080p", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, "NONE"
};
/*---------------------------------------------------------------------------*/
@@ -82,57 +82,57 @@
static struct mipi_dsi_i2c_cmd adv7533_1080p_tg_i2c_command[] = {
/*4 Lanes*/
- {ADV7533_CEC_DSI, 0x1C, 0x40},
+ {ADV7533_CEC_DSI, 0x1C, 0x40, 0},
/* hsync and vsync active low */
- {ADV7533_MAIN, 0x17, 0x02},
+ {ADV7533_MAIN, 0x17, 0x02, 0},
/* Control for Pixel Clock Divider */
- {ADV7533_CEC_DSI, 0x16, 0x00},
+ {ADV7533_CEC_DSI, 0x16, 0x00, 0},
/* Timing Generator Enable */
- {ADV7533_CEC_DSI, 0x27, 0xCB},
+ {ADV7533_CEC_DSI, 0x27, 0xCB, 0},
/* h_width 0x898 2200*/
- {ADV7533_CEC_DSI, 0x28, 0x89},
- {ADV7533_CEC_DSI, 0x29, 0x80},
+ {ADV7533_CEC_DSI, 0x28, 0x89, 0},
+ {ADV7533_CEC_DSI, 0x29, 0x80, 0},
/* hsync_width 0x2c 44*/
- {ADV7533_CEC_DSI, 0x2A, 0x02},
- {ADV7533_CEC_DSI, 0x2B, 0xC0},
+ {ADV7533_CEC_DSI, 0x2A, 0x02, 0},
+ {ADV7533_CEC_DSI, 0x2B, 0xC0, 0},
/* hfp 0x58 88 */
- {ADV7533_CEC_DSI, 0x2C, 0x05},
- {ADV7533_CEC_DSI, 0x2D, 0x80},
+ {ADV7533_CEC_DSI, 0x2C, 0x05, 0},
+ {ADV7533_CEC_DSI, 0x2D, 0x80, 0},
/* hbp 0x94 148 */
- {ADV7533_CEC_DSI, 0x2E, 0x09},
- {ADV7533_CEC_DSI, 0x2F, 0x40},
+ {ADV7533_CEC_DSI, 0x2E, 0x09, 0},
+ {ADV7533_CEC_DSI, 0x2F, 0x40, 0},
/* v_total 0x465 1125*/
- {ADV7533_CEC_DSI, 0x30, 0x46},
- {ADV7533_CEC_DSI, 0x31, 0x50},
+ {ADV7533_CEC_DSI, 0x30, 0x46, 0},
+ {ADV7533_CEC_DSI, 0x31, 0x50, 0},
/* vsync_width 0x05 5*/
- {ADV7533_CEC_DSI, 0x32, 0x00},
- {ADV7533_CEC_DSI, 0x33, 0x50},
+ {ADV7533_CEC_DSI, 0x32, 0x00, 0},
+ {ADV7533_CEC_DSI, 0x33, 0x50, 0},
/* vfp 0x04 4 */
- {ADV7533_CEC_DSI, 0x34, 0x00},
- {ADV7533_CEC_DSI, 0x35, 0x40},
+ {ADV7533_CEC_DSI, 0x34, 0x00, 0},
+ {ADV7533_CEC_DSI, 0x35, 0x40, 0},
/* vbp 0x24 36 */
- {ADV7533_CEC_DSI, 0x36, 0x02},
- {ADV7533_CEC_DSI, 0x37, 0x40},
+ {ADV7533_CEC_DSI, 0x36, 0x02, 0},
+ {ADV7533_CEC_DSI, 0x37, 0x40, 0},
/* Timing Generator Enable */
- {ADV7533_CEC_DSI, 0x27, 0xCB},
- {ADV7533_CEC_DSI, 0x27, 0x8B},
- {ADV7533_CEC_DSI, 0x27, 0xCB},
+ {ADV7533_CEC_DSI, 0x27, 0xCB, 0},
+ {ADV7533_CEC_DSI, 0x27, 0x8B, 0},
+ {ADV7533_CEC_DSI, 0x27, 0xCB, 0},
/* Reset Internal Timing Generator */
- {ADV7533_MAIN, 0xAF, 0x16},
+ {ADV7533_MAIN, 0xAF, 0x16, 0},
/* HDMI Mode Select */
- {ADV7533_CEC_DSI, 0x03, 0x89},
+ {ADV7533_CEC_DSI, 0x03, 0x89, 0},
/* HDMI Output Enable */
- {ADV7533_MAIN, 0x40, 0x80},
+ {ADV7533_MAIN, 0x40, 0x80, 0},
/* GC Packet Enable */
- {ADV7533_MAIN, 0x4C, 0x04},
+ {ADV7533_MAIN, 0x4C, 0x04, 0},
/* Colour Depth 24-bit per pixel */
- {ADV7533_MAIN, 0x49, 0x00},
+ {ADV7533_MAIN, 0x49, 0x00, 0},
/* Down Dither Output 8-bit Colour Depth */
- {ADV7533_CEC_DSI, 0x05, 0xF8},
+ {ADV7533_CEC_DSI, 0x05, 0xF8, 0},
/* ADI Required Write */
- {ADV7533_CEC_DSI, 0xBE, 0x3D},
+ {ADV7533_CEC_DSI, 0xBE, 0x3D, 0},
/* Test Pattern Disable (0x55[7] = 0) */
- {ADV7533_CEC_DSI, 0x55, 0x00},
+ {ADV7533_CEC_DSI, 0x55, 0x00, 0},
};
#define ADV7533_1080P_TG_COMMANDS 31
@@ -173,5 +173,13 @@
0x0, 0x04, 0x01, 0x27
};
+static const uint32_t adv7533_1080p_thulium_video_timings[] = {
+ 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
+ 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
+ 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
+ 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
+ 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
+};
+
#endif /*_PANEL_ADV7533_1080p60_H_*/
diff --git a/dev/gcdb/display/include/panel_adv7533_720p60.h b/dev/gcdb/display/include/panel_adv7533_720p60.h
index 568bf63..b194e43 100644
--- a/dev/gcdb/display/include/panel_adv7533_720p60.h
+++ b/dev/gcdb/display/include/panel_adv7533_720p60.h
@@ -39,7 +39,7 @@
/*---------------------------------------------------------------------------*/
static struct panel_config adv7533_720p_video_panel_data = {
"qcom,mdss_dsi_adv7533_720p", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, "NONE"
};
/*---------------------------------------------------------------------------*/
@@ -83,41 +83,41 @@
static struct mipi_dsi_i2c_cmd adv7533_720p_tg_i2c_command[] = {
/*3 Lanes*/
- {ADV7533_CEC_DSI, 0x1C, 0x30},
+ {ADV7533_CEC_DSI, 0x1C, 0x30, 0},
/* hsync and vsync active low */
- {ADV7533_MAIN, 0x17, 0x02},
+ {ADV7533_MAIN, 0x17, 0x02, 0},
/* Control for Pixel Clock Divider */
- {ADV7533_CEC_DSI, 0x16, 0x24},
+ {ADV7533_CEC_DSI, 0x16, 0x24, 0},
/* h_width 0x672 1650*/
- {ADV7533_CEC_DSI, 0x28, 0x67},
- {ADV7533_CEC_DSI, 0x29, 0x20},
+ {ADV7533_CEC_DSI, 0x28, 0x67, 0},
+ {ADV7533_CEC_DSI, 0x29, 0x20, 0},
/* hsync_width 0x28 40*/
- {ADV7533_CEC_DSI, 0x2A, 0x02},
- {ADV7533_CEC_DSI, 0x2B, 0x80},
+ {ADV7533_CEC_DSI, 0x2A, 0x02, 0},
+ {ADV7533_CEC_DSI, 0x2B, 0x80, 0},
/* hfp 0x6E 110 */
- {ADV7533_CEC_DSI, 0x2C, 0x06},
- {ADV7533_CEC_DSI, 0x2D, 0xE0},
+ {ADV7533_CEC_DSI, 0x2C, 0x06, 0},
+ {ADV7533_CEC_DSI, 0x2D, 0xE0, 0},
/* hbp 0xDC 220 */
- {ADV7533_CEC_DSI, 0x2E, 0x0D},
- {ADV7533_CEC_DSI, 0x2F, 0xC0},
+ {ADV7533_CEC_DSI, 0x2E, 0x0D, 0},
+ {ADV7533_CEC_DSI, 0x2F, 0xC0, 0},
/* v_total 0x2EE 750*/
- {ADV7533_CEC_DSI, 0x30, 0x2E},
- {ADV7533_CEC_DSI, 0x31, 0xE0},
+ {ADV7533_CEC_DSI, 0x30, 0x2E, 0},
+ {ADV7533_CEC_DSI, 0x31, 0xE0, 0},
/* vsync_width 0x05 5*/
- {ADV7533_CEC_DSI, 0x32, 0x00},
- {ADV7533_CEC_DSI, 0x33, 0x50},
+ {ADV7533_CEC_DSI, 0x32, 0x00, 0},
+ {ADV7533_CEC_DSI, 0x33, 0x50, 0},
/* vfp 0x05 5 */
- {ADV7533_CEC_DSI, 0x34, 0x00},
- {ADV7533_CEC_DSI, 0x35, 0x50},
+ {ADV7533_CEC_DSI, 0x34, 0x00, 0},
+ {ADV7533_CEC_DSI, 0x35, 0x50, 0},
/* vbp 0x14 20 */
- {ADV7533_CEC_DSI, 0x36, 0x01},
- {ADV7533_CEC_DSI, 0x37, 0x40},
+ {ADV7533_CEC_DSI, 0x36, 0x01, 0},
+ {ADV7533_CEC_DSI, 0x37, 0x40, 0},
/* Test Pattern Disable (0x55[7] = 0) */
- {ADV7533_CEC_DSI, 0x55, 0x00},
+ {ADV7533_CEC_DSI, 0x55, 0x00, 0},
/* HDMI disabled */
- {ADV7533_CEC_DSI, 0x03, 0x09},
+ {ADV7533_CEC_DSI, 0x03, 0x09, 0},
/* HDMI enabled */
- {ADV7533_CEC_DSI, 0x03, 0x89},
+ {ADV7533_CEC_DSI, 0x03, 0x89, 0},
};
#define ADV7533_720P_TG_COMMANDS 22
@@ -158,5 +158,13 @@
0x0, 0x04, 0x03, 0x20
};
+static const uint32_t adv7533_720p_thulium_video_timings[] = {
+ 0x1c, 0x19, 0x02, 0x03, 0x01, 0x03, 0x04, 0xa0,
+ 0x1c, 0x19, 0x02, 0x03, 0x01, 0x03, 0x04, 0xa0,
+ 0x1c, 0x19, 0x02, 0x03, 0x01, 0x03, 0x04, 0xa0,
+ 0x1c, 0x19, 0x02, 0x03, 0x01, 0x03, 0x04, 0xa0,
+ 0x1c, 0x08, 0x02, 0x03, 0x01, 0x03, 0x04, 0xa0,
+};
+
#endif /*_PANEL_ADV7533_720p60_H_*/
diff --git a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
old mode 100755
new mode 100644
index e96f540..16abf40
--- a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
+++ b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
@@ -145,4 +145,12 @@
BL_PWM, 1, 255, 0, 2, 0
};
+static const uint32_t hx8379a_truly_fwvga_thulium_video_timings[] = {
+ 0x23, 0x20, 0x06, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x20, 0x06, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x20, 0x06, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x20, 0x06, 0x09, 0x05, 0x03, 0x04, 0xa0,
+ 0x23, 0x2e, 0x06, 0x09, 0x05, 0x03, 0x04, 0xa0,
+};
+
#endif /*_PANEL_HX8379A_TRULY_FWVGA_VIDEO_H_*/
diff --git a/include/platform.h b/include/platform.h
index de6e544..31de506 100644
--- a/include/platform.h
+++ b/include/platform.h
@@ -1,7 +1,7 @@
/*
* Copyright (c) 2008 Travis Geiselbrecht
*
- * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files
@@ -66,6 +66,7 @@
int platform_is_msm8909();
int platform_is_msm8992();
int platform_is_msm8937();
+int platform_is_msmgold();
int platform_is_msm8956();
uint32_t platform_is_msm8976_v_1_1();
int boot_device_mask(int);
diff --git a/platform/msm8952/msm8952-clock.c b/platform/msm8952/msm8952-clock.c
index bf87489..ea142d7 100644
--- a/platform/msm8952/msm8952-clock.c
+++ b/platform/msm8952/msm8952-clock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -650,7 +650,7 @@
msm8976_v_1_1_sdcc_clock_modify();
}
- if (platform_is_msm8937())
+ if (platform_is_msm8937() || platform_is_msmgold())
msm8937_clock_override();
clk_init(msm_clocks_8952, ARRAY_SIZE(msm_clocks_8952));
diff --git a/platform/msm8952/platform.c b/platform/msm8952/platform.c
index 5eaa241..180d34b 100644
--- a/platform/msm8952/platform.c
+++ b/platform/msm8952/platform.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -177,6 +177,26 @@
return 256;
}
+int platform_is_msmgold()
+{
+ uint32_t platform = board_platform_id();
+ uint32_t ret = 0;
+
+ switch(platform)
+ {
+ case MSMGOLD:
+ case MSMGOLD2:
+ case MSMGOLD3:
+ case APQGOLD:
+ ret = 1;
+ break;
+ default:
+ ret = 0;
+ };
+
+ return ret;
+}
+
int platform_is_msm8937()
{
uint32_t platform = board_platform_id();
diff --git a/platform/msm8996/acpuclock.c b/platform/msm8996/acpuclock.c
index ffceba4..7ed7ff6 100644
--- a/platform/msm8996/acpuclock.c
+++ b/platform/msm8996/acpuclock.c
@@ -37,6 +37,8 @@
#include <pm8x41.h>
#include <rpm-smd.h>
#include <regulator.h>
+#include <blsp_qup.h>
+#include <err.h>
#define RPM_CE_CLK_TYPE 0x6563
#define CE1_CLK_ID 0x0
@@ -604,3 +606,51 @@
writel(0x0, DSI_PIXEL1_CBCR);
}
}
+
+
+void clock_config_blsp_i2c(uint8_t blsp_id, uint8_t qup_id)
+{
+ uint8_t ret = 0;
+ char clk_name[64];
+
+ struct clk *qup_clk;
+
+ if((blsp_id != BLSP_ID_2) || ((qup_id != QUP_ID_1) &&
+ (qup_id != QUP_ID_3))) {
+ dprintf(CRITICAL, "Incorrect BLSP-%d or QUP-%d configuration\n",
+ blsp_id, qup_id);
+ ASSERT(0);
+ }
+
+ if (qup_id == QUP_ID_1) {
+ snprintf(clk_name, sizeof(clk_name), "blsp2_qup2_ahb_iface_clk");
+ }
+ else if (qup_id == QUP_ID_3) {
+ snprintf(clk_name, sizeof(clk_name), "blsp1_qup4_ahb_iface_clk");
+ }
+
+ ret = clk_get_set_enable(clk_name, 0 , 1);
+ if (ret) {
+ dprintf(CRITICAL, "Failed to enable %s clock\n", clk_name);
+ return;
+ }
+
+ if (qup_id == QUP_ID_1) {
+ snprintf(clk_name, sizeof(clk_name), "gcc_blsp2_qup2_i2c_apps_clk");
+ }
+ else if (qup_id == QUP_ID_3) {
+ snprintf(clk_name, sizeof(clk_name), "gcc_blsp1_qup4_i2c_apps_clk");
+ }
+
+ qup_clk = clk_get(clk_name);
+ if (!qup_clk) {
+ dprintf(CRITICAL, "Failed to get %s\n", clk_name);
+ return;
+ }
+
+ ret = clk_enable(qup_clk);
+ if (ret) {
+ dprintf(CRITICAL, "Failed to enable %s\n", clk_name);
+ return;
+ }
+}
\ No newline at end of file
diff --git a/platform/msm8996/gpio.c b/platform/msm8996/gpio.c
index 281584f..ba369e4 100644
--- a/platform/msm8996/gpio.c
+++ b/platform/msm8996/gpio.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -30,6 +30,7 @@
#include <reg.h>
#include <platform/iomap.h>
#include <platform/gpio.h>
+#include <blsp_qup.h>
/* Remove the file after the gpio patch to move this to msm_shared gets merged. */
void gpio_tlmm_config(uint32_t gpio, uint8_t func,
@@ -62,3 +63,28 @@
gpio_tlmm_config(4, 2, GPIO_OUTPUT, GPIO_NO_PULL,
GPIO_8MA, GPIO_DISABLE);
}
+
+
+/* Configure gpios for blsp */
+void gpio_config_blsp_i2c(uint8_t blsp_id, uint8_t qup_id)
+{
+ if(blsp_id == BLSP_ID_2) {
+ switch (qup_id) {
+ case QUP_ID_1:
+ /* configure I2C SDA gpio */
+ gpio_tlmm_config(GPIO_BLSP2_ACTIVE_1, 3, GPIO_OUTPUT,
+ GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
+
+ /* configure I2C SCL gpio */
+ gpio_tlmm_config(GPIO_BLSP2_ACTIVE_2, 3, GPIO_OUTPUT,
+ GPIO_NO_PULL, GPIO_8MA, GPIO_DISABLE);
+ break;
+ default:
+ dprintf(CRITICAL, "Incorrect QUP id %d\n", qup_id);
+ ASSERT(0);
+ };
+ } else {
+ dprintf(CRITICAL, "Incorrect BLSP id %d\n",blsp_id);
+ ASSERT(0);
+ }
+}
diff --git a/platform/msm8996/include/platform/clock.h b/platform/msm8996/include/platform/clock.h
index 4ad790f..01a551e 100644
--- a/platform/msm8996/include/platform/clock.h
+++ b/platform/msm8996/include/platform/clock.h
@@ -123,5 +123,6 @@
void mmss_gdsc_disable();
void video_gdsc_enable();
void video_gdsc_disable();
+void clock_config_blsp_i2c(uint8_t blsp_id, uint8_t qup_id);
#endif
diff --git a/platform/msm8996/include/platform/gpio.h b/platform/msm8996/include/platform/gpio.h
index 4d9c650..9cf42f1 100644
--- a/platform/msm8996/include/platform/gpio.h
+++ b/platform/msm8996/include/platform/gpio.h
@@ -55,6 +55,9 @@
#define GPIO_ENABLE 0
#define GPIO_DISABLE 1
+#define GPIO_BLSP2_ACTIVE_1 6
+#define GPIO_BLSP2_ACTIVE_2 7
+
void gpio_config_uart_dm(uint8_t id);
void gpio_config_blsp_i2c(uint8_t, uint8_t);
void gpio_set(uint32_t gpio, uint32_t dir);
diff --git a/platform/msm8996/include/platform/iomap.h b/platform/msm8996/include/platform/iomap.h
index 50d2542..2fb9c8a 100644
--- a/platform/msm8996/include/platform/iomap.h
+++ b/platform/msm8996/include/platform/iomap.h
@@ -68,6 +68,13 @@
#define BLSP2_UART1_BASE (PERIPH_SS_BASE + 0x001B0000)
+/* I2C */
+#define BLSP_QUP_BASE(blsp_id, qup_id) (PERIPH_SS_BASE + ((blsp_id) - 1) * 0x100000 \
+ + 0xB5000 + 0x1000 * (qup_id))
+#define GCC_BLSP2_QUP2_APPS_CBCR (CLK_CTL_BASE + 0x28008)
+#define GCC_BLSP2_QUP2_CFG_RCGR (CLK_CTL_BASE + 0x28010)
+#define GCC_BLSP2_QUP2_CMD_RCGR (CLK_CTL_BASE + 0x2800C)
+
/* USB3.0 */
#define MSM_USB30_BASE 0x6A00000
#define MSM_USB30_QSCRATCH_BASE 0x6AF8800
diff --git a/platform/msm8996/include/platform/irqs.h b/platform/msm8996/include/platform/irqs.h
index ab5e2ff..61d267b 100644
--- a/platform/msm8996/include/platform/irqs.h
+++ b/platform/msm8996/include/platform/irqs.h
@@ -67,4 +67,6 @@
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + \
NR_BOARD_IRQS)
+#define BLSP_QUP_IRQ(blsp_id, qup_id) (GIC_SPI_START + 95 + blsp_id * \
+ 6 + qup_id)
#endif /* __IRQS_THULIUM_H */
diff --git a/platform/msm8996/msm8996-clock.c b/platform/msm8996/msm8996-clock.c
index 1d07cea..782a624 100644
--- a/platform/msm8996/msm8996-clock.c
+++ b/platform/msm8996/msm8996-clock.c
@@ -237,6 +237,40 @@
},
};
+static struct clk_freq_tbl ftbl_gcc_blsp1_qup2_i2c_apps_clk_src[] = {
+ F( 96000, cxo, 10, 1, 2),
+ F( 4800000, cxo, 4, 0, 0),
+ F( 9600000, cxo, 2, 0, 0),
+ F( 16000000, gpll0, 10, 1, 5),
+ F( 19200000, gpll0, 1, 0, 0),
+ F( 25000000, gpll0, 16, 1, 2),
+ F( 50000000, gpll0, 16, 0, 0),
+ F_END
+};
+
+static struct rcg_clk gcc_blsp2_qup2_i2c_apps_clk_src = {
+ .cmd_reg = (uint32_t *) GCC_BLSP2_QUP2_CMD_RCGR,
+ .cfg_reg = (uint32_t *) GCC_BLSP2_QUP2_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_qup2_i2c_apps_clk_src,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "gcc_blsp2_qup2_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup2_i2c_apps_clk = {
+ .cbcr_reg = (uint32_t *) GCC_BLSP2_QUP2_APPS_CBCR,
+ .parent = &gcc_blsp2_qup2_i2c_apps_clk_src.c,
+
+ .c = {
+ .dbg_name = "gcc_blsp2_qup2_i2c_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
/* SDCC Clocks */
static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] =
{
@@ -731,6 +765,13 @@
CLK_LOOKUP("mmss_mmagic_ahb_clk", mmss_mmagic_ahb_clk.c),
CLK_LOOKUP("smmu_mdp_ahb_clk", smmu_mdp_ahb_clk.c),
CLK_LOOKUP("mdp_ahb_clk", mdp_ahb_clk.c),
+
+ /* BLSP CLOCKS */
+ CLK_LOOKUP("blsp2_qup2_ahb_iface_clk", gcc_blsp2_ahb_clk.c),
+ CLK_LOOKUP("gcc_blsp2_qup2_i2c_apps_clk_src",
+ gcc_blsp2_qup2_i2c_apps_clk_src.c),
+ CLK_LOOKUP("gcc_blsp2_qup2_i2c_apps_clk",
+ gcc_blsp2_qup2_i2c_apps_clk.c),
};
void platform_clock_init(void)
diff --git a/platform/msm_shared/boot_verifier.c b/platform/msm_shared/boot_verifier.c
index 953e892..941bdaf 100644
--- a/platform/msm_shared/boot_verifier.c
+++ b/platform/msm_shared/boot_verifier.c
@@ -231,6 +231,7 @@
RSA *rsa = NULL;
bool keystore_verification = false;
EVP_PKEY* key = NULL;
+ int attr = 0;
if(!strcmp(pname, "keystore"))
keystore_verification = true;
@@ -271,8 +272,14 @@
if(!keystore_verification)
{
// verifying a non keystore partition
- img_size += add_attribute_to_img((unsigned char*)(img_addr + img_size),
+ attr = add_attribute_to_img((unsigned char*)(img_addr + img_size),
sig->auth_attr);
+ if (img_size > (UINT_MAX - attr))
+ {
+ dprintf(CRITICAL,"Interger overflow detected\n");
+ ASSERT(0);
+ }
+ else img_size += attr;
}
/* compare SHA256SUM of image with value in signature */
diff --git a/platform/msm_shared/hsusb.c b/platform/msm_shared/hsusb.c
index 6a8e9e6..5f8d3e4 100644
--- a/platform/msm_shared/hsusb.c
+++ b/platform/msm_shared/hsusb.c
@@ -906,6 +906,12 @@
/* create our configuration descriptor */
size = 9 + udc_ifc_desc_size(the_gadget);
desc = udc_descriptor_alloc(TYPE_CONFIGURATION, 0, size);
+ if(!desc)
+ {
+ dprintf(CRITICAL, "Failed to allocate device descriptor\n");
+ ASSERT(0);
+ }
+
data = desc->data;
data[0] = 0x09;
data[2] = size;
diff --git a/platform/msm_shared/include/blsp_qup.h b/platform/msm_shared/include/blsp_qup.h
index 4fc891c..41b7ab5 100644
--- a/platform/msm_shared/include/blsp_qup.h
+++ b/platform/msm_shared/include/blsp_qup.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013,2015, The Linux Foundation. All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
diff --git a/platform/msm_shared/include/i2c_qup.h b/platform/msm_shared/include/i2c_qup.h
index b5fd2bd..4105880 100644
--- a/platform/msm_shared/include/i2c_qup.h
+++ b/platform/msm_shared/include/i2c_qup.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2013,2015, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -192,9 +192,6 @@
#define EPROTONOSUPPORT 93
#define ETIMEDOUT 110
-#define FALSE 0
-#define TRUE 1
-
#define USEC_PER_SEC 1000000L
#define IRQF_TRIGGER_NONE 0x00000000
diff --git a/platform/msm_shared/include/mipi_dsi_i2c.h b/platform/msm_shared/include/mipi_dsi_i2c.h
index b67b977..09fd94a 100644
--- a/platform/msm_shared/include/mipi_dsi_i2c.h
+++ b/platform/msm_shared/include/mipi_dsi_i2c.h
@@ -36,6 +36,6 @@
int mipi_dsi_i2c_read_byte(uint8_t addr, uint8_t reg, uint8_t *buf);
int mipi_dsi_i2c_write_byte(uint8_t addr, uint8_t reg, uint8_t val);
int mipi_dsi_i2c_read(uint8_t addr, uint8_t reg, uint8_t *buf, uint8_t len);
-int mipi_dsi_i2c_device_init();
+int mipi_dsi_i2c_device_init(uint8_t blsp_id, uint8_t qup_id);
#endif /* __MIPI_DSI_I2C_H__ */
diff --git a/platform/msm_shared/mipi_dsi_i2c.c b/platform/msm_shared/mipi_dsi_i2c.c
index b8b690e..bf37090 100644
--- a/platform/msm_shared/mipi_dsi_i2c.c
+++ b/platform/msm_shared/mipi_dsi_i2c.c
@@ -87,9 +87,9 @@
return NO_ERROR;
}
-int mipi_dsi_i2c_device_init()
+int mipi_dsi_i2c_device_init(uint8_t blsp_id, uint8_t qup_id)
{
- i2c_dev = qup_blsp_i2c_init(BLSP_ID_1, QUP_ID_3,
+ i2c_dev = qup_blsp_i2c_init(blsp_id, qup_id,
I2C_CLK_FREQ, I2C_SRC_CLK_FREQ);
if(!i2c_dev) {
dprintf(CRITICAL, "mipi_dsi_i2c_device_init() failed\n");
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 05e9ede..5819d69 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -2,7 +2,7 @@
* Copyright (c) 2009, Google Inc.
* All rights reserved.
*
- * Copyright (c) 2009-2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -447,6 +447,10 @@
MSMTITANIUM = 293,
MSM8937 = 294,
APQ8037 = 295,
+ MSMGOLD = 303,
+ APQGOLD = 307,
+ MSMGOLD2 = 308,
+ MSMGOLD3 = 309,
APQTITANIUM = 304,
};
diff --git a/target/msm8916/oem_panel.c b/target/msm8916/oem_panel.c
index 090a1b0..438e68b 100644
--- a/target/msm8916/oem_panel.c
+++ b/target/msm8916/oem_panel.c
@@ -38,6 +38,7 @@
#include "include/panel.h"
#include "panel_display.h"
+#include <blsp_qup.h>
/*---------------------------------------------------------------------------*/
/* GCDB Panel Database */
@@ -758,7 +759,7 @@
/* Set Switch GPIO to DSI2HDMI mode */
target_set_switch_gpio(1);
/* ADV7533 DSI to HDMI Bridge Chip Connected */
- mipi_dsi_i2c_device_init();
+ mipi_dsi_i2c_device_init(BLSP_ID_1, QUP_ID_3);
/* Read ADV Chip ID */
if (!mipi_dsi_i2c_read_byte(ADV7533_MAIN, 0x00, &rev)) {
dprintf(INFO, "ADV7533 Rev ID: 0x%x\n",rev);
diff --git a/target/msm8952/init.c b/target/msm8952/init.c
index 201e652..88ff454 100644
--- a/target/msm8952/init.c
+++ b/target/msm8952/init.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -185,7 +185,7 @@
if(platform_is_msm8956())
vol_up_gpio = TLMM_VOL_UP_BTN_GPIO_8956;
- else if(platform_is_msm8937())
+ else if(platform_is_msm8937() || platform_is_msmgold())
vol_up_gpio = TLMM_VOL_UP_BTN_GPIO_8937;
else
vol_up_gpio = TLMM_VOL_UP_BTN_GPIO;
@@ -263,7 +263,7 @@
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
- if(platform_is_msm8937())
+ if(platform_is_msm8937() || platform_is_msmgold())
{
uint8_t pmi_rev = 0;
uint32_t pmi_type = 0;
@@ -375,12 +375,16 @@
case MSM8956:
case MSM8976:
case MSM8937:
+ case MSMGOLD:
+ case MSMGOLD2:
+ case MSMGOLD3:
board->baseband = BASEBAND_MSM;
break;
case APQ8052:
case APQ8056:
case APQ8076:
case APQ8037:
+ case APQGOLD:
board->baseband = BASEBAND_APQ;
break;
default: